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Merge tag 'hsi-for-4.18' of git://git.kernel.org/pub/scm/linux/kernel/git/sre/linux-hsi
[linux-2.6-block.git] / drivers / tty / serial / ar933x_uart.c
CommitLineData
e3b3d0f5 1// SPDX-License-Identifier: GPL-2.0
d57f341b
GJ		 2/*
3 * Atheros AR933X SoC built-in UART driver
4 *
5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
d57f341b
GJ		 8 */
9
10#include <linux/module.h>
11#include <linux/ioport.h>
12#include <linux/init.h>
13#include <linux/console.h>
14#include <linux/sysrq.h>
15#include <linux/delay.h>
16#include <linux/platform_device.h>
dd910d98
GJ		 17#include <linux/of.h>
18#include <linux/of_platform.h>
d57f341b
GJ		 19#include <linux/tty.h>
20#include <linux/tty_flip.h>
21#include <linux/serial_core.h>
22#include <linux/serial.h>
23#include <linux/slab.h>
24#include <linux/io.h>
25#include <linux/irq.h>
15ef17f6 26#include <linux/clk.h>
d57f341b 27
2dff8ad9
GJ		 28#include <asm/div64.h>
29
d57f341b 30#include <asm/mach-ath79/ar933x_uart.h>
d57f341b
GJ		 31
32#define DRIVER_NAME "ar933x-uart"
33
2dff8ad9
GJ		 34#define AR933X_UART_MAX_SCALE 0xff
35#define AR933X_UART_MAX_STEP 0xffff
36
37#define AR933X_UART_MIN_BAUD 300
38#define AR933X_UART_MAX_BAUD 3000000
39
d57f341b
GJ		 40#define AR933X_DUMMY_STATUS_RD 0x01
41
42static struct uart_driver ar933x_uart_driver;
43
44struct ar933x_uart_port {
45 struct uart_port port;
46 unsigned int ier; /* shadow Interrupt Enable Register */
2dff8ad9
GJ		 47 unsigned int min_baud;
48 unsigned int max_baud;
15ef17f6 49 struct clk *clk;
d57f341b
GJ		 50};
51
12415535
GJ		 52static inline bool ar933x_uart_console_enabled(void)
53{
97f2645f 54 return IS_ENABLED(CONFIG_SERIAL_AR933X_CONSOLE);
12415535
GJ		 55}
56
d57f341b
GJ		 57static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
58 int offset)
59{
60 return readl(up->port.membase + offset);
61}
62
63static inline void ar933x_uart_write(struct ar933x_uart_port *up,
64 int offset, unsigned int value)
65{
66 writel(value, up->port.membase + offset);
67}
68
69static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
70 unsigned int offset,
71 unsigned int mask,
72 unsigned int val)
73{
74 unsigned int t;
75
76 t = ar933x_uart_read(up, offset);
77 t &= ~mask;
78 t |= val;
79 ar933x_uart_write(up, offset, t);
80}
81
82static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
83 unsigned int offset,
84 unsigned int val)
85{
86 ar933x_uart_rmw(up, offset, 0, val);
87}
88
89static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
90 unsigned int offset,
91 unsigned int val)
92{
93 ar933x_uart_rmw(up, offset, val, 0);
94}
95
96static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
97{
98 up->ier |= AR933X_UART_INT_TX_EMPTY;
99 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
100}
101
102static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
103{
104 up->ier &= ~AR933X_UART_INT_TX_EMPTY;
105 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
106}
107
108static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
109{
110 unsigned int rdata;
111
112 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
113 rdata |= AR933X_UART_DATA_TX_CSR;
114 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
115}
116
117static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
118{
f9c1b28e
FF		 119 struct ar933x_uart_port *up =
120 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 121 unsigned long flags;
122 unsigned int rdata;
123
124 spin_lock_irqsave(&up->port.lock, flags);
125 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
126 spin_unlock_irqrestore(&up->port.lock, flags);
127
128 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
129}
130
131static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
132{
133 return TIOCM_CAR;
134}
135
136static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
137{
138}
139
140static void ar933x_uart_start_tx(struct uart_port *port)
141{
f9c1b28e
FF		 142 struct ar933x_uart_port *up =
143 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 144
145 ar933x_uart_start_tx_interrupt(up);
146}
147
148static void ar933x_uart_stop_tx(struct uart_port *port)
149{
f9c1b28e
FF		 150 struct ar933x_uart_port *up =
151 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 152
153 ar933x_uart_stop_tx_interrupt(up);
154}
155
156static void ar933x_uart_stop_rx(struct uart_port *port)
157{
f9c1b28e
FF		 158 struct ar933x_uart_port *up =
159 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 160
161 up->ier &= ~AR933X_UART_INT_RX_VALID;
162 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
163}
164
165static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
166{
f9c1b28e
FF		 167 struct ar933x_uart_port *up =
168 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 169 unsigned long flags;
170
171 spin_lock_irqsave(&up->port.lock, flags);
172 if (break_state == -1)
173 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
174 AR933X_UART_CS_TX_BREAK);
175 else
176 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
177 AR933X_UART_CS_TX_BREAK);
178 spin_unlock_irqrestore(&up->port.lock, flags);
179}
180
2dff8ad9
GJ		 181/*
182 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
183 */
184static unsigned long ar933x_uart_get_baud(unsigned int clk,
185 unsigned int scale,
186 unsigned int step)
187{
188 u64 t;
189 u32 div;
190
191 div = (2 << 16) * (scale + 1);
192 t = clk;
193 t *= step;
194 t += (div / 2);
195 do_div(t, div);
196
197 return t;
198}
199
200static void ar933x_uart_get_scale_step(unsigned int clk,
201 unsigned int baud,
202 unsigned int *scale,
203 unsigned int *step)
204{
205 unsigned int tscale;
206 long min_diff;
207
208 *scale = 0;
209 *step = 0;
210
211 min_diff = baud;
212 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
213 u64 tstep;
214 int diff;
215
216 tstep = baud * (tscale + 1);
217 tstep *= (2 << 16);
218 do_div(tstep, clk);
219
220 if (tstep > AR933X_UART_MAX_STEP)
221 break;
222
223 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
224 if (diff < min_diff) {
225 min_diff = diff;
226 *scale = tscale;
227 *step = tstep;
228 }
229 }
230}
231
d57f341b
GJ		 232static void ar933x_uart_set_termios(struct uart_port *port,
233 struct ktermios *new,
234 struct ktermios *old)
235{
f9c1b28e
FF		 236 struct ar933x_uart_port *up =
237 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 238 unsigned int cs;
239 unsigned long flags;
2dff8ad9 240 unsigned int baud, scale, step;
d57f341b
GJ		 241
242 /* Only CS8 is supported */
243 new->c_cflag &= ~CSIZE;
244 new->c_cflag |= CS8;
245
246 /* Only one stop bit is supported */
247 new->c_cflag &= ~CSTOPB;
248
249 cs = 0;
250 if (new->c_cflag & PARENB) {
251 if (!(new->c_cflag & PARODD))
252 cs |= AR933X_UART_CS_PARITY_EVEN;
253 else
254 cs |= AR933X_UART_CS_PARITY_ODD;
255 } else {
256 cs |= AR933X_UART_CS_PARITY_NONE;
257 }
258
259 /* Mark/space parity is not supported */
260 new->c_cflag &= ~CMSPAR;
261
2dff8ad9
GJ		 262 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
263 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
d57f341b
GJ		 264
265 /*
266 * Ok, we're now changing the port state. Do it with
267 * interrupts disabled.
268 */
269 spin_lock_irqsave(&up->port.lock, flags);
270
2dff8ad9
GJ		 271 /* disable the UART */
272 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
273 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
274
d57f341b
GJ		 275 /* Update the per-port timeout. */
276 uart_update_timeout(port, new->c_cflag, baud);
277
278 up->port.ignore_status_mask = 0;
279
280 /* ignore all characters if CREAD is not set */
281 if ((new->c_cflag & CREAD) == 0)
282 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
283
284 ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
2dff8ad9 285 scale << AR933X_UART_CLOCK_SCALE_S | step);
d57f341b
GJ		 286
287 /* setup configuration register */
288 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
289
290 /* enable host interrupt */
291 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
292 AR933X_UART_CS_HOST_INT_EN);
293
2dff8ad9
GJ		 294 /* reenable the UART */
295 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
296 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
297 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
298
d57f341b
GJ		 299 spin_unlock_irqrestore(&up->port.lock, flags);
300
301 if (tty_termios_baud_rate(new))
302 tty_termios_encode_baud_rate(new, baud, baud);
303}
304
305static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
306{
92a19f9c 307 struct tty_port *port = &up->port.state->port;
d57f341b
GJ		 308 int max_count = 256;
309
d57f341b
GJ		 310 do {
311 unsigned int rdata;
312 unsigned char ch;
313
314 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
315 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
316 break;
317
318 /* remove the character from the FIFO */
319 ar933x_uart_write(up, AR933X_UART_DATA_REG,
320 AR933X_UART_DATA_RX_CSR);
321
d57f341b
GJ		 322 up->port.icount.rx++;
323 ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
324
325 if (uart_handle_sysrq_char(&up->port, ch))
326 continue;
327
328 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
92a19f9c 329 tty_insert_flip_char(port, ch, TTY_NORMAL);
d57f341b
GJ		 330 } while (max_count-- > 0);
331
b16c8e3e 332 spin_unlock(&up->port.lock);
2e124b4a 333 tty_flip_buffer_push(port);
b16c8e3e 334 spin_lock(&up->port.lock);
d57f341b
GJ		 335}
336
337static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
338{
339 struct circ_buf *xmit = &up->port.state->xmit;
340 int count;
341
342 if (uart_tx_stopped(&up->port))
343 return;
344
345 count = up->port.fifosize;
346 do {
347 unsigned int rdata;
348
349 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
350 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
351 break;
352
353 if (up->port.x_char) {
354 ar933x_uart_putc(up, up->port.x_char);
355 up->port.icount.tx++;
356 up->port.x_char = 0;
357 continue;
358 }
359
360 if (uart_circ_empty(xmit))
361 break;
362
363 ar933x_uart_putc(up, xmit->buf[xmit->tail]);
364
365 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
366 up->port.icount.tx++;
367 } while (--count > 0);
368
369 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
370 uart_write_wakeup(&up->port);
371
372 if (!uart_circ_empty(xmit))
373 ar933x_uart_start_tx_interrupt(up);
374}
375
376static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
377{
378 struct ar933x_uart_port *up = dev_id;
379 unsigned int status;
380
381 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
382 if ((status & AR933X_UART_CS_HOST_INT) == 0)
383 return IRQ_NONE;
384
385 spin_lock(&up->port.lock);
386
387 status = ar933x_uart_read(up, AR933X_UART_INT_REG);
388 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
389
390 if (status & AR933X_UART_INT_RX_VALID) {
391 ar933x_uart_write(up, AR933X_UART_INT_REG,
392 AR933X_UART_INT_RX_VALID);
393 ar933x_uart_rx_chars(up);
394 }
395
396 if (status & AR933X_UART_INT_TX_EMPTY) {
397 ar933x_uart_write(up, AR933X_UART_INT_REG,
398 AR933X_UART_INT_TX_EMPTY);
399 ar933x_uart_stop_tx_interrupt(up);
400 ar933x_uart_tx_chars(up);
401 }
402
403 spin_unlock(&up->port.lock);
404
405 return IRQ_HANDLED;
406}
407
408static int ar933x_uart_startup(struct uart_port *port)
409{
f9c1b28e
FF		 410 struct ar933x_uart_port *up =
411 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 412 unsigned long flags;
413 int ret;
414
415 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
416 up->port.irqflags, dev_name(up->port.dev), up);
417 if (ret)
418 return ret;
419
420 spin_lock_irqsave(&up->port.lock, flags);
421
422 /* Enable HOST interrupts */
423 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
424 AR933X_UART_CS_HOST_INT_EN);
425
426 /* Enable RX interrupts */
427 up->ier = AR933X_UART_INT_RX_VALID;
428 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
429
430 spin_unlock_irqrestore(&up->port.lock, flags);
431
432 return 0;
433}
434
435static void ar933x_uart_shutdown(struct uart_port *port)
436{
f9c1b28e
FF		 437 struct ar933x_uart_port *up =
438 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 439
440 /* Disable all interrupts */
441 up->ier = 0;
442 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
443
444 /* Disable break condition */
445 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
446 AR933X_UART_CS_TX_BREAK);
447
448 free_irq(up->port.irq, up);
449}
450
451static const char *ar933x_uart_type(struct uart_port *port)
452{
453 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
454}
455
456static void ar933x_uart_release_port(struct uart_port *port)
457{
458 /* Nothing to release ... */
459}
460
461static int ar933x_uart_request_port(struct uart_port *port)
462{
463 /* UARTs always present */
464 return 0;
465}
466
467static void ar933x_uart_config_port(struct uart_port *port, int flags)
468{
469 if (flags & UART_CONFIG_TYPE)
470 port->type = PORT_AR933X;
471}
472
473static int ar933x_uart_verify_port(struct uart_port *port,
474 struct serial_struct *ser)
475{
f9c1b28e
FF		 476 struct ar933x_uart_port *up =
477 container_of(port, struct ar933x_uart_port, port);
2dff8ad9 478
d57f341b
GJ		 479 if (ser->type != PORT_UNKNOWN &&
480 ser->type != PORT_AR933X)
481 return -EINVAL;
482
483 if (ser->irq < 0 || ser->irq >= NR_IRQS)
484 return -EINVAL;
485
2dff8ad9
GJ		 486 if (ser->baud_base < up->min_baud ||
487 ser->baud_base > up->max_baud)
d57f341b
GJ		 488 return -EINVAL;
489
490 return 0;
491}
492
2331e068 493static const struct uart_ops ar933x_uart_ops = {
d57f341b
GJ		 494 .tx_empty = ar933x_uart_tx_empty,
495 .set_mctrl = ar933x_uart_set_mctrl,
496 .get_mctrl = ar933x_uart_get_mctrl,
497 .stop_tx = ar933x_uart_stop_tx,
498 .start_tx = ar933x_uart_start_tx,
499 .stop_rx = ar933x_uart_stop_rx,
d57f341b
GJ		 500 .break_ctl = ar933x_uart_break_ctl,
501 .startup = ar933x_uart_startup,
502 .shutdown = ar933x_uart_shutdown,
503 .set_termios = ar933x_uart_set_termios,
504 .type = ar933x_uart_type,
505 .release_port = ar933x_uart_release_port,
506 .request_port = ar933x_uart_request_port,
507 .config_port = ar933x_uart_config_port,
508 .verify_port = ar933x_uart_verify_port,
509};
510
d57f341b
GJ		 511static struct ar933x_uart_port *
512ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
513
514static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
515{
516 unsigned int status;
517 unsigned int timeout = 60000;
518
519 /* Wait up to 60ms for the character(s) to be sent. */
520 do {
521 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
522 if (--timeout == 0)
523 break;
524 udelay(1);
525 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
526}
527
528static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
529{
f9c1b28e
FF		 530 struct ar933x_uart_port *up =
531 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 532
533 ar933x_uart_wait_xmitr(up);
534 ar933x_uart_putc(up, ch);
535}
536
537static void ar933x_uart_console_write(struct console *co, const char *s,
538 unsigned int count)
539{
540 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
541 unsigned long flags;
542 unsigned int int_en;
543 int locked = 1;
544
545 local_irq_save(flags);
546
547 if (up->port.sysrq)
548 locked = 0;
549 else if (oops_in_progress)
550 locked = spin_trylock(&up->port.lock);
551 else
552 spin_lock(&up->port.lock);
553
554 /*
555 * First save the IER then disable the interrupts
556 */
557 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
558 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
559
560 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
561
562 /*
563 * Finally, wait for transmitter to become empty
564 * and restore the IER
565 */
566 ar933x_uart_wait_xmitr(up);
567 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
568
569 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
570
571 if (locked)
572 spin_unlock(&up->port.lock);
573
574 local_irq_restore(flags);
575}
576
577static int ar933x_uart_console_setup(struct console *co, char *options)
578{
579 struct ar933x_uart_port *up;
580 int baud = 115200;
581 int bits = 8;
582 int parity = 'n';
583 int flow = 'n';
584
585 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
586 return -EINVAL;
587
588 up = ar933x_console_ports[co->index];
589 if (!up)
590 return -ENODEV;
591
592 if (options)
593 uart_parse_options(options, &baud, &parity, &bits, &flow);
594
595 return uart_set_options(&up->port, co, baud, parity, bits, flow);
596}
597
598static struct console ar933x_uart_console = {
599 .name = "ttyATH",
600 .write = ar933x_uart_console_write,
601 .device = uart_console_device,
602 .setup = ar933x_uart_console_setup,
603 .flags = CON_PRINTBUFFER,
604 .index = -1,
605 .data = &ar933x_uart_driver,
606};
607
608static void ar933x_uart_add_console_port(struct ar933x_uart_port *up)
609{
12415535
GJ		 610 if (!ar933x_uart_console_enabled())
611 return;
612
d57f341b
GJ		 613 ar933x_console_ports[up->port.line] = up;
614}
615
d57f341b
GJ		 616static struct uart_driver ar933x_uart_driver = {
617 .owner = THIS_MODULE,
618 .driver_name = DRIVER_NAME,
619 .dev_name = "ttyATH",
620 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
12415535 621 .cons = NULL, /* filled in runtime */
d57f341b
GJ		 622};
623
9671f099 624static int ar933x_uart_probe(struct platform_device *pdev)
d57f341b 625{
d57f341b
GJ		 626 struct ar933x_uart_port *up;
627 struct uart_port *port;
628 struct resource *mem_res;
629 struct resource *irq_res;
dd910d98 630 struct device_node *np;
2dff8ad9 631 unsigned int baud;
d57f341b
GJ		 632 int id;
633 int ret;
634
dd910d98 635 np = pdev->dev.of_node;
97f2645f 636 if (IS_ENABLED(CONFIG_OF) && np) {
dd910d98
GJ		 637 id = of_alias_get_id(np, "serial");
638 if (id < 0) {
639 dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
640 id);
641 return id;
642 }
643 } else {
644 id = pdev->id;
645 if (id == -1)
646 id = 0;
647 }
d57f341b 648
bb8478d7 649 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
d57f341b
GJ		 650 return -EINVAL;
651
d57f341b
GJ		 652 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
653 if (!irq_res) {
654 dev_err(&pdev->dev, "no IRQ resource\n");
655 return -EINVAL;
656 }
657
a324e4de
GJ		 658 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
659 GFP_KERNEL);
d57f341b
GJ		 660 if (!up)
661 return -ENOMEM;
662
15ef17f6
GJ		 663 up->clk = devm_clk_get(&pdev->dev, "uart");
664 if (IS_ERR(up->clk)) {
665 dev_err(&pdev->dev, "unable to get UART clock\n");
666 return PTR_ERR(up->clk);
667 }
668
d57f341b 669 port = &up->port;
d57f341b 670
071eb0ff 671 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
a324e4de
GJ		 672 port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
673 if (IS_ERR(port->membase))
674 return PTR_ERR(port->membase);
d57f341b 675
15ef17f6
GJ		 676 ret = clk_prepare_enable(up->clk);
677 if (ret)
678 return ret;
679
680 port->uartclk = clk_get_rate(up->clk);
681 if (!port->uartclk) {
682 ret = -EINVAL;
683 goto err_disable_clk;
684 }
685
a324e4de 686 port->mapbase = mem_res->start;
d57f341b
GJ		 687 port->line = id;
688 port->irq = irq_res->start;
689 port->dev = &pdev->dev;
690 port->type = PORT_AR933X;
691 port->iotype = UPIO_MEM32;
d57f341b
GJ		 692
693 port->regshift = 2;
694 port->fifosize = AR933X_UART_FIFO_SIZE;
695 port->ops = &ar933x_uart_ops;
696
2dff8ad9
GJ		 697 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
698 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
699
700 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
701 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
702
d57f341b
GJ		 703 ar933x_uart_add_console_port(up);
704
705 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
706 if (ret)
15ef17f6 707 goto err_disable_clk;
d57f341b
GJ		 708
709 platform_set_drvdata(pdev, up);
710 return 0;
15ef17f6
GJ		 711
712err_disable_clk:
713 clk_disable_unprepare(up->clk);
714 return ret;
d57f341b
GJ		 715}
716
ae8d8a14 717static int ar933x_uart_remove(struct platform_device *pdev)
d57f341b
GJ		 718{
719 struct ar933x_uart_port *up;
720
721 up = platform_get_drvdata(pdev);
d57f341b 722
15ef17f6 723 if (up) {
d57f341b 724 uart_remove_one_port(&ar933x_uart_driver, &up->port);
15ef17f6
GJ		 725 clk_disable_unprepare(up->clk);
726 }
d57f341b
GJ		 727
728 return 0;
729}
730
dd910d98
GJ		 731#ifdef CONFIG_OF
732static const struct of_device_id ar933x_uart_of_ids[] = {
733 { .compatible = "qca,ar9330-uart" },
734 {},
735};
736MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
737#endif
738
d57f341b
GJ		 739static struct platform_driver ar933x_uart_platform_driver = {
740 .probe = ar933x_uart_probe,
2d47b716 741 .remove = ar933x_uart_remove,
d57f341b
GJ		 742 .driver = {
743 .name = DRIVER_NAME,
dd910d98 744 .of_match_table = of_match_ptr(ar933x_uart_of_ids),
d57f341b
GJ		 745 },
746};
747
748static int __init ar933x_uart_init(void)
749{
750 int ret;
751
12415535
GJ		 752 if (ar933x_uart_console_enabled())
753 ar933x_uart_driver.cons = &ar933x_uart_console;
754
d57f341b
GJ		 755 ret = uart_register_driver(&ar933x_uart_driver);
756 if (ret)
757 goto err_out;
758
759 ret = platform_driver_register(&ar933x_uart_platform_driver);
760 if (ret)
761 goto err_unregister_uart_driver;
762
763 return 0;
764
765err_unregister_uart_driver:
766 uart_unregister_driver(&ar933x_uart_driver);
767err_out:
768 return ret;
769}
770
771static void __exit ar933x_uart_exit(void)
772{
773 platform_driver_unregister(&ar933x_uart_platform_driver);
774 uart_unregister_driver(&ar933x_uart_driver);
775}
776
777module_init(ar933x_uart_init);
778module_exit(ar933x_uart_exit);
779
780MODULE_DESCRIPTION("Atheros AR933X UART driver");
781MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
782MODULE_LICENSE("GPL v2");
783MODULE_ALIAS("platform:" DRIVER_NAME);
Linux 6.x block layer and io_uring tree(s)