projects / linux-2.6-block.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
libnvdimm/altmap: Track namespace boundaries in altmap
[linux-2.6-block.git] / drivers / tty / serial / ar933x_uart.c
CommitLineData
e3b3d0f5 1// SPDX-License-Identifier: GPL-2.0
d57f341b
GJ		 2/*
3 * Atheros AR933X SoC built-in UART driver
4 *
5 * Copyright (C) 2011 Gabor Juhos <juhosg@openwrt.org>
6 *
7 * Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
d57f341b
GJ		 8 */
9
10#include <linux/module.h>
11#include <linux/ioport.h>
12#include <linux/init.h>
13#include <linux/console.h>
14#include <linux/sysrq.h>
15#include <linux/delay.h>
16#include <linux/platform_device.h>
dd910d98
GJ		 17#include <linux/of.h>
18#include <linux/of_platform.h>
d57f341b
GJ		 19#include <linux/tty.h>
20#include <linux/tty_flip.h>
21#include <linux/serial_core.h>
22#include <linux/serial.h>
23#include <linux/slab.h>
24#include <linux/io.h>
25#include <linux/irq.h>
15ef17f6 26#include <linux/clk.h>
d57f341b 27
2dff8ad9
GJ		 28#include <asm/div64.h>
29
d57f341b 30#include <asm/mach-ath79/ar933x_uart.h>
d57f341b
GJ		 31
32#define DRIVER_NAME "ar933x-uart"
33
2dff8ad9
GJ		 34#define AR933X_UART_MAX_SCALE 0xff
35#define AR933X_UART_MAX_STEP 0xffff
36
37#define AR933X_UART_MIN_BAUD 300
38#define AR933X_UART_MAX_BAUD 3000000
39
d57f341b
GJ		 40#define AR933X_DUMMY_STATUS_RD 0x01
41
42static struct uart_driver ar933x_uart_driver;
43
44struct ar933x_uart_port {
45 struct uart_port port;
46 unsigned int ier; /* shadow Interrupt Enable Register */
2dff8ad9
GJ		 47 unsigned int min_baud;
48 unsigned int max_baud;
15ef17f6 49 struct clk *clk;
d57f341b
GJ		 50};
51
52static inline unsigned int ar933x_uart_read(struct ar933x_uart_port *up,
53 int offset)
54{
55 return readl(up->port.membase + offset);
56}
57
58static inline void ar933x_uart_write(struct ar933x_uart_port *up,
59 int offset, unsigned int value)
60{
61 writel(value, up->port.membase + offset);
62}
63
64static inline void ar933x_uart_rmw(struct ar933x_uart_port *up,
65 unsigned int offset,
66 unsigned int mask,
67 unsigned int val)
68{
69 unsigned int t;
70
71 t = ar933x_uart_read(up, offset);
72 t &= ~mask;
73 t |= val;
74 ar933x_uart_write(up, offset, t);
75}
76
77static inline void ar933x_uart_rmw_set(struct ar933x_uart_port *up,
78 unsigned int offset,
79 unsigned int val)
80{
81 ar933x_uart_rmw(up, offset, 0, val);
82}
83
84static inline void ar933x_uart_rmw_clear(struct ar933x_uart_port *up,
85 unsigned int offset,
86 unsigned int val)
87{
88 ar933x_uart_rmw(up, offset, val, 0);
89}
90
91static inline void ar933x_uart_start_tx_interrupt(struct ar933x_uart_port *up)
92{
93 up->ier |= AR933X_UART_INT_TX_EMPTY;
94 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
95}
96
97static inline void ar933x_uart_stop_tx_interrupt(struct ar933x_uart_port *up)
98{
99 up->ier &= ~AR933X_UART_INT_TX_EMPTY;
100 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
101}
102
103static inline void ar933x_uart_putc(struct ar933x_uart_port *up, int ch)
104{
105 unsigned int rdata;
106
107 rdata = ch & AR933X_UART_DATA_TX_RX_MASK;
108 rdata |= AR933X_UART_DATA_TX_CSR;
109 ar933x_uart_write(up, AR933X_UART_DATA_REG, rdata);
110}
111
112static unsigned int ar933x_uart_tx_empty(struct uart_port *port)
113{
f9c1b28e
FF		 114 struct ar933x_uart_port *up =
115 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 116 unsigned long flags;
117 unsigned int rdata;
118
119 spin_lock_irqsave(&up->port.lock, flags);
120 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
121 spin_unlock_irqrestore(&up->port.lock, flags);
122
123 return (rdata & AR933X_UART_DATA_TX_CSR) ? 0 : TIOCSER_TEMT;
124}
125
126static unsigned int ar933x_uart_get_mctrl(struct uart_port *port)
127{
128 return TIOCM_CAR;
129}
130
131static void ar933x_uart_set_mctrl(struct uart_port *port, unsigned int mctrl)
132{
133}
134
135static void ar933x_uart_start_tx(struct uart_port *port)
136{
f9c1b28e
FF		 137 struct ar933x_uart_port *up =
138 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 139
140 ar933x_uart_start_tx_interrupt(up);
141}
142
143static void ar933x_uart_stop_tx(struct uart_port *port)
144{
f9c1b28e
FF		 145 struct ar933x_uart_port *up =
146 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 147
148 ar933x_uart_stop_tx_interrupt(up);
149}
150
151static void ar933x_uart_stop_rx(struct uart_port *port)
152{
f9c1b28e
FF		 153 struct ar933x_uart_port *up =
154 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 155
156 up->ier &= ~AR933X_UART_INT_RX_VALID;
157 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
158}
159
160static void ar933x_uart_break_ctl(struct uart_port *port, int break_state)
161{
f9c1b28e
FF		 162 struct ar933x_uart_port *up =
163 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 164 unsigned long flags;
165
166 spin_lock_irqsave(&up->port.lock, flags);
167 if (break_state == -1)
168 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
169 AR933X_UART_CS_TX_BREAK);
170 else
171 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
172 AR933X_UART_CS_TX_BREAK);
173 spin_unlock_irqrestore(&up->port.lock, flags);
174}
175
2dff8ad9
GJ		 176/*
177 * baudrate = (clk / (scale + 1)) * (step * (1 / 2^17))
178 */
179static unsigned long ar933x_uart_get_baud(unsigned int clk,
180 unsigned int scale,
181 unsigned int step)
182{
183 u64 t;
184 u32 div;
185
186 div = (2 << 16) * (scale + 1);
187 t = clk;
188 t *= step;
189 t += (div / 2);
190 do_div(t, div);
191
192 return t;
193}
194
195static void ar933x_uart_get_scale_step(unsigned int clk,
196 unsigned int baud,
197 unsigned int *scale,
198 unsigned int *step)
199{
200 unsigned int tscale;
201 long min_diff;
202
203 *scale = 0;
204 *step = 0;
205
206 min_diff = baud;
207 for (tscale = 0; tscale < AR933X_UART_MAX_SCALE; tscale++) {
208 u64 tstep;
209 int diff;
210
211 tstep = baud * (tscale + 1);
212 tstep *= (2 << 16);
213 do_div(tstep, clk);
214
215 if (tstep > AR933X_UART_MAX_STEP)
216 break;
217
218 diff = abs(ar933x_uart_get_baud(clk, tscale, tstep) - baud);
219 if (diff < min_diff) {
220 min_diff = diff;
221 *scale = tscale;
222 *step = tstep;
223 }
224 }
225}
226
d57f341b
GJ		 227static void ar933x_uart_set_termios(struct uart_port *port,
228 struct ktermios *new,
229 struct ktermios *old)
230{
f9c1b28e
FF		 231 struct ar933x_uart_port *up =
232 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 233 unsigned int cs;
234 unsigned long flags;
2dff8ad9 235 unsigned int baud, scale, step;
d57f341b
GJ		 236
237 /* Only CS8 is supported */
238 new->c_cflag &= ~CSIZE;
239 new->c_cflag |= CS8;
240
241 /* Only one stop bit is supported */
242 new->c_cflag &= ~CSTOPB;
243
244 cs = 0;
245 if (new->c_cflag & PARENB) {
246 if (!(new->c_cflag & PARODD))
247 cs |= AR933X_UART_CS_PARITY_EVEN;
248 else
249 cs |= AR933X_UART_CS_PARITY_ODD;
250 } else {
251 cs |= AR933X_UART_CS_PARITY_NONE;
252 }
253
254 /* Mark/space parity is not supported */
255 new->c_cflag &= ~CMSPAR;
256
2dff8ad9
GJ		 257 baud = uart_get_baud_rate(port, new, old, up->min_baud, up->max_baud);
258 ar933x_uart_get_scale_step(port->uartclk, baud, &scale, &step);
d57f341b
GJ		 259
260 /*
261 * Ok, we're now changing the port state. Do it with
262 * interrupts disabled.
263 */
264 spin_lock_irqsave(&up->port.lock, flags);
265
2dff8ad9
GJ		 266 /* disable the UART */
267 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
268 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S);
269
d57f341b
GJ		 270 /* Update the per-port timeout. */
271 uart_update_timeout(port, new->c_cflag, baud);
272
273 up->port.ignore_status_mask = 0;
274
275 /* ignore all characters if CREAD is not set */
276 if ((new->c_cflag & CREAD) == 0)
277 up->port.ignore_status_mask |= AR933X_DUMMY_STATUS_RD;
278
279 ar933x_uart_write(up, AR933X_UART_CLOCK_REG,
2dff8ad9 280 scale << AR933X_UART_CLOCK_SCALE_S | step);
d57f341b
GJ		 281
282 /* setup configuration register */
283 ar933x_uart_rmw(up, AR933X_UART_CS_REG, AR933X_UART_CS_PARITY_M, cs);
284
285 /* enable host interrupt */
286 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
287 AR933X_UART_CS_HOST_INT_EN);
288
2dff8ad9
GJ		 289 /* reenable the UART */
290 ar933x_uart_rmw(up, AR933X_UART_CS_REG,
291 AR933X_UART_CS_IF_MODE_M << AR933X_UART_CS_IF_MODE_S,
292 AR933X_UART_CS_IF_MODE_DCE << AR933X_UART_CS_IF_MODE_S);
293
d57f341b
GJ		 294 spin_unlock_irqrestore(&up->port.lock, flags);
295
296 if (tty_termios_baud_rate(new))
297 tty_termios_encode_baud_rate(new, baud, baud);
298}
299
300static void ar933x_uart_rx_chars(struct ar933x_uart_port *up)
301{
92a19f9c 302 struct tty_port *port = &up->port.state->port;
d57f341b
GJ		 303 int max_count = 256;
304
d57f341b
GJ		 305 do {
306 unsigned int rdata;
307 unsigned char ch;
308
309 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
310 if ((rdata & AR933X_UART_DATA_RX_CSR) == 0)
311 break;
312
313 /* remove the character from the FIFO */
314 ar933x_uart_write(up, AR933X_UART_DATA_REG,
315 AR933X_UART_DATA_RX_CSR);
316
d57f341b
GJ		 317 up->port.icount.rx++;
318 ch = rdata & AR933X_UART_DATA_TX_RX_MASK;
319
320 if (uart_handle_sysrq_char(&up->port, ch))
321 continue;
322
323 if ((up->port.ignore_status_mask & AR933X_DUMMY_STATUS_RD) == 0)
92a19f9c 324 tty_insert_flip_char(port, ch, TTY_NORMAL);
d57f341b
GJ		 325 } while (max_count-- > 0);
326
b16c8e3e 327 spin_unlock(&up->port.lock);
2e124b4a 328 tty_flip_buffer_push(port);
b16c8e3e 329 spin_lock(&up->port.lock);
d57f341b
GJ		 330}
331
332static void ar933x_uart_tx_chars(struct ar933x_uart_port *up)
333{
334 struct circ_buf *xmit = &up->port.state->xmit;
335 int count;
336
337 if (uart_tx_stopped(&up->port))
338 return;
339
340 count = up->port.fifosize;
341 do {
342 unsigned int rdata;
343
344 rdata = ar933x_uart_read(up, AR933X_UART_DATA_REG);
345 if ((rdata & AR933X_UART_DATA_TX_CSR) == 0)
346 break;
347
348 if (up->port.x_char) {
349 ar933x_uart_putc(up, up->port.x_char);
350 up->port.icount.tx++;
351 up->port.x_char = 0;
352 continue;
353 }
354
355 if (uart_circ_empty(xmit))
356 break;
357
358 ar933x_uart_putc(up, xmit->buf[xmit->tail]);
359
360 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
361 up->port.icount.tx++;
362 } while (--count > 0);
363
364 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
365 uart_write_wakeup(&up->port);
366
367 if (!uart_circ_empty(xmit))
368 ar933x_uart_start_tx_interrupt(up);
369}
370
371static irqreturn_t ar933x_uart_interrupt(int irq, void *dev_id)
372{
373 struct ar933x_uart_port *up = dev_id;
374 unsigned int status;
375
376 status = ar933x_uart_read(up, AR933X_UART_CS_REG);
377 if ((status & AR933X_UART_CS_HOST_INT) == 0)
378 return IRQ_NONE;
379
380 spin_lock(&up->port.lock);
381
382 status = ar933x_uart_read(up, AR933X_UART_INT_REG);
383 status &= ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
384
385 if (status & AR933X_UART_INT_RX_VALID) {
386 ar933x_uart_write(up, AR933X_UART_INT_REG,
387 AR933X_UART_INT_RX_VALID);
388 ar933x_uart_rx_chars(up);
389 }
390
391 if (status & AR933X_UART_INT_TX_EMPTY) {
392 ar933x_uart_write(up, AR933X_UART_INT_REG,
393 AR933X_UART_INT_TX_EMPTY);
394 ar933x_uart_stop_tx_interrupt(up);
395 ar933x_uart_tx_chars(up);
396 }
397
398 spin_unlock(&up->port.lock);
399
400 return IRQ_HANDLED;
401}
402
403static int ar933x_uart_startup(struct uart_port *port)
404{
f9c1b28e
FF		 405 struct ar933x_uart_port *up =
406 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 407 unsigned long flags;
408 int ret;
409
410 ret = request_irq(up->port.irq, ar933x_uart_interrupt,
411 up->port.irqflags, dev_name(up->port.dev), up);
412 if (ret)
413 return ret;
414
415 spin_lock_irqsave(&up->port.lock, flags);
416
417 /* Enable HOST interrupts */
418 ar933x_uart_rmw_set(up, AR933X_UART_CS_REG,
419 AR933X_UART_CS_HOST_INT_EN);
420
421 /* Enable RX interrupts */
422 up->ier = AR933X_UART_INT_RX_VALID;
423 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
424
425 spin_unlock_irqrestore(&up->port.lock, flags);
426
427 return 0;
428}
429
430static void ar933x_uart_shutdown(struct uart_port *port)
431{
f9c1b28e
FF		 432 struct ar933x_uart_port *up =
433 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 434
435 /* Disable all interrupts */
436 up->ier = 0;
437 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, up->ier);
438
439 /* Disable break condition */
440 ar933x_uart_rmw_clear(up, AR933X_UART_CS_REG,
441 AR933X_UART_CS_TX_BREAK);
442
443 free_irq(up->port.irq, up);
444}
445
446static const char *ar933x_uart_type(struct uart_port *port)
447{
448 return (port->type == PORT_AR933X) ? "AR933X UART" : NULL;
449}
450
451static void ar933x_uart_release_port(struct uart_port *port)
452{
453 /* Nothing to release ... */
454}
455
456static int ar933x_uart_request_port(struct uart_port *port)
457{
458 /* UARTs always present */
459 return 0;
460}
461
462static void ar933x_uart_config_port(struct uart_port *port, int flags)
463{
464 if (flags & UART_CONFIG_TYPE)
465 port->type = PORT_AR933X;
466}
467
468static int ar933x_uart_verify_port(struct uart_port *port,
469 struct serial_struct *ser)
470{
f9c1b28e
FF		 471 struct ar933x_uart_port *up =
472 container_of(port, struct ar933x_uart_port, port);
2dff8ad9 473
d57f341b
GJ		 474 if (ser->type != PORT_UNKNOWN &&
475 ser->type != PORT_AR933X)
476 return -EINVAL;
477
478 if (ser->irq < 0 || ser->irq >= NR_IRQS)
479 return -EINVAL;
480
2dff8ad9
GJ		 481 if (ser->baud_base < up->min_baud ||
482 ser->baud_base > up->max_baud)
d57f341b
GJ		 483 return -EINVAL;
484
485 return 0;
486}
487
2331e068 488static const struct uart_ops ar933x_uart_ops = {
d57f341b
GJ		 489 .tx_empty = ar933x_uart_tx_empty,
490 .set_mctrl = ar933x_uart_set_mctrl,
491 .get_mctrl = ar933x_uart_get_mctrl,
492 .stop_tx = ar933x_uart_stop_tx,
493 .start_tx = ar933x_uart_start_tx,
494 .stop_rx = ar933x_uart_stop_rx,
d57f341b
GJ		 495 .break_ctl = ar933x_uart_break_ctl,
496 .startup = ar933x_uart_startup,
497 .shutdown = ar933x_uart_shutdown,
498 .set_termios = ar933x_uart_set_termios,
499 .type = ar933x_uart_type,
500 .release_port = ar933x_uart_release_port,
501 .request_port = ar933x_uart_request_port,
502 .config_port = ar933x_uart_config_port,
503 .verify_port = ar933x_uart_verify_port,
504};
505
72ff51d8 506#ifdef CONFIG_SERIAL_AR933X_CONSOLE
d57f341b
GJ		 507static struct ar933x_uart_port *
508ar933x_console_ports[CONFIG_SERIAL_AR933X_NR_UARTS];
509
510static void ar933x_uart_wait_xmitr(struct ar933x_uart_port *up)
511{
512 unsigned int status;
513 unsigned int timeout = 60000;
514
515 /* Wait up to 60ms for the character(s) to be sent. */
516 do {
517 status = ar933x_uart_read(up, AR933X_UART_DATA_REG);
518 if (--timeout == 0)
519 break;
520 udelay(1);
521 } while ((status & AR933X_UART_DATA_TX_CSR) == 0);
522}
523
524static void ar933x_uart_console_putchar(struct uart_port *port, int ch)
525{
f9c1b28e
FF		 526 struct ar933x_uart_port *up =
527 container_of(port, struct ar933x_uart_port, port);
d57f341b
GJ		 528
529 ar933x_uart_wait_xmitr(up);
530 ar933x_uart_putc(up, ch);
531}
532
533static void ar933x_uart_console_write(struct console *co, const char *s,
534 unsigned int count)
535{
536 struct ar933x_uart_port *up = ar933x_console_ports[co->index];
537 unsigned long flags;
538 unsigned int int_en;
539 int locked = 1;
540
541 local_irq_save(flags);
542
543 if (up->port.sysrq)
544 locked = 0;
545 else if (oops_in_progress)
546 locked = spin_trylock(&up->port.lock);
547 else
548 spin_lock(&up->port.lock);
549
550 /*
551 * First save the IER then disable the interrupts
552 */
553 int_en = ar933x_uart_read(up, AR933X_UART_INT_EN_REG);
554 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, 0);
555
556 uart_console_write(&up->port, s, count, ar933x_uart_console_putchar);
557
558 /*
559 * Finally, wait for transmitter to become empty
560 * and restore the IER
561 */
562 ar933x_uart_wait_xmitr(up);
563 ar933x_uart_write(up, AR933X_UART_INT_EN_REG, int_en);
564
565 ar933x_uart_write(up, AR933X_UART_INT_REG, AR933X_UART_INT_ALLINTS);
566
567 if (locked)
568 spin_unlock(&up->port.lock);
569
570 local_irq_restore(flags);
571}
572
573static int ar933x_uart_console_setup(struct console *co, char *options)
574{
575 struct ar933x_uart_port *up;
576 int baud = 115200;
577 int bits = 8;
578 int parity = 'n';
579 int flow = 'n';
580
581 if (co->index < 0 || co->index >= CONFIG_SERIAL_AR933X_NR_UARTS)
582 return -EINVAL;
583
584 up = ar933x_console_ports[co->index];
585 if (!up)
586 return -ENODEV;
587
588 if (options)
589 uart_parse_options(options, &baud, &parity, &bits, &flow);
590
591 return uart_set_options(&up->port, co, baud, parity, bits, flow);
592}
593
594static struct console ar933x_uart_console = {
595 .name = "ttyATH",
596 .write = ar933x_uart_console_write,
597 .device = uart_console_device,
598 .setup = ar933x_uart_console_setup,
599 .flags = CON_PRINTBUFFER,
600 .index = -1,
601 .data = &ar933x_uart_driver,
602};
72ff51d8 603#endif /* CONFIG_SERIAL_AR933X_CONSOLE */
d57f341b 604
d57f341b
GJ		 605static struct uart_driver ar933x_uart_driver = {
606 .owner = THIS_MODULE,
607 .driver_name = DRIVER_NAME,
608 .dev_name = "ttyATH",
609 .nr = CONFIG_SERIAL_AR933X_NR_UARTS,
12415535 610 .cons = NULL, /* filled in runtime */
d57f341b
GJ		 611};
612
9671f099 613static int ar933x_uart_probe(struct platform_device *pdev)
d57f341b 614{
d57f341b
GJ		 615 struct ar933x_uart_port *up;
616 struct uart_port *port;
617 struct resource *mem_res;
618 struct resource *irq_res;
dd910d98 619 struct device_node *np;
2dff8ad9 620 unsigned int baud;
d57f341b
GJ		 621 int id;
622 int ret;
623
dd910d98 624 np = pdev->dev.of_node;
97f2645f 625 if (IS_ENABLED(CONFIG_OF) && np) {
dd910d98
GJ		 626 id = of_alias_get_id(np, "serial");
627 if (id < 0) {
628 dev_err(&pdev->dev, "unable to get alias id, err=%d\n",
629 id);
630 return id;
631 }
632 } else {
633 id = pdev->id;
634 if (id == -1)
635 id = 0;
636 }
d57f341b 637
bb8478d7 638 if (id >= CONFIG_SERIAL_AR933X_NR_UARTS)
d57f341b
GJ		 639 return -EINVAL;
640
d57f341b
GJ		 641 irq_res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
642 if (!irq_res) {
643 dev_err(&pdev->dev, "no IRQ resource\n");
644 return -EINVAL;
645 }
646
a324e4de
GJ		 647 up = devm_kzalloc(&pdev->dev, sizeof(struct ar933x_uart_port),
648 GFP_KERNEL);
d57f341b
GJ		 649 if (!up)
650 return -ENOMEM;
651
15ef17f6
GJ		 652 up->clk = devm_clk_get(&pdev->dev, "uart");
653 if (IS_ERR(up->clk)) {
654 dev_err(&pdev->dev, "unable to get UART clock\n");
655 return PTR_ERR(up->clk);
656 }
657
d57f341b 658 port = &up->port;
d57f341b 659
071eb0ff 660 mem_res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
a324e4de
GJ		 661 port->membase = devm_ioremap_resource(&pdev->dev, mem_res);
662 if (IS_ERR(port->membase))
663 return PTR_ERR(port->membase);
d57f341b 664
15ef17f6
GJ		 665 ret = clk_prepare_enable(up->clk);
666 if (ret)
667 return ret;
668
669 port->uartclk = clk_get_rate(up->clk);
670 if (!port->uartclk) {
671 ret = -EINVAL;
672 goto err_disable_clk;
673 }
674
a324e4de 675 port->mapbase = mem_res->start;
d57f341b
GJ		 676 port->line = id;
677 port->irq = irq_res->start;
678 port->dev = &pdev->dev;
679 port->type = PORT_AR933X;
680 port->iotype = UPIO_MEM32;
d57f341b
GJ		 681
682 port->regshift = 2;
683 port->fifosize = AR933X_UART_FIFO_SIZE;
684 port->ops = &ar933x_uart_ops;
685
2dff8ad9
GJ		 686 baud = ar933x_uart_get_baud(port->uartclk, AR933X_UART_MAX_SCALE, 1);
687 up->min_baud = max_t(unsigned int, baud, AR933X_UART_MIN_BAUD);
688
689 baud = ar933x_uart_get_baud(port->uartclk, 0, AR933X_UART_MAX_STEP);
690 up->max_baud = min_t(unsigned int, baud, AR933X_UART_MAX_BAUD);
691
72ff51d8
PŠ		 692#ifdef CONFIG_SERIAL_AR933X_CONSOLE
693 ar933x_console_ports[up->port.line] = up;
694#endif
d57f341b
GJ		 695
696 ret = uart_add_one_port(&ar933x_uart_driver, &up->port);
697 if (ret)
15ef17f6 698 goto err_disable_clk;
d57f341b
GJ		 699
700 platform_set_drvdata(pdev, up);
701 return 0;
15ef17f6
GJ		 702
703err_disable_clk:
704 clk_disable_unprepare(up->clk);
705 return ret;
d57f341b
GJ		 706}
707
ae8d8a14 708static int ar933x_uart_remove(struct platform_device *pdev)
d57f341b
GJ		 709{
710 struct ar933x_uart_port *up;
711
712 up = platform_get_drvdata(pdev);
d57f341b 713
15ef17f6 714 if (up) {
d57f341b 715 uart_remove_one_port(&ar933x_uart_driver, &up->port);
15ef17f6
GJ		 716 clk_disable_unprepare(up->clk);
717 }
d57f341b
GJ		 718
719 return 0;
720}
721
dd910d98
GJ		 722#ifdef CONFIG_OF
723static const struct of_device_id ar933x_uart_of_ids[] = {
724 { .compatible = "qca,ar9330-uart" },
725 {},
726};
727MODULE_DEVICE_TABLE(of, ar933x_uart_of_ids);
728#endif
729
d57f341b
GJ		 730static struct platform_driver ar933x_uart_platform_driver = {
731 .probe = ar933x_uart_probe,
2d47b716 732 .remove = ar933x_uart_remove,
d57f341b
GJ		 733 .driver = {
734 .name = DRIVER_NAME,
dd910d98 735 .of_match_table = of_match_ptr(ar933x_uart_of_ids),
d57f341b
GJ		 736 },
737};
738
739static int __init ar933x_uart_init(void)
740{
741 int ret;
742
72ff51d8
PŠ		 743#ifdef CONFIG_SERIAL_AR933X_CONSOLE
744 ar933x_uart_driver.cons = &ar933x_uart_console;
745#endif
12415535 746
d57f341b
GJ		 747 ret = uart_register_driver(&ar933x_uart_driver);
748 if (ret)
749 goto err_out;
750
751 ret = platform_driver_register(&ar933x_uart_platform_driver);
752 if (ret)
753 goto err_unregister_uart_driver;
754
755 return 0;
756
757err_unregister_uart_driver:
758 uart_unregister_driver(&ar933x_uart_driver);
759err_out:
760 return ret;
761}
762
763static void __exit ar933x_uart_exit(void)
764{
765 platform_driver_unregister(&ar933x_uart_platform_driver);
766 uart_unregister_driver(&ar933x_uart_driver);
767}
768
769module_init(ar933x_uart_init);
770module_exit(ar933x_uart_exit);
771
772MODULE_DESCRIPTION("Atheros AR933X UART driver");
773MODULE_AUTHOR("Gabor Juhos <juhosg@openwrt.org>");
774MODULE_LICENSE("GPL v2");
775MODULE_ALIAS("platform:" DRIVER_NAME);
Linux 6.x block layer and io_uring tree(s)