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d4ac42a5 KG |
1 | /* |
2 | * Driver for GRLIB serial ports (APBUART) | |
3 | * | |
4 | * Based on linux/drivers/serial/amba.c | |
5 | * | |
6 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | |
7 | * Copyright (C) 2003 Konrad Eisele <eiselekd@web.de> | |
8 | * Copyright (C) 2006 Daniel Hellstrom <daniel@gaisler.com>, Aeroflex Gaisler AB | |
9 | * Copyright (C) 2008 Gilead Kutnick <kutnickg@zin-tech.com> | |
10 | * Copyright (C) 2009 Kristoffer Glembo <kristoffer@gaisler.com>, Aeroflex Gaisler AB | |
11 | */ | |
12 | ||
13 | #if defined(CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
14 | #define SUPPORT_SYSRQ | |
15 | #endif | |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/tty.h> | |
ee160a38 | 19 | #include <linux/tty_flip.h> |
d4ac42a5 KG |
20 | #include <linux/ioport.h> |
21 | #include <linux/init.h> | |
22 | #include <linux/serial.h> | |
23 | #include <linux/console.h> | |
24 | #include <linux/sysrq.h> | |
25 | #include <linux/kthread.h> | |
26 | #include <linux/device.h> | |
27 | #include <linux/of.h> | |
28 | #include <linux/of_device.h> | |
ddaf1b27 | 29 | #include <linux/of_platform.h> |
f28f3313 | 30 | #include <linux/of_irq.h> |
d4ac42a5 KG |
31 | #include <linux/platform_device.h> |
32 | #include <linux/io.h> | |
33 | #include <linux/serial_core.h> | |
34 | #include <asm/irq.h> | |
d4ac42a5 KG |
35 | |
36 | #include "apbuart.h" | |
37 | ||
38 | #define SERIAL_APBUART_MAJOR TTY_MAJOR | |
39 | #define SERIAL_APBUART_MINOR 64 | |
40 | #define UART_DUMMY_RSR_RX 0x8000 /* for ignore all read */ | |
41 | ||
42 | static void apbuart_tx_chars(struct uart_port *port); | |
43 | ||
44 | static void apbuart_stop_tx(struct uart_port *port) | |
45 | { | |
46 | unsigned int cr; | |
47 | ||
48 | cr = UART_GET_CTRL(port); | |
49 | cr &= ~UART_CTRL_TI; | |
50 | UART_PUT_CTRL(port, cr); | |
51 | } | |
52 | ||
53 | static void apbuart_start_tx(struct uart_port *port) | |
54 | { | |
55 | unsigned int cr; | |
56 | ||
57 | cr = UART_GET_CTRL(port); | |
58 | cr |= UART_CTRL_TI; | |
59 | UART_PUT_CTRL(port, cr); | |
60 | ||
61 | if (UART_GET_STATUS(port) & UART_STATUS_THE) | |
62 | apbuart_tx_chars(port); | |
63 | } | |
64 | ||
65 | static void apbuart_stop_rx(struct uart_port *port) | |
66 | { | |
67 | unsigned int cr; | |
68 | ||
69 | cr = UART_GET_CTRL(port); | |
70 | cr &= ~(UART_CTRL_RI); | |
71 | UART_PUT_CTRL(port, cr); | |
72 | } | |
73 | ||
74 | static void apbuart_enable_ms(struct uart_port *port) | |
75 | { | |
76 | /* No modem status change interrupts for APBUART */ | |
77 | } | |
78 | ||
79 | static void apbuart_rx_chars(struct uart_port *port) | |
80 | { | |
81 | struct tty_struct *tty = port->state->port.tty; | |
82 | unsigned int status, ch, rsr, flag; | |
83 | unsigned int max_chars = port->fifosize; | |
84 | ||
85 | status = UART_GET_STATUS(port); | |
86 | ||
87 | while (UART_RX_DATA(status) && (max_chars--)) { | |
88 | ||
89 | ch = UART_GET_CHAR(port); | |
90 | flag = TTY_NORMAL; | |
91 | ||
92 | port->icount.rx++; | |
93 | ||
94 | rsr = UART_GET_STATUS(port) | UART_DUMMY_RSR_RX; | |
95 | UART_PUT_STATUS(port, 0); | |
96 | if (rsr & UART_STATUS_ERR) { | |
97 | ||
98 | if (rsr & UART_STATUS_BR) { | |
99 | rsr &= ~(UART_STATUS_FE | UART_STATUS_PE); | |
100 | port->icount.brk++; | |
101 | if (uart_handle_break(port)) | |
102 | goto ignore_char; | |
103 | } else if (rsr & UART_STATUS_PE) { | |
104 | port->icount.parity++; | |
105 | } else if (rsr & UART_STATUS_FE) { | |
106 | port->icount.frame++; | |
107 | } | |
108 | if (rsr & UART_STATUS_OE) | |
109 | port->icount.overrun++; | |
110 | ||
111 | rsr &= port->read_status_mask; | |
112 | ||
113 | if (rsr & UART_STATUS_PE) | |
114 | flag = TTY_PARITY; | |
115 | else if (rsr & UART_STATUS_FE) | |
116 | flag = TTY_FRAME; | |
117 | } | |
118 | ||
119 | if (uart_handle_sysrq_char(port, ch)) | |
120 | goto ignore_char; | |
121 | ||
122 | uart_insert_char(port, rsr, UART_STATUS_OE, ch, flag); | |
123 | ||
124 | ||
125 | ignore_char: | |
126 | status = UART_GET_STATUS(port); | |
127 | } | |
128 | ||
129 | tty_flip_buffer_push(tty); | |
130 | } | |
131 | ||
132 | static void apbuart_tx_chars(struct uart_port *port) | |
133 | { | |
134 | struct circ_buf *xmit = &port->state->xmit; | |
135 | int count; | |
136 | ||
137 | if (port->x_char) { | |
138 | UART_PUT_CHAR(port, port->x_char); | |
139 | port->icount.tx++; | |
140 | port->x_char = 0; | |
141 | return; | |
142 | } | |
143 | ||
144 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
145 | apbuart_stop_tx(port); | |
146 | return; | |
147 | } | |
148 | ||
149 | /* amba: fill FIFO */ | |
150 | count = port->fifosize >> 1; | |
151 | do { | |
152 | UART_PUT_CHAR(port, xmit->buf[xmit->tail]); | |
153 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
154 | port->icount.tx++; | |
155 | if (uart_circ_empty(xmit)) | |
156 | break; | |
157 | } while (--count > 0); | |
158 | ||
159 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
160 | uart_write_wakeup(port); | |
161 | ||
162 | if (uart_circ_empty(xmit)) | |
163 | apbuart_stop_tx(port); | |
164 | } | |
165 | ||
166 | static irqreturn_t apbuart_int(int irq, void *dev_id) | |
167 | { | |
168 | struct uart_port *port = dev_id; | |
169 | unsigned int status; | |
170 | ||
171 | spin_lock(&port->lock); | |
172 | ||
173 | status = UART_GET_STATUS(port); | |
174 | if (status & UART_STATUS_DR) | |
175 | apbuart_rx_chars(port); | |
176 | if (status & UART_STATUS_THE) | |
177 | apbuart_tx_chars(port); | |
178 | ||
179 | spin_unlock(&port->lock); | |
180 | ||
181 | return IRQ_HANDLED; | |
182 | } | |
183 | ||
184 | static unsigned int apbuart_tx_empty(struct uart_port *port) | |
185 | { | |
186 | unsigned int status = UART_GET_STATUS(port); | |
187 | return status & UART_STATUS_THE ? TIOCSER_TEMT : 0; | |
188 | } | |
189 | ||
190 | static unsigned int apbuart_get_mctrl(struct uart_port *port) | |
191 | { | |
192 | /* The GRLIB APBUART handles flow control in hardware */ | |
193 | return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; | |
194 | } | |
195 | ||
196 | static void apbuart_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
197 | { | |
198 | /* The GRLIB APBUART handles flow control in hardware */ | |
199 | } | |
200 | ||
201 | static void apbuart_break_ctl(struct uart_port *port, int break_state) | |
202 | { | |
203 | /* We don't support sending break */ | |
204 | } | |
205 | ||
206 | static int apbuart_startup(struct uart_port *port) | |
207 | { | |
208 | int retval; | |
209 | unsigned int cr; | |
210 | ||
211 | /* Allocate the IRQ */ | |
212 | retval = request_irq(port->irq, apbuart_int, 0, "apbuart", port); | |
213 | if (retval) | |
214 | return retval; | |
215 | ||
216 | /* Finally, enable interrupts */ | |
217 | cr = UART_GET_CTRL(port); | |
218 | UART_PUT_CTRL(port, | |
219 | cr | UART_CTRL_RE | UART_CTRL_TE | | |
220 | UART_CTRL_RI | UART_CTRL_TI); | |
221 | ||
222 | return 0; | |
223 | } | |
224 | ||
225 | static void apbuart_shutdown(struct uart_port *port) | |
226 | { | |
227 | unsigned int cr; | |
228 | ||
229 | /* disable all interrupts, disable the port */ | |
230 | cr = UART_GET_CTRL(port); | |
231 | UART_PUT_CTRL(port, | |
232 | cr & ~(UART_CTRL_RE | UART_CTRL_TE | | |
233 | UART_CTRL_RI | UART_CTRL_TI)); | |
234 | ||
235 | /* Free the interrupt */ | |
236 | free_irq(port->irq, port); | |
237 | } | |
238 | ||
239 | static void apbuart_set_termios(struct uart_port *port, | |
240 | struct ktermios *termios, struct ktermios *old) | |
241 | { | |
242 | unsigned int cr; | |
243 | unsigned long flags; | |
244 | unsigned int baud, quot; | |
245 | ||
246 | /* Ask the core to calculate the divisor for us. */ | |
247 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); | |
248 | if (baud == 0) | |
249 | panic("invalid baudrate %i\n", port->uartclk / 16); | |
250 | ||
251 | /* uart_get_divisor calc a *16 uart freq, apbuart is *8 */ | |
252 | quot = (uart_get_divisor(port, baud)) * 2; | |
253 | cr = UART_GET_CTRL(port); | |
254 | cr &= ~(UART_CTRL_PE | UART_CTRL_PS); | |
255 | ||
256 | if (termios->c_cflag & PARENB) { | |
257 | cr |= UART_CTRL_PE; | |
258 | if ((termios->c_cflag & PARODD)) | |
259 | cr |= UART_CTRL_PS; | |
260 | } | |
261 | ||
262 | /* Enable flow control. */ | |
263 | if (termios->c_cflag & CRTSCTS) | |
264 | cr |= UART_CTRL_FL; | |
265 | ||
266 | spin_lock_irqsave(&port->lock, flags); | |
267 | ||
268 | /* Update the per-port timeout. */ | |
269 | uart_update_timeout(port, termios->c_cflag, baud); | |
270 | ||
271 | port->read_status_mask = UART_STATUS_OE; | |
272 | if (termios->c_iflag & INPCK) | |
273 | port->read_status_mask |= UART_STATUS_FE | UART_STATUS_PE; | |
274 | ||
275 | /* Characters to ignore */ | |
276 | port->ignore_status_mask = 0; | |
277 | if (termios->c_iflag & IGNPAR) | |
278 | port->ignore_status_mask |= UART_STATUS_FE | UART_STATUS_PE; | |
279 | ||
280 | /* Ignore all characters if CREAD is not set. */ | |
281 | if ((termios->c_cflag & CREAD) == 0) | |
282 | port->ignore_status_mask |= UART_DUMMY_RSR_RX; | |
283 | ||
284 | /* Set baud rate */ | |
285 | quot -= 1; | |
286 | UART_PUT_SCAL(port, quot); | |
287 | UART_PUT_CTRL(port, cr); | |
288 | ||
289 | spin_unlock_irqrestore(&port->lock, flags); | |
290 | } | |
291 | ||
292 | static const char *apbuart_type(struct uart_port *port) | |
293 | { | |
294 | return port->type == PORT_APBUART ? "GRLIB/APBUART" : NULL; | |
295 | } | |
296 | ||
297 | static void apbuart_release_port(struct uart_port *port) | |
298 | { | |
299 | release_mem_region(port->mapbase, 0x100); | |
300 | } | |
301 | ||
302 | static int apbuart_request_port(struct uart_port *port) | |
303 | { | |
304 | return request_mem_region(port->mapbase, 0x100, "grlib-apbuart") | |
305 | != NULL ? 0 : -EBUSY; | |
306 | return 0; | |
307 | } | |
308 | ||
309 | /* Configure/autoconfigure the port */ | |
310 | static void apbuart_config_port(struct uart_port *port, int flags) | |
311 | { | |
312 | if (flags & UART_CONFIG_TYPE) { | |
313 | port->type = PORT_APBUART; | |
314 | apbuart_request_port(port); | |
315 | } | |
316 | } | |
317 | ||
318 | /* Verify the new serial_struct (for TIOCSSERIAL) */ | |
319 | static int apbuart_verify_port(struct uart_port *port, | |
320 | struct serial_struct *ser) | |
321 | { | |
322 | int ret = 0; | |
323 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_APBUART) | |
324 | ret = -EINVAL; | |
325 | if (ser->irq < 0 || ser->irq >= NR_IRQS) | |
326 | ret = -EINVAL; | |
327 | if (ser->baud_base < 9600) | |
328 | ret = -EINVAL; | |
329 | return ret; | |
330 | } | |
331 | ||
332 | static struct uart_ops grlib_apbuart_ops = { | |
333 | .tx_empty = apbuart_tx_empty, | |
334 | .set_mctrl = apbuart_set_mctrl, | |
335 | .get_mctrl = apbuart_get_mctrl, | |
336 | .stop_tx = apbuart_stop_tx, | |
337 | .start_tx = apbuart_start_tx, | |
338 | .stop_rx = apbuart_stop_rx, | |
339 | .enable_ms = apbuart_enable_ms, | |
340 | .break_ctl = apbuart_break_ctl, | |
341 | .startup = apbuart_startup, | |
342 | .shutdown = apbuart_shutdown, | |
343 | .set_termios = apbuart_set_termios, | |
344 | .type = apbuart_type, | |
345 | .release_port = apbuart_release_port, | |
346 | .request_port = apbuart_request_port, | |
347 | .config_port = apbuart_config_port, | |
348 | .verify_port = apbuart_verify_port, | |
349 | }; | |
350 | ||
351 | static struct uart_port grlib_apbuart_ports[UART_NR]; | |
352 | static struct device_node *grlib_apbuart_nodes[UART_NR]; | |
353 | ||
354 | static int apbuart_scan_fifo_size(struct uart_port *port, int portnumber) | |
355 | { | |
356 | int ctrl, loop = 0; | |
357 | int status; | |
358 | int fifosize; | |
359 | unsigned long flags; | |
360 | ||
361 | ctrl = UART_GET_CTRL(port); | |
362 | ||
363 | /* | |
364 | * Enable the transceiver and wait for it to be ready to send data. | |
365 | * Clear interrupts so that this process will not be externally | |
366 | * interrupted in the middle (which can cause the transceiver to | |
367 | * drain prematurely). | |
368 | */ | |
369 | ||
370 | local_irq_save(flags); | |
371 | ||
372 | UART_PUT_CTRL(port, ctrl | UART_CTRL_TE); | |
373 | ||
374 | while (!UART_TX_READY(UART_GET_STATUS(port))) | |
375 | loop++; | |
376 | ||
377 | /* | |
378 | * Disable the transceiver so data isn't actually sent during the | |
379 | * actual test. | |
380 | */ | |
381 | ||
382 | UART_PUT_CTRL(port, ctrl & ~(UART_CTRL_TE)); | |
383 | ||
384 | fifosize = 1; | |
385 | UART_PUT_CHAR(port, 0); | |
386 | ||
387 | /* | |
388 | * So long as transmitting a character increments the tranceivier FIFO | |
389 | * length the FIFO must be at least that big. These bytes will | |
390 | * automatically drain off of the FIFO. | |
391 | */ | |
392 | ||
393 | status = UART_GET_STATUS(port); | |
394 | while (((status >> 20) & 0x3F) == fifosize) { | |
395 | fifosize++; | |
396 | UART_PUT_CHAR(port, 0); | |
397 | status = UART_GET_STATUS(port); | |
398 | } | |
399 | ||
400 | fifosize--; | |
401 | ||
402 | UART_PUT_CTRL(port, ctrl); | |
403 | local_irq_restore(flags); | |
404 | ||
405 | if (fifosize == 0) | |
406 | fifosize = 1; | |
407 | ||
408 | return fifosize; | |
409 | } | |
410 | ||
411 | static void apbuart_flush_fifo(struct uart_port *port) | |
412 | { | |
413 | int i; | |
414 | ||
415 | for (i = 0; i < port->fifosize; i++) | |
416 | UART_GET_CHAR(port); | |
417 | } | |
418 | ||
419 | ||
420 | /* ======================================================================== */ | |
421 | /* Console driver, if enabled */ | |
422 | /* ======================================================================== */ | |
423 | ||
424 | #ifdef CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE | |
425 | ||
426 | static void apbuart_console_putchar(struct uart_port *port, int ch) | |
427 | { | |
428 | unsigned int status; | |
429 | do { | |
430 | status = UART_GET_STATUS(port); | |
431 | } while (!UART_TX_READY(status)); | |
432 | UART_PUT_CHAR(port, ch); | |
433 | } | |
434 | ||
435 | static void | |
436 | apbuart_console_write(struct console *co, const char *s, unsigned int count) | |
437 | { | |
438 | struct uart_port *port = &grlib_apbuart_ports[co->index]; | |
439 | unsigned int status, old_cr, new_cr; | |
440 | ||
441 | /* First save the CR then disable the interrupts */ | |
442 | old_cr = UART_GET_CTRL(port); | |
443 | new_cr = old_cr & ~(UART_CTRL_RI | UART_CTRL_TI); | |
444 | UART_PUT_CTRL(port, new_cr); | |
445 | ||
446 | uart_console_write(port, s, count, apbuart_console_putchar); | |
447 | ||
448 | /* | |
449 | * Finally, wait for transmitter to become empty | |
450 | * and restore the TCR | |
451 | */ | |
452 | do { | |
453 | status = UART_GET_STATUS(port); | |
454 | } while (!UART_TX_READY(status)); | |
455 | UART_PUT_CTRL(port, old_cr); | |
456 | } | |
457 | ||
458 | static void __init | |
459 | apbuart_console_get_options(struct uart_port *port, int *baud, | |
460 | int *parity, int *bits) | |
461 | { | |
462 | if (UART_GET_CTRL(port) & (UART_CTRL_RE | UART_CTRL_TE)) { | |
463 | ||
464 | unsigned int quot, status; | |
465 | status = UART_GET_STATUS(port); | |
466 | ||
467 | *parity = 'n'; | |
468 | if (status & UART_CTRL_PE) { | |
469 | if ((status & UART_CTRL_PS) == 0) | |
470 | *parity = 'e'; | |
471 | else | |
472 | *parity = 'o'; | |
473 | } | |
474 | ||
475 | *bits = 8; | |
476 | quot = UART_GET_SCAL(port) / 8; | |
477 | *baud = port->uartclk / (16 * (quot + 1)); | |
478 | } | |
479 | } | |
480 | ||
481 | static int __init apbuart_console_setup(struct console *co, char *options) | |
482 | { | |
483 | struct uart_port *port; | |
484 | int baud = 38400; | |
485 | int bits = 8; | |
486 | int parity = 'n'; | |
487 | int flow = 'n'; | |
488 | ||
489 | pr_debug("apbuart_console_setup co=%p, co->index=%i, options=%s\n", | |
490 | co, co->index, options); | |
491 | ||
492 | /* | |
493 | * Check whether an invalid uart number has been specified, and | |
494 | * if so, search for the first available port that does have | |
495 | * console support. | |
496 | */ | |
497 | if (co->index >= grlib_apbuart_port_nr) | |
498 | co->index = 0; | |
499 | ||
500 | port = &grlib_apbuart_ports[co->index]; | |
501 | ||
502 | spin_lock_init(&port->lock); | |
503 | ||
504 | if (options) | |
505 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
506 | else | |
507 | apbuart_console_get_options(port, &baud, &parity, &bits); | |
508 | ||
509 | return uart_set_options(port, co, baud, parity, bits, flow); | |
510 | } | |
511 | ||
512 | static struct uart_driver grlib_apbuart_driver; | |
513 | ||
514 | static struct console grlib_apbuart_console = { | |
515 | .name = "ttyS", | |
516 | .write = apbuart_console_write, | |
517 | .device = uart_console_device, | |
518 | .setup = apbuart_console_setup, | |
519 | .flags = CON_PRINTBUFFER, | |
520 | .index = -1, | |
521 | .data = &grlib_apbuart_driver, | |
522 | }; | |
523 | ||
524 | ||
568389c2 | 525 | static int grlib_apbuart_configure(void); |
d4ac42a5 KG |
526 | |
527 | static int __init apbuart_console_init(void) | |
528 | { | |
568389c2 TG |
529 | if (grlib_apbuart_configure()) |
530 | return -ENODEV; | |
d4ac42a5 KG |
531 | register_console(&grlib_apbuart_console); |
532 | return 0; | |
533 | } | |
534 | ||
535 | console_initcall(apbuart_console_init); | |
536 | ||
537 | #define APBUART_CONSOLE (&grlib_apbuart_console) | |
538 | #else | |
539 | #define APBUART_CONSOLE NULL | |
540 | #endif | |
541 | ||
542 | static struct uart_driver grlib_apbuart_driver = { | |
543 | .owner = THIS_MODULE, | |
544 | .driver_name = "serial", | |
545 | .dev_name = "ttyS", | |
546 | .major = SERIAL_APBUART_MAJOR, | |
547 | .minor = SERIAL_APBUART_MINOR, | |
548 | .nr = UART_NR, | |
549 | .cons = APBUART_CONSOLE, | |
550 | }; | |
551 | ||
552 | ||
553 | /* ======================================================================== */ | |
554 | /* OF Platform Driver */ | |
555 | /* ======================================================================== */ | |
556 | ||
9671f099 | 557 | static int apbuart_probe(struct platform_device *op) |
d4ac42a5 | 558 | { |
10544f12 | 559 | int i; |
d4ac42a5 KG |
560 | struct uart_port *port = NULL; |
561 | ||
d4ac42a5 | 562 | for (i = 0; i < grlib_apbuart_port_nr; i++) { |
61c7a080 | 563 | if (op->dev.of_node == grlib_apbuart_nodes[i]) |
d4ac42a5 KG |
564 | break; |
565 | } | |
566 | ||
567 | port = &grlib_apbuart_ports[i]; | |
568 | port->dev = &op->dev; | |
10544f12 | 569 | port->irq = op->archdata.irqs[0]; |
d4ac42a5 KG |
570 | |
571 | uart_add_one_port(&grlib_apbuart_driver, (struct uart_port *) port); | |
572 | ||
573 | apbuart_flush_fifo((struct uart_port *) port); | |
574 | ||
384a17b2 DM |
575 | printk(KERN_INFO "grlib-apbuart at 0x%llx, irq %d\n", |
576 | (unsigned long long) port->mapbase, port->irq); | |
d4ac42a5 | 577 | return 0; |
d4ac42a5 KG |
578 | } |
579 | ||
ab17da5c | 580 | static struct of_device_id apbuart_match[] = { |
d4ac42a5 KG |
581 | { |
582 | .name = "GAISLER_APBUART", | |
583 | }, | |
d89ddf0d DH |
584 | { |
585 | .name = "01_00c", | |
586 | }, | |
d4ac42a5 KG |
587 | {}, |
588 | }; | |
589 | ||
793218df | 590 | static struct platform_driver grlib_apbuart_of_driver = { |
d4ac42a5 KG |
591 | .probe = apbuart_probe, |
592 | .driver = { | |
4018294b GL |
593 | .owner = THIS_MODULE, |
594 | .name = "grlib-apbuart", | |
595 | .of_match_table = apbuart_match, | |
596 | }, | |
d4ac42a5 KG |
597 | }; |
598 | ||
599 | ||
ab17da5c | 600 | static int __init grlib_apbuart_configure(void) |
d4ac42a5 | 601 | { |
c897dcf6 DH |
602 | struct device_node *np; |
603 | int line = 0; | |
d4ac42a5 | 604 | |
d4ac42a5 | 605 | for_each_matching_node(np, apbuart_match) { |
10544f12 | 606 | const int *ampopts; |
c897dcf6 | 607 | const u32 *freq_hz; |
35c64e5d TG |
608 | const struct amba_prom_registers *regs; |
609 | struct uart_port *port; | |
610 | unsigned long addr; | |
d4ac42a5 | 611 | |
56b85f32 | 612 | ampopts = of_get_property(np, "ampopts", NULL); |
f28f3313 DH |
613 | if (ampopts && (*ampopts == 0)) |
614 | continue; /* Ignore if used by another OS instance */ | |
35c64e5d | 615 | regs = of_get_property(np, "reg", NULL); |
c897dcf6 DH |
616 | /* Frequency of APB Bus is frequency of UART */ |
617 | freq_hz = of_get_property(np, "freq", NULL); | |
d4ac42a5 | 618 | |
c897dcf6 | 619 | if (!regs || !freq_hz || (*freq_hz == 0)) |
56b85f32 | 620 | continue; |
d4ac42a5 KG |
621 | |
622 | grlib_apbuart_nodes[line] = np; | |
623 | ||
624 | addr = regs->phys_addr; | |
d4ac42a5 KG |
625 | |
626 | port = &grlib_apbuart_ports[line]; | |
627 | ||
628 | port->mapbase = addr; | |
629 | port->membase = ioremap(addr, sizeof(struct grlib_apbuart_regs_map)); | |
10544f12 | 630 | port->irq = 0; |
d4ac42a5 KG |
631 | port->iotype = UPIO_MEM; |
632 | port->ops = &grlib_apbuart_ops; | |
633 | port->flags = UPF_BOOT_AUTOCONF; | |
634 | port->line = line; | |
c897dcf6 | 635 | port->uartclk = *freq_hz; |
d4ac42a5 KG |
636 | port->fifosize = apbuart_scan_fifo_size((struct uart_port *) port, line); |
637 | line++; | |
638 | ||
639 | /* We support maximum UART_NR uarts ... */ | |
640 | if (line == UART_NR) | |
641 | break; | |
d4ac42a5 KG |
642 | } |
643 | ||
d4ac42a5 | 644 | grlib_apbuart_driver.nr = grlib_apbuart_port_nr = line; |
35c64e5d | 645 | return line ? 0 : -ENODEV; |
d4ac42a5 KG |
646 | } |
647 | ||
648 | static int __init grlib_apbuart_init(void) | |
649 | { | |
650 | int ret; | |
651 | ||
652 | /* Find all APBUARTS in device the tree and initialize their ports */ | |
35c64e5d TG |
653 | ret = grlib_apbuart_configure(); |
654 | if (ret) | |
655 | return ret; | |
d4ac42a5 KG |
656 | |
657 | printk(KERN_INFO "Serial: GRLIB APBUART driver\n"); | |
658 | ||
659 | ret = uart_register_driver(&grlib_apbuart_driver); | |
660 | ||
661 | if (ret) { | |
662 | printk(KERN_ERR "%s: uart_register_driver failed (%i)\n", | |
663 | __FILE__, ret); | |
664 | return ret; | |
665 | } | |
666 | ||
793218df | 667 | ret = platform_driver_register(&grlib_apbuart_of_driver); |
d4ac42a5 KG |
668 | if (ret) { |
669 | printk(KERN_ERR | |
793218df | 670 | "%s: platform_driver_register failed (%i)\n", |
d4ac42a5 KG |
671 | __FILE__, ret); |
672 | uart_unregister_driver(&grlib_apbuart_driver); | |
673 | return ret; | |
674 | } | |
675 | ||
676 | return ret; | |
677 | } | |
678 | ||
679 | static void __exit grlib_apbuart_exit(void) | |
680 | { | |
681 | int i; | |
682 | ||
683 | for (i = 0; i < grlib_apbuart_port_nr; i++) | |
684 | uart_remove_one_port(&grlib_apbuart_driver, | |
685 | &grlib_apbuart_ports[i]); | |
686 | ||
687 | uart_unregister_driver(&grlib_apbuart_driver); | |
793218df | 688 | platform_driver_unregister(&grlib_apbuart_of_driver); |
d4ac42a5 KG |
689 | } |
690 | ||
691 | module_init(grlib_apbuart_init); | |
692 | module_exit(grlib_apbuart_exit); | |
693 | ||
694 | MODULE_AUTHOR("Aeroflex Gaisler AB"); | |
695 | MODULE_DESCRIPTION("GRLIB APBUART serial driver"); | |
696 | MODULE_VERSION("2.1"); | |
697 | MODULE_LICENSE("GPL"); |