Commit | Line | Data |
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d4ac42a5 KG |
1 | /* |
2 | * Driver for GRLIB serial ports (APBUART) | |
3 | * | |
4 | * Based on linux/drivers/serial/amba.c | |
5 | * | |
6 | * Copyright (C) 2000 Deep Blue Solutions Ltd. | |
7 | * Copyright (C) 2003 Konrad Eisele <eiselekd@web.de> | |
8 | * Copyright (C) 2006 Daniel Hellstrom <daniel@gaisler.com>, Aeroflex Gaisler AB | |
9 | * Copyright (C) 2008 Gilead Kutnick <kutnickg@zin-tech.com> | |
10 | * Copyright (C) 2009 Kristoffer Glembo <kristoffer@gaisler.com>, Aeroflex Gaisler AB | |
11 | */ | |
12 | ||
13 | #if defined(CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE) && defined(CONFIG_MAGIC_SYSRQ) | |
14 | #define SUPPORT_SYSRQ | |
15 | #endif | |
16 | ||
17 | #include <linux/module.h> | |
18 | #include <linux/tty.h> | |
ee160a38 | 19 | #include <linux/tty_flip.h> |
d4ac42a5 KG |
20 | #include <linux/ioport.h> |
21 | #include <linux/init.h> | |
22 | #include <linux/serial.h> | |
23 | #include <linux/console.h> | |
24 | #include <linux/sysrq.h> | |
25 | #include <linux/kthread.h> | |
26 | #include <linux/device.h> | |
27 | #include <linux/of.h> | |
28 | #include <linux/of_device.h> | |
ddaf1b27 | 29 | #include <linux/of_platform.h> |
f28f3313 | 30 | #include <linux/of_irq.h> |
d4ac42a5 KG |
31 | #include <linux/platform_device.h> |
32 | #include <linux/io.h> | |
33 | #include <linux/serial_core.h> | |
34 | #include <asm/irq.h> | |
d4ac42a5 KG |
35 | |
36 | #include "apbuart.h" | |
37 | ||
38 | #define SERIAL_APBUART_MAJOR TTY_MAJOR | |
39 | #define SERIAL_APBUART_MINOR 64 | |
40 | #define UART_DUMMY_RSR_RX 0x8000 /* for ignore all read */ | |
41 | ||
42 | static void apbuart_tx_chars(struct uart_port *port); | |
43 | ||
44 | static void apbuart_stop_tx(struct uart_port *port) | |
45 | { | |
46 | unsigned int cr; | |
47 | ||
48 | cr = UART_GET_CTRL(port); | |
49 | cr &= ~UART_CTRL_TI; | |
50 | UART_PUT_CTRL(port, cr); | |
51 | } | |
52 | ||
53 | static void apbuart_start_tx(struct uart_port *port) | |
54 | { | |
55 | unsigned int cr; | |
56 | ||
57 | cr = UART_GET_CTRL(port); | |
58 | cr |= UART_CTRL_TI; | |
59 | UART_PUT_CTRL(port, cr); | |
60 | ||
61 | if (UART_GET_STATUS(port) & UART_STATUS_THE) | |
62 | apbuart_tx_chars(port); | |
63 | } | |
64 | ||
65 | static void apbuart_stop_rx(struct uart_port *port) | |
66 | { | |
67 | unsigned int cr; | |
68 | ||
69 | cr = UART_GET_CTRL(port); | |
70 | cr &= ~(UART_CTRL_RI); | |
71 | UART_PUT_CTRL(port, cr); | |
72 | } | |
73 | ||
d4ac42a5 KG |
74 | static void apbuart_rx_chars(struct uart_port *port) |
75 | { | |
d4ac42a5 KG |
76 | unsigned int status, ch, rsr, flag; |
77 | unsigned int max_chars = port->fifosize; | |
78 | ||
79 | status = UART_GET_STATUS(port); | |
80 | ||
81 | while (UART_RX_DATA(status) && (max_chars--)) { | |
82 | ||
83 | ch = UART_GET_CHAR(port); | |
84 | flag = TTY_NORMAL; | |
85 | ||
86 | port->icount.rx++; | |
87 | ||
88 | rsr = UART_GET_STATUS(port) | UART_DUMMY_RSR_RX; | |
89 | UART_PUT_STATUS(port, 0); | |
90 | if (rsr & UART_STATUS_ERR) { | |
91 | ||
92 | if (rsr & UART_STATUS_BR) { | |
93 | rsr &= ~(UART_STATUS_FE | UART_STATUS_PE); | |
94 | port->icount.brk++; | |
95 | if (uart_handle_break(port)) | |
96 | goto ignore_char; | |
97 | } else if (rsr & UART_STATUS_PE) { | |
98 | port->icount.parity++; | |
99 | } else if (rsr & UART_STATUS_FE) { | |
100 | port->icount.frame++; | |
101 | } | |
102 | if (rsr & UART_STATUS_OE) | |
103 | port->icount.overrun++; | |
104 | ||
105 | rsr &= port->read_status_mask; | |
106 | ||
107 | if (rsr & UART_STATUS_PE) | |
108 | flag = TTY_PARITY; | |
109 | else if (rsr & UART_STATUS_FE) | |
110 | flag = TTY_FRAME; | |
111 | } | |
112 | ||
113 | if (uart_handle_sysrq_char(port, ch)) | |
114 | goto ignore_char; | |
115 | ||
116 | uart_insert_char(port, rsr, UART_STATUS_OE, ch, flag); | |
117 | ||
118 | ||
119 | ignore_char: | |
120 | status = UART_GET_STATUS(port); | |
121 | } | |
122 | ||
78d34d75 | 123 | spin_unlock(&port->lock); |
2e124b4a | 124 | tty_flip_buffer_push(&port->state->port); |
78d34d75 | 125 | spin_lock(&port->lock); |
d4ac42a5 KG |
126 | } |
127 | ||
128 | static void apbuart_tx_chars(struct uart_port *port) | |
129 | { | |
130 | struct circ_buf *xmit = &port->state->xmit; | |
131 | int count; | |
132 | ||
133 | if (port->x_char) { | |
134 | UART_PUT_CHAR(port, port->x_char); | |
135 | port->icount.tx++; | |
136 | port->x_char = 0; | |
137 | return; | |
138 | } | |
139 | ||
140 | if (uart_circ_empty(xmit) || uart_tx_stopped(port)) { | |
141 | apbuart_stop_tx(port); | |
142 | return; | |
143 | } | |
144 | ||
145 | /* amba: fill FIFO */ | |
146 | count = port->fifosize >> 1; | |
147 | do { | |
148 | UART_PUT_CHAR(port, xmit->buf[xmit->tail]); | |
149 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); | |
150 | port->icount.tx++; | |
151 | if (uart_circ_empty(xmit)) | |
152 | break; | |
153 | } while (--count > 0); | |
154 | ||
155 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
156 | uart_write_wakeup(port); | |
157 | ||
158 | if (uart_circ_empty(xmit)) | |
159 | apbuart_stop_tx(port); | |
160 | } | |
161 | ||
162 | static irqreturn_t apbuart_int(int irq, void *dev_id) | |
163 | { | |
164 | struct uart_port *port = dev_id; | |
165 | unsigned int status; | |
166 | ||
167 | spin_lock(&port->lock); | |
168 | ||
169 | status = UART_GET_STATUS(port); | |
170 | if (status & UART_STATUS_DR) | |
171 | apbuart_rx_chars(port); | |
172 | if (status & UART_STATUS_THE) | |
173 | apbuart_tx_chars(port); | |
174 | ||
175 | spin_unlock(&port->lock); | |
176 | ||
177 | return IRQ_HANDLED; | |
178 | } | |
179 | ||
180 | static unsigned int apbuart_tx_empty(struct uart_port *port) | |
181 | { | |
182 | unsigned int status = UART_GET_STATUS(port); | |
183 | return status & UART_STATUS_THE ? TIOCSER_TEMT : 0; | |
184 | } | |
185 | ||
186 | static unsigned int apbuart_get_mctrl(struct uart_port *port) | |
187 | { | |
188 | /* The GRLIB APBUART handles flow control in hardware */ | |
189 | return TIOCM_CAR | TIOCM_DSR | TIOCM_CTS; | |
190 | } | |
191 | ||
192 | static void apbuart_set_mctrl(struct uart_port *port, unsigned int mctrl) | |
193 | { | |
194 | /* The GRLIB APBUART handles flow control in hardware */ | |
195 | } | |
196 | ||
197 | static void apbuart_break_ctl(struct uart_port *port, int break_state) | |
198 | { | |
199 | /* We don't support sending break */ | |
200 | } | |
201 | ||
202 | static int apbuart_startup(struct uart_port *port) | |
203 | { | |
204 | int retval; | |
205 | unsigned int cr; | |
206 | ||
207 | /* Allocate the IRQ */ | |
208 | retval = request_irq(port->irq, apbuart_int, 0, "apbuart", port); | |
209 | if (retval) | |
210 | return retval; | |
211 | ||
212 | /* Finally, enable interrupts */ | |
213 | cr = UART_GET_CTRL(port); | |
214 | UART_PUT_CTRL(port, | |
215 | cr | UART_CTRL_RE | UART_CTRL_TE | | |
216 | UART_CTRL_RI | UART_CTRL_TI); | |
217 | ||
218 | return 0; | |
219 | } | |
220 | ||
221 | static void apbuart_shutdown(struct uart_port *port) | |
222 | { | |
223 | unsigned int cr; | |
224 | ||
225 | /* disable all interrupts, disable the port */ | |
226 | cr = UART_GET_CTRL(port); | |
227 | UART_PUT_CTRL(port, | |
228 | cr & ~(UART_CTRL_RE | UART_CTRL_TE | | |
229 | UART_CTRL_RI | UART_CTRL_TI)); | |
230 | ||
231 | /* Free the interrupt */ | |
232 | free_irq(port->irq, port); | |
233 | } | |
234 | ||
235 | static void apbuart_set_termios(struct uart_port *port, | |
236 | struct ktermios *termios, struct ktermios *old) | |
237 | { | |
238 | unsigned int cr; | |
239 | unsigned long flags; | |
240 | unsigned int baud, quot; | |
241 | ||
242 | /* Ask the core to calculate the divisor for us. */ | |
243 | baud = uart_get_baud_rate(port, termios, old, 0, port->uartclk / 16); | |
244 | if (baud == 0) | |
245 | panic("invalid baudrate %i\n", port->uartclk / 16); | |
246 | ||
247 | /* uart_get_divisor calc a *16 uart freq, apbuart is *8 */ | |
248 | quot = (uart_get_divisor(port, baud)) * 2; | |
249 | cr = UART_GET_CTRL(port); | |
250 | cr &= ~(UART_CTRL_PE | UART_CTRL_PS); | |
251 | ||
252 | if (termios->c_cflag & PARENB) { | |
253 | cr |= UART_CTRL_PE; | |
254 | if ((termios->c_cflag & PARODD)) | |
255 | cr |= UART_CTRL_PS; | |
256 | } | |
257 | ||
258 | /* Enable flow control. */ | |
259 | if (termios->c_cflag & CRTSCTS) | |
260 | cr |= UART_CTRL_FL; | |
261 | ||
262 | spin_lock_irqsave(&port->lock, flags); | |
263 | ||
264 | /* Update the per-port timeout. */ | |
265 | uart_update_timeout(port, termios->c_cflag, baud); | |
266 | ||
267 | port->read_status_mask = UART_STATUS_OE; | |
268 | if (termios->c_iflag & INPCK) | |
269 | port->read_status_mask |= UART_STATUS_FE | UART_STATUS_PE; | |
270 | ||
271 | /* Characters to ignore */ | |
272 | port->ignore_status_mask = 0; | |
273 | if (termios->c_iflag & IGNPAR) | |
274 | port->ignore_status_mask |= UART_STATUS_FE | UART_STATUS_PE; | |
275 | ||
276 | /* Ignore all characters if CREAD is not set. */ | |
277 | if ((termios->c_cflag & CREAD) == 0) | |
278 | port->ignore_status_mask |= UART_DUMMY_RSR_RX; | |
279 | ||
280 | /* Set baud rate */ | |
281 | quot -= 1; | |
282 | UART_PUT_SCAL(port, quot); | |
283 | UART_PUT_CTRL(port, cr); | |
284 | ||
285 | spin_unlock_irqrestore(&port->lock, flags); | |
286 | } | |
287 | ||
288 | static const char *apbuart_type(struct uart_port *port) | |
289 | { | |
290 | return port->type == PORT_APBUART ? "GRLIB/APBUART" : NULL; | |
291 | } | |
292 | ||
293 | static void apbuart_release_port(struct uart_port *port) | |
294 | { | |
295 | release_mem_region(port->mapbase, 0x100); | |
296 | } | |
297 | ||
298 | static int apbuart_request_port(struct uart_port *port) | |
299 | { | |
300 | return request_mem_region(port->mapbase, 0x100, "grlib-apbuart") | |
301 | != NULL ? 0 : -EBUSY; | |
302 | return 0; | |
303 | } | |
304 | ||
305 | /* Configure/autoconfigure the port */ | |
306 | static void apbuart_config_port(struct uart_port *port, int flags) | |
307 | { | |
308 | if (flags & UART_CONFIG_TYPE) { | |
309 | port->type = PORT_APBUART; | |
310 | apbuart_request_port(port); | |
311 | } | |
312 | } | |
313 | ||
314 | /* Verify the new serial_struct (for TIOCSSERIAL) */ | |
315 | static int apbuart_verify_port(struct uart_port *port, | |
316 | struct serial_struct *ser) | |
317 | { | |
318 | int ret = 0; | |
319 | if (ser->type != PORT_UNKNOWN && ser->type != PORT_APBUART) | |
320 | ret = -EINVAL; | |
321 | if (ser->irq < 0 || ser->irq >= NR_IRQS) | |
322 | ret = -EINVAL; | |
323 | if (ser->baud_base < 9600) | |
324 | ret = -EINVAL; | |
325 | return ret; | |
326 | } | |
327 | ||
328 | static struct uart_ops grlib_apbuart_ops = { | |
329 | .tx_empty = apbuart_tx_empty, | |
330 | .set_mctrl = apbuart_set_mctrl, | |
331 | .get_mctrl = apbuart_get_mctrl, | |
332 | .stop_tx = apbuart_stop_tx, | |
333 | .start_tx = apbuart_start_tx, | |
334 | .stop_rx = apbuart_stop_rx, | |
d4ac42a5 KG |
335 | .break_ctl = apbuart_break_ctl, |
336 | .startup = apbuart_startup, | |
337 | .shutdown = apbuart_shutdown, | |
338 | .set_termios = apbuart_set_termios, | |
339 | .type = apbuart_type, | |
340 | .release_port = apbuart_release_port, | |
341 | .request_port = apbuart_request_port, | |
342 | .config_port = apbuart_config_port, | |
343 | .verify_port = apbuart_verify_port, | |
344 | }; | |
345 | ||
346 | static struct uart_port grlib_apbuart_ports[UART_NR]; | |
347 | static struct device_node *grlib_apbuart_nodes[UART_NR]; | |
348 | ||
349 | static int apbuart_scan_fifo_size(struct uart_port *port, int portnumber) | |
350 | { | |
351 | int ctrl, loop = 0; | |
352 | int status; | |
353 | int fifosize; | |
354 | unsigned long flags; | |
355 | ||
356 | ctrl = UART_GET_CTRL(port); | |
357 | ||
358 | /* | |
359 | * Enable the transceiver and wait for it to be ready to send data. | |
360 | * Clear interrupts so that this process will not be externally | |
361 | * interrupted in the middle (which can cause the transceiver to | |
362 | * drain prematurely). | |
363 | */ | |
364 | ||
365 | local_irq_save(flags); | |
366 | ||
367 | UART_PUT_CTRL(port, ctrl | UART_CTRL_TE); | |
368 | ||
369 | while (!UART_TX_READY(UART_GET_STATUS(port))) | |
370 | loop++; | |
371 | ||
372 | /* | |
373 | * Disable the transceiver so data isn't actually sent during the | |
374 | * actual test. | |
375 | */ | |
376 | ||
377 | UART_PUT_CTRL(port, ctrl & ~(UART_CTRL_TE)); | |
378 | ||
379 | fifosize = 1; | |
380 | UART_PUT_CHAR(port, 0); | |
381 | ||
382 | /* | |
383 | * So long as transmitting a character increments the tranceivier FIFO | |
384 | * length the FIFO must be at least that big. These bytes will | |
385 | * automatically drain off of the FIFO. | |
386 | */ | |
387 | ||
388 | status = UART_GET_STATUS(port); | |
389 | while (((status >> 20) & 0x3F) == fifosize) { | |
390 | fifosize++; | |
391 | UART_PUT_CHAR(port, 0); | |
392 | status = UART_GET_STATUS(port); | |
393 | } | |
394 | ||
395 | fifosize--; | |
396 | ||
397 | UART_PUT_CTRL(port, ctrl); | |
398 | local_irq_restore(flags); | |
399 | ||
400 | if (fifosize == 0) | |
401 | fifosize = 1; | |
402 | ||
403 | return fifosize; | |
404 | } | |
405 | ||
406 | static void apbuart_flush_fifo(struct uart_port *port) | |
407 | { | |
408 | int i; | |
409 | ||
410 | for (i = 0; i < port->fifosize; i++) | |
411 | UART_GET_CHAR(port); | |
412 | } | |
413 | ||
414 | ||
415 | /* ======================================================================== */ | |
416 | /* Console driver, if enabled */ | |
417 | /* ======================================================================== */ | |
418 | ||
419 | #ifdef CONFIG_SERIAL_GRLIB_GAISLER_APBUART_CONSOLE | |
420 | ||
421 | static void apbuart_console_putchar(struct uart_port *port, int ch) | |
422 | { | |
423 | unsigned int status; | |
424 | do { | |
425 | status = UART_GET_STATUS(port); | |
426 | } while (!UART_TX_READY(status)); | |
427 | UART_PUT_CHAR(port, ch); | |
428 | } | |
429 | ||
430 | static void | |
431 | apbuart_console_write(struct console *co, const char *s, unsigned int count) | |
432 | { | |
433 | struct uart_port *port = &grlib_apbuart_ports[co->index]; | |
434 | unsigned int status, old_cr, new_cr; | |
435 | ||
436 | /* First save the CR then disable the interrupts */ | |
437 | old_cr = UART_GET_CTRL(port); | |
438 | new_cr = old_cr & ~(UART_CTRL_RI | UART_CTRL_TI); | |
439 | UART_PUT_CTRL(port, new_cr); | |
440 | ||
441 | uart_console_write(port, s, count, apbuart_console_putchar); | |
442 | ||
443 | /* | |
444 | * Finally, wait for transmitter to become empty | |
445 | * and restore the TCR | |
446 | */ | |
447 | do { | |
448 | status = UART_GET_STATUS(port); | |
449 | } while (!UART_TX_READY(status)); | |
450 | UART_PUT_CTRL(port, old_cr); | |
451 | } | |
452 | ||
453 | static void __init | |
454 | apbuart_console_get_options(struct uart_port *port, int *baud, | |
455 | int *parity, int *bits) | |
456 | { | |
457 | if (UART_GET_CTRL(port) & (UART_CTRL_RE | UART_CTRL_TE)) { | |
458 | ||
459 | unsigned int quot, status; | |
460 | status = UART_GET_STATUS(port); | |
461 | ||
462 | *parity = 'n'; | |
463 | if (status & UART_CTRL_PE) { | |
464 | if ((status & UART_CTRL_PS) == 0) | |
465 | *parity = 'e'; | |
466 | else | |
467 | *parity = 'o'; | |
468 | } | |
469 | ||
470 | *bits = 8; | |
471 | quot = UART_GET_SCAL(port) / 8; | |
472 | *baud = port->uartclk / (16 * (quot + 1)); | |
473 | } | |
474 | } | |
475 | ||
476 | static int __init apbuart_console_setup(struct console *co, char *options) | |
477 | { | |
478 | struct uart_port *port; | |
479 | int baud = 38400; | |
480 | int bits = 8; | |
481 | int parity = 'n'; | |
482 | int flow = 'n'; | |
483 | ||
484 | pr_debug("apbuart_console_setup co=%p, co->index=%i, options=%s\n", | |
485 | co, co->index, options); | |
486 | ||
487 | /* | |
488 | * Check whether an invalid uart number has been specified, and | |
489 | * if so, search for the first available port that does have | |
490 | * console support. | |
491 | */ | |
492 | if (co->index >= grlib_apbuart_port_nr) | |
493 | co->index = 0; | |
494 | ||
495 | port = &grlib_apbuart_ports[co->index]; | |
496 | ||
497 | spin_lock_init(&port->lock); | |
498 | ||
499 | if (options) | |
500 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
501 | else | |
502 | apbuart_console_get_options(port, &baud, &parity, &bits); | |
503 | ||
504 | return uart_set_options(port, co, baud, parity, bits, flow); | |
505 | } | |
506 | ||
507 | static struct uart_driver grlib_apbuart_driver; | |
508 | ||
509 | static struct console grlib_apbuart_console = { | |
510 | .name = "ttyS", | |
511 | .write = apbuart_console_write, | |
512 | .device = uart_console_device, | |
513 | .setup = apbuart_console_setup, | |
514 | .flags = CON_PRINTBUFFER, | |
515 | .index = -1, | |
516 | .data = &grlib_apbuart_driver, | |
517 | }; | |
518 | ||
519 | ||
568389c2 | 520 | static int grlib_apbuart_configure(void); |
d4ac42a5 KG |
521 | |
522 | static int __init apbuart_console_init(void) | |
523 | { | |
568389c2 TG |
524 | if (grlib_apbuart_configure()) |
525 | return -ENODEV; | |
d4ac42a5 KG |
526 | register_console(&grlib_apbuart_console); |
527 | return 0; | |
528 | } | |
529 | ||
530 | console_initcall(apbuart_console_init); | |
531 | ||
532 | #define APBUART_CONSOLE (&grlib_apbuart_console) | |
533 | #else | |
534 | #define APBUART_CONSOLE NULL | |
535 | #endif | |
536 | ||
537 | static struct uart_driver grlib_apbuart_driver = { | |
538 | .owner = THIS_MODULE, | |
539 | .driver_name = "serial", | |
540 | .dev_name = "ttyS", | |
541 | .major = SERIAL_APBUART_MAJOR, | |
542 | .minor = SERIAL_APBUART_MINOR, | |
543 | .nr = UART_NR, | |
544 | .cons = APBUART_CONSOLE, | |
545 | }; | |
546 | ||
547 | ||
548 | /* ======================================================================== */ | |
549 | /* OF Platform Driver */ | |
550 | /* ======================================================================== */ | |
551 | ||
9671f099 | 552 | static int apbuart_probe(struct platform_device *op) |
d4ac42a5 | 553 | { |
10544f12 | 554 | int i; |
d4ac42a5 KG |
555 | struct uart_port *port = NULL; |
556 | ||
d4ac42a5 | 557 | for (i = 0; i < grlib_apbuart_port_nr; i++) { |
61c7a080 | 558 | if (op->dev.of_node == grlib_apbuart_nodes[i]) |
d4ac42a5 KG |
559 | break; |
560 | } | |
561 | ||
562 | port = &grlib_apbuart_ports[i]; | |
563 | port->dev = &op->dev; | |
10544f12 | 564 | port->irq = op->archdata.irqs[0]; |
d4ac42a5 KG |
565 | |
566 | uart_add_one_port(&grlib_apbuart_driver, (struct uart_port *) port); | |
567 | ||
568 | apbuart_flush_fifo((struct uart_port *) port); | |
569 | ||
384a17b2 DM |
570 | printk(KERN_INFO "grlib-apbuart at 0x%llx, irq %d\n", |
571 | (unsigned long long) port->mapbase, port->irq); | |
d4ac42a5 | 572 | return 0; |
d4ac42a5 KG |
573 | } |
574 | ||
ed0bb232 | 575 | static const struct of_device_id apbuart_match[] = { |
d4ac42a5 KG |
576 | { |
577 | .name = "GAISLER_APBUART", | |
578 | }, | |
d89ddf0d DH |
579 | { |
580 | .name = "01_00c", | |
581 | }, | |
d4ac42a5 KG |
582 | {}, |
583 | }; | |
50a84487 | 584 | MODULE_DEVICE_TABLE(of, apbuart_match); |
d4ac42a5 | 585 | |
793218df | 586 | static struct platform_driver grlib_apbuart_of_driver = { |
d4ac42a5 KG |
587 | .probe = apbuart_probe, |
588 | .driver = { | |
4018294b GL |
589 | .name = "grlib-apbuart", |
590 | .of_match_table = apbuart_match, | |
591 | }, | |
d4ac42a5 KG |
592 | }; |
593 | ||
594 | ||
ab17da5c | 595 | static int __init grlib_apbuart_configure(void) |
d4ac42a5 | 596 | { |
c897dcf6 DH |
597 | struct device_node *np; |
598 | int line = 0; | |
d4ac42a5 | 599 | |
d4ac42a5 | 600 | for_each_matching_node(np, apbuart_match) { |
10544f12 | 601 | const int *ampopts; |
c897dcf6 | 602 | const u32 *freq_hz; |
35c64e5d TG |
603 | const struct amba_prom_registers *regs; |
604 | struct uart_port *port; | |
605 | unsigned long addr; | |
d4ac42a5 | 606 | |
56b85f32 | 607 | ampopts = of_get_property(np, "ampopts", NULL); |
f28f3313 DH |
608 | if (ampopts && (*ampopts == 0)) |
609 | continue; /* Ignore if used by another OS instance */ | |
35c64e5d | 610 | regs = of_get_property(np, "reg", NULL); |
c897dcf6 DH |
611 | /* Frequency of APB Bus is frequency of UART */ |
612 | freq_hz = of_get_property(np, "freq", NULL); | |
d4ac42a5 | 613 | |
c897dcf6 | 614 | if (!regs || !freq_hz || (*freq_hz == 0)) |
56b85f32 | 615 | continue; |
d4ac42a5 KG |
616 | |
617 | grlib_apbuart_nodes[line] = np; | |
618 | ||
619 | addr = regs->phys_addr; | |
d4ac42a5 KG |
620 | |
621 | port = &grlib_apbuart_ports[line]; | |
622 | ||
623 | port->mapbase = addr; | |
624 | port->membase = ioremap(addr, sizeof(struct grlib_apbuart_regs_map)); | |
10544f12 | 625 | port->irq = 0; |
d4ac42a5 KG |
626 | port->iotype = UPIO_MEM; |
627 | port->ops = &grlib_apbuart_ops; | |
628 | port->flags = UPF_BOOT_AUTOCONF; | |
629 | port->line = line; | |
c897dcf6 | 630 | port->uartclk = *freq_hz; |
d4ac42a5 KG |
631 | port->fifosize = apbuart_scan_fifo_size((struct uart_port *) port, line); |
632 | line++; | |
633 | ||
634 | /* We support maximum UART_NR uarts ... */ | |
635 | if (line == UART_NR) | |
636 | break; | |
d4ac42a5 KG |
637 | } |
638 | ||
d4ac42a5 | 639 | grlib_apbuart_driver.nr = grlib_apbuart_port_nr = line; |
35c64e5d | 640 | return line ? 0 : -ENODEV; |
d4ac42a5 KG |
641 | } |
642 | ||
643 | static int __init grlib_apbuart_init(void) | |
644 | { | |
645 | int ret; | |
646 | ||
647 | /* Find all APBUARTS in device the tree and initialize their ports */ | |
35c64e5d TG |
648 | ret = grlib_apbuart_configure(); |
649 | if (ret) | |
650 | return ret; | |
d4ac42a5 KG |
651 | |
652 | printk(KERN_INFO "Serial: GRLIB APBUART driver\n"); | |
653 | ||
654 | ret = uart_register_driver(&grlib_apbuart_driver); | |
655 | ||
656 | if (ret) { | |
657 | printk(KERN_ERR "%s: uart_register_driver failed (%i)\n", | |
658 | __FILE__, ret); | |
659 | return ret; | |
660 | } | |
661 | ||
793218df | 662 | ret = platform_driver_register(&grlib_apbuart_of_driver); |
d4ac42a5 KG |
663 | if (ret) { |
664 | printk(KERN_ERR | |
793218df | 665 | "%s: platform_driver_register failed (%i)\n", |
d4ac42a5 KG |
666 | __FILE__, ret); |
667 | uart_unregister_driver(&grlib_apbuart_driver); | |
668 | return ret; | |
669 | } | |
670 | ||
671 | return ret; | |
672 | } | |
673 | ||
674 | static void __exit grlib_apbuart_exit(void) | |
675 | { | |
676 | int i; | |
677 | ||
678 | for (i = 0; i < grlib_apbuart_port_nr; i++) | |
679 | uart_remove_one_port(&grlib_apbuart_driver, | |
680 | &grlib_apbuart_ports[i]); | |
681 | ||
682 | uart_unregister_driver(&grlib_apbuart_driver); | |
793218df | 683 | platform_driver_unregister(&grlib_apbuart_of_driver); |
d4ac42a5 KG |
684 | } |
685 | ||
686 | module_init(grlib_apbuart_init); | |
687 | module_exit(grlib_apbuart_exit); | |
688 | ||
689 | MODULE_AUTHOR("Aeroflex Gaisler AB"); | |
690 | MODULE_DESCRIPTION("GRLIB APBUART serial driver"); | |
691 | MODULE_VERSION("2.1"); | |
692 | MODULE_LICENSE("GPL"); |