tty: add SPDX identifiers to all remaining files in drivers/tty/
[linux-2.6-block.git] / drivers / tty / serial / altera_uart.c
CommitLineData
e3b3d0f5 1// SPDX-License-Identifier: GPL-2.0+
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2/*
3 * altera_uart.c -- Altera UART driver
4 *
5 * Based on mcf.c -- Freescale ColdFire UART driver
6 *
7 * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com>
8 * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw>
9 * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch>
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
15 */
16
17#include <linux/kernel.h>
18#include <linux/init.h>
2f8b9c15 19#include <linux/timer.h>
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20#include <linux/interrupt.h>
21#include <linux/module.h>
22#include <linux/console.h>
23#include <linux/tty.h>
24#include <linux/tty_flip.h>
25#include <linux/serial.h>
26#include <linux/serial_core.h>
27#include <linux/platform_device.h>
7c9325d7 28#include <linux/of.h>
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29#include <linux/io.h>
30#include <linux/altera_uart.h>
31
32#define DRV_NAME "altera_uart"
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33#define SERIAL_ALTERA_MAJOR 204
34#define SERIAL_ALTERA_MINOR 213
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35
36/*
37 * Altera UART register definitions according to the Nios UART datasheet:
38 * http://www.altera.com/literature/ds/ds_nios_uart.pdf
39 */
40
41#define ALTERA_UART_SIZE 32
42
43#define ALTERA_UART_RXDATA_REG 0
44#define ALTERA_UART_TXDATA_REG 4
45#define ALTERA_UART_STATUS_REG 8
46#define ALTERA_UART_CONTROL_REG 12
47#define ALTERA_UART_DIVISOR_REG 16
48#define ALTERA_UART_EOP_REG 20
49
50#define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */
51#define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */
52#define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */
53#define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */
54#define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */
55#define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */
56#define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */
57#define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */
58#define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */
59#define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */
60#define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */
61#define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */
62
63 /* Enable interrupt on... */
64#define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */
65#define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */
66#define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */
67#define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */
68#define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */
69#define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */
70#define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */
71#define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */
72#define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/
73
74#define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */
75#define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */
76#define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */
77#define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */
78
79/*
80 * Local per-uart structure.
81 */
82struct altera_uart {
83 struct uart_port port;
2f8b9c15 84 struct timer_list tmr;
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85 unsigned int sigs; /* Local copy of line sigs */
86 unsigned short imr; /* Local IMR mirror */
87};
88
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89static u32 altera_uart_readl(struct uart_port *port, int reg)
90{
2780ad42 91 return readl(port->membase + (reg << port->regshift));
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92}
93
94static void altera_uart_writel(struct uart_port *port, u32 dat, int reg)
95{
2780ad42 96 writel(dat, port->membase + (reg << port->regshift));
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97}
98
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99static unsigned int altera_uart_tx_empty(struct uart_port *port)
100{
0d426eda 101 return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
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102 ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0;
103}
104
105static unsigned int altera_uart_get_mctrl(struct uart_port *port)
106{
107 struct altera_uart *pp = container_of(port, struct altera_uart, port);
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108 unsigned int sigs;
109
0d426eda 110 sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
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111 ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0;
112 sigs |= (pp->sigs & TIOCM_RTS);
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113
114 return sigs;
115}
116
117static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs)
118{
119 struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b 120
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121 pp->sigs = sigs;
122 if (sigs & TIOCM_RTS)
123 pp->imr |= ALTERA_UART_CONTROL_RTS_MSK;
124 else
125 pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK;
0d426eda 126 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
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127}
128
129static void altera_uart_start_tx(struct uart_port *port)
130{
131 struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b 132
6b7d8f8b 133 pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK;
0d426eda 134 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
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135}
136
137static void altera_uart_stop_tx(struct uart_port *port)
138{
139 struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b 140
6b7d8f8b 141 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
0d426eda 142 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
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143}
144
145static void altera_uart_stop_rx(struct uart_port *port)
146{
147 struct altera_uart *pp = container_of(port, struct altera_uart, port);
6b7d8f8b 148
6b7d8f8b 149 pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK;
0d426eda 150 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
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151}
152
153static void altera_uart_break_ctl(struct uart_port *port, int break_state)
154{
155 struct altera_uart *pp = container_of(port, struct altera_uart, port);
156 unsigned long flags;
157
158 spin_lock_irqsave(&port->lock, flags);
159 if (break_state == -1)
160 pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK;
161 else
162 pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK;
0d426eda 163 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
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164 spin_unlock_irqrestore(&port->lock, flags);
165}
166
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167static void altera_uart_set_termios(struct uart_port *port,
168 struct ktermios *termios,
169 struct ktermios *old)
170{
171 unsigned long flags;
172 unsigned int baud, baudclk;
173
174 baud = uart_get_baud_rate(port, termios, old, 0, 4000000);
175 baudclk = port->uartclk / baud;
176
177 if (old)
178 tty_termios_copy_hw(termios, old);
179 tty_termios_encode_baud_rate(termios, baud, baud);
180
181 spin_lock_irqsave(&port->lock, flags);
2f8b9c15 182 uart_update_timeout(port, termios->c_cflag, baud);
0d426eda 183 altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG);
6b7d8f8b 184 spin_unlock_irqrestore(&port->lock, flags);
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185
186 /*
187 * FIXME: port->read_status_mask and port->ignore_status_mask
188 * need to be initialized based on termios settings for
189 * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT
190 */
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191}
192
193static void altera_uart_rx_chars(struct altera_uart *pp)
194{
195 struct uart_port *port = &pp->port;
196 unsigned char ch, flag;
197 unsigned short status;
198
0d426eda 199 while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) &
6b7d8f8b 200 ALTERA_UART_STATUS_RRDY_MSK) {
0d426eda 201 ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
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202 flag = TTY_NORMAL;
203 port->icount.rx++;
204
205 if (status & ALTERA_UART_STATUS_E_MSK) {
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206 altera_uart_writel(port, status,
207 ALTERA_UART_STATUS_REG);
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208
209 if (status & ALTERA_UART_STATUS_BRK_MSK) {
210 port->icount.brk++;
211 if (uart_handle_break(port))
212 continue;
213 } else if (status & ALTERA_UART_STATUS_PE_MSK) {
214 port->icount.parity++;
215 } else if (status & ALTERA_UART_STATUS_ROE_MSK) {
216 port->icount.overrun++;
217 } else if (status & ALTERA_UART_STATUS_FE_MSK) {
218 port->icount.frame++;
219 }
220
221 status &= port->read_status_mask;
222
223 if (status & ALTERA_UART_STATUS_BRK_MSK)
224 flag = TTY_BREAK;
225 else if (status & ALTERA_UART_STATUS_PE_MSK)
226 flag = TTY_PARITY;
227 else if (status & ALTERA_UART_STATUS_FE_MSK)
228 flag = TTY_FRAME;
229 }
230
231 if (uart_handle_sysrq_char(port, ch))
232 continue;
233 uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch,
234 flag);
235 }
236
dd085ed8 237 spin_unlock(&port->lock);
2e124b4a 238 tty_flip_buffer_push(&port->state->port);
dd085ed8 239 spin_lock(&port->lock);
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240}
241
242static void altera_uart_tx_chars(struct altera_uart *pp)
243{
244 struct uart_port *port = &pp->port;
245 struct circ_buf *xmit = &port->state->xmit;
246
247 if (port->x_char) {
248 /* Send special char - probably flow control */
0d426eda 249 altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG);
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250 port->x_char = 0;
251 port->icount.tx++;
252 return;
253 }
254
0d426eda 255 while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
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256 ALTERA_UART_STATUS_TRDY_MSK) {
257 if (xmit->head == xmit->tail)
258 break;
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259 altera_uart_writel(port, xmit->buf[xmit->tail],
260 ALTERA_UART_TXDATA_REG);
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261 xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1);
262 port->icount.tx++;
263 }
264
265 if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS)
266 uart_write_wakeup(port);
267
268 if (xmit->head == xmit->tail) {
269 pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK;
0d426eda 270 altera_uart_writel(port, pp->imr, ALTERA_UART_CONTROL_REG);
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271 }
272}
273
274static irqreturn_t altera_uart_interrupt(int irq, void *data)
275{
276 struct uart_port *port = data;
277 struct altera_uart *pp = container_of(port, struct altera_uart, port);
278 unsigned int isr;
279
0d426eda 280 isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr;
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281
282 spin_lock(&port->lock);
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283 if (isr & ALTERA_UART_STATUS_RRDY_MSK)
284 altera_uart_rx_chars(pp);
285 if (isr & ALTERA_UART_STATUS_TRDY_MSK)
286 altera_uart_tx_chars(pp);
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287 spin_unlock(&port->lock);
288
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289 return IRQ_RETVAL(isr);
290}
291
ad0cda7a 292static void altera_uart_timer(struct timer_list *t)
2f8b9c15 293{
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294 struct altera_uart *pp = from_timer(pp, t, tmr);
295 struct uart_port *port = &pp->port;
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296
297 altera_uart_interrupt(0, port);
298 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
299}
300
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301static void altera_uart_config_port(struct uart_port *port, int flags)
302{
303 port->type = PORT_ALTERA_UART;
304
305 /* Clear mask, so no surprise interrupts. */
0d426eda 306 altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG);
6b7d8f8b 307 /* Clear status register */
0d426eda 308 altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG);
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309}
310
311static int altera_uart_startup(struct uart_port *port)
312{
313 struct altera_uart *pp = container_of(port, struct altera_uart, port);
314 unsigned long flags;
315 int ret;
316
2f8b9c15 317 if (!port->irq) {
ad0cda7a 318 timer_setup(&pp->tmr, altera_uart_timer, 0);
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319 mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port));
320 return 0;
321 }
322
9cfb5c05 323 ret = request_irq(port->irq, altera_uart_interrupt, 0,
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324 DRV_NAME, port);
325 if (ret) {
326 pr_err(DRV_NAME ": unable to attach Altera UART %d "
327 "interrupt vector=%d\n", port->line, port->irq);
328 return ret;
329 }
330
331 spin_lock_irqsave(&port->lock, flags);
332
333 /* Enable RX interrupts now */
334 pp->imr = ALTERA_UART_CONTROL_RRDY_MSK;
335 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
336
337 spin_unlock_irqrestore(&port->lock, flags);
338
339 return 0;
340}
341
342static void altera_uart_shutdown(struct uart_port *port)
343{
344 struct altera_uart *pp = container_of(port, struct altera_uart, port);
345 unsigned long flags;
346
347 spin_lock_irqsave(&port->lock, flags);
348
349 /* Disable all interrupts now */
350 pp->imr = 0;
351 writel(pp->imr, port->membase + ALTERA_UART_CONTROL_REG);
352
353 spin_unlock_irqrestore(&port->lock, flags);
354
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355 if (port->irq)
356 free_irq(port->irq, port);
357 else
358 del_timer_sync(&pp->tmr);
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359}
360
361static const char *altera_uart_type(struct uart_port *port)
362{
363 return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL;
364}
365
366static int altera_uart_request_port(struct uart_port *port)
367{
368 /* UARTs always present */
369 return 0;
370}
371
372static void altera_uart_release_port(struct uart_port *port)
373{
374 /* Nothing to release... */
375}
376
377static int altera_uart_verify_port(struct uart_port *port,
378 struct serial_struct *ser)
379{
380 if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART))
381 return -EINVAL;
382 return 0;
383}
384
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385#ifdef CONFIG_CONSOLE_POLL
386static int altera_uart_poll_get_char(struct uart_port *port)
387{
388 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
389 ALTERA_UART_STATUS_RRDY_MSK))
390 cpu_relax();
391
392 return altera_uart_readl(port, ALTERA_UART_RXDATA_REG);
393}
394
395static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c)
396{
397 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
398 ALTERA_UART_STATUS_TRDY_MSK))
399 cpu_relax();
400
401 altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG);
402}
403#endif
404
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405/*
406 * Define the basic serial functions we support.
407 */
03bd797f 408static const struct uart_ops altera_uart_ops = {
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409 .tx_empty = altera_uart_tx_empty,
410 .get_mctrl = altera_uart_get_mctrl,
411 .set_mctrl = altera_uart_set_mctrl,
412 .start_tx = altera_uart_start_tx,
413 .stop_tx = altera_uart_stop_tx,
414 .stop_rx = altera_uart_stop_rx,
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415 .break_ctl = altera_uart_break_ctl,
416 .startup = altera_uart_startup,
417 .shutdown = altera_uart_shutdown,
418 .set_termios = altera_uart_set_termios,
419 .type = altera_uart_type,
420 .request_port = altera_uart_request_port,
421 .release_port = altera_uart_release_port,
422 .config_port = altera_uart_config_port,
423 .verify_port = altera_uart_verify_port,
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424#ifdef CONFIG_CONSOLE_POLL
425 .poll_get_char = altera_uart_poll_get_char,
426 .poll_put_char = altera_uart_poll_put_char,
427#endif
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428};
429
430static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS];
431
432#if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE)
433
2970b7f5 434static void altera_uart_console_putc(struct uart_port *port, int c)
6b7d8f8b 435{
0d426eda 436 while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) &
e8dd4757 437 ALTERA_UART_STATUS_TRDY_MSK))
fadf34f0 438 cpu_relax();
6b7d8f8b 439
6b7d8f8b 440 writel(c, port->membase + ALTERA_UART_TXDATA_REG);
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441}
442
443static void altera_uart_console_write(struct console *co, const char *s,
444 unsigned int count)
445{
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446 struct uart_port *port = &(altera_uart_ports + co->index)->port;
447
2970b7f5 448 uart_console_write(port, s, count, altera_uart_console_putc);
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449}
450
451static int __init altera_uart_console_setup(struct console *co, char *options)
452{
453 struct uart_port *port;
454 int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE;
455 int bits = 8;
456 int parity = 'n';
457 int flow = 'n';
458
459 if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
460 return -EINVAL;
461 port = &altera_uart_ports[co->index].port;
70eebd0b 462 if (!port->membase)
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463 return -ENODEV;
464
465 if (options)
466 uart_parse_options(options, &baud, &parity, &bits, &flow);
467
468 return uart_set_options(port, co, baud, parity, bits, flow);
469}
470
471static struct uart_driver altera_uart_driver;
472
473static struct console altera_uart_console = {
99793c66 474 .name = "ttyAL",
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475 .write = altera_uart_console_write,
476 .device = uart_console_device,
477 .setup = altera_uart_console_setup,
478 .flags = CON_PRINTBUFFER,
479 .index = -1,
480 .data = &altera_uart_driver,
481};
482
483static int __init altera_uart_console_init(void)
484{
485 register_console(&altera_uart_console);
486 return 0;
487}
488
489console_initcall(altera_uart_console_init);
490
491#define ALTERA_UART_CONSOLE (&altera_uart_console)
492
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493static void altera_uart_earlycon_write(struct console *co, const char *s,
494 unsigned int count)
495{
496 struct earlycon_device *dev = co->data;
497
498 uart_console_write(&dev->port, s, count, altera_uart_console_putc);
499}
500
501static int __init altera_uart_earlycon_setup(struct earlycon_device *dev,
502 const char *options)
503{
504 struct uart_port *port = &dev->port;
505
506 if (!port->membase)
507 return -ENODEV;
508
509 /* Enable RX interrupts now */
510 writel(ALTERA_UART_CONTROL_RRDY_MSK,
511 port->membase + ALTERA_UART_CONTROL_REG);
512
513 if (dev->baud) {
514 unsigned int baudclk = port->uartclk / dev->baud;
515
516 writel(baudclk, port->membase + ALTERA_UART_DIVISOR_REG);
517 }
518
519 dev->con->write = altera_uart_earlycon_write;
520 return 0;
521}
522
523OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup);
524
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525#else
526
527#define ALTERA_UART_CONSOLE NULL
528
0656b1a9 529#endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */
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530
531/*
532 * Define the altera_uart UART driver structure.
533 */
534static struct uart_driver altera_uart_driver = {
535 .owner = THIS_MODULE,
536 .driver_name = DRV_NAME,
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537 .dev_name = "ttyAL",
538 .major = SERIAL_ALTERA_MAJOR,
539 .minor = SERIAL_ALTERA_MINOR,
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540 .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS,
541 .cons = ALTERA_UART_CONSOLE,
542};
543
9671f099 544static int altera_uart_probe(struct platform_device *pdev)
6b7d8f8b 545{
574de559 546 struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev);
6b7d8f8b 547 struct uart_port *port;
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548 struct resource *res_mem;
549 struct resource *res_irq;
550 int i = pdev->id;
7c9325d7 551 int ret;
6b7d8f8b 552
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553 /* if id is -1 scan for a free id and use that one */
554 if (i == -1) {
555 for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++)
556 if (altera_uart_ports[i].port.mapbase == 0)
557 break;
558 }
6b7d8f8b 559
a664ec96 560 if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS)
6b5756f1 561 return -EINVAL;
6b7d8f8b 562
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563 port = &altera_uart_ports[i].port;
564
565 res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
566 if (res_mem)
567 port->mapbase = res_mem->start;
acede70d 568 else if (platp)
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569 port->mapbase = platp->mapbase;
570 else
571 return -EINVAL;
572
573 res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
574 if (res_irq)
575 port->irq = res_irq->start;
acede70d 576 else if (platp)
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577 port->irq = platp->irq;
578
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579 /* Check platform data first so we can override device node data */
580 if (platp)
581 port->uartclk = platp->uartclk;
582 else {
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583 ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency",
584 &port->uartclk);
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585 if (ret)
586 return ret;
587 }
588
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589 port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE);
590 if (!port->membase)
591 return -ENOMEM;
592
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593 if (platp)
594 port->regshift = platp->bus_shift;
595 else
596 port->regshift = 0;
597
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598 port->line = i;
599 port->type = PORT_ALTERA_UART;
600 port->iotype = SERIAL_IO_MEM;
6b5756f1 601 port->ops = &altera_uart_ops;
288e9feb 602 port->flags = UPF_BOOT_AUTOCONF;
b820cd76 603 port->dev = &pdev->dev;
6b5756f1 604
1a16afa2 605 platform_set_drvdata(pdev, port);
a664ec96 606
6b5756f1 607 uart_add_one_port(&altera_uart_driver, port);
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608
609 return 0;
610}
611
ae8d8a14 612static int altera_uart_remove(struct platform_device *pdev)
6b7d8f8b 613{
1a16afa2 614 struct uart_port *port = platform_get_drvdata(pdev);
6b7d8f8b 615
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TK
616 if (port) {
617 uart_remove_one_port(&altera_uart_driver, port);
a664ec96 618 port->mapbase = 0;
59fe2cc8 619 iounmap(port->membase);
a664ec96 620 }
e96fabd8 621
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622 return 0;
623}
624
7c9325d7 625#ifdef CONFIG_OF
4d199a55 626static const struct of_device_id altera_uart_match[] = {
7c9325d7 627 { .compatible = "ALTR,uart-1.0", },
13960b47 628 { .compatible = "altr,uart-1.0", },
7c9325d7
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629 {},
630};
631MODULE_DEVICE_TABLE(of, altera_uart_match);
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632#endif /* CONFIG_OF */
633
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634static struct platform_driver altera_uart_platform_driver = {
635 .probe = altera_uart_probe,
2d47b716 636 .remove = altera_uart_remove,
6b7d8f8b 637 .driver = {
7c9325d7 638 .name = DRV_NAME,
85888069 639 .of_match_table = of_match_ptr(altera_uart_match),
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TK
640 },
641};
642
643static int __init altera_uart_init(void)
644{
645 int rc;
646
647 rc = uart_register_driver(&altera_uart_driver);
648 if (rc)
649 return rc;
650 rc = platform_driver_register(&altera_uart_platform_driver);
61bc6559 651 if (rc)
6b7d8f8b 652 uart_unregister_driver(&altera_uart_driver);
61bc6559 653 return rc;
6b7d8f8b
TK
654}
655
656static void __exit altera_uart_exit(void)
657{
658 platform_driver_unregister(&altera_uart_platform_driver);
659 uart_unregister_driver(&altera_uart_driver);
660}
661
662module_init(altera_uart_init);
663module_exit(altera_uart_exit);
664
665MODULE_DESCRIPTION("Altera UART driver");
666MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>");
667MODULE_LICENSE("GPL");
668MODULE_ALIAS("platform:" DRV_NAME);
99793c66 669MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR);