Commit | Line | Data |
---|---|---|
e3b3d0f5 | 1 | // SPDX-License-Identifier: GPL-2.0+ |
6b7d8f8b TK |
2 | /* |
3 | * altera_uart.c -- Altera UART driver | |
4 | * | |
5 | * Based on mcf.c -- Freescale ColdFire UART driver | |
6 | * | |
7 | * (C) Copyright 2003-2007, Greg Ungerer <gerg@snapgear.com> | |
8 | * (C) Copyright 2008, Thomas Chou <thomas@wytron.com.tw> | |
9 | * (C) Copyright 2010, Tobias Klauser <tklauser@distanz.ch> | |
6b7d8f8b TK |
10 | */ |
11 | ||
12 | #include <linux/kernel.h> | |
13 | #include <linux/init.h> | |
2f8b9c15 | 14 | #include <linux/timer.h> |
6b7d8f8b TK |
15 | #include <linux/interrupt.h> |
16 | #include <linux/module.h> | |
17 | #include <linux/console.h> | |
18 | #include <linux/tty.h> | |
19 | #include <linux/tty_flip.h> | |
20 | #include <linux/serial.h> | |
21 | #include <linux/serial_core.h> | |
22 | #include <linux/platform_device.h> | |
7c9325d7 | 23 | #include <linux/of.h> |
6b7d8f8b TK |
24 | #include <linux/io.h> |
25 | #include <linux/altera_uart.h> | |
26 | ||
27 | #define DRV_NAME "altera_uart" | |
99793c66 AV |
28 | #define SERIAL_ALTERA_MAJOR 204 |
29 | #define SERIAL_ALTERA_MINOR 213 | |
6b7d8f8b TK |
30 | |
31 | /* | |
32 | * Altera UART register definitions according to the Nios UART datasheet: | |
33 | * http://www.altera.com/literature/ds/ds_nios_uart.pdf | |
34 | */ | |
35 | ||
36 | #define ALTERA_UART_SIZE 32 | |
37 | ||
38 | #define ALTERA_UART_RXDATA_REG 0 | |
39 | #define ALTERA_UART_TXDATA_REG 4 | |
40 | #define ALTERA_UART_STATUS_REG 8 | |
41 | #define ALTERA_UART_CONTROL_REG 12 | |
42 | #define ALTERA_UART_DIVISOR_REG 16 | |
43 | #define ALTERA_UART_EOP_REG 20 | |
44 | ||
45 | #define ALTERA_UART_STATUS_PE_MSK 0x0001 /* parity error */ | |
46 | #define ALTERA_UART_STATUS_FE_MSK 0x0002 /* framing error */ | |
47 | #define ALTERA_UART_STATUS_BRK_MSK 0x0004 /* break */ | |
48 | #define ALTERA_UART_STATUS_ROE_MSK 0x0008 /* RX overrun error */ | |
49 | #define ALTERA_UART_STATUS_TOE_MSK 0x0010 /* TX overrun error */ | |
50 | #define ALTERA_UART_STATUS_TMT_MSK 0x0020 /* TX shift register state */ | |
51 | #define ALTERA_UART_STATUS_TRDY_MSK 0x0040 /* TX ready */ | |
52 | #define ALTERA_UART_STATUS_RRDY_MSK 0x0080 /* RX ready */ | |
53 | #define ALTERA_UART_STATUS_E_MSK 0x0100 /* exception condition */ | |
54 | #define ALTERA_UART_STATUS_DCTS_MSK 0x0400 /* CTS logic-level change */ | |
55 | #define ALTERA_UART_STATUS_CTS_MSK 0x0800 /* CTS logic state */ | |
56 | #define ALTERA_UART_STATUS_EOP_MSK 0x1000 /* EOP written/read */ | |
57 | ||
58 | /* Enable interrupt on... */ | |
59 | #define ALTERA_UART_CONTROL_PE_MSK 0x0001 /* ...parity error */ | |
60 | #define ALTERA_UART_CONTROL_FE_MSK 0x0002 /* ...framing error */ | |
61 | #define ALTERA_UART_CONTROL_BRK_MSK 0x0004 /* ...break */ | |
62 | #define ALTERA_UART_CONTROL_ROE_MSK 0x0008 /* ...RX overrun */ | |
63 | #define ALTERA_UART_CONTROL_TOE_MSK 0x0010 /* ...TX overrun */ | |
64 | #define ALTERA_UART_CONTROL_TMT_MSK 0x0020 /* ...TX shift register empty */ | |
65 | #define ALTERA_UART_CONTROL_TRDY_MSK 0x0040 /* ...TX ready */ | |
66 | #define ALTERA_UART_CONTROL_RRDY_MSK 0x0080 /* ...RX ready */ | |
67 | #define ALTERA_UART_CONTROL_E_MSK 0x0100 /* ...exception*/ | |
68 | ||
69 | #define ALTERA_UART_CONTROL_TRBK_MSK 0x0200 /* TX break */ | |
70 | #define ALTERA_UART_CONTROL_DCTS_MSK 0x0400 /* Interrupt on CTS change */ | |
71 | #define ALTERA_UART_CONTROL_RTS_MSK 0x0800 /* RTS signal */ | |
72 | #define ALTERA_UART_CONTROL_EOP_MSK 0x1000 /* Interrupt on EOP */ | |
73 | ||
74 | /* | |
75 | * Local per-uart structure. | |
76 | */ | |
77 | struct altera_uart { | |
78 | struct uart_port port; | |
2f8b9c15 | 79 | struct timer_list tmr; |
6b7d8f8b TK |
80 | unsigned int sigs; /* Local copy of line sigs */ |
81 | unsigned short imr; /* Local IMR mirror */ | |
82 | }; | |
83 | ||
0d426eda AV |
84 | static u32 altera_uart_readl(struct uart_port *port, int reg) |
85 | { | |
2780ad42 | 86 | return readl(port->membase + (reg << port->regshift)); |
0d426eda AV |
87 | } |
88 | ||
89 | static void altera_uart_writel(struct uart_port *port, u32 dat, int reg) | |
90 | { | |
2780ad42 | 91 | writel(dat, port->membase + (reg << port->regshift)); |
0d426eda AV |
92 | } |
93 | ||
6b7d8f8b TK |
94 | static unsigned int altera_uart_tx_empty(struct uart_port *port) |
95 | { | |
0d426eda | 96 | return (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
6b7d8f8b TK |
97 | ALTERA_UART_STATUS_TMT_MSK) ? TIOCSER_TEMT : 0; |
98 | } | |
99 | ||
100 | static unsigned int altera_uart_get_mctrl(struct uart_port *port) | |
101 | { | |
102 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
6b7d8f8b TK |
103 | unsigned int sigs; |
104 | ||
0d426eda | 105 | sigs = (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
6b7d8f8b TK |
106 | ALTERA_UART_STATUS_CTS_MSK) ? TIOCM_CTS : 0; |
107 | sigs |= (pp->sigs & TIOCM_RTS); | |
6b7d8f8b TK |
108 | |
109 | return sigs; | |
110 | } | |
111 | ||
2ea6ad8b UKK |
112 | static void altera_uart_update_ctrl_reg(struct altera_uart *pp) |
113 | { | |
114 | unsigned short imr = pp->imr; | |
115 | ||
116 | /* | |
117 | * If the device doesn't have an irq, ensure that the irq bits are | |
118 | * masked out to keep the irq line inactive. | |
119 | */ | |
120 | if (!pp->port.irq) | |
121 | imr &= ALTERA_UART_CONTROL_TRBK_MSK | ALTERA_UART_CONTROL_RTS_MSK; | |
122 | ||
123 | altera_uart_writel(&pp->port, imr, ALTERA_UART_CONTROL_REG); | |
124 | } | |
125 | ||
6b7d8f8b TK |
126 | static void altera_uart_set_mctrl(struct uart_port *port, unsigned int sigs) |
127 | { | |
128 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
6b7d8f8b | 129 | |
6b7d8f8b TK |
130 | pp->sigs = sigs; |
131 | if (sigs & TIOCM_RTS) | |
132 | pp->imr |= ALTERA_UART_CONTROL_RTS_MSK; | |
133 | else | |
134 | pp->imr &= ~ALTERA_UART_CONTROL_RTS_MSK; | |
2ea6ad8b | 135 | altera_uart_update_ctrl_reg(pp); |
6b7d8f8b TK |
136 | } |
137 | ||
138 | static void altera_uart_start_tx(struct uart_port *port) | |
139 | { | |
140 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
6b7d8f8b | 141 | |
6b7d8f8b | 142 | pp->imr |= ALTERA_UART_CONTROL_TRDY_MSK; |
2ea6ad8b | 143 | altera_uart_update_ctrl_reg(pp); |
6b7d8f8b TK |
144 | } |
145 | ||
146 | static void altera_uart_stop_tx(struct uart_port *port) | |
147 | { | |
148 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
6b7d8f8b | 149 | |
6b7d8f8b | 150 | pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; |
2ea6ad8b | 151 | altera_uart_update_ctrl_reg(pp); |
6b7d8f8b TK |
152 | } |
153 | ||
154 | static void altera_uart_stop_rx(struct uart_port *port) | |
155 | { | |
156 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
6b7d8f8b | 157 | |
6b7d8f8b | 158 | pp->imr &= ~ALTERA_UART_CONTROL_RRDY_MSK; |
2ea6ad8b | 159 | altera_uart_update_ctrl_reg(pp); |
6b7d8f8b TK |
160 | } |
161 | ||
162 | static void altera_uart_break_ctl(struct uart_port *port, int break_state) | |
163 | { | |
164 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
165 | unsigned long flags; | |
166 | ||
167 | spin_lock_irqsave(&port->lock, flags); | |
168 | if (break_state == -1) | |
169 | pp->imr |= ALTERA_UART_CONTROL_TRBK_MSK; | |
170 | else | |
171 | pp->imr &= ~ALTERA_UART_CONTROL_TRBK_MSK; | |
2ea6ad8b | 172 | altera_uart_update_ctrl_reg(pp); |
6b7d8f8b TK |
173 | spin_unlock_irqrestore(&port->lock, flags); |
174 | } | |
175 | ||
6b7d8f8b TK |
176 | static void altera_uart_set_termios(struct uart_port *port, |
177 | struct ktermios *termios, | |
178 | struct ktermios *old) | |
179 | { | |
180 | unsigned long flags; | |
181 | unsigned int baud, baudclk; | |
182 | ||
183 | baud = uart_get_baud_rate(port, termios, old, 0, 4000000); | |
184 | baudclk = port->uartclk / baud; | |
185 | ||
186 | if (old) | |
187 | tty_termios_copy_hw(termios, old); | |
188 | tty_termios_encode_baud_rate(termios, baud, baud); | |
189 | ||
190 | spin_lock_irqsave(&port->lock, flags); | |
2f8b9c15 | 191 | uart_update_timeout(port, termios->c_cflag, baud); |
0d426eda | 192 | altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG); |
6b7d8f8b | 193 | spin_unlock_irqrestore(&port->lock, flags); |
ef8b9ddc PH |
194 | |
195 | /* | |
196 | * FIXME: port->read_status_mask and port->ignore_status_mask | |
197 | * need to be initialized based on termios settings for | |
198 | * INPCK, IGNBRK, IGNPAR, PARMRK, BRKINT | |
199 | */ | |
6b7d8f8b TK |
200 | } |
201 | ||
202 | static void altera_uart_rx_chars(struct altera_uart *pp) | |
203 | { | |
204 | struct uart_port *port = &pp->port; | |
205 | unsigned char ch, flag; | |
206 | unsigned short status; | |
207 | ||
0d426eda | 208 | while ((status = altera_uart_readl(port, ALTERA_UART_STATUS_REG)) & |
6b7d8f8b | 209 | ALTERA_UART_STATUS_RRDY_MSK) { |
0d426eda | 210 | ch = altera_uart_readl(port, ALTERA_UART_RXDATA_REG); |
6b7d8f8b TK |
211 | flag = TTY_NORMAL; |
212 | port->icount.rx++; | |
213 | ||
214 | if (status & ALTERA_UART_STATUS_E_MSK) { | |
0d426eda AV |
215 | altera_uart_writel(port, status, |
216 | ALTERA_UART_STATUS_REG); | |
6b7d8f8b TK |
217 | |
218 | if (status & ALTERA_UART_STATUS_BRK_MSK) { | |
219 | port->icount.brk++; | |
220 | if (uart_handle_break(port)) | |
221 | continue; | |
222 | } else if (status & ALTERA_UART_STATUS_PE_MSK) { | |
223 | port->icount.parity++; | |
224 | } else if (status & ALTERA_UART_STATUS_ROE_MSK) { | |
225 | port->icount.overrun++; | |
226 | } else if (status & ALTERA_UART_STATUS_FE_MSK) { | |
227 | port->icount.frame++; | |
228 | } | |
229 | ||
230 | status &= port->read_status_mask; | |
231 | ||
232 | if (status & ALTERA_UART_STATUS_BRK_MSK) | |
233 | flag = TTY_BREAK; | |
234 | else if (status & ALTERA_UART_STATUS_PE_MSK) | |
235 | flag = TTY_PARITY; | |
236 | else if (status & ALTERA_UART_STATUS_FE_MSK) | |
237 | flag = TTY_FRAME; | |
238 | } | |
239 | ||
240 | if (uart_handle_sysrq_char(port, ch)) | |
241 | continue; | |
242 | uart_insert_char(port, status, ALTERA_UART_STATUS_ROE_MSK, ch, | |
243 | flag); | |
244 | } | |
245 | ||
dd085ed8 | 246 | spin_unlock(&port->lock); |
2e124b4a | 247 | tty_flip_buffer_push(&port->state->port); |
dd085ed8 | 248 | spin_lock(&port->lock); |
6b7d8f8b TK |
249 | } |
250 | ||
251 | static void altera_uart_tx_chars(struct altera_uart *pp) | |
252 | { | |
253 | struct uart_port *port = &pp->port; | |
254 | struct circ_buf *xmit = &port->state->xmit; | |
255 | ||
256 | if (port->x_char) { | |
257 | /* Send special char - probably flow control */ | |
0d426eda | 258 | altera_uart_writel(port, port->x_char, ALTERA_UART_TXDATA_REG); |
6b7d8f8b TK |
259 | port->x_char = 0; |
260 | port->icount.tx++; | |
261 | return; | |
262 | } | |
263 | ||
0d426eda | 264 | while (altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
6b7d8f8b TK |
265 | ALTERA_UART_STATUS_TRDY_MSK) { |
266 | if (xmit->head == xmit->tail) | |
267 | break; | |
0d426eda AV |
268 | altera_uart_writel(port, xmit->buf[xmit->tail], |
269 | ALTERA_UART_TXDATA_REG); | |
6b7d8f8b TK |
270 | xmit->tail = (xmit->tail + 1) & (UART_XMIT_SIZE - 1); |
271 | port->icount.tx++; | |
272 | } | |
273 | ||
274 | if (uart_circ_chars_pending(xmit) < WAKEUP_CHARS) | |
275 | uart_write_wakeup(port); | |
276 | ||
277 | if (xmit->head == xmit->tail) { | |
278 | pp->imr &= ~ALTERA_UART_CONTROL_TRDY_MSK; | |
2ea6ad8b | 279 | altera_uart_update_ctrl_reg(pp); |
6b7d8f8b TK |
280 | } |
281 | } | |
282 | ||
283 | static irqreturn_t altera_uart_interrupt(int irq, void *data) | |
284 | { | |
285 | struct uart_port *port = data; | |
286 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
287 | unsigned int isr; | |
288 | ||
0d426eda | 289 | isr = altera_uart_readl(port, ALTERA_UART_STATUS_REG) & pp->imr; |
d8d721f4 TK |
290 | |
291 | spin_lock(&port->lock); | |
6b7d8f8b TK |
292 | if (isr & ALTERA_UART_STATUS_RRDY_MSK) |
293 | altera_uart_rx_chars(pp); | |
294 | if (isr & ALTERA_UART_STATUS_TRDY_MSK) | |
295 | altera_uart_tx_chars(pp); | |
d8d721f4 TK |
296 | spin_unlock(&port->lock); |
297 | ||
6b7d8f8b TK |
298 | return IRQ_RETVAL(isr); |
299 | } | |
300 | ||
ad0cda7a | 301 | static void altera_uart_timer(struct timer_list *t) |
2f8b9c15 | 302 | { |
ad0cda7a KC |
303 | struct altera_uart *pp = from_timer(pp, t, tmr); |
304 | struct uart_port *port = &pp->port; | |
2f8b9c15 AV |
305 | |
306 | altera_uart_interrupt(0, port); | |
307 | mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); | |
308 | } | |
309 | ||
6b7d8f8b TK |
310 | static void altera_uart_config_port(struct uart_port *port, int flags) |
311 | { | |
312 | port->type = PORT_ALTERA_UART; | |
313 | ||
314 | /* Clear mask, so no surprise interrupts. */ | |
0d426eda | 315 | altera_uart_writel(port, 0, ALTERA_UART_CONTROL_REG); |
6b7d8f8b | 316 | /* Clear status register */ |
0d426eda | 317 | altera_uart_writel(port, 0, ALTERA_UART_STATUS_REG); |
6b7d8f8b TK |
318 | } |
319 | ||
320 | static int altera_uart_startup(struct uart_port *port) | |
321 | { | |
322 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
323 | unsigned long flags; | |
6b7d8f8b | 324 | |
2f8b9c15 | 325 | if (!port->irq) { |
ad0cda7a | 326 | timer_setup(&pp->tmr, altera_uart_timer, 0); |
2f8b9c15 | 327 | mod_timer(&pp->tmr, jiffies + uart_poll_timeout(port)); |
eefadcbc UKK |
328 | } else { |
329 | int ret; | |
330 | ||
331 | ret = request_irq(port->irq, altera_uart_interrupt, 0, | |
332 | DRV_NAME, port); | |
333 | if (ret) { | |
334 | pr_err(DRV_NAME ": unable to attach Altera UART %d " | |
335 | "interrupt vector=%d\n", port->line, port->irq); | |
336 | return ret; | |
337 | } | |
6b7d8f8b TK |
338 | } |
339 | ||
340 | spin_lock_irqsave(&port->lock, flags); | |
341 | ||
342 | /* Enable RX interrupts now */ | |
343 | pp->imr = ALTERA_UART_CONTROL_RRDY_MSK; | |
2ea6ad8b | 344 | altera_uart_update_ctrl_reg(pp); |
6b7d8f8b TK |
345 | |
346 | spin_unlock_irqrestore(&port->lock, flags); | |
347 | ||
348 | return 0; | |
349 | } | |
350 | ||
351 | static void altera_uart_shutdown(struct uart_port *port) | |
352 | { | |
353 | struct altera_uart *pp = container_of(port, struct altera_uart, port); | |
354 | unsigned long flags; | |
355 | ||
356 | spin_lock_irqsave(&port->lock, flags); | |
357 | ||
358 | /* Disable all interrupts now */ | |
359 | pp->imr = 0; | |
2ea6ad8b | 360 | altera_uart_update_ctrl_reg(pp); |
6b7d8f8b TK |
361 | |
362 | spin_unlock_irqrestore(&port->lock, flags); | |
363 | ||
2f8b9c15 AV |
364 | if (port->irq) |
365 | free_irq(port->irq, port); | |
366 | else | |
367 | del_timer_sync(&pp->tmr); | |
6b7d8f8b TK |
368 | } |
369 | ||
370 | static const char *altera_uart_type(struct uart_port *port) | |
371 | { | |
372 | return (port->type == PORT_ALTERA_UART) ? "Altera UART" : NULL; | |
373 | } | |
374 | ||
375 | static int altera_uart_request_port(struct uart_port *port) | |
376 | { | |
377 | /* UARTs always present */ | |
378 | return 0; | |
379 | } | |
380 | ||
381 | static void altera_uart_release_port(struct uart_port *port) | |
382 | { | |
383 | /* Nothing to release... */ | |
384 | } | |
385 | ||
386 | static int altera_uart_verify_port(struct uart_port *port, | |
387 | struct serial_struct *ser) | |
388 | { | |
389 | if ((ser->type != PORT_UNKNOWN) && (ser->type != PORT_ALTERA_UART)) | |
390 | return -EINVAL; | |
391 | return 0; | |
392 | } | |
393 | ||
418a936e TK |
394 | #ifdef CONFIG_CONSOLE_POLL |
395 | static int altera_uart_poll_get_char(struct uart_port *port) | |
396 | { | |
397 | while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & | |
398 | ALTERA_UART_STATUS_RRDY_MSK)) | |
399 | cpu_relax(); | |
400 | ||
401 | return altera_uart_readl(port, ALTERA_UART_RXDATA_REG); | |
402 | } | |
403 | ||
404 | static void altera_uart_poll_put_char(struct uart_port *port, unsigned char c) | |
405 | { | |
406 | while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & | |
407 | ALTERA_UART_STATUS_TRDY_MSK)) | |
408 | cpu_relax(); | |
409 | ||
410 | altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG); | |
411 | } | |
412 | #endif | |
413 | ||
6b7d8f8b TK |
414 | /* |
415 | * Define the basic serial functions we support. | |
416 | */ | |
03bd797f | 417 | static const struct uart_ops altera_uart_ops = { |
6b7d8f8b TK |
418 | .tx_empty = altera_uart_tx_empty, |
419 | .get_mctrl = altera_uart_get_mctrl, | |
420 | .set_mctrl = altera_uart_set_mctrl, | |
421 | .start_tx = altera_uart_start_tx, | |
422 | .stop_tx = altera_uart_stop_tx, | |
423 | .stop_rx = altera_uart_stop_rx, | |
6b7d8f8b TK |
424 | .break_ctl = altera_uart_break_ctl, |
425 | .startup = altera_uart_startup, | |
426 | .shutdown = altera_uart_shutdown, | |
427 | .set_termios = altera_uart_set_termios, | |
428 | .type = altera_uart_type, | |
429 | .request_port = altera_uart_request_port, | |
430 | .release_port = altera_uart_release_port, | |
431 | .config_port = altera_uart_config_port, | |
432 | .verify_port = altera_uart_verify_port, | |
418a936e TK |
433 | #ifdef CONFIG_CONSOLE_POLL |
434 | .poll_get_char = altera_uart_poll_get_char, | |
435 | .poll_put_char = altera_uart_poll_put_char, | |
436 | #endif | |
6b7d8f8b TK |
437 | }; |
438 | ||
439 | static struct altera_uart altera_uart_ports[CONFIG_SERIAL_ALTERA_UART_MAXPORTS]; | |
440 | ||
441 | #if defined(CONFIG_SERIAL_ALTERA_UART_CONSOLE) | |
442 | ||
2970b7f5 | 443 | static void altera_uart_console_putc(struct uart_port *port, int c) |
6b7d8f8b | 444 | { |
0d426eda | 445 | while (!(altera_uart_readl(port, ALTERA_UART_STATUS_REG) & |
e8dd4757 | 446 | ALTERA_UART_STATUS_TRDY_MSK)) |
fadf34f0 | 447 | cpu_relax(); |
6b7d8f8b | 448 | |
0e254963 | 449 | altera_uart_writel(port, c, ALTERA_UART_TXDATA_REG); |
6b7d8f8b TK |
450 | } |
451 | ||
452 | static void altera_uart_console_write(struct console *co, const char *s, | |
453 | unsigned int count) | |
454 | { | |
fadf34f0 TK |
455 | struct uart_port *port = &(altera_uart_ports + co->index)->port; |
456 | ||
2970b7f5 | 457 | uart_console_write(port, s, count, altera_uart_console_putc); |
6b7d8f8b TK |
458 | } |
459 | ||
460 | static int __init altera_uart_console_setup(struct console *co, char *options) | |
461 | { | |
462 | struct uart_port *port; | |
463 | int baud = CONFIG_SERIAL_ALTERA_UART_BAUDRATE; | |
464 | int bits = 8; | |
465 | int parity = 'n'; | |
466 | int flow = 'n'; | |
467 | ||
468 | if (co->index < 0 || co->index >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) | |
469 | return -EINVAL; | |
470 | port = &altera_uart_ports[co->index].port; | |
70eebd0b | 471 | if (!port->membase) |
6b7d8f8b TK |
472 | return -ENODEV; |
473 | ||
474 | if (options) | |
475 | uart_parse_options(options, &baud, &parity, &bits, &flow); | |
476 | ||
477 | return uart_set_options(port, co, baud, parity, bits, flow); | |
478 | } | |
479 | ||
480 | static struct uart_driver altera_uart_driver; | |
481 | ||
482 | static struct console altera_uart_console = { | |
99793c66 | 483 | .name = "ttyAL", |
6b7d8f8b TK |
484 | .write = altera_uart_console_write, |
485 | .device = uart_console_device, | |
486 | .setup = altera_uart_console_setup, | |
487 | .flags = CON_PRINTBUFFER, | |
488 | .index = -1, | |
489 | .data = &altera_uart_driver, | |
490 | }; | |
491 | ||
492 | static int __init altera_uart_console_init(void) | |
493 | { | |
494 | register_console(&altera_uart_console); | |
495 | return 0; | |
496 | } | |
497 | ||
498 | console_initcall(altera_uart_console_init); | |
499 | ||
500 | #define ALTERA_UART_CONSOLE (&altera_uart_console) | |
501 | ||
4d9d7d89 TK |
502 | static void altera_uart_earlycon_write(struct console *co, const char *s, |
503 | unsigned int count) | |
504 | { | |
505 | struct earlycon_device *dev = co->data; | |
506 | ||
507 | uart_console_write(&dev->port, s, count, altera_uart_console_putc); | |
508 | } | |
509 | ||
510 | static int __init altera_uart_earlycon_setup(struct earlycon_device *dev, | |
511 | const char *options) | |
512 | { | |
513 | struct uart_port *port = &dev->port; | |
514 | ||
515 | if (!port->membase) | |
516 | return -ENODEV; | |
517 | ||
518 | /* Enable RX interrupts now */ | |
0e254963 UKK |
519 | altera_uart_writel(port, ALTERA_UART_CONTROL_RRDY_MSK, |
520 | ALTERA_UART_CONTROL_REG); | |
4d9d7d89 TK |
521 | |
522 | if (dev->baud) { | |
523 | unsigned int baudclk = port->uartclk / dev->baud; | |
524 | ||
0e254963 | 525 | altera_uart_writel(port, baudclk, ALTERA_UART_DIVISOR_REG); |
4d9d7d89 TK |
526 | } |
527 | ||
528 | dev->con->write = altera_uart_earlycon_write; | |
529 | return 0; | |
530 | } | |
531 | ||
532 | OF_EARLYCON_DECLARE(uart, "altr,uart-1.0", altera_uart_earlycon_setup); | |
533 | ||
6b7d8f8b TK |
534 | #else |
535 | ||
536 | #define ALTERA_UART_CONSOLE NULL | |
537 | ||
0656b1a9 | 538 | #endif /* CONFIG_SERIAL_ALTERA_UART_CONSOLE */ |
6b7d8f8b TK |
539 | |
540 | /* | |
541 | * Define the altera_uart UART driver structure. | |
542 | */ | |
543 | static struct uart_driver altera_uart_driver = { | |
544 | .owner = THIS_MODULE, | |
545 | .driver_name = DRV_NAME, | |
99793c66 AV |
546 | .dev_name = "ttyAL", |
547 | .major = SERIAL_ALTERA_MAJOR, | |
548 | .minor = SERIAL_ALTERA_MINOR, | |
6b7d8f8b TK |
549 | .nr = CONFIG_SERIAL_ALTERA_UART_MAXPORTS, |
550 | .cons = ALTERA_UART_CONSOLE, | |
551 | }; | |
552 | ||
9671f099 | 553 | static int altera_uart_probe(struct platform_device *pdev) |
6b7d8f8b | 554 | { |
574de559 | 555 | struct altera_uart_platform_uart *platp = dev_get_platdata(&pdev->dev); |
6b7d8f8b | 556 | struct uart_port *port; |
6b5756f1 AV |
557 | struct resource *res_mem; |
558 | struct resource *res_irq; | |
559 | int i = pdev->id; | |
7c9325d7 | 560 | int ret; |
6b7d8f8b | 561 | |
a664ec96 TK |
562 | /* if id is -1 scan for a free id and use that one */ |
563 | if (i == -1) { | |
564 | for (i = 0; i < CONFIG_SERIAL_ALTERA_UART_MAXPORTS; i++) | |
565 | if (altera_uart_ports[i].port.mapbase == 0) | |
566 | break; | |
567 | } | |
6b7d8f8b | 568 | |
a664ec96 | 569 | if (i < 0 || i >= CONFIG_SERIAL_ALTERA_UART_MAXPORTS) |
6b5756f1 | 570 | return -EINVAL; |
6b7d8f8b | 571 | |
6b5756f1 AV |
572 | port = &altera_uart_ports[i].port; |
573 | ||
574 | res_mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | |
575 | if (res_mem) | |
576 | port->mapbase = res_mem->start; | |
acede70d | 577 | else if (platp) |
6b5756f1 AV |
578 | port->mapbase = platp->mapbase; |
579 | else | |
580 | return -EINVAL; | |
581 | ||
582 | res_irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0); | |
583 | if (res_irq) | |
584 | port->irq = res_irq->start; | |
acede70d | 585 | else if (platp) |
6b5756f1 AV |
586 | port->irq = platp->irq; |
587 | ||
7c9325d7 TK |
588 | /* Check platform data first so we can override device node data */ |
589 | if (platp) | |
590 | port->uartclk = platp->uartclk; | |
591 | else { | |
d144aff1 TK |
592 | ret = of_property_read_u32(pdev->dev.of_node, "clock-frequency", |
593 | &port->uartclk); | |
7c9325d7 TK |
594 | if (ret) |
595 | return ret; | |
596 | } | |
597 | ||
6b5756f1 AV |
598 | port->membase = ioremap(port->mapbase, ALTERA_UART_SIZE); |
599 | if (!port->membase) | |
600 | return -ENOMEM; | |
601 | ||
2780ad42 TK |
602 | if (platp) |
603 | port->regshift = platp->bus_shift; | |
604 | else | |
605 | port->regshift = 0; | |
606 | ||
6b5756f1 AV |
607 | port->line = i; |
608 | port->type = PORT_ALTERA_UART; | |
609 | port->iotype = SERIAL_IO_MEM; | |
6b5756f1 | 610 | port->ops = &altera_uart_ops; |
288e9feb | 611 | port->flags = UPF_BOOT_AUTOCONF; |
b820cd76 | 612 | port->dev = &pdev->dev; |
6b5756f1 | 613 | |
1a16afa2 | 614 | platform_set_drvdata(pdev, port); |
a664ec96 | 615 | |
6b5756f1 | 616 | uart_add_one_port(&altera_uart_driver, port); |
6b7d8f8b TK |
617 | |
618 | return 0; | |
619 | } | |
620 | ||
ae8d8a14 | 621 | static int altera_uart_remove(struct platform_device *pdev) |
6b7d8f8b | 622 | { |
1a16afa2 | 623 | struct uart_port *port = platform_get_drvdata(pdev); |
6b7d8f8b | 624 | |
a664ec96 TK |
625 | if (port) { |
626 | uart_remove_one_port(&altera_uart_driver, port); | |
a664ec96 | 627 | port->mapbase = 0; |
59fe2cc8 | 628 | iounmap(port->membase); |
a664ec96 | 629 | } |
e96fabd8 | 630 | |
6b7d8f8b TK |
631 | return 0; |
632 | } | |
633 | ||
7c9325d7 | 634 | #ifdef CONFIG_OF |
4d199a55 | 635 | static const struct of_device_id altera_uart_match[] = { |
7c9325d7 | 636 | { .compatible = "ALTR,uart-1.0", }, |
13960b47 | 637 | { .compatible = "altr,uart-1.0", }, |
7c9325d7 TK |
638 | {}, |
639 | }; | |
640 | MODULE_DEVICE_TABLE(of, altera_uart_match); | |
7c9325d7 TK |
641 | #endif /* CONFIG_OF */ |
642 | ||
6b7d8f8b TK |
643 | static struct platform_driver altera_uart_platform_driver = { |
644 | .probe = altera_uart_probe, | |
2d47b716 | 645 | .remove = altera_uart_remove, |
6b7d8f8b | 646 | .driver = { |
7c9325d7 | 647 | .name = DRV_NAME, |
85888069 | 648 | .of_match_table = of_match_ptr(altera_uart_match), |
6b7d8f8b TK |
649 | }, |
650 | }; | |
651 | ||
652 | static int __init altera_uart_init(void) | |
653 | { | |
654 | int rc; | |
655 | ||
656 | rc = uart_register_driver(&altera_uart_driver); | |
657 | if (rc) | |
658 | return rc; | |
659 | rc = platform_driver_register(&altera_uart_platform_driver); | |
61bc6559 | 660 | if (rc) |
6b7d8f8b | 661 | uart_unregister_driver(&altera_uart_driver); |
61bc6559 | 662 | return rc; |
6b7d8f8b TK |
663 | } |
664 | ||
665 | static void __exit altera_uart_exit(void) | |
666 | { | |
667 | platform_driver_unregister(&altera_uart_platform_driver); | |
668 | uart_unregister_driver(&altera_uart_driver); | |
669 | } | |
670 | ||
671 | module_init(altera_uart_init); | |
672 | module_exit(altera_uart_exit); | |
673 | ||
674 | MODULE_DESCRIPTION("Altera UART driver"); | |
675 | MODULE_AUTHOR("Thomas Chou <thomas@wytron.com.tw>"); | |
676 | MODULE_LICENSE("GPL"); | |
677 | MODULE_ALIAS("platform:" DRV_NAME); | |
99793c66 | 678 | MODULE_ALIAS_CHARDEV_MAJOR(SERIAL_ALTERA_MAJOR); |