[linux-block.git] / drivers / tty / serial / 8250 / 8250_mid.c

/*
 * 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
 *
 * Copyright (C) 2015 Intel Corporation
 * Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/bitops.h>
#include <linux/module.h>
#include <linux/pci.h>
#include <linux/rational.h>

#include <linux/dma/hsu.h>
#include <linux/8250_pci.h>

#include "8250.h"

#define PCI_DEVICE_ID_INTEL_PNW_UART1	0x081b
#define PCI_DEVICE_ID_INTEL_PNW_UART2	0x081c
#define PCI_DEVICE_ID_INTEL_PNW_UART3	0x081d
#define PCI_DEVICE_ID_INTEL_TNG_UART	0x1191
#define PCI_DEVICE_ID_INTEL_DNV_UART	0x19d8

/* Intel MID Specific registers */
#define INTEL_MID_UART_DNV_FISR		0x08
#define INTEL_MID_UART_PS		0x30
#define INTEL_MID_UART_MUL		0x34
#define INTEL_MID_UART_DIV		0x38

struct mid8250;

struct mid8250_board {
	unsigned int flags;
	unsigned long freq;
	unsigned int base_baud;
	int (*setup)(struct mid8250 *, struct uart_port *p);
	void (*exit)(struct mid8250 *);
};

struct mid8250 {
	int line;
	int dma_index;
	struct pci_dev *dma_dev;
	struct uart_8250_dma dma;
	struct mid8250_board *board;
	struct hsu_dma_chip dma_chip;
};

/*****************************************************************************/

static int pnw_setup(struct mid8250 *mid, struct uart_port *p)
{
	struct pci_dev *pdev = to_pci_dev(p->dev);

	switch (pdev->device) {
	case PCI_DEVICE_ID_INTEL_PNW_UART1:
		mid->dma_index = 0;
		break;
	case PCI_DEVICE_ID_INTEL_PNW_UART2:
		mid->dma_index = 1;
		break;
	case PCI_DEVICE_ID_INTEL_PNW_UART3:
		mid->dma_index = 2;
		break;
	default:
		return -EINVAL;
	}

	mid->dma_dev = pci_get_slot(pdev->bus,
				    PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
	return 0;
}

static int tng_handle_irq(struct uart_port *p)
{
	struct mid8250 *mid = p->private_data;
	struct uart_8250_port *up = up_to_u8250p(p);
	struct hsu_dma_chip *chip;
	u32 status;
	int ret = 0;
	int err;

	chip = pci_get_drvdata(mid->dma_dev);

	/* Rx DMA */
	err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
	if (err > 0) {
		serial8250_rx_dma_flush(up);
		ret |= 1;
	} else if (err == 0)
		ret |= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);

	/* Tx DMA */
	err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
	if (err > 0)
		ret |= 1;
	else if (err == 0)
		ret |= hsu_dma_do_irq(chip, mid->dma_index * 2, status);

	/* UART */
	ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
	return IRQ_RETVAL(ret);
}

static int tng_setup(struct mid8250 *mid, struct uart_port *p)
{
	struct pci_dev *pdev = to_pci_dev(p->dev);
	int index = PCI_FUNC(pdev->devfn);

	/*
	 * Device 0000:00:04.0 is not a real HSU port. It provides a global
	 * register set for all HSU ports, although it has the same PCI ID.
	 * Skip it here.
	 */
	if (index-- == 0)
		return -ENODEV;

	mid->dma_index = index;
	mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));

	p->handle_irq = tng_handle_irq;
	return 0;
}

static int dnv_handle_irq(struct uart_port *p)
{
	struct mid8250 *mid = p->private_data;
	struct uart_8250_port *up = up_to_u8250p(p);
	unsigned int fisr = serial_port_in(p, INTEL_MID_UART_DNV_FISR);
	u32 status;
	int ret = 0;
	int err;

	if (fisr & BIT(2)) {
		err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
		if (err > 0) {
			serial8250_rx_dma_flush(up);
			ret |= 1;
		} else if (err == 0)
			ret |= hsu_dma_do_irq(&mid->dma_chip, 1, status);
	}
	if (fisr & BIT(1)) {
		err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
		if (err > 0)
			ret |= 1;
		else if (err == 0)
			ret |= hsu_dma_do_irq(&mid->dma_chip, 0, status);
	}
	if (fisr & BIT(0))
		ret |= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
	return IRQ_RETVAL(ret);
}

#define DNV_DMA_CHAN_OFFSET 0x80

static int dnv_setup(struct mid8250 *mid, struct uart_port *p)
{
	struct hsu_dma_chip *chip = &mid->dma_chip;
	struct pci_dev *pdev = to_pci_dev(p->dev);
	unsigned int bar = FL_GET_BASE(mid->board->flags);
	int ret;

	pci_set_master(pdev);

	ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
	if (ret < 0)
		return ret;

	p->irq = pci_irq_vector(pdev, 0);

	chip->dev = &pdev->dev;
	chip->irq = pci_irq_vector(pdev, 0);
	chip->regs = p->membase;
	chip->length = pci_resource_len(pdev, bar);
	chip->offset = DNV_DMA_CHAN_OFFSET;

	/* Falling back to PIO mode if DMA probing fails */
	ret = hsu_dma_probe(chip);
	if (ret)
		return 0;

	mid->dma_dev = pdev;

	p->handle_irq = dnv_handle_irq;
	return 0;
}

static void dnv_exit(struct mid8250 *mid)
{
	if (!mid->dma_dev)
		return;
	hsu_dma_remove(&mid->dma_chip);
}

/*****************************************************************************/

static void mid8250_set_termios(struct uart_port *p,
				struct ktermios *termios,
				struct ktermios *old)
{
	unsigned int baud = tty_termios_baud_rate(termios);
	struct mid8250 *mid = p->private_data;
	unsigned short ps = 16;
	unsigned long fuart = baud * ps;
	unsigned long w = BIT(24) - 1;
	unsigned long mul, div;

	/* Gracefully handle the B0 case: fall back to B9600 */
	fuart = fuart ? fuart : 9600 * 16;

	if (mid->board->freq < fuart) {
		/* Find prescaler value that satisfies Fuart < Fref */
		if (mid->board->freq > baud)
			ps = mid->board->freq / baud;	/* baud rate too high */
		else
			ps = 1;				/* PLL case */
		fuart = baud * ps;
	} else {
		/* Get Fuart closer to Fref */
		fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
	}

	rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
	p->uartclk = fuart * 16 / ps;		/* core uses ps = 16 always */

	writel(ps, p->membase + INTEL_MID_UART_PS);		/* set PS */
	writel(mul, p->membase + INTEL_MID_UART_MUL);		/* set MUL */
	writel(div, p->membase + INTEL_MID_UART_DIV);

	serial8250_do_set_termios(p, termios, old);
}

static bool mid8250_dma_filter(struct dma_chan *chan, void *param)
{
	struct hsu_dma_slave *s = param;

	if (s->dma_dev != chan->device->dev || s->chan_id != chan->chan_id)
		return false;

	chan->private = s;
	return true;
}

static int mid8250_dma_setup(struct mid8250 *mid, struct uart_8250_port *port)
{
	struct uart_8250_dma *dma = &mid->dma;
	struct device *dev = port->port.dev;
	struct hsu_dma_slave *rx_param;
	struct hsu_dma_slave *tx_param;

	if (!mid->dma_dev)
		return 0;

	rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
	if (!rx_param)
		return -ENOMEM;

	tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
	if (!tx_param)
		return -ENOMEM;

	rx_param->chan_id = mid->dma_index * 2 + 1;
	tx_param->chan_id = mid->dma_index * 2;

	dma->rxconf.src_maxburst = 64;
	dma->txconf.dst_maxburst = 64;

	rx_param->dma_dev = &mid->dma_dev->dev;
	tx_param->dma_dev = &mid->dma_dev->dev;

	dma->fn = mid8250_dma_filter;
	dma->rx_param = rx_param;
	dma->tx_param = tx_param;

	port->dma = dma;
	return 0;
}

static int mid8250_probe(struct pci_dev *pdev, const struct pci_device_id *id)
{
	struct uart_8250_port uart;
	struct mid8250 *mid;
	unsigned int bar;
	int ret;

	ret = pcim_enable_device(pdev);
	if (ret)
		return ret;

	mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
	if (!mid)
		return -ENOMEM;

	mid->board = (struct mid8250_board *)id->driver_data;
	bar = FL_GET_BASE(mid->board->flags);

	memset(&uart, 0, sizeof(struct uart_8250_port));

	uart.port.dev = &pdev->dev;
	uart.port.irq = pdev->irq;
	uart.port.private_data = mid;
	uart.port.type = PORT_16750;
	uart.port.iotype = UPIO_MEM;
	uart.port.uartclk = mid->board->base_baud * 16;
	uart.port.flags = UPF_SHARE_IRQ | UPF_FIXED_PORT | UPF_FIXED_TYPE;
	uart.port.set_termios = mid8250_set_termios;

	uart.port.mapbase = pci_resource_start(pdev, bar);
	uart.port.membase = pcim_iomap(pdev, bar, 0);
	if (!uart.port.membase)
		return -ENOMEM;

	if (mid->board->setup) {
		ret = mid->board->setup(mid, &uart.port);
		if (ret)
			return ret;
	}

	ret = mid8250_dma_setup(mid, &uart);
	if (ret)
		goto err;

	ret = serial8250_register_8250_port(&uart);
	if (ret < 0)
		goto err;

	mid->line = ret;

	pci_set_drvdata(pdev, mid);
	return 0;
err:
	if (mid->board->exit)
		mid->board->exit(mid);
	return ret;
}

static void mid8250_remove(struct pci_dev *pdev)
{
	struct mid8250 *mid = pci_get_drvdata(pdev);

	serial8250_unregister_port(mid->line);

	if (mid->board->exit)
		mid->board->exit(mid);
}

static const struct mid8250_board pnw_board = {
	.flags = FL_BASE0,
	.freq = 50000000,
	.base_baud = 115200,
	.setup = pnw_setup,
};

static const struct mid8250_board tng_board = {
	.flags = FL_BASE0,
	.freq = 38400000,
	.base_baud = 1843200,
	.setup = tng_setup,
};

static const struct mid8250_board dnv_board = {
	.flags = FL_BASE1,
	.freq = 133333333,
	.base_baud = 115200,
	.setup = dnv_setup,
	.exit = dnv_exit,
};

#define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }

static const struct pci_device_id pci_ids[] = {
	MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board),
	MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board),
	MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board),
	MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board),
	MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board),
	{ },
};
MODULE_DEVICE_TABLE(pci, pci_ids);

static struct pci_driver mid8250_pci_driver = {
	.name           = "8250_mid",
	.id_table       = pci_ids,
	.probe          = mid8250_probe,
	.remove         = mid8250_remove,
};

module_pci_driver(mid8250_pci_driver);

MODULE_AUTHOR("Intel Corporation");
MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Intel MID UART driver");
Commit	Line	Data
d9eda9ba HK	1	/*
	2	* 8250_mid.c - Driver for UART on Intel Penwell and various other Intel SOCs
	3	*
	4	* Copyright (C) 2015 Intel Corporation
	5	* Author: Heikki Krogerus <heikki.krogerus@linux.intel.com>
	6	*
	7	* This program is free software; you can redistribute it and/or modify
	8	* it under the terms of the GNU General Public License version 2 as
	9	* published by the Free Software Foundation.
	10	*/
	11
dea5ac3a	12	#include <linux/bitops.h>
d9eda9ba HK	13	#include <linux/module.h>
d9eda9ba HK	14	#include <linux/pci.h>
dea5ac3a	15	#include <linux/rational.h>
d9eda9ba HK	16
d9eda9ba HK	17	#include <linux/dma/hsu.h>
107e15fc	18	#include <linux/8250_pci.h>
d9eda9ba HK	19
	20	#include "8250.h"
	21
	22	#define PCI_DEVICE_ID_INTEL_PNW_UART1 0x081b
	23	#define PCI_DEVICE_ID_INTEL_PNW_UART2 0x081c
	24	#define PCI_DEVICE_ID_INTEL_PNW_UART3 0x081d
	25	#define PCI_DEVICE_ID_INTEL_TNG_UART 0x1191
6ede6dcd	26	#define PCI_DEVICE_ID_INTEL_DNV_UART 0x19d8
d9eda9ba HK	27
d9eda9ba HK	28	/* Intel MID Specific registers */
c42850f1	29	#define INTEL_MID_UART_DNV_FISR 0x08
d9eda9ba HK	30	#define INTEL_MID_UART_PS 0x30
	31	#define INTEL_MID_UART_MUL 0x34
	32	#define INTEL_MID_UART_DIV 0x38
	33
	34	struct mid8250;
	35
	36	struct mid8250_board {
107e15fc	37	unsigned int flags;
d9eda9ba HK	38	unsigned long freq;
	39	unsigned int base_baud;
	40	int (setup)(struct mid8250 , struct uart_port *p);
6ede6dcd	41	void (exit)(struct mid8250 );
d9eda9ba HK	42	};
	43
	44	struct mid8250 {
	45	int line;
	46	int dma_index;
	47	struct pci_dev *dma_dev;
	48	struct uart_8250_dma dma;
	49	struct mid8250_board *board;
6ede6dcd	50	struct hsu_dma_chip dma_chip;
d9eda9ba HK	51	};
	52
	53	/*****************************************************************************/
	54
	55	static int pnw_setup(struct mid8250 mid, struct uart_port p)
	56	{
	57	struct pci_dev *pdev = to_pci_dev(p->dev);
	58
	59	switch (pdev->device) {
	60	case PCI_DEVICE_ID_INTEL_PNW_UART1:
	61	mid->dma_index = 0;
	62	break;
	63	case PCI_DEVICE_ID_INTEL_PNW_UART2:
	64	mid->dma_index = 1;
	65	break;
	66	case PCI_DEVICE_ID_INTEL_PNW_UART3:
	67	mid->dma_index = 2;
	68	break;
	69	default:
	70	return -EINVAL;
	71	}
	72
	73	mid->dma_dev = pci_get_slot(pdev->bus,
	74	PCI_DEVFN(PCI_SLOT(pdev->devfn), 3));
	75	return 0;
	76	}
	77
4831e0d9 AS	78	static int tng_handle_irq(struct uart_port *p)
	79	{
	80	struct mid8250 *mid = p->private_data;
	81	struct uart_8250_port *up = up_to_u8250p(p);
	82	struct hsu_dma_chip *chip;
	83	u32 status;
	84	int ret = 0;
	85	int err;
	86
	87	chip = pci_get_drvdata(mid->dma_dev);
	88
	89	/* Rx DMA */
	90	err = hsu_dma_get_status(chip, mid->dma_index * 2 + 1, &status);
	91	if (err > 0) {
	92	serial8250_rx_dma_flush(up);
	93	ret \|= 1;
	94	} else if (err == 0)
	95	ret \|= hsu_dma_do_irq(chip, mid->dma_index * 2 + 1, status);
	96
	97	/* Tx DMA */
	98	err = hsu_dma_get_status(chip, mid->dma_index * 2, &status);
	99	if (err > 0)
	100	ret \|= 1;
	101	else if (err == 0)
	102	ret \|= hsu_dma_do_irq(chip, mid->dma_index * 2, status);
	103
	104	/* UART */
	105	ret \|= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
	106	return IRQ_RETVAL(ret);
	107	}
	108
d9eda9ba HK	109	static int tng_setup(struct mid8250 mid, struct uart_port p)
	110	{
	111	struct pci_dev *pdev = to_pci_dev(p->dev);
	112	int index = PCI_FUNC(pdev->devfn);
	113
ceeafb8e AS	114	/*
	115	* Device 0000:00:04.0 is not a real HSU port. It provides a global
	116	* register set for all HSU ports, although it has the same PCI ID.
	117	* Skip it here.
	118	*/
d9eda9ba HK	119	if (index-- == 0)
	120	return -ENODEV;
	121
	122	mid->dma_index = index;
	123	mid->dma_dev = pci_get_slot(pdev->bus, PCI_DEVFN(5, 0));
4831e0d9 AS	124
4831e0d9 AS	125	p->handle_irq = tng_handle_irq;
d9eda9ba HK	126	return 0;
	127	}
	128
6ede6dcd HK	129	static int dnv_handle_irq(struct uart_port *p)
	130	{
	131	struct mid8250 *mid = p->private_data;
692aa190	132	struct uart_8250_port *up = up_to_u8250p(p);
c42850f1	133	unsigned int fisr = serial_port_in(p, INTEL_MID_UART_DNV_FISR);
c6f82787	134	u32 status;
d2f5a731	135	int ret = 0;
c6f82787 CKT	136	int err;
	137
	138	if (fisr & BIT(2)) {
	139	err = hsu_dma_get_status(&mid->dma_chip, 1, &status);
692aa190 CKT	140	if (err > 0) {
692aa190 CKT	141	serial8250_rx_dma_flush(up);
d2f5a731	142	ret \|= 1;
692aa190	143	} else if (err == 0)
c6f82787 CKT	144	ret \|= hsu_dma_do_irq(&mid->dma_chip, 1, status);
	145	}
	146	if (fisr & BIT(1)) {
	147	err = hsu_dma_get_status(&mid->dma_chip, 0, &status);
	148	if (err > 0)
d2f5a731	149	ret \|= 1;
c6f82787 CKT	150	else if (err == 0)
	151	ret \|= hsu_dma_do_irq(&mid->dma_chip, 0, status);
	152	}
c42850f1 AS	153	if (fisr & BIT(0))
c42850f1 AS	154	ret \|= serial8250_handle_irq(p, serial_port_in(p, UART_IIR));
d2f5a731	155	return IRQ_RETVAL(ret);
6ede6dcd HK	156	}
	157
	158	#define DNV_DMA_CHAN_OFFSET 0x80
	159
	160	static int dnv_setup(struct mid8250 mid, struct uart_port p)
	161	{
	162	struct hsu_dma_chip *chip = &mid->dma_chip;
	163	struct pci_dev *pdev = to_pci_dev(p->dev);
107e15fc	164	unsigned int bar = FL_GET_BASE(mid->board->flags);
6ede6dcd HK	165	int ret;
6ede6dcd HK	166
216e234d AS	167	pci_set_master(pdev);
216e234d AS	168
6d59225f AS	169	ret = pci_alloc_irq_vectors(pdev, 1, 1, PCI_IRQ_ALL_TYPES);
	170	if (ret < 0)
	171	return ret;
	172
	173	p->irq = pci_irq_vector(pdev, 0);
	174
6ede6dcd	175	chip->dev = &pdev->dev;
6d59225f	176	chip->irq = pci_irq_vector(pdev, 0);
6ede6dcd	177	chip->regs = p->membase;
107e15fc	178	chip->length = pci_resource_len(pdev, bar);
6ede6dcd HK	179	chip->offset = DNV_DMA_CHAN_OFFSET;
	180
	181	/* Falling back to PIO mode if DMA probing fails */
	182	ret = hsu_dma_probe(chip);
	183	if (ret)
	184	return 0;
	185
	186	mid->dma_dev = pdev;
	187
	188	p->handle_irq = dnv_handle_irq;
	189	return 0;
	190	}
	191
	192	static void dnv_exit(struct mid8250 *mid)
	193	{
	194	if (!mid->dma_dev)
	195	return;
	196	hsu_dma_remove(&mid->dma_chip);
	197	}
	198
d9eda9ba HK	199	/*****************************************************************************/
	200
	201	static void mid8250_set_termios(struct uart_port *p,
	202	struct ktermios *termios,
	203	struct ktermios *old)
	204	{
	205	unsigned int baud = tty_termios_baud_rate(termios);
	206	struct mid8250 *mid = p->private_data;
	207	unsigned short ps = 16;
	208	unsigned long fuart = baud * ps;
	209	unsigned long w = BIT(24) - 1;
	210	unsigned long mul, div;
	211
47b34d2e AS	212	/* Gracefully handle the B0 case: fall back to B9600 */
	213	fuart = fuart ? fuart : 9600 * 16;
	214
d9eda9ba HK	215	if (mid->board->freq < fuart) {
	216	/* Find prescaler value that satisfies Fuart < Fref */
	217	if (mid->board->freq > baud)
	218	ps = mid->board->freq / baud; /* baud rate too high */
	219	else
	220	ps = 1; /* PLL case */
	221	fuart = baud * ps;
	222	} else {
	223	/* Get Fuart closer to Fref */
	224	fuart *= rounddown_pow_of_two(mid->board->freq / fuart);
	225	}
	226
	227	rational_best_approximation(fuart, mid->board->freq, w, w, &mul, &div);
	228	p->uartclk = fuart * 16 / ps; /* core uses ps = 16 always */
	229
	230	writel(ps, p->membase + INTEL_MID_UART_PS); /* set PS */
	231	writel(mul, p->membase + INTEL_MID_UART_MUL); /* set MUL */
	232	writel(div, p->membase + INTEL_MID_UART_DIV);
	233
	234	serial8250_do_set_termios(p, termios, old);
	235	}
	236
	237	static bool mid8250_dma_filter(struct dma_chan chan, void param)
	238	{
	239	struct hsu_dma_slave *s = param;
	240
	241	if (s->dma_dev != chan->device->dev \|\| s->chan_id != chan->chan_id)
	242	return false;
	243
	244	chan->private = s;
	245	return true;
	246	}
	247
	248	static int mid8250_dma_setup(struct mid8250 mid, struct uart_8250_port port)
	249	{
	250	struct uart_8250_dma *dma = &mid->dma;
	251	struct device *dev = port->port.dev;
	252	struct hsu_dma_slave *rx_param;
	253	struct hsu_dma_slave *tx_param;
	254
6ede6dcd HK	255	if (!mid->dma_dev)
	256	return 0;
	257
d9eda9ba HK	258	rx_param = devm_kzalloc(dev, sizeof(*rx_param), GFP_KERNEL);
	259	if (!rx_param)
	260	return -ENOMEM;
	261
	262	tx_param = devm_kzalloc(dev, sizeof(*tx_param), GFP_KERNEL);
	263	if (!tx_param)
	264	return -ENOMEM;
	265
	266	rx_param->chan_id = mid->dma_index * 2 + 1;
	267	tx_param->chan_id = mid->dma_index * 2;
	268
	269	dma->rxconf.src_maxburst = 64;
	270	dma->txconf.dst_maxburst = 64;
	271
	272	rx_param->dma_dev = &mid->dma_dev->dev;
	273	tx_param->dma_dev = &mid->dma_dev->dev;
	274
	275	dma->fn = mid8250_dma_filter;
	276	dma->rx_param = rx_param;
	277	dma->tx_param = tx_param;
	278
	279	port->dma = dma;
	280	return 0;
	281	}
	282
	283	static int mid8250_probe(struct pci_dev pdev, const struct pci_device_id id)
	284	{
	285	struct uart_8250_port uart;
	286	struct mid8250 *mid;
107e15fc	287	unsigned int bar;
d9eda9ba HK	288	int ret;
	289
	290	ret = pcim_enable_device(pdev);
	291	if (ret)
	292	return ret;
	293
d9eda9ba HK	294	mid = devm_kzalloc(&pdev->dev, sizeof(*mid), GFP_KERNEL);
	295	if (!mid)
	296	return -ENOMEM;
	297
	298	mid->board = (struct mid8250_board *)id->driver_data;
107e15fc	299	bar = FL_GET_BASE(mid->board->flags);
d9eda9ba HK	300
	301	memset(&uart, 0, sizeof(struct uart_8250_port));
	302
	303	uart.port.dev = &pdev->dev;
	304	uart.port.irq = pdev->irq;
	305	uart.port.private_data = mid;
	306	uart.port.type = PORT_16750;
	307	uart.port.iotype = UPIO_MEM;
	308	uart.port.uartclk = mid->board->base_baud * 16;
	309	uart.port.flags = UPF_SHARE_IRQ \| UPF_FIXED_PORT \| UPF_FIXED_TYPE;
	310	uart.port.set_termios = mid8250_set_termios;
	311
107e15fc AS	312	uart.port.mapbase = pci_resource_start(pdev, bar);
107e15fc AS	313	uart.port.membase = pcim_iomap(pdev, bar, 0);
d9eda9ba HK	314	if (!uart.port.membase)
	315	return -ENOMEM;
	316
	317	if (mid->board->setup) {
	318	ret = mid->board->setup(mid, &uart.port);
	319	if (ret)
	320	return ret;
	321	}
	322
	323	ret = mid8250_dma_setup(mid, &uart);
	324	if (ret)
6ede6dcd	325	goto err;
d9eda9ba HK	326
	327	ret = serial8250_register_8250_port(&uart);
	328	if (ret < 0)
6ede6dcd	329	goto err;
d9eda9ba HK	330
	331	mid->line = ret;
	332
	333	pci_set_drvdata(pdev, mid);
	334	return 0;
6ede6dcd HK	335	err:
	336	if (mid->board->exit)
	337	mid->board->exit(mid);
	338	return ret;
d9eda9ba HK	339	}
	340
	341	static void mid8250_remove(struct pci_dev *pdev)
	342	{
	343	struct mid8250 *mid = pci_get_drvdata(pdev);
	344
a9b01b58 LS	345	serial8250_unregister_port(mid->line);
a9b01b58 LS	346
6ede6dcd HK	347	if (mid->board->exit)
6ede6dcd HK	348	mid->board->exit(mid);
d9eda9ba HK	349	}
	350
	351	static const struct mid8250_board pnw_board = {
107e15fc	352	.flags = FL_BASE0,
d9eda9ba HK	353	.freq = 50000000,
	354	.base_baud = 115200,
	355	.setup = pnw_setup,
	356	};
	357
	358	static const struct mid8250_board tng_board = {
107e15fc	359	.flags = FL_BASE0,
d9eda9ba HK	360	.freq = 38400000,
	361	.base_baud = 1843200,
	362	.setup = tng_setup,
	363	};
	364
6ede6dcd	365	static const struct mid8250_board dnv_board = {
107e15fc	366	.flags = FL_BASE1,
6ede6dcd HK	367	.freq = 133333333,
	368	.base_baud = 115200,
	369	.setup = dnv_setup,
	370	.exit = dnv_exit,
	371	};
	372
d9eda9ba HK	373	#define MID_DEVICE(id, board) { PCI_VDEVICE(INTEL, id), (kernel_ulong_t)&board }
	374
	375	static const struct pci_device_id pci_ids[] = {
	376	MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART1, pnw_board),
	377	MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART2, pnw_board),
	378	MID_DEVICE(PCI_DEVICE_ID_INTEL_PNW_UART3, pnw_board),
	379	MID_DEVICE(PCI_DEVICE_ID_INTEL_TNG_UART, tng_board),
6ede6dcd	380	MID_DEVICE(PCI_DEVICE_ID_INTEL_DNV_UART, dnv_board),
d9eda9ba HK	381	{ },
	382	};
	383	MODULE_DEVICE_TABLE(pci, pci_ids);
	384
	385	static struct pci_driver mid8250_pci_driver = {
	386	.name = "8250_mid",
	387	.id_table = pci_ids,
	388	.probe = mid8250_probe,
	389	.remove = mid8250_remove,
	390	};
	391
	392	module_pci_driver(mid8250_pci_driver);
	393
	394	MODULE_AUTHOR("Intel Corporation");
	395	MODULE_LICENSE("GPL v2");
	396	MODULE_DESCRIPTION("Intel MID UART driver");