[linux-2.6-block.git] / drivers / tty / serial / 8250 / 8250.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 *  Driver for 8250/16550-type serial ports
 *
 *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
 *
 *  Copyright (C) 2001 Russell King.
 */

#include <linux/bits.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/dmaengine.h>

#include "../serial_mctrl_gpio.h"

struct uart_8250_dma {
	int (*tx_dma)(struct uart_8250_port *p);
	int (*rx_dma)(struct uart_8250_port *p);
	void (*prepare_tx_dma)(struct uart_8250_port *p);
	void (*prepare_rx_dma)(struct uart_8250_port *p);

	/* Filter function */
	dma_filter_fn		fn;
	/* Parameter to the filter function */
	void			*rx_param;
	void			*tx_param;

	struct dma_slave_config	rxconf;
	struct dma_slave_config	txconf;

	struct dma_chan		*rxchan;
	struct dma_chan		*txchan;

	/* Device address base for DMA operations */
	phys_addr_t		rx_dma_addr;
	phys_addr_t		tx_dma_addr;

	/* DMA address of the buffer in memory */
	dma_addr_t		rx_addr;
	dma_addr_t		tx_addr;

	dma_cookie_t		rx_cookie;
	dma_cookie_t		tx_cookie;

	void			*rx_buf;

	size_t			rx_size;
	size_t			tx_size;

	unsigned char		tx_running;
	unsigned char		tx_err;
	unsigned char		rx_running;
};

struct old_serial_port {
	unsigned int uart;
	unsigned int baud_base;
	unsigned int port;
	unsigned int irq;
	upf_t        flags;
	unsigned char io_type;
	unsigned char __iomem *iomem_base;
	unsigned short iomem_reg_shift;
};

struct serial8250_config {
	const char	*name;
	unsigned short	fifo_size;
	unsigned short	tx_loadsz;
	unsigned char	fcr;
	unsigned char	rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
	unsigned int	flags;
};

#define UART_CAP_FIFO	BIT(8)	/* UART has FIFO */
#define UART_CAP_EFR	BIT(9)	/* UART has EFR */
#define UART_CAP_SLEEP	BIT(10)	/* UART has IER sleep */
#define UART_CAP_AFE	BIT(11)	/* MCR-based hw flow control */
#define UART_CAP_UUE	BIT(12)	/* UART needs IER bit 6 set (Xscale) */
#define UART_CAP_RTOIE	BIT(13)	/* UART needs IER bit 4 set (Xscale, Tegra) */
#define UART_CAP_HFIFO	BIT(14)	/* UART has a "hidden" FIFO */
#define UART_CAP_RPM	BIT(15)	/* Runtime PM is active while idle */
#define UART_CAP_IRDA	BIT(16)	/* UART supports IrDA line discipline */
#define UART_CAP_MINI	BIT(17)	/* Mini UART on BCM283X family lacks:
					 * STOP PARITY EPAR SPAR WLEN5 WLEN6
					 */
#define UART_CAP_NOTEMT	BIT(18)	/* UART without interrupt on TEMT available */

#define UART_BUG_QUOT	BIT(0)	/* UART has buggy quot LSB */
#define UART_BUG_TXEN	BIT(1)	/* UART has buggy TX IIR status */
#define UART_BUG_NOMSR	BIT(2)	/* UART has buggy MSR status bits (Au1x00) */
#define UART_BUG_THRE	BIT(3)	/* UART has buggy THRE reassertion */
#define UART_BUG_TXRACE	BIT(5)	/* UART Tx fails to set remote DR */


#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
#define SERIAL8250_SHARE_IRQS 1
#else
#define SERIAL8250_SHARE_IRQS 0
#endif

#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags)		\
	{							\
		.iobase		= _base,			\
		.irq		= _irq,				\
		.uartclk	= 1843200,			\
		.iotype		= UPIO_PORT,			\
		.flags		= UPF_BOOT_AUTOCONF | (_flags),	\
	}

#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)


static inline int serial_in(struct uart_8250_port *up, int offset)
{
	return up->port.serial_in(&up->port, offset);
}

static inline void serial_out(struct uart_8250_port *up, int offset, int value)
{
	up->port.serial_out(&up->port, offset, value);
}

/**
 *	serial_lsr_in - Read LSR register and preserve flags across reads
 *	@up:	uart 8250 port
 *
 *	Read LSR register and handle saving non-preserved flags across reads.
 *	The flags that are not preserved across reads are stored into
 *	up->lsr_saved_flags.
 *
 *	Returns LSR value or'ed with the preserved flags (if any).
 */
static inline u16 serial_lsr_in(struct uart_8250_port *up)
{
	u16 lsr = up->lsr_saved_flags;

	lsr |= serial_in(up, UART_LSR);
	up->lsr_saved_flags = lsr & up->lsr_save_mask;

	return lsr;
}

/*
 * For the 16C950
 */
static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
{
	serial_out(up, UART_SCR, offset);
	serial_out(up, UART_ICR, value);
}

static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
						   int offset)
{
	unsigned int value;

	serial_icr_write(up, UART_ACR, up->acr | UART_ACR_ICRRD);
	serial_out(up, UART_SCR, offset);
	value = serial_in(up, UART_ICR);
	serial_icr_write(up, UART_ACR, up->acr);

	return value;
}

void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);

static inline u32 serial_dl_read(struct uart_8250_port *up)
{
	return up->dl_read(up);
}

static inline void serial_dl_write(struct uart_8250_port *up, u32 value)
{
	up->dl_write(up, value);
}

static inline bool serial8250_set_THRI(struct uart_8250_port *up)
{
	/* Port locked to synchronize UART_IER access against the console. */
	lockdep_assert_held_once(&up->port.lock);

	if (up->ier & UART_IER_THRI)
		return false;
	up->ier |= UART_IER_THRI;
	serial_out(up, UART_IER, up->ier);
	return true;
}

static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
{
	/* Port locked to synchronize UART_IER access against the console. */
	lockdep_assert_held_once(&up->port.lock);

	if (!(up->ier & UART_IER_THRI))
		return false;
	up->ier &= ~UART_IER_THRI;
	serial_out(up, UART_IER, up->ier);
	return true;
}

struct uart_8250_port *serial8250_get_port(int line);

void serial8250_rpm_get(struct uart_8250_port *p);
void serial8250_rpm_put(struct uart_8250_port *p);

void serial8250_rpm_get_tx(struct uart_8250_port *p);
void serial8250_rpm_put_tx(struct uart_8250_port *p);

int serial8250_em485_config(struct uart_port *port, struct ktermios *termios,
			    struct serial_rs485 *rs485);
void serial8250_em485_start_tx(struct uart_8250_port *p);
void serial8250_em485_stop_tx(struct uart_8250_port *p);
void serial8250_em485_destroy(struct uart_8250_port *p);
extern struct serial_rs485 serial8250_em485_supported;

/* MCR <-> TIOCM conversion */
static inline int serial8250_TIOCM_to_MCR(int tiocm)
{
	int mcr = 0;

	if (tiocm & TIOCM_RTS)
		mcr |= UART_MCR_RTS;
	if (tiocm & TIOCM_DTR)
		mcr |= UART_MCR_DTR;
	if (tiocm & TIOCM_OUT1)
		mcr |= UART_MCR_OUT1;
	if (tiocm & TIOCM_OUT2)
		mcr |= UART_MCR_OUT2;
	if (tiocm & TIOCM_LOOP)
		mcr |= UART_MCR_LOOP;

	return mcr;
}

static inline int serial8250_MCR_to_TIOCM(int mcr)
{
	int tiocm = 0;

	if (mcr & UART_MCR_RTS)
		tiocm |= TIOCM_RTS;
	if (mcr & UART_MCR_DTR)
		tiocm |= TIOCM_DTR;
	if (mcr & UART_MCR_OUT1)
		tiocm |= TIOCM_OUT1;
	if (mcr & UART_MCR_OUT2)
		tiocm |= TIOCM_OUT2;
	if (mcr & UART_MCR_LOOP)
		tiocm |= TIOCM_LOOP;

	return tiocm;
}

/* MSR <-> TIOCM conversion */
static inline int serial8250_MSR_to_TIOCM(int msr)
{
	int tiocm = 0;

	if (msr & UART_MSR_DCD)
		tiocm |= TIOCM_CAR;
	if (msr & UART_MSR_RI)
		tiocm |= TIOCM_RNG;
	if (msr & UART_MSR_DSR)
		tiocm |= TIOCM_DSR;
	if (msr & UART_MSR_CTS)
		tiocm |= TIOCM_CTS;

	return tiocm;
}

static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
{
	serial_out(up, UART_MCR, value);

	if (up->gpios)
		mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
}

static inline int serial8250_in_MCR(struct uart_8250_port *up)
{
	int mctrl;

	mctrl = serial_in(up, UART_MCR);

	if (up->gpios) {
		unsigned int mctrl_gpio = 0;

		mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
		mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
	}

	return mctrl;
}

#ifdef CONFIG_SERIAL_8250_PNP
int serial8250_pnp_init(void);
void serial8250_pnp_exit(void);
#else
static inline int serial8250_pnp_init(void) { return 0; }
static inline void serial8250_pnp_exit(void) { }
#endif

#ifdef CONFIG_SERIAL_8250_FINTEK
int fintek_8250_probe(struct uart_8250_port *uart);
#else
static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
#endif

#ifdef CONFIG_ARCH_OMAP1
#include <linux/soc/ti/omap1-soc.h>
static inline int is_omap1_8250(struct uart_8250_port *pt)
{
	int res;

	switch (pt->port.mapbase) {
	case OMAP1_UART1_BASE:
	case OMAP1_UART2_BASE:
	case OMAP1_UART3_BASE:
		res = 1;
		break;
	default:
		res = 0;
		break;
	}

	return res;
}

static inline int is_omap1510_8250(struct uart_8250_port *pt)
{
	if (!cpu_is_omap1510())
		return 0;

	return is_omap1_8250(pt);
}
#else
static inline int is_omap1_8250(struct uart_8250_port *pt)
{
	return 0;
}
static inline int is_omap1510_8250(struct uart_8250_port *pt)
{
	return 0;
}
#endif

#ifdef CONFIG_SERIAL_8250_DMA
extern int serial8250_tx_dma(struct uart_8250_port *);
extern int serial8250_rx_dma(struct uart_8250_port *);
extern void serial8250_rx_dma_flush(struct uart_8250_port *);
extern int serial8250_request_dma(struct uart_8250_port *);
extern void serial8250_release_dma(struct uart_8250_port *);

static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p)
{
	struct uart_8250_dma *dma = p->dma;

	if (dma->prepare_tx_dma)
		dma->prepare_tx_dma(p);
}

static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p)
{
	struct uart_8250_dma *dma = p->dma;

	if (dma->prepare_rx_dma)
		dma->prepare_rx_dma(p);
}

static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
{
	struct uart_8250_dma *dma = p->dma;

	return dma && dma->tx_running;
}
#else
static inline int serial8250_tx_dma(struct uart_8250_port *p)
{
	return -1;
}
static inline int serial8250_rx_dma(struct uart_8250_port *p)
{
	return -1;
}
static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
static inline int serial8250_request_dma(struct uart_8250_port *p)
{
	return -1;
}
static inline void serial8250_release_dma(struct uart_8250_port *p) { }

static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
{
	return false;
}
#endif

static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
{
	unsigned char status;

	status = serial_in(up, 0x04); /* EXCR2 */
#define PRESL(x) ((x) & 0x30)
	if (PRESL(status) == 0x10) {
		/* already in high speed mode */
		return 0;
	} else {
		status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
		status |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
		serial_out(up, 0x04, status);
	}
	return 1;
}

static inline int serial_index(struct uart_port *port)
{
	return port->minor - 64;
}
Commit	Line	Data
4f5f5887	1	/* SPDX-License-Identifier: GPL-2.0+ */
1da177e4	2	/*
1da177e4 LT	3	* Driver for 8250/16550-type serial ports
	4	*
	5	* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
	6	*
	7	* Copyright (C) 2001 Russell King.
1da177e4 LT	8	*/
1da177e4 LT	9
1f06f571	10	#include <linux/bits.h>
bc49a661	11	#include <linux/serial_8250.h>
aef9a7bd	12	#include <linux/serial_reg.h>
9ee4b83e HK	13	#include <linux/dmaengine.h>
9ee4b83e HK	14
4a96895f YY	15	#include "../serial_mctrl_gpio.h"
4a96895f YY	16
9ee4b83e	17	struct uart_8250_dma {
f1a297bb	18	int (tx_dma)(struct uart_8250_port p);
33d9b8b2	19	int (rx_dma)(struct uart_8250_port p);
e4fb03fe MR	20	void (prepare_tx_dma)(struct uart_8250_port p);
e4fb03fe MR	21	void (prepare_rx_dma)(struct uart_8250_port p);
f1a297bb	22
9a1870ce	23	/* Filter function */
9ee4b83e	24	dma_filter_fn fn;
9a1870ce	25	/* Parameter to the filter function */
9ee4b83e HK	26	void *rx_param;
	27	void *tx_param;
	28
9ee4b83e HK	29	struct dma_slave_config rxconf;
	30	struct dma_slave_config txconf;
	31
	32	struct dma_chan *rxchan;
	33	struct dma_chan *txchan;
	34
d1834bab AS	35	/* Device address base for DMA operations */
	36	phys_addr_t rx_dma_addr;
	37	phys_addr_t tx_dma_addr;
	38
	39	/* DMA address of the buffer in memory */
9ee4b83e HK	40	dma_addr_t rx_addr;
	41	dma_addr_t tx_addr;
	42
	43	dma_cookie_t rx_cookie;
	44	dma_cookie_t tx_cookie;
	45
	46	void *rx_buf;
	47
	48	size_t rx_size;
	49	size_t tx_size;
	50
eafb9eea JO	51	unsigned char tx_running;
	52	unsigned char tx_err;
	53	unsigned char rx_running;
9ee4b83e	54	};
1da177e4 LT	55
	56	struct old_serial_port {
	57	unsigned int uart;
	58	unsigned int baud_base;
	59	unsigned int port;
	60	unsigned int irq;
079119a2	61	upf_t flags;
1da177e4	62	unsigned char io_type;
7f1dc2f3	63	unsigned char __iomem *iomem_base;
1da177e4 LT	64	unsigned short iomem_reg_shift;
	65	};
	66
1da177e4 LT	67	struct serial8250_config {
	68	const char *name;
	69	unsigned short fifo_size;
	70	unsigned short tx_loadsz;
	71	unsigned char fcr;
aef9a7bd	72	unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
1da177e4 LT	73	unsigned int flags;
	74	};
	75
1f06f571 AJ	76	#define UART_CAP_FIFO BIT(8) /* UART has FIFO */
	77	#define UART_CAP_EFR BIT(9) /* UART has EFR */
	78	#define UART_CAP_SLEEP BIT(10) /* UART has IER sleep */
	79	#define UART_CAP_AFE BIT(11) /* MCR-based hw flow control */
	80	#define UART_CAP_UUE BIT(12) /* UART needs IER bit 6 set (Xscale) */
	81	#define UART_CAP_RTOIE BIT(13) /* UART needs IER bit 4 set (Xscale, Tegra) */
	82	#define UART_CAP_HFIFO BIT(14) /* UART has a "hidden" FIFO */
	83	#define UART_CAP_RPM BIT(15) /* Runtime PM is active while idle */
	84	#define UART_CAP_IRDA BIT(16) /* UART supports IrDA line discipline */
	85	#define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks:
d087e7a9 PE	86	* STOP PARITY EPAR SPAR WLEN5 WLEN6
d087e7a9 PE	87	*/
f6f58610	88	#define UART_CAP_NOTEMT BIT(18) /* UART without interrupt on TEMT available */
1da177e4	89
1f06f571 AJ	90	#define UART_BUG_QUOT BIT(0) /* UART has buggy quot LSB */
	91	#define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */
	92	#define UART_BUG_NOMSR BIT(2) /* UART has buggy MSR status bits (Au1x00) */
	93	#define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */
1f06f571	94	#define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */
4ba5e35d	95
1da177e4 LT	96
	97	#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
	98	#define SERIAL8250_SHARE_IRQS 1
	99	#else
	100	#define SERIAL8250_SHARE_IRQS 0
	101	#endif
	102
b3bd6668 AW	103	#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
	104	{ \
	105	.iobase = _base, \
	106	.irq = _irq, \
	107	.uartclk = 1843200, \
	108	.iotype = UPIO_PORT, \
	109	.flags = UPF_BOOT_AUTOCONF \| (_flags), \
	110	}
	111
	112	#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
	113
	114
3f0ab327 PG	115	static inline int serial_in(struct uart_8250_port *up, int offset)
	116	{
	117	return up->port.serial_in(&up->port, offset);
	118	}
	119
	120	static inline void serial_out(struct uart_8250_port *up, int offset, int value)
	121	{
	122	up->port.serial_out(&up->port, offset, value);
	123	}
	124
bdb70c42 IJ	125	/**
	126	* serial_lsr_in - Read LSR register and preserve flags across reads
	127	* @up: uart 8250 port
	128	*
	129	* Read LSR register and handle saving non-preserved flags across reads.
	130	* The flags that are not preserved across reads are stored into
	131	* up->lsr_saved_flags.
	132	*
	133	* Returns LSR value or'ed with the preserved flags (if any).
	134	*/
f8ba5680	135	static inline u16 serial_lsr_in(struct uart_8250_port *up)
bdb70c42	136	{
f8ba5680	137	u16 lsr = up->lsr_saved_flags;
bdb70c42 IJ	138
bdb70c42 IJ	139	lsr \|= serial_in(up, UART_LSR);
507bd6fb	140	up->lsr_saved_flags = lsr & up->lsr_save_mask;
bdb70c42 IJ	141
	142	return lsr;
	143	}
	144
cb5a40e3 MR	145	/*
	146	* For the 16C950
	147	*/
	148	static void serial_icr_write(struct uart_8250_port *up, int offset, int value)
	149	{
	150	serial_out(up, UART_SCR, offset);
	151	serial_out(up, UART_ICR, value);
	152	}
	153
	154	static unsigned int __maybe_unused serial_icr_read(struct uart_8250_port *up,
	155	int offset)
	156	{
	157	unsigned int value;
	158
	159	serial_icr_write(up, UART_ACR, up->acr \| UART_ACR_ICRRD);
	160	serial_out(up, UART_SCR, offset);
	161	value = serial_in(up, UART_ICR);
	162	serial_icr_write(up, UART_ACR, up->acr);
	163
	164	return value;
	165	}
	166
0ad372b9 SM	167	void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
0ad372b9 SM	168
b245aa0c	169	static inline u32 serial_dl_read(struct uart_8250_port *up)
cc419fa0 MD	170	{
	171	return up->dl_read(up);
	172	}
	173
b245aa0c	174	static inline void serial_dl_write(struct uart_8250_port *up, u32 value)
cc419fa0 MD	175	{
	176	up->dl_write(up, value);
	177	}
	178
7e267b29 AS	179	static inline bool serial8250_set_THRI(struct uart_8250_port *up)
7e267b29 AS	180	{
d0b309a5 JO	181	/* Port locked to synchronize UART_IER access against the console. */
	182	lockdep_assert_held_once(&up->port.lock);
	183
7e267b29 AS	184	if (up->ier & UART_IER_THRI)
	185	return false;
	186	up->ier \|= UART_IER_THRI;
	187	serial_out(up, UART_IER, up->ier);
	188	return true;
	189	}
	190
	191	static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
	192	{
d0b309a5 JO	193	/* Port locked to synchronize UART_IER access against the console. */
	194	lockdep_assert_held_once(&up->port.lock);
	195
7e267b29 AS	196	if (!(up->ier & UART_IER_THRI))
	197	return false;
	198	up->ier &= ~UART_IER_THRI;
	199	serial_out(up, UART_IER, up->ier);
	200	return true;
	201	}
	202
ae14a795	203	struct uart_8250_port *serial8250_get_port(int line);
7d4e00c6	204
77285243 SAS	205	void serial8250_rpm_get(struct uart_8250_port *p);
77285243 SAS	206	void serial8250_rpm_put(struct uart_8250_port *p);
7d4e00c6 AS	207
	208	void serial8250_rpm_get_tx(struct uart_8250_port *p);
	209	void serial8250_rpm_put_tx(struct uart_8250_port *p);
	210
ae50bb27 IJ	211	int serial8250_em485_config(struct uart_port port, struct ktermios termios,
ae50bb27 IJ	212	struct serial_rs485 *rs485);
058bc104 LW	213	void serial8250_em485_start_tx(struct uart_8250_port *p);
058bc104 LW	214	void serial8250_em485_stop_tx(struct uart_8250_port *p);
e490c914	215	void serial8250_em485_destroy(struct uart_8250_port *p);
43ee3413	216	extern struct serial_rs485 serial8250_em485_supported;
ae14a795	217
42912081 SR	218	/* MCR <-> TIOCM conversion */
	219	static inline int serial8250_TIOCM_to_MCR(int tiocm)
	220	{
	221	int mcr = 0;
	222
	223	if (tiocm & TIOCM_RTS)
	224	mcr \|= UART_MCR_RTS;
	225	if (tiocm & TIOCM_DTR)
	226	mcr \|= UART_MCR_DTR;
	227	if (tiocm & TIOCM_OUT1)
	228	mcr \|= UART_MCR_OUT1;
	229	if (tiocm & TIOCM_OUT2)
	230	mcr \|= UART_MCR_OUT2;
	231	if (tiocm & TIOCM_LOOP)
	232	mcr \|= UART_MCR_LOOP;
	233
	234	return mcr;
	235	}
	236
	237	static inline int serial8250_MCR_to_TIOCM(int mcr)
	238	{
	239	int tiocm = 0;
	240
	241	if (mcr & UART_MCR_RTS)
	242	tiocm \|= TIOCM_RTS;
	243	if (mcr & UART_MCR_DTR)
	244	tiocm \|= TIOCM_DTR;
	245	if (mcr & UART_MCR_OUT1)
	246	tiocm \|= TIOCM_OUT1;
	247	if (mcr & UART_MCR_OUT2)
	248	tiocm \|= TIOCM_OUT2;
	249	if (mcr & UART_MCR_LOOP)
	250	tiocm \|= TIOCM_LOOP;
	251
	252	return tiocm;
	253	}
	254
	255	/* MSR <-> TIOCM conversion */
	256	static inline int serial8250_MSR_to_TIOCM(int msr)
	257	{
	258	int tiocm = 0;
	259
	260	if (msr & UART_MSR_DCD)
	261	tiocm \|= TIOCM_CAR;
	262	if (msr & UART_MSR_RI)
	263	tiocm \|= TIOCM_RNG;
	264	if (msr & UART_MSR_DSR)
	265	tiocm \|= TIOCM_DSR;
	266	if (msr & UART_MSR_CTS)
	267	tiocm \|= TIOCM_CTS;
	268
	269	return tiocm;
	270	}
	271
36fd95b1 YY	272	static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
	273	{
	274	serial_out(up, UART_MCR, value);
4a96895f YY	275
	276	if (up->gpios)
	277	mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
36fd95b1 YY	278	}
	279
	280	static inline int serial8250_in_MCR(struct uart_8250_port *up)
	281	{
4a96895f YY	282	int mctrl;
	283
	284	mctrl = serial_in(up, UART_MCR);
	285
	286	if (up->gpios) {
	287	unsigned int mctrl_gpio = 0;
	288
	289	mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
	290	mctrl \|= serial8250_TIOCM_to_MCR(mctrl_gpio);
	291	}
	292
	293	return mctrl;
36fd95b1 YY	294	}
36fd95b1 YY	295
835d844d SY	296	#ifdef CONFIG_SERIAL_8250_PNP
	297	int serial8250_pnp_init(void);
	298	void serial8250_pnp_exit(void);
	299	#else
	300	static inline int serial8250_pnp_init(void) { return 0; }
	301	static inline void serial8250_pnp_exit(void) { }
	302	#endif
	303
fa01e2ca RRD	304	#ifdef CONFIG_SERIAL_8250_FINTEK
	305	int fintek_8250_probe(struct uart_8250_port *uart);
	306	#else
	307	static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
	308	#endif
	309
54ec52b6	310	#ifdef CONFIG_ARCH_OMAP1
9fcd04dd	311	#include <linux/soc/ti/omap1-soc.h>
54ec52b6 TL	312	static inline int is_omap1_8250(struct uart_8250_port *pt)
	313	{
	314	int res;
	315
	316	switch (pt->port.mapbase) {
	317	case OMAP1_UART1_BASE:
	318	case OMAP1_UART2_BASE:
	319	case OMAP1_UART3_BASE:
	320	res = 1;
	321	break;
	322	default:
	323	res = 0;
	324	break;
	325	}
	326
	327	return res;
	328	}
	329
	330	static inline int is_omap1510_8250(struct uart_8250_port *pt)
	331	{
	332	if (!cpu_is_omap1510())
	333	return 0;
	334
	335	return is_omap1_8250(pt);
	336	}
	337	#else
	338	static inline int is_omap1_8250(struct uart_8250_port *pt)
	339	{
	340	return 0;
	341	}
	342	static inline int is_omap1510_8250(struct uart_8250_port *pt)
	343	{
	344	return 0;
	345	}
	346	#endif
9ee4b83e HK	347
	348	#ifdef CONFIG_SERIAL_8250_DMA
	349	extern int serial8250_tx_dma(struct uart_8250_port *);
33d9b8b2 PH	350	extern int serial8250_rx_dma(struct uart_8250_port *);
33d9b8b2 PH	351	extern void serial8250_rx_dma_flush(struct uart_8250_port *);
9ee4b83e HK	352	extern int serial8250_request_dma(struct uart_8250_port *);
9ee4b83e HK	353	extern void serial8250_release_dma(struct uart_8250_port *);
e4fb03fe MR	354
	355	static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p)
	356	{
	357	struct uart_8250_dma *dma = p->dma;
	358
	359	if (dma->prepare_tx_dma)
	360	dma->prepare_tx_dma(p);
	361	}
	362
	363	static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p)
	364	{
	365	struct uart_8250_dma *dma = p->dma;
	366
	367	if (dma->prepare_rx_dma)
	368	dma->prepare_rx_dma(p);
	369	}
146a37e0 IJ	370
	371	static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
	372	{
	373	struct uart_8250_dma *dma = p->dma;
	374
	375	return dma && dma->tx_running;
	376	}
9ee4b83e HK	377	#else
	378	static inline int serial8250_tx_dma(struct uart_8250_port *p)
	379	{
	380	return -1;
	381	}
33d9b8b2	382	static inline int serial8250_rx_dma(struct uart_8250_port *p)
9ee4b83e HK	383	{
	384	return -1;
	385	}
33d9b8b2	386	static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
9ee4b83e HK	387	static inline int serial8250_request_dma(struct uart_8250_port *p)
	388	{
	389	return -1;
	390	}
	391	static inline void serial8250_release_dma(struct uart_8250_port *p) { }
146a37e0 IJ	392
	393	static inline bool serial8250_tx_dma_running(struct uart_8250_port *p)
	394	{
	395	return false;
	396	}
9ee4b83e	397	#endif
d81e50f6 PH	398
	399	static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
	400	{
	401	unsigned char status;
	402
	403	status = serial_in(up, 0x04); /* EXCR2 */
	404	#define PRESL(x) ((x) & 0x30)
	405	if (PRESL(status) == 0x10) {
	406	/* already in high speed mode */
	407	return 0;
	408	} else {
	409	status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
	410	status \|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
	411	serial_out(up, 0x04, status);
	412	}
	413	return 1;
	414	}
b6830f6d PH	415
	416	static inline int serial_index(struct uart_port *port)
	417	{
	418	return port->minor - 64;
	419	}