[linux-2.6-block.git] / drivers / tty / serial / 8250 / 8250.h

// SPDX-License-Identifier: GPL-2.0+
/*
 *  Driver for 8250/16550-type serial ports
 *
 *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
 *
 *  Copyright (C) 2001 Russell King.
 */

#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/dmaengine.h>

struct uart_8250_dma {
	int (*tx_dma)(struct uart_8250_port *p);
	int (*rx_dma)(struct uart_8250_port *p);

	/* Filter function */
	dma_filter_fn		fn;
	/* Parameter to the filter function */
	void			*rx_param;
	void			*tx_param;

	struct dma_slave_config	rxconf;
	struct dma_slave_config	txconf;

	struct dma_chan		*rxchan;
	struct dma_chan		*txchan;

	/* Device address base for DMA operations */
	phys_addr_t		rx_dma_addr;
	phys_addr_t		tx_dma_addr;

	/* DMA address of the buffer in memory */
	dma_addr_t		rx_addr;
	dma_addr_t		tx_addr;

	dma_cookie_t		rx_cookie;
	dma_cookie_t		tx_cookie;

	void			*rx_buf;

	size_t			rx_size;
	size_t			tx_size;

	unsigned char		tx_running;
	unsigned char		tx_err;
	unsigned char		rx_running;
};

struct old_serial_port {
	unsigned int uart;
	unsigned int baud_base;
	unsigned int port;
	unsigned int irq;
	upf_t        flags;
	unsigned char io_type;
	unsigned char __iomem *iomem_base;
	unsigned short iomem_reg_shift;
};

struct serial8250_config {
	const char	*name;
	unsigned short	fifo_size;
	unsigned short	tx_loadsz;
	unsigned char	fcr;
	unsigned char	rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
	unsigned int	flags;
};

#define UART_CAP_FIFO	(1 << 8)	/* UART has FIFO */
#define UART_CAP_EFR	(1 << 9)	/* UART has EFR */
#define UART_CAP_SLEEP	(1 << 10)	/* UART has IER sleep */
#define UART_CAP_AFE	(1 << 11)	/* MCR-based hw flow control */
#define UART_CAP_UUE	(1 << 12)	/* UART needs IER bit 6 set (Xscale) */
#define UART_CAP_RTOIE	(1 << 13)	/* UART needs IER bit 4 set (Xscale, Tegra) */
#define UART_CAP_HFIFO	(1 << 14)	/* UART has a "hidden" FIFO */
#define UART_CAP_RPM	(1 << 15)	/* Runtime PM is active while idle */
#define UART_CAP_IRDA	(1 << 16)	/* UART supports IrDA line discipline */
#define UART_CAP_MINI	(1 << 17)	/* Mini UART on BCM283X family lacks:
					 * STOP PARITY EPAR SPAR WLEN5 WLEN6
					 */

#define UART_BUG_QUOT	(1 << 0)	/* UART has buggy quot LSB */
#define UART_BUG_TXEN	(1 << 1)	/* UART has buggy TX IIR status */
#define UART_BUG_NOMSR	(1 << 2)	/* UART has buggy MSR status bits (Au1x00) */
#define UART_BUG_THRE	(1 << 3)	/* UART has buggy THRE reassertion */
#define UART_BUG_PARITY	(1 << 4)	/* UART mishandles parity if FIFO enabled */


#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
#define SERIAL8250_SHARE_IRQS 1
#else
#define SERIAL8250_SHARE_IRQS 0
#endif

#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags)		\
	{							\
		.iobase		= _base,			\
		.irq		= _irq,				\
		.uartclk	= 1843200,			\
		.iotype		= UPIO_PORT,			\
		.flags		= UPF_BOOT_AUTOCONF | (_flags),	\
	}

#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)


static inline int serial_in(struct uart_8250_port *up, int offset)
{
	return up->port.serial_in(&up->port, offset);
}

static inline void serial_out(struct uart_8250_port *up, int offset, int value)
{
	up->port.serial_out(&up->port, offset, value);
}

void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);

static inline int serial_dl_read(struct uart_8250_port *up)
{
	return up->dl_read(up);
}

static inline void serial_dl_write(struct uart_8250_port *up, int value)
{
	up->dl_write(up, value);
}

static inline bool serial8250_set_THRI(struct uart_8250_port *up)
{
	if (up->ier & UART_IER_THRI)
		return false;
	up->ier |= UART_IER_THRI;
	serial_out(up, UART_IER, up->ier);
	return true;
}

static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
{
	if (!(up->ier & UART_IER_THRI))
		return false;
	up->ier &= ~UART_IER_THRI;
	serial_out(up, UART_IER, up->ier);
	return true;
}

struct uart_8250_port *serial8250_get_port(int line);

void serial8250_rpm_get(struct uart_8250_port *p);
void serial8250_rpm_put(struct uart_8250_port *p);

void serial8250_rpm_get_tx(struct uart_8250_port *p);
void serial8250_rpm_put_tx(struct uart_8250_port *p);

int serial8250_em485_init(struct uart_8250_port *p);
void serial8250_em485_destroy(struct uart_8250_port *p);

static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
{
	serial_out(up, UART_MCR, value);
}

static inline int serial8250_in_MCR(struct uart_8250_port *up)
{
	return serial_in(up, UART_MCR);
}

#if defined(__alpha__) && !defined(CONFIG_PCI)
/*
 * Digital did something really horribly wrong with the OUT1 and OUT2
 * lines on at least some ALPHA's.  The failure mode is that if either
 * is cleared, the machine locks up with endless interrupts.
 */
#define ALPHA_KLUDGE_MCR  (UART_MCR_OUT2 | UART_MCR_OUT1)
#else
#define ALPHA_KLUDGE_MCR 0
#endif

#ifdef CONFIG_SERIAL_8250_PNP
int serial8250_pnp_init(void);
void serial8250_pnp_exit(void);
#else
static inline int serial8250_pnp_init(void) { return 0; }
static inline void serial8250_pnp_exit(void) { }
#endif

#ifdef CONFIG_SERIAL_8250_FINTEK
int fintek_8250_probe(struct uart_8250_port *uart);
#else
static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
#endif

#ifdef CONFIG_ARCH_OMAP1
static inline int is_omap1_8250(struct uart_8250_port *pt)
{
	int res;

	switch (pt->port.mapbase) {
	case OMAP1_UART1_BASE:
	case OMAP1_UART2_BASE:
	case OMAP1_UART3_BASE:
		res = 1;
		break;
	default:
		res = 0;
		break;
	}

	return res;
}

static inline int is_omap1510_8250(struct uart_8250_port *pt)
{
	if (!cpu_is_omap1510())
		return 0;

	return is_omap1_8250(pt);
}
#else
static inline int is_omap1_8250(struct uart_8250_port *pt)
{
	return 0;
}
static inline int is_omap1510_8250(struct uart_8250_port *pt)
{
	return 0;
}
#endif

#ifdef CONFIG_SERIAL_8250_DMA
extern int serial8250_tx_dma(struct uart_8250_port *);
extern int serial8250_rx_dma(struct uart_8250_port *);
extern void serial8250_rx_dma_flush(struct uart_8250_port *);
extern int serial8250_request_dma(struct uart_8250_port *);
extern void serial8250_release_dma(struct uart_8250_port *);
#else
static inline int serial8250_tx_dma(struct uart_8250_port *p)
{
	return -1;
}
static inline int serial8250_rx_dma(struct uart_8250_port *p)
{
	return -1;
}
static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
static inline int serial8250_request_dma(struct uart_8250_port *p)
{
	return -1;
}
static inline void serial8250_release_dma(struct uart_8250_port *p) { }
#endif

static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
{
	unsigned char status;

	status = serial_in(up, 0x04); /* EXCR2 */
#define PRESL(x) ((x) & 0x30)
	if (PRESL(status) == 0x10) {
		/* already in high speed mode */
		return 0;
	} else {
		status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
		status |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
		serial_out(up, 0x04, status);
	}
	return 1;
}

static inline int serial_index(struct uart_port *port)
{
	return port->minor - 64;
}
Commit	Line	Data
e3b3d0f5	1	// SPDX-License-Identifier: GPL-2.0+
1da177e4	2	/*
1da177e4 LT	3	* Driver for 8250/16550-type serial ports
	4	*
	5	* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
	6	*
	7	* Copyright (C) 2001 Russell King.
1da177e4 LT	8	*/
1da177e4 LT	9
bc49a661	10	#include <linux/serial_8250.h>
aef9a7bd	11	#include <linux/serial_reg.h>
9ee4b83e HK	12	#include <linux/dmaengine.h>
	13
	14	struct uart_8250_dma {
f1a297bb	15	int (tx_dma)(struct uart_8250_port p);
33d9b8b2	16	int (rx_dma)(struct uart_8250_port p);
f1a297bb	17
9a1870ce	18	/* Filter function */
9ee4b83e	19	dma_filter_fn fn;
9a1870ce	20	/* Parameter to the filter function */
9ee4b83e HK	21	void *rx_param;
	22	void *tx_param;
	23
9ee4b83e HK	24	struct dma_slave_config rxconf;
	25	struct dma_slave_config txconf;
	26
	27	struct dma_chan *rxchan;
	28	struct dma_chan *txchan;
	29
d1834bab AS	30	/* Device address base for DMA operations */
	31	phys_addr_t rx_dma_addr;
	32	phys_addr_t tx_dma_addr;
	33
	34	/* DMA address of the buffer in memory */
9ee4b83e HK	35	dma_addr_t rx_addr;
	36	dma_addr_t tx_addr;
	37
	38	dma_cookie_t rx_cookie;
	39	dma_cookie_t tx_cookie;
	40
	41	void *rx_buf;
	42
	43	size_t rx_size;
	44	size_t tx_size;
	45
eafb9eea JO	46	unsigned char tx_running;
	47	unsigned char tx_err;
	48	unsigned char rx_running;
9ee4b83e	49	};
1da177e4 LT	50
	51	struct old_serial_port {
	52	unsigned int uart;
	53	unsigned int baud_base;
	54	unsigned int port;
	55	unsigned int irq;
079119a2	56	upf_t flags;
1da177e4	57	unsigned char io_type;
7f1dc2f3	58	unsigned char __iomem *iomem_base;
1da177e4 LT	59	unsigned short iomem_reg_shift;
	60	};
	61
1da177e4 LT	62	struct serial8250_config {
	63	const char *name;
	64	unsigned short fifo_size;
	65	unsigned short tx_loadsz;
	66	unsigned char fcr;
aef9a7bd	67	unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
1da177e4 LT	68	unsigned int flags;
	69	};
	70
	71	#define UART_CAP_FIFO (1 << 8) /* UART has FIFO */
	72	#define UART_CAP_EFR (1 << 9) /* UART has EFR */
	73	#define UART_CAP_SLEEP (1 << 10) /* UART has IER sleep */
	74	#define UART_CAP_AFE (1 << 11) /* MCR-based hw flow control */
	75	#define UART_CAP_UUE (1 << 12) /* UART needs IER bit 6 set (Xscale) */
4539c24f	76	#define UART_CAP_RTOIE (1 << 13) /* UART needs IER bit 4 set (Xscale, Tegra) */
ebebd49a	77	#define UART_CAP_HFIFO (1 << 14) /* UART has a "hidden" FIFO */
d74d5d1b	78	#define UART_CAP_RPM (1 << 15) /* Runtime PM is active while idle */
98838d95	79	#define UART_CAP_IRDA (1 << 16) /* UART supports IrDA line discipline */
d087e7a9 PE	80	#define UART_CAP_MINI (1 << 17) /* Mini UART on BCM283X family lacks:
	81	* STOP PARITY EPAR SPAR WLEN5 WLEN6
	82	*/
1da177e4	83
4ba5e35d	84	#define UART_BUG_QUOT (1 << 0) /* UART has buggy quot LSB */
55d3b282	85	#define UART_BUG_TXEN (1 << 1) /* UART has buggy TX IIR status */
21c614a7	86	#define UART_BUG_NOMSR (1 << 2) /* UART has buggy MSR status bits (Au1x00) */
363f66fe	87	#define UART_BUG_THRE (1 << 3) /* UART has buggy THRE reassertion */
eb26dfe8	88	#define UART_BUG_PARITY (1 << 4) /* UART mishandles parity if FIFO enabled */
4ba5e35d	89
1da177e4 LT	90
	91	#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
	92	#define SERIAL8250_SHARE_IRQS 1
	93	#else
	94	#define SERIAL8250_SHARE_IRQS 0
	95	#endif
	96
b3bd6668 AW	97	#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
	98	{ \
	99	.iobase = _base, \
	100	.irq = _irq, \
	101	.uartclk = 1843200, \
	102	.iotype = UPIO_PORT, \
	103	.flags = UPF_BOOT_AUTOCONF \| (_flags), \
	104	}
	105
	106	#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
	107
	108
3f0ab327 PG	109	static inline int serial_in(struct uart_8250_port *up, int offset)
	110	{
	111	return up->port.serial_in(&up->port, offset);
	112	}
	113
	114	static inline void serial_out(struct uart_8250_port *up, int offset, int value)
	115	{
	116	up->port.serial_out(&up->port, offset, value);
	117	}
	118
0ad372b9 SM	119	void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
0ad372b9 SM	120
cc419fa0 MD	121	static inline int serial_dl_read(struct uart_8250_port *up)
	122	{
	123	return up->dl_read(up);
	124	}
	125
	126	static inline void serial_dl_write(struct uart_8250_port *up, int value)
	127	{
	128	up->dl_write(up, value);
	129	}
	130
7e267b29 AS	131	static inline bool serial8250_set_THRI(struct uart_8250_port *up)
	132	{
	133	if (up->ier & UART_IER_THRI)
	134	return false;
	135	up->ier \|= UART_IER_THRI;
	136	serial_out(up, UART_IER, up->ier);
	137	return true;
	138	}
	139
	140	static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
	141	{
	142	if (!(up->ier & UART_IER_THRI))
	143	return false;
	144	up->ier &= ~UART_IER_THRI;
	145	serial_out(up, UART_IER, up->ier);
	146	return true;
	147	}
	148
ae14a795	149	struct uart_8250_port *serial8250_get_port(int line);
7d4e00c6	150
77285243 SAS	151	void serial8250_rpm_get(struct uart_8250_port *p);
77285243 SAS	152	void serial8250_rpm_put(struct uart_8250_port *p);
7d4e00c6 AS	153
	154	void serial8250_rpm_get_tx(struct uart_8250_port *p);
	155	void serial8250_rpm_put_tx(struct uart_8250_port *p);
	156
e490c914 MK	157	int serial8250_em485_init(struct uart_8250_port *p);
e490c914 MK	158	void serial8250_em485_destroy(struct uart_8250_port *p);
ae14a795	159
36fd95b1 YY	160	static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
	161	{
	162	serial_out(up, UART_MCR, value);
	163	}
	164
	165	static inline int serial8250_in_MCR(struct uart_8250_port *up)
	166	{
5db4f7f8	167	return serial_in(up, UART_MCR);
36fd95b1 YY	168	}
36fd95b1 YY	169
1da177e4 LT	170	#if defined(__alpha__) && !defined(CONFIG_PCI)
	171	/*
	172	* Digital did something really horribly wrong with the OUT1 and OUT2
	173	* lines on at least some ALPHA's. The failure mode is that if either
	174	* is cleared, the machine locks up with endless interrupts.
	175	*/
	176	#define ALPHA_KLUDGE_MCR (UART_MCR_OUT2 \| UART_MCR_OUT1)
1da177e4 LT	177	#else
	178	#define ALPHA_KLUDGE_MCR 0
	179	#endif
835d844d SY	180
	181	#ifdef CONFIG_SERIAL_8250_PNP
	182	int serial8250_pnp_init(void);
	183	void serial8250_pnp_exit(void);
	184	#else
	185	static inline int serial8250_pnp_init(void) { return 0; }
	186	static inline void serial8250_pnp_exit(void) { }
	187	#endif
	188
fa01e2ca RRD	189	#ifdef CONFIG_SERIAL_8250_FINTEK
	190	int fintek_8250_probe(struct uart_8250_port *uart);
	191	#else
	192	static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
	193	#endif
	194
54ec52b6 TL	195	#ifdef CONFIG_ARCH_OMAP1
	196	static inline int is_omap1_8250(struct uart_8250_port *pt)
	197	{
	198	int res;
	199
	200	switch (pt->port.mapbase) {
	201	case OMAP1_UART1_BASE:
	202	case OMAP1_UART2_BASE:
	203	case OMAP1_UART3_BASE:
	204	res = 1;
	205	break;
	206	default:
	207	res = 0;
	208	break;
	209	}
	210
	211	return res;
	212	}
	213
	214	static inline int is_omap1510_8250(struct uart_8250_port *pt)
	215	{
	216	if (!cpu_is_omap1510())
	217	return 0;
	218
	219	return is_omap1_8250(pt);
	220	}
	221	#else
	222	static inline int is_omap1_8250(struct uart_8250_port *pt)
	223	{
	224	return 0;
	225	}
	226	static inline int is_omap1510_8250(struct uart_8250_port *pt)
	227	{
	228	return 0;
	229	}
	230	#endif
9ee4b83e HK	231
	232	#ifdef CONFIG_SERIAL_8250_DMA
	233	extern int serial8250_tx_dma(struct uart_8250_port *);
33d9b8b2 PH	234	extern int serial8250_rx_dma(struct uart_8250_port *);
33d9b8b2 PH	235	extern void serial8250_rx_dma_flush(struct uart_8250_port *);
9ee4b83e HK	236	extern int serial8250_request_dma(struct uart_8250_port *);
	237	extern void serial8250_release_dma(struct uart_8250_port *);
	238	#else
	239	static inline int serial8250_tx_dma(struct uart_8250_port *p)
	240	{
	241	return -1;
	242	}
33d9b8b2	243	static inline int serial8250_rx_dma(struct uart_8250_port *p)
9ee4b83e HK	244	{
	245	return -1;
	246	}
33d9b8b2	247	static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
9ee4b83e HK	248	static inline int serial8250_request_dma(struct uart_8250_port *p)
	249	{
	250	return -1;
	251	}
	252	static inline void serial8250_release_dma(struct uart_8250_port *p) { }
	253	#endif
d81e50f6 PH	254
	255	static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
	256	{
	257	unsigned char status;
	258
	259	status = serial_in(up, 0x04); /* EXCR2 */
	260	#define PRESL(x) ((x) & 0x30)
	261	if (PRESL(status) == 0x10) {
	262	/* already in high speed mode */
	263	return 0;
	264	} else {
	265	status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
	266	status \|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
	267	serial_out(up, 0x04, status);
	268	}
	269	return 1;
	270	}
b6830f6d PH	271
	272	static inline int serial_index(struct uart_port *port)
	273	{
	274	return port->minor - 64;
	275	}