[linux-2.6-block.git] / drivers / tty / serial / 8250 / 8250.h

/* SPDX-License-Identifier: GPL-2.0+ */
/*
 *  Driver for 8250/16550-type serial ports
 *
 *  Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
 *
 *  Copyright (C) 2001 Russell King.
 */

#include <linux/bits.h>
#include <linux/serial_8250.h>
#include <linux/serial_reg.h>
#include <linux/dmaengine.h>

#include "../serial_mctrl_gpio.h"

struct uart_8250_dma {
	int (*tx_dma)(struct uart_8250_port *p);
	int (*rx_dma)(struct uart_8250_port *p);
	void (*prepare_tx_dma)(struct uart_8250_port *p);
	void (*prepare_rx_dma)(struct uart_8250_port *p);

	/* Filter function */
	dma_filter_fn		fn;
	/* Parameter to the filter function */
	void			*rx_param;
	void			*tx_param;

	struct dma_slave_config	rxconf;
	struct dma_slave_config	txconf;

	struct dma_chan		*rxchan;
	struct dma_chan		*txchan;

	/* Device address base for DMA operations */
	phys_addr_t		rx_dma_addr;
	phys_addr_t		tx_dma_addr;

	/* DMA address of the buffer in memory */
	dma_addr_t		rx_addr;
	dma_addr_t		tx_addr;

	dma_cookie_t		rx_cookie;
	dma_cookie_t		tx_cookie;

	void			*rx_buf;

	size_t			rx_size;
	size_t			tx_size;

	unsigned char		tx_running;
	unsigned char		tx_err;
	unsigned char		rx_running;
};

struct old_serial_port {
	unsigned int uart;
	unsigned int baud_base;
	unsigned int port;
	unsigned int irq;
	upf_t        flags;
	unsigned char io_type;
	unsigned char __iomem *iomem_base;
	unsigned short iomem_reg_shift;
};

struct serial8250_config {
	const char	*name;
	unsigned short	fifo_size;
	unsigned short	tx_loadsz;
	unsigned char	fcr;
	unsigned char	rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
	unsigned int	flags;
};

#define UART_CAP_FIFO	BIT(8)	/* UART has FIFO */
#define UART_CAP_EFR	BIT(9)	/* UART has EFR */
#define UART_CAP_SLEEP	BIT(10)	/* UART has IER sleep */
#define UART_CAP_AFE	BIT(11)	/* MCR-based hw flow control */
#define UART_CAP_UUE	BIT(12)	/* UART needs IER bit 6 set (Xscale) */
#define UART_CAP_RTOIE	BIT(13)	/* UART needs IER bit 4 set (Xscale, Tegra) */
#define UART_CAP_HFIFO	BIT(14)	/* UART has a "hidden" FIFO */
#define UART_CAP_RPM	BIT(15)	/* Runtime PM is active while idle */
#define UART_CAP_IRDA	BIT(16)	/* UART supports IrDA line discipline */
#define UART_CAP_MINI	BIT(17)	/* Mini UART on BCM283X family lacks:
					 * STOP PARITY EPAR SPAR WLEN5 WLEN6
					 */
#define UART_CAP_NOTEMT	BIT(18)	/* UART without interrupt on TEMT available */

#define UART_BUG_QUOT	BIT(0)	/* UART has buggy quot LSB */
#define UART_BUG_TXEN	BIT(1)	/* UART has buggy TX IIR status */
#define UART_BUG_NOMSR	BIT(2)	/* UART has buggy MSR status bits (Au1x00) */
#define UART_BUG_THRE	BIT(3)	/* UART has buggy THRE reassertion */
#define UART_BUG_PARITY	BIT(4)	/* UART mishandles parity if FIFO enabled */
#define UART_BUG_TXRACE	BIT(5)	/* UART Tx fails to set remote DR */


#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
#define SERIAL8250_SHARE_IRQS 1
#else
#define SERIAL8250_SHARE_IRQS 0
#endif

#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags)		\
	{							\
		.iobase		= _base,			\
		.irq		= _irq,				\
		.uartclk	= 1843200,			\
		.iotype		= UPIO_PORT,			\
		.flags		= UPF_BOOT_AUTOCONF | (_flags),	\
	}

#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)


static inline int serial_in(struct uart_8250_port *up, int offset)
{
	return up->port.serial_in(&up->port, offset);
}

static inline void serial_out(struct uart_8250_port *up, int offset, int value)
{
	up->port.serial_out(&up->port, offset, value);
}

void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);

static inline int serial_dl_read(struct uart_8250_port *up)
{
	return up->dl_read(up);
}

static inline void serial_dl_write(struct uart_8250_port *up, int value)
{
	up->dl_write(up, value);
}

static inline bool serial8250_set_THRI(struct uart_8250_port *up)
{
	if (up->ier & UART_IER_THRI)
		return false;
	up->ier |= UART_IER_THRI;
	serial_out(up, UART_IER, up->ier);
	return true;
}

static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
{
	if (!(up->ier & UART_IER_THRI))
		return false;
	up->ier &= ~UART_IER_THRI;
	serial_out(up, UART_IER, up->ier);
	return true;
}

struct uart_8250_port *serial8250_get_port(int line);

void serial8250_rpm_get(struct uart_8250_port *p);
void serial8250_rpm_put(struct uart_8250_port *p);

void serial8250_rpm_get_tx(struct uart_8250_port *p);
void serial8250_rpm_put_tx(struct uart_8250_port *p);

int serial8250_em485_config(struct uart_port *port, struct serial_rs485 *rs485);
void serial8250_em485_start_tx(struct uart_8250_port *p);
void serial8250_em485_stop_tx(struct uart_8250_port *p);
void serial8250_em485_destroy(struct uart_8250_port *p);

/* MCR <-> TIOCM conversion */
static inline int serial8250_TIOCM_to_MCR(int tiocm)
{
	int mcr = 0;

	if (tiocm & TIOCM_RTS)
		mcr |= UART_MCR_RTS;
	if (tiocm & TIOCM_DTR)
		mcr |= UART_MCR_DTR;
	if (tiocm & TIOCM_OUT1)
		mcr |= UART_MCR_OUT1;
	if (tiocm & TIOCM_OUT2)
		mcr |= UART_MCR_OUT2;
	if (tiocm & TIOCM_LOOP)
		mcr |= UART_MCR_LOOP;

	return mcr;
}

static inline int serial8250_MCR_to_TIOCM(int mcr)
{
	int tiocm = 0;

	if (mcr & UART_MCR_RTS)
		tiocm |= TIOCM_RTS;
	if (mcr & UART_MCR_DTR)
		tiocm |= TIOCM_DTR;
	if (mcr & UART_MCR_OUT1)
		tiocm |= TIOCM_OUT1;
	if (mcr & UART_MCR_OUT2)
		tiocm |= TIOCM_OUT2;
	if (mcr & UART_MCR_LOOP)
		tiocm |= TIOCM_LOOP;

	return tiocm;
}

/* MSR <-> TIOCM conversion */
static inline int serial8250_MSR_to_TIOCM(int msr)
{
	int tiocm = 0;

	if (msr & UART_MSR_DCD)
		tiocm |= TIOCM_CAR;
	if (msr & UART_MSR_RI)
		tiocm |= TIOCM_RNG;
	if (msr & UART_MSR_DSR)
		tiocm |= TIOCM_DSR;
	if (msr & UART_MSR_CTS)
		tiocm |= TIOCM_CTS;

	return tiocm;
}

static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
{
	serial_out(up, UART_MCR, value);

	if (up->gpios)
		mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
}

static inline int serial8250_in_MCR(struct uart_8250_port *up)
{
	int mctrl;

	mctrl = serial_in(up, UART_MCR);

	if (up->gpios) {
		unsigned int mctrl_gpio = 0;

		mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
		mctrl |= serial8250_TIOCM_to_MCR(mctrl_gpio);
	}

	return mctrl;
}

bool alpha_jensen(void);
void alpha_jensen_set_mctrl(struct uart_port *port, unsigned int mctrl);

#ifdef CONFIG_SERIAL_8250_PNP
int serial8250_pnp_init(void);
void serial8250_pnp_exit(void);
#else
static inline int serial8250_pnp_init(void) { return 0; }
static inline void serial8250_pnp_exit(void) { }
#endif

#ifdef CONFIG_SERIAL_8250_FINTEK
int fintek_8250_probe(struct uart_8250_port *uart);
#else
static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
#endif

#ifdef CONFIG_ARCH_OMAP1
static inline int is_omap1_8250(struct uart_8250_port *pt)
{
	int res;

	switch (pt->port.mapbase) {
	case OMAP1_UART1_BASE:
	case OMAP1_UART2_BASE:
	case OMAP1_UART3_BASE:
		res = 1;
		break;
	default:
		res = 0;
		break;
	}

	return res;
}

static inline int is_omap1510_8250(struct uart_8250_port *pt)
{
	if (!cpu_is_omap1510())
		return 0;

	return is_omap1_8250(pt);
}
#else
static inline int is_omap1_8250(struct uart_8250_port *pt)
{
	return 0;
}
static inline int is_omap1510_8250(struct uart_8250_port *pt)
{
	return 0;
}
#endif

#ifdef CONFIG_SERIAL_8250_DMA
extern int serial8250_tx_dma(struct uart_8250_port *);
extern int serial8250_rx_dma(struct uart_8250_port *);
extern void serial8250_rx_dma_flush(struct uart_8250_port *);
extern int serial8250_request_dma(struct uart_8250_port *);
extern void serial8250_release_dma(struct uart_8250_port *);

static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p)
{
	struct uart_8250_dma *dma = p->dma;

	if (dma->prepare_tx_dma)
		dma->prepare_tx_dma(p);
}

static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p)
{
	struct uart_8250_dma *dma = p->dma;

	if (dma->prepare_rx_dma)
		dma->prepare_rx_dma(p);
}
#else
static inline int serial8250_tx_dma(struct uart_8250_port *p)
{
	return -1;
}
static inline int serial8250_rx_dma(struct uart_8250_port *p)
{
	return -1;
}
static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
static inline int serial8250_request_dma(struct uart_8250_port *p)
{
	return -1;
}
static inline void serial8250_release_dma(struct uart_8250_port *p) { }
#endif

static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
{
	unsigned char status;

	status = serial_in(up, 0x04); /* EXCR2 */
#define PRESL(x) ((x) & 0x30)
	if (PRESL(status) == 0x10) {
		/* already in high speed mode */
		return 0;
	} else {
		status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
		status |= 0x10;  /* 1.625 divisor for baud_base --> 921600 */
		serial_out(up, 0x04, status);
	}
	return 1;
}

static inline int serial_index(struct uart_port *port)
{
	return port->minor - 64;
}
Commit	Line	Data
4f5f5887	1	/* SPDX-License-Identifier: GPL-2.0+ */
1da177e4	2	/*
1da177e4 LT	3	* Driver for 8250/16550-type serial ports
	4	*
	5	* Based on drivers/char/serial.c, by Linus Torvalds, Theodore Ts'o.
	6	*
	7	* Copyright (C) 2001 Russell King.
1da177e4 LT	8	*/
1da177e4 LT	9
1f06f571	10	#include <linux/bits.h>
bc49a661	11	#include <linux/serial_8250.h>
aef9a7bd	12	#include <linux/serial_reg.h>
9ee4b83e HK	13	#include <linux/dmaengine.h>
9ee4b83e HK	14
4a96895f YY	15	#include "../serial_mctrl_gpio.h"
4a96895f YY	16
9ee4b83e	17	struct uart_8250_dma {
f1a297bb	18	int (tx_dma)(struct uart_8250_port p);
33d9b8b2	19	int (rx_dma)(struct uart_8250_port p);
e4fb03fe MR	20	void (prepare_tx_dma)(struct uart_8250_port p);
e4fb03fe MR	21	void (prepare_rx_dma)(struct uart_8250_port p);
f1a297bb	22
9a1870ce	23	/* Filter function */
9ee4b83e	24	dma_filter_fn fn;
9a1870ce	25	/* Parameter to the filter function */
9ee4b83e HK	26	void *rx_param;
	27	void *tx_param;
	28
9ee4b83e HK	29	struct dma_slave_config rxconf;
	30	struct dma_slave_config txconf;
	31
	32	struct dma_chan *rxchan;
	33	struct dma_chan *txchan;
	34
d1834bab AS	35	/* Device address base for DMA operations */
	36	phys_addr_t rx_dma_addr;
	37	phys_addr_t tx_dma_addr;
	38
	39	/* DMA address of the buffer in memory */
9ee4b83e HK	40	dma_addr_t rx_addr;
	41	dma_addr_t tx_addr;
	42
	43	dma_cookie_t rx_cookie;
	44	dma_cookie_t tx_cookie;
	45
	46	void *rx_buf;
	47
	48	size_t rx_size;
	49	size_t tx_size;
	50
eafb9eea JO	51	unsigned char tx_running;
	52	unsigned char tx_err;
	53	unsigned char rx_running;
9ee4b83e	54	};
1da177e4 LT	55
	56	struct old_serial_port {
	57	unsigned int uart;
	58	unsigned int baud_base;
	59	unsigned int port;
	60	unsigned int irq;
079119a2	61	upf_t flags;
1da177e4	62	unsigned char io_type;
7f1dc2f3	63	unsigned char __iomem *iomem_base;
1da177e4 LT	64	unsigned short iomem_reg_shift;
	65	};
	66
1da177e4 LT	67	struct serial8250_config {
	68	const char *name;
	69	unsigned short fifo_size;
	70	unsigned short tx_loadsz;
	71	unsigned char fcr;
aef9a7bd	72	unsigned char rxtrig_bytes[UART_FCR_R_TRIG_MAX_STATE];
1da177e4 LT	73	unsigned int flags;
	74	};
	75
1f06f571 AJ	76	#define UART_CAP_FIFO BIT(8) /* UART has FIFO */
	77	#define UART_CAP_EFR BIT(9) /* UART has EFR */
	78	#define UART_CAP_SLEEP BIT(10) /* UART has IER sleep */
	79	#define UART_CAP_AFE BIT(11) /* MCR-based hw flow control */
	80	#define UART_CAP_UUE BIT(12) /* UART needs IER bit 6 set (Xscale) */
	81	#define UART_CAP_RTOIE BIT(13) /* UART needs IER bit 4 set (Xscale, Tegra) */
	82	#define UART_CAP_HFIFO BIT(14) /* UART has a "hidden" FIFO */
	83	#define UART_CAP_RPM BIT(15) /* Runtime PM is active while idle */
	84	#define UART_CAP_IRDA BIT(16) /* UART supports IrDA line discipline */
	85	#define UART_CAP_MINI BIT(17) /* Mini UART on BCM283X family lacks:
d087e7a9 PE	86	* STOP PARITY EPAR SPAR WLEN5 WLEN6
d087e7a9 PE	87	*/
f6f58610	88	#define UART_CAP_NOTEMT BIT(18) /* UART without interrupt on TEMT available */
1da177e4	89
1f06f571 AJ	90	#define UART_BUG_QUOT BIT(0) /* UART has buggy quot LSB */
	91	#define UART_BUG_TXEN BIT(1) /* UART has buggy TX IIR status */
	92	#define UART_BUG_NOMSR BIT(2) /* UART has buggy MSR status bits (Au1x00) */
	93	#define UART_BUG_THRE BIT(3) /* UART has buggy THRE reassertion */
	94	#define UART_BUG_PARITY BIT(4) /* UART mishandles parity if FIFO enabled */
	95	#define UART_BUG_TXRACE BIT(5) /* UART Tx fails to set remote DR */
4ba5e35d	96
1da177e4 LT	97
	98	#ifdef CONFIG_SERIAL_8250_SHARE_IRQ
	99	#define SERIAL8250_SHARE_IRQS 1
	100	#else
	101	#define SERIAL8250_SHARE_IRQS 0
	102	#endif
	103
b3bd6668 AW	104	#define SERIAL8250_PORT_FLAGS(_base, _irq, _flags) \
	105	{ \
	106	.iobase = _base, \
	107	.irq = _irq, \
	108	.uartclk = 1843200, \
	109	.iotype = UPIO_PORT, \
	110	.flags = UPF_BOOT_AUTOCONF \| (_flags), \
	111	}
	112
	113	#define SERIAL8250_PORT(_base, _irq) SERIAL8250_PORT_FLAGS(_base, _irq, 0)
	114
	115
3f0ab327 PG	116	static inline int serial_in(struct uart_8250_port *up, int offset)
	117	{
	118	return up->port.serial_in(&up->port, offset);
	119	}
	120
	121	static inline void serial_out(struct uart_8250_port *up, int offset, int value)
	122	{
	123	up->port.serial_out(&up->port, offset, value);
	124	}
	125
0ad372b9 SM	126	void serial8250_clear_and_reinit_fifos(struct uart_8250_port *p);
0ad372b9 SM	127
cc419fa0 MD	128	static inline int serial_dl_read(struct uart_8250_port *up)
	129	{
	130	return up->dl_read(up);
	131	}
	132
	133	static inline void serial_dl_write(struct uart_8250_port *up, int value)
	134	{
	135	up->dl_write(up, value);
	136	}
	137
7e267b29 AS	138	static inline bool serial8250_set_THRI(struct uart_8250_port *up)
	139	{
	140	if (up->ier & UART_IER_THRI)
	141	return false;
	142	up->ier \|= UART_IER_THRI;
	143	serial_out(up, UART_IER, up->ier);
	144	return true;
	145	}
	146
	147	static inline bool serial8250_clear_THRI(struct uart_8250_port *up)
	148	{
	149	if (!(up->ier & UART_IER_THRI))
	150	return false;
	151	up->ier &= ~UART_IER_THRI;
	152	serial_out(up, UART_IER, up->ier);
	153	return true;
	154	}
	155
ae14a795	156	struct uart_8250_port *serial8250_get_port(int line);
7d4e00c6	157
77285243 SAS	158	void serial8250_rpm_get(struct uart_8250_port *p);
77285243 SAS	159	void serial8250_rpm_put(struct uart_8250_port *p);
7d4e00c6 AS	160
	161	void serial8250_rpm_get_tx(struct uart_8250_port *p);
	162	void serial8250_rpm_put_tx(struct uart_8250_port *p);
	163
283e096f	164	int serial8250_em485_config(struct uart_port port, struct serial_rs485 rs485);
058bc104 LW	165	void serial8250_em485_start_tx(struct uart_8250_port *p);
058bc104 LW	166	void serial8250_em485_stop_tx(struct uart_8250_port *p);
e490c914	167	void serial8250_em485_destroy(struct uart_8250_port *p);
ae14a795	168
42912081 SR	169	/* MCR <-> TIOCM conversion */
	170	static inline int serial8250_TIOCM_to_MCR(int tiocm)
	171	{
	172	int mcr = 0;
	173
	174	if (tiocm & TIOCM_RTS)
	175	mcr \|= UART_MCR_RTS;
	176	if (tiocm & TIOCM_DTR)
	177	mcr \|= UART_MCR_DTR;
	178	if (tiocm & TIOCM_OUT1)
	179	mcr \|= UART_MCR_OUT1;
	180	if (tiocm & TIOCM_OUT2)
	181	mcr \|= UART_MCR_OUT2;
	182	if (tiocm & TIOCM_LOOP)
	183	mcr \|= UART_MCR_LOOP;
	184
	185	return mcr;
	186	}
	187
	188	static inline int serial8250_MCR_to_TIOCM(int mcr)
	189	{
	190	int tiocm = 0;
	191
	192	if (mcr & UART_MCR_RTS)
	193	tiocm \|= TIOCM_RTS;
	194	if (mcr & UART_MCR_DTR)
	195	tiocm \|= TIOCM_DTR;
	196	if (mcr & UART_MCR_OUT1)
	197	tiocm \|= TIOCM_OUT1;
	198	if (mcr & UART_MCR_OUT2)
	199	tiocm \|= TIOCM_OUT2;
	200	if (mcr & UART_MCR_LOOP)
	201	tiocm \|= TIOCM_LOOP;
	202
	203	return tiocm;
	204	}
	205
	206	/* MSR <-> TIOCM conversion */
	207	static inline int serial8250_MSR_to_TIOCM(int msr)
	208	{
	209	int tiocm = 0;
	210
	211	if (msr & UART_MSR_DCD)
	212	tiocm \|= TIOCM_CAR;
	213	if (msr & UART_MSR_RI)
	214	tiocm \|= TIOCM_RNG;
	215	if (msr & UART_MSR_DSR)
	216	tiocm \|= TIOCM_DSR;
	217	if (msr & UART_MSR_CTS)
	218	tiocm \|= TIOCM_CTS;
	219
	220	return tiocm;
	221	}
	222
36fd95b1 YY	223	static inline void serial8250_out_MCR(struct uart_8250_port *up, int value)
	224	{
	225	serial_out(up, UART_MCR, value);
4a96895f YY	226
	227	if (up->gpios)
	228	mctrl_gpio_set(up->gpios, serial8250_MCR_to_TIOCM(value));
36fd95b1 YY	229	}
	230
	231	static inline int serial8250_in_MCR(struct uart_8250_port *up)
	232	{
4a96895f YY	233	int mctrl;
	234
	235	mctrl = serial_in(up, UART_MCR);
	236
	237	if (up->gpios) {
	238	unsigned int mctrl_gpio = 0;
	239
	240	mctrl_gpio = mctrl_gpio_get_outputs(up->gpios, &mctrl_gpio);
	241	mctrl \|= serial8250_TIOCM_to_MCR(mctrl_gpio);
	242	}
	243
	244	return mctrl;
36fd95b1 YY	245	}
36fd95b1 YY	246
b4a29b94 LW	247	bool alpha_jensen(void);
b4a29b94 LW	248	void alpha_jensen_set_mctrl(struct uart_port *port, unsigned int mctrl);
835d844d SY	249
	250	#ifdef CONFIG_SERIAL_8250_PNP
	251	int serial8250_pnp_init(void);
	252	void serial8250_pnp_exit(void);
	253	#else
	254	static inline int serial8250_pnp_init(void) { return 0; }
	255	static inline void serial8250_pnp_exit(void) { }
	256	#endif
	257
fa01e2ca RRD	258	#ifdef CONFIG_SERIAL_8250_FINTEK
	259	int fintek_8250_probe(struct uart_8250_port *uart);
	260	#else
	261	static inline int fintek_8250_probe(struct uart_8250_port *uart) { return 0; }
	262	#endif
	263
54ec52b6 TL	264	#ifdef CONFIG_ARCH_OMAP1
	265	static inline int is_omap1_8250(struct uart_8250_port *pt)
	266	{
	267	int res;
	268
	269	switch (pt->port.mapbase) {
	270	case OMAP1_UART1_BASE:
	271	case OMAP1_UART2_BASE:
	272	case OMAP1_UART3_BASE:
	273	res = 1;
	274	break;
	275	default:
	276	res = 0;
	277	break;
	278	}
	279
	280	return res;
	281	}
	282
	283	static inline int is_omap1510_8250(struct uart_8250_port *pt)
	284	{
	285	if (!cpu_is_omap1510())
	286	return 0;
	287
	288	return is_omap1_8250(pt);
	289	}
	290	#else
	291	static inline int is_omap1_8250(struct uart_8250_port *pt)
	292	{
	293	return 0;
	294	}
	295	static inline int is_omap1510_8250(struct uart_8250_port *pt)
	296	{
	297	return 0;
	298	}
	299	#endif
9ee4b83e HK	300
	301	#ifdef CONFIG_SERIAL_8250_DMA
	302	extern int serial8250_tx_dma(struct uart_8250_port *);
33d9b8b2 PH	303	extern int serial8250_rx_dma(struct uart_8250_port *);
33d9b8b2 PH	304	extern void serial8250_rx_dma_flush(struct uart_8250_port *);
9ee4b83e HK	305	extern int serial8250_request_dma(struct uart_8250_port *);
9ee4b83e HK	306	extern void serial8250_release_dma(struct uart_8250_port *);
e4fb03fe MR	307
	308	static inline void serial8250_do_prepare_tx_dma(struct uart_8250_port *p)
	309	{
	310	struct uart_8250_dma *dma = p->dma;
	311
	312	if (dma->prepare_tx_dma)
	313	dma->prepare_tx_dma(p);
	314	}
	315
	316	static inline void serial8250_do_prepare_rx_dma(struct uart_8250_port *p)
	317	{
	318	struct uart_8250_dma *dma = p->dma;
	319
	320	if (dma->prepare_rx_dma)
	321	dma->prepare_rx_dma(p);
	322	}
9ee4b83e HK	323	#else
	324	static inline int serial8250_tx_dma(struct uart_8250_port *p)
	325	{
	326	return -1;
	327	}
33d9b8b2	328	static inline int serial8250_rx_dma(struct uart_8250_port *p)
9ee4b83e HK	329	{
	330	return -1;
	331	}
33d9b8b2	332	static inline void serial8250_rx_dma_flush(struct uart_8250_port *p) { }
9ee4b83e HK	333	static inline int serial8250_request_dma(struct uart_8250_port *p)
	334	{
	335	return -1;
	336	}
	337	static inline void serial8250_release_dma(struct uart_8250_port *p) { }
	338	#endif
d81e50f6 PH	339
	340	static inline int ns16550a_goto_highspeed(struct uart_8250_port *up)
	341	{
	342	unsigned char status;
	343
	344	status = serial_in(up, 0x04); /* EXCR2 */
	345	#define PRESL(x) ((x) & 0x30)
	346	if (PRESL(status) == 0x10) {
	347	/* already in high speed mode */
	348	return 0;
	349	} else {
	350	status &= ~0xB0; /* Disable LOCK, mask out PRESL[01] */
	351	status \|= 0x10; /* 1.625 divisor for baud_base --> 921600 */
	352	serial_out(up, 0x04, status);
	353	}
	354	return 1;
	355	}
b6830f6d PH	356
	357	static inline int serial_index(struct uart_port *port)
	358	{
	359	return port->minor - 64;
	360	}