Merge git://git.kernel.org/pub/scm/linux/kernel/git/steve/gfs2-2.6-fixes
[linux-2.6-block.git] / drivers / tty / moxa.c
CommitLineData
1da177e4
LT
1/*****************************************************************************/
2/*
3 * moxa.c -- MOXA Intellio family multiport serial driver.
4 *
b9705b60
JS
5 * Copyright (C) 1999-2000 Moxa Technologies (support@moxa.com).
6 * Copyright (c) 2007 Jiri Slaby <jirislaby@gmail.com>
1da177e4
LT
7 *
8 * This code is loosely based on the Linux serial driver, written by
9 * Linus Torvalds, Theodore T'so and others.
10 *
11 * This program is free software; you can redistribute it and/or modify
12 * it under the terms of the GNU General Public License as published by
13 * the Free Software Foundation; either version 2 of the License, or
14 * (at your option) any later version.
1da177e4
LT
15 */
16
17/*
18 * MOXA Intellio Series Driver
19 * for : LINUX
20 * date : 1999/1/7
21 * version : 5.1
22 */
23
1da177e4
LT
24#include <linux/module.h>
25#include <linux/types.h>
26#include <linux/mm.h>
27#include <linux/ioport.h>
28#include <linux/errno.h>
03718234 29#include <linux/firmware.h>
1da177e4
LT
30#include <linux/signal.h>
31#include <linux/sched.h>
32#include <linux/timer.h>
33#include <linux/interrupt.h>
34#include <linux/tty.h>
35#include <linux/tty_flip.h>
36#include <linux/major.h>
37#include <linux/string.h>
38#include <linux/fcntl.h>
39#include <linux/ptrace.h>
40#include <linux/serial.h>
41#include <linux/tty_driver.h>
42#include <linux/delay.h>
43#include <linux/pci.h>
44#include <linux/init.h>
45#include <linux/bitops.h>
5a0e3ad6 46#include <linux/slab.h>
5a3c6b25 47#include <linux/ratelimit.h>
1da177e4
LT
48
49#include <asm/system.h>
50#include <asm/io.h>
51#include <asm/uaccess.h>
52
03718234
JS
53#include "moxa.h"
54
b9705b60 55#define MOXA_VERSION "6.0k"
1da177e4 56
03718234
JS
57#define MOXA_FW_HDRLEN 32
58
11324edd 59#define MOXAMAJOR 172
1da177e4 60
11324edd 61#define MAX_BOARDS 4 /* Don't change this value */
1da177e4 62#define MAX_PORTS_PER_BOARD 32 /* Don't change this value */
11324edd 63#define MAX_PORTS (MAX_BOARDS * MAX_PORTS_PER_BOARD)
1da177e4 64
08d01c79
JS
65#define MOXA_IS_320(brd) ((brd)->boardType == MOXA_BOARD_C320_ISA || \
66 (brd)->boardType == MOXA_BOARD_C320_PCI)
67
1da177e4
LT
68/*
69 * Define the Moxa PCI vendor and device IDs.
70 */
11324edd
JS
71#define MOXA_BUS_TYPE_ISA 0
72#define MOXA_BUS_TYPE_PCI 1
1da177e4 73
1da177e4
LT
74enum {
75 MOXA_BOARD_C218_PCI = 1,
76 MOXA_BOARD_C218_ISA,
77 MOXA_BOARD_C320_PCI,
78 MOXA_BOARD_C320_ISA,
79 MOXA_BOARD_CP204J,
80};
81
82static char *moxa_brdname[] =
83{
84 "C218 Turbo PCI series",
85 "C218 Turbo ISA series",
86 "C320 Turbo PCI series",
87 "C320 Turbo ISA series",
88 "CP-204J series",
89};
90
91#ifdef CONFIG_PCI
92static struct pci_device_id moxa_pcibrds[] = {
5ebb4078
JS
93 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C218),
94 .driver_data = MOXA_BOARD_C218_PCI },
95 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_C320),
96 .driver_data = MOXA_BOARD_C320_PCI },
97 { PCI_DEVICE(PCI_VENDOR_ID_MOXA, PCI_DEVICE_ID_MOXA_CP204J),
98 .driver_data = MOXA_BOARD_CP204J },
1da177e4
LT
99 { 0 }
100};
101MODULE_DEVICE_TABLE(pci, moxa_pcibrds);
102#endif /* CONFIG_PCI */
103
03718234
JS
104struct moxa_port;
105
8f8ecbad 106static struct moxa_board_conf {
1da177e4
LT
107 int boardType;
108 int numPorts;
1da177e4 109 int busType;
8f8ecbad 110
810ab09b 111 unsigned int ready;
8f8ecbad 112
03718234
JS
113 struct moxa_port *ports;
114
8f8ecbad
JS
115 void __iomem *basemem;
116 void __iomem *intNdx;
117 void __iomem *intPend;
118 void __iomem *intTable;
119} moxa_boards[MAX_BOARDS];
120
121struct mxser_mstatus {
122 tcflag_t cflag;
123 int cts;
124 int dsr;
125 int ri;
126 int dcd;
9dff89cd 127};
1da177e4 128
8f8ecbad
JS
129struct moxaq_str {
130 int inq;
131 int outq;
132};
1da177e4 133
8f8ecbad 134struct moxa_port {
9de6a51f 135 struct tty_port port;
b4173f45 136 struct moxa_board_conf *board;
7bcf97d1
JS
137 void __iomem *tableAddr;
138
1da177e4 139 int type;
1da177e4 140 int cflag;
7bcf97d1 141 unsigned long statusflags;
1da177e4 142
8482bcd5 143 u8 DCDState; /* Protected by the port lock */
7bcf97d1
JS
144 u8 lineCtrl;
145 u8 lowChkFlag;
8f8ecbad 146};
1da177e4 147
74d7d97b
JS
148struct mon_str {
149 int tick;
150 int rxcnt[MAX_PORTS];
151 int txcnt[MAX_PORTS];
152};
153
1da177e4 154/* statusflags */
a808ac0c
AC
155#define TXSTOPPED 1
156#define LOWWAIT 2
157#define EMPTYWAIT 3
1da177e4 158
1da177e4
LT
159#define SERIAL_DO_RESTART
160
1da177e4
LT
161#define WAKEUP_CHARS 256
162
1da177e4 163static int ttymajor = MOXAMAJOR;
74d7d97b
JS
164static struct mon_str moxaLog;
165static unsigned int moxaFuncTout = HZ / 2;
7bcf97d1 166static unsigned int moxaLowWaterChk;
a8f5cda0 167static DEFINE_MUTEX(moxa_openlock);
e8c62103 168static DEFINE_SPINLOCK(moxa_lock);
c6fc826e 169
d353eca4
JS
170static unsigned long baseaddr[MAX_BOARDS];
171static unsigned int type[MAX_BOARDS];
172static unsigned int numports[MAX_BOARDS];
1da177e4
LT
173
174MODULE_AUTHOR("William Chen");
175MODULE_DESCRIPTION("MOXA Intellio Family Multiport Board Device Driver");
176MODULE_LICENSE("GPL");
e6c4ef98
BH
177MODULE_FIRMWARE("c218tunx.cod");
178MODULE_FIRMWARE("cp204unx.cod");
179MODULE_FIRMWARE("c320tunx.cod");
c6fc826e 180
d353eca4
JS
181module_param_array(type, uint, NULL, 0);
182MODULE_PARM_DESC(type, "card type: C218=2, C320=4");
183module_param_array(baseaddr, ulong, NULL, 0);
184MODULE_PARM_DESC(baseaddr, "base address");
185module_param_array(numports, uint, NULL, 0);
186MODULE_PARM_DESC(numports, "numports (ignored for C218)");
c6fc826e 187
1da177e4 188module_param(ttymajor, int, 0);
1da177e4 189
1da177e4
LT
190/*
191 * static functions:
192 */
1da177e4
LT
193static int moxa_open(struct tty_struct *, struct file *);
194static void moxa_close(struct tty_struct *, struct file *);
195static int moxa_write(struct tty_struct *, const unsigned char *, int);
196static int moxa_write_room(struct tty_struct *);
197static void moxa_flush_buffer(struct tty_struct *);
198static int moxa_chars_in_buffer(struct tty_struct *);
606d099c 199static void moxa_set_termios(struct tty_struct *, struct ktermios *);
1da177e4
LT
200static void moxa_stop(struct tty_struct *);
201static void moxa_start(struct tty_struct *);
202static void moxa_hangup(struct tty_struct *);
60b33c13 203static int moxa_tiocmget(struct tty_struct *tty);
20b9d177 204static int moxa_tiocmset(struct tty_struct *tty,
1da177e4
LT
205 unsigned int set, unsigned int clear);
206static void moxa_poll(unsigned long);
db1acaa6 207static void moxa_set_tty_param(struct tty_struct *, struct ktermios *);
f176178b 208static void moxa_shutdown(struct tty_port *);
31f35939 209static int moxa_carrier_raised(struct tty_port *);
f176178b 210static void moxa_dtr_rts(struct tty_port *, int);
1da177e4
LT
211/*
212 * moxa board interface functions:
213 */
b4173f45
JS
214static void MoxaPortEnable(struct moxa_port *);
215static void MoxaPortDisable(struct moxa_port *);
216static int MoxaPortSetTermio(struct moxa_port *, struct ktermios *, speed_t);
217static int MoxaPortGetLineOut(struct moxa_port *, int *, int *);
218static void MoxaPortLineCtrl(struct moxa_port *, int, int);
219static void MoxaPortFlowCtrl(struct moxa_port *, int, int, int, int, int);
220static int MoxaPortLineStatus(struct moxa_port *);
b4173f45 221static void MoxaPortFlushData(struct moxa_port *, int);
d450b5a0 222static int MoxaPortWriteData(struct tty_struct *, const unsigned char *, int);
7bcf97d1 223static int MoxaPortReadData(struct moxa_port *);
b4173f45
JS
224static int MoxaPortTxQueue(struct moxa_port *);
225static int MoxaPortRxQueue(struct moxa_port *);
226static int MoxaPortTxFree(struct moxa_port *);
227static void MoxaPortTxDisable(struct moxa_port *);
228static void MoxaPortTxEnable(struct moxa_port *);
8f8ecbad
JS
229static int moxa_get_serial_info(struct moxa_port *, struct serial_struct __user *);
230static int moxa_set_serial_info(struct moxa_port *, struct serial_struct __user *);
b4173f45 231static void MoxaSetFifo(struct moxa_port *port, int enable);
1da177e4 232
74d7d97b
JS
233/*
234 * I/O functions
235 */
236
a808ac0c
AC
237static DEFINE_SPINLOCK(moxafunc_lock);
238
74d7d97b
JS
239static void moxa_wait_finish(void __iomem *ofsAddr)
240{
241 unsigned long end = jiffies + moxaFuncTout;
242
243 while (readw(ofsAddr + FuncCode) != 0)
244 if (time_after(jiffies, end))
245 return;
5a3c6b25
MZ
246 if (readw(ofsAddr + FuncCode) != 0)
247 printk_ratelimited(KERN_WARNING "moxa function expired\n");
74d7d97b
JS
248}
249
eaa95a8d 250static void moxafunc(void __iomem *ofsAddr, u16 cmd, u16 arg)
74d7d97b 251{
f5c5a36d
AC
252 unsigned long flags;
253 spin_lock_irqsave(&moxafunc_lock, flags);
74d7d97b
JS
254 writew(arg, ofsAddr + FuncArg);
255 writew(cmd, ofsAddr + FuncCode);
256 moxa_wait_finish(ofsAddr);
f5c5a36d
AC
257 spin_unlock_irqrestore(&moxafunc_lock, flags);
258}
259
260static int moxafuncret(void __iomem *ofsAddr, u16 cmd, u16 arg)
261{
262 unsigned long flags;
263 u16 ret;
264 spin_lock_irqsave(&moxafunc_lock, flags);
265 writew(arg, ofsAddr + FuncArg);
266 writew(cmd, ofsAddr + FuncCode);
267 moxa_wait_finish(ofsAddr);
268 ret = readw(ofsAddr + FuncArg);
269 spin_unlock_irqrestore(&moxafunc_lock, flags);
270 return ret;
74d7d97b
JS
271}
272
7bcf97d1
JS
273static void moxa_low_water_check(void __iomem *ofsAddr)
274{
275 u16 rptr, wptr, mask, len;
276
277 if (readb(ofsAddr + FlagStat) & Xoff_state) {
278 rptr = readw(ofsAddr + RXrptr);
279 wptr = readw(ofsAddr + RXwptr);
280 mask = readw(ofsAddr + RX_mask);
281 len = (wptr - rptr) & mask;
282 if (len <= Low_water)
283 moxafunc(ofsAddr, FC_SendXon, 0);
284 }
285}
286
74d7d97b
JS
287/*
288 * TTY operations
289 */
290
6caa76b7 291static int moxa_ioctl(struct tty_struct *tty,
74d7d97b
JS
292 unsigned int cmd, unsigned long arg)
293{
294 struct moxa_port *ch = tty->driver_data;
295 void __user *argp = (void __user *)arg;
a8f5cda0 296 int status, ret = 0;
74d7d97b
JS
297
298 if (tty->index == MAX_PORTS) {
299 if (cmd != MOXA_GETDATACOUNT && cmd != MOXA_GET_IOQUEUE &&
300 cmd != MOXA_GETMSTATUS)
301 return -EINVAL;
302 } else if (!ch)
303 return -ENODEV;
304
305 switch (cmd) {
306 case MOXA_GETDATACOUNT:
307 moxaLog.tick = jiffies;
a8f5cda0
JS
308 if (copy_to_user(argp, &moxaLog, sizeof(moxaLog)))
309 ret = -EFAULT;
310 break;
74d7d97b
JS
311 case MOXA_FLUSH_QUEUE:
312 MoxaPortFlushData(ch, arg);
a8f5cda0 313 break;
74d7d97b
JS
314 case MOXA_GET_IOQUEUE: {
315 struct moxaq_str __user *argm = argp;
316 struct moxaq_str tmp;
317 struct moxa_port *p;
318 unsigned int i, j;
319
320 for (i = 0; i < MAX_BOARDS; i++) {
321 p = moxa_boards[i].ports;
322 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
323 memset(&tmp, 0, sizeof(tmp));
e8c62103 324 spin_lock_bh(&moxa_lock);
74d7d97b
JS
325 if (moxa_boards[i].ready) {
326 tmp.inq = MoxaPortRxQueue(p);
327 tmp.outq = MoxaPortTxQueue(p);
328 }
e8c62103
AC
329 spin_unlock_bh(&moxa_lock);
330 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS
331 return -EFAULT;
332 }
333 }
a8f5cda0 334 break;
74d7d97b
JS
335 } case MOXA_GET_OQUEUE:
336 status = MoxaPortTxQueue(ch);
a8f5cda0
JS
337 ret = put_user(status, (unsigned long __user *)argp);
338 break;
74d7d97b
JS
339 case MOXA_GET_IQUEUE:
340 status = MoxaPortRxQueue(ch);
a8f5cda0
JS
341 ret = put_user(status, (unsigned long __user *)argp);
342 break;
74d7d97b
JS
343 case MOXA_GETMSTATUS: {
344 struct mxser_mstatus __user *argm = argp;
345 struct mxser_mstatus tmp;
346 struct moxa_port *p;
347 unsigned int i, j;
348
349 for (i = 0; i < MAX_BOARDS; i++) {
350 p = moxa_boards[i].ports;
351 for (j = 0; j < MAX_PORTS_PER_BOARD; j++, p++, argm++) {
d450b5a0 352 struct tty_struct *ttyp;
74d7d97b 353 memset(&tmp, 0, sizeof(tmp));
e8c62103
AC
354 spin_lock_bh(&moxa_lock);
355 if (!moxa_boards[i].ready) {
356 spin_unlock_bh(&moxa_lock);
74d7d97b 357 goto copy;
e8c62103 358 }
74d7d97b
JS
359
360 status = MoxaPortLineStatus(p);
e8c62103
AC
361 spin_unlock_bh(&moxa_lock);
362
74d7d97b
JS
363 if (status & 1)
364 tmp.cts = 1;
365 if (status & 2)
366 tmp.dsr = 1;
367 if (status & 4)
368 tmp.dcd = 1;
369
d450b5a0
AC
370 ttyp = tty_port_tty_get(&p->port);
371 if (!ttyp || !ttyp->termios)
74d7d97b
JS
372 tmp.cflag = p->cflag;
373 else
d450b5a0 374 tmp.cflag = ttyp->termios->c_cflag;
df43daaa 375 tty_kref_put(ttyp);
74d7d97b 376copy:
e8c62103 377 if (copy_to_user(argm, &tmp, sizeof(tmp)))
74d7d97b
JS
378 return -EFAULT;
379 }
380 }
a8f5cda0 381 break;
74d7d97b
JS
382 }
383 case TIOCGSERIAL:
a808ac0c 384 mutex_lock(&ch->port.mutex);
a8f5cda0 385 ret = moxa_get_serial_info(ch, argp);
a808ac0c 386 mutex_unlock(&ch->port.mutex);
a8f5cda0 387 break;
74d7d97b 388 case TIOCSSERIAL:
a808ac0c 389 mutex_lock(&ch->port.mutex);
a8f5cda0 390 ret = moxa_set_serial_info(ch, argp);
a808ac0c 391 mutex_unlock(&ch->port.mutex);
a8f5cda0
JS
392 break;
393 default:
394 ret = -ENOIOCTLCMD;
74d7d97b 395 }
a8f5cda0 396 return ret;
74d7d97b
JS
397}
398
9e98966c 399static int moxa_break_ctl(struct tty_struct *tty, int state)
74d7d97b
JS
400{
401 struct moxa_port *port = tty->driver_data;
402
403 moxafunc(port->tableAddr, state ? FC_SendBreak : FC_StopBreak,
404 Magic_code);
9e98966c 405 return 0;
74d7d97b
JS
406}
407
b68e31d0 408static const struct tty_operations moxa_ops = {
1da177e4
LT
409 .open = moxa_open,
410 .close = moxa_close,
411 .write = moxa_write,
412 .write_room = moxa_write_room,
413 .flush_buffer = moxa_flush_buffer,
414 .chars_in_buffer = moxa_chars_in_buffer,
1da177e4 415 .ioctl = moxa_ioctl,
1da177e4
LT
416 .set_termios = moxa_set_termios,
417 .stop = moxa_stop,
418 .start = moxa_start,
419 .hangup = moxa_hangup,
74d7d97b 420 .break_ctl = moxa_break_ctl,
1da177e4
LT
421 .tiocmget = moxa_tiocmget,
422 .tiocmset = moxa_tiocmset,
423};
424
31f35939
AC
425static const struct tty_port_operations moxa_port_ops = {
426 .carrier_raised = moxa_carrier_raised,
f176178b
AC
427 .dtr_rts = moxa_dtr_rts,
428 .shutdown = moxa_shutdown,
31f35939
AC
429};
430
aa7e5221 431static struct tty_driver *moxaDriver;
aa7e5221 432static DEFINE_TIMER(moxaTimer, moxa_poll, 0, 0);
33f0f88f 433
74d7d97b
JS
434/*
435 * HW init
436 */
437
03718234
JS
438static int moxa_check_fw_model(struct moxa_board_conf *brd, u8 model)
439{
440 switch (brd->boardType) {
441 case MOXA_BOARD_C218_ISA:
442 case MOXA_BOARD_C218_PCI:
443 if (model != 1)
444 goto err;
445 break;
446 case MOXA_BOARD_CP204J:
447 if (model != 3)
448 goto err;
449 break;
450 default:
451 if (model != 2)
452 goto err;
453 break;
454 }
455 return 0;
456err:
457 return -EINVAL;
458}
459
460static int moxa_check_fw(const void *ptr)
461{
462 const __le16 *lptr = ptr;
463
464 if (*lptr != cpu_to_le16(0x7980))
465 return -EINVAL;
466
467 return 0;
468}
469
470static int moxa_load_bios(struct moxa_board_conf *brd, const u8 *buf,
471 size_t len)
472{
473 void __iomem *baseAddr = brd->basemem;
474 u16 tmp;
475
476 writeb(HW_reset, baseAddr + Control_reg); /* reset */
477 msleep(10);
478 memset_io(baseAddr, 0, 4096);
479 memcpy_toio(baseAddr, buf, len); /* download BIOS */
480 writeb(0, baseAddr + Control_reg); /* restart */
481
482 msleep(2000);
483
484 switch (brd->boardType) {
485 case MOXA_BOARD_C218_ISA:
486 case MOXA_BOARD_C218_PCI:
487 tmp = readw(baseAddr + C218_key);
488 if (tmp != C218_KeyCode)
489 goto err;
490 break;
491 case MOXA_BOARD_CP204J:
492 tmp = readw(baseAddr + C218_key);
493 if (tmp != CP204J_KeyCode)
494 goto err;
495 break;
496 default:
497 tmp = readw(baseAddr + C320_key);
498 if (tmp != C320_KeyCode)
499 goto err;
500 tmp = readw(baseAddr + C320_status);
501 if (tmp != STS_init) {
eaa95a8d 502 printk(KERN_ERR "MOXA: bios upload failed -- CPU/Basic "
03718234
JS
503 "module not found\n");
504 return -EIO;
505 }
506 break;
507 }
508
509 return 0;
510err:
eaa95a8d 511 printk(KERN_ERR "MOXA: bios upload failed -- board not found\n");
03718234
JS
512 return -EIO;
513}
514
515static int moxa_load_320b(struct moxa_board_conf *brd, const u8 *ptr,
516 size_t len)
517{
518 void __iomem *baseAddr = brd->basemem;
519
520 if (len < 7168) {
eaa95a8d 521 printk(KERN_ERR "MOXA: invalid 320 bios -- too short\n");
03718234
JS
522 return -EINVAL;
523 }
524
525 writew(len - 7168 - 2, baseAddr + C320bapi_len);
526 writeb(1, baseAddr + Control_reg); /* Select Page 1 */
527 memcpy_toio(baseAddr + DynPage_addr, ptr, 7168);
528 writeb(2, baseAddr + Control_reg); /* Select Page 2 */
529 memcpy_toio(baseAddr + DynPage_addr, ptr + 7168, len - 7168);
530
531 return 0;
532}
533
5292bcd3 534static int moxa_real_load_code(struct moxa_board_conf *brd, const void *ptr,
03718234
JS
535 size_t len)
536{
537 void __iomem *baseAddr = brd->basemem;
b46f69cd 538 const __le16 *uptr = ptr;
03718234 539 size_t wlen, len2, j;
5292bcd3 540 unsigned long key, loadbuf, loadlen, checksum, checksum_ok;
08d01c79 541 unsigned int i, retry;
03718234
JS
542 u16 usum, keycode;
543
5292bcd3
JS
544 keycode = (brd->boardType == MOXA_BOARD_CP204J) ? CP204J_KeyCode :
545 C218_KeyCode;
03718234 546
5292bcd3
JS
547 switch (brd->boardType) {
548 case MOXA_BOARD_CP204J:
549 case MOXA_BOARD_C218_ISA:
550 case MOXA_BOARD_C218_PCI:
551 key = C218_key;
552 loadbuf = C218_LoadBuf;
553 loadlen = C218DLoad_len;
554 checksum = C218check_sum;
555 checksum_ok = C218chksum_ok;
556 break;
557 default:
558 key = C320_key;
559 keycode = C320_KeyCode;
560 loadbuf = C320_LoadBuf;
561 loadlen = C320DLoad_len;
562 checksum = C320check_sum;
563 checksum_ok = C320chksum_ok;
564 break;
03718234 565 }
03718234
JS
566
567 usum = 0;
568 wlen = len >> 1;
569 for (i = 0; i < wlen; i++)
570 usum += le16_to_cpu(uptr[i]);
571 retry = 0;
572 do {
573 wlen = len >> 1;
574 j = 0;
575 while (wlen) {
576 len2 = (wlen > 2048) ? 2048 : wlen;
577 wlen -= len2;
5292bcd3 578 memcpy_toio(baseAddr + loadbuf, ptr + j, len2 << 1);
03718234 579 j += len2 << 1;
5292bcd3
JS
580
581 writew(len2, baseAddr + loadlen);
582 writew(0, baseAddr + key);
583 for (i = 0; i < 100; i++) {
584 if (readw(baseAddr + key) == keycode)
03718234
JS
585 break;
586 msleep(10);
587 }
5292bcd3 588 if (readw(baseAddr + key) != keycode)
03718234
JS
589 return -EIO;
590 }
5292bcd3
JS
591 writew(0, baseAddr + loadlen);
592 writew(usum, baseAddr + checksum);
593 writew(0, baseAddr + key);
594 for (i = 0; i < 100; i++) {
595 if (readw(baseAddr + key) == keycode)
03718234
JS
596 break;
597 msleep(10);
598 }
599 retry++;
5292bcd3
JS
600 } while ((readb(baseAddr + checksum_ok) != 1) && (retry < 3));
601 if (readb(baseAddr + checksum_ok) != 1)
03718234
JS
602 return -EIO;
603
5292bcd3 604 writew(0, baseAddr + key);
03718234
JS
605 for (i = 0; i < 600; i++) {
606 if (readw(baseAddr + Magic_no) == Magic_code)
607 break;
608 msleep(10);
609 }
610 if (readw(baseAddr + Magic_no) != Magic_code)
611 return -EIO;
612
08d01c79 613 if (MOXA_IS_320(brd)) {
5292bcd3
JS
614 if (brd->busType == MOXA_BUS_TYPE_PCI) { /* ASIC board */
615 writew(0x3800, baseAddr + TMS320_PORT1);
616 writew(0x3900, baseAddr + TMS320_PORT2);
617 writew(28499, baseAddr + TMS320_CLOCK);
618 } else {
619 writew(0x3200, baseAddr + TMS320_PORT1);
620 writew(0x3400, baseAddr + TMS320_PORT2);
621 writew(19999, baseAddr + TMS320_CLOCK);
622 }
03718234
JS
623 }
624 writew(1, baseAddr + Disable_IRQ);
625 writew(0, baseAddr + Magic_no);
626 for (i = 0; i < 500; i++) {
627 if (readw(baseAddr + Magic_no) == Magic_code)
628 break;
629 msleep(10);
630 }
631 if (readw(baseAddr + Magic_no) != Magic_code)
632 return -EIO;
633
08d01c79 634 if (MOXA_IS_320(brd)) {
5292bcd3
JS
635 j = readw(baseAddr + Module_cnt);
636 if (j <= 0)
637 return -EIO;
638 brd->numPorts = j * 8;
639 writew(j, baseAddr + Module_no);
640 writew(0, baseAddr + Magic_no);
641 for (i = 0; i < 600; i++) {
642 if (readw(baseAddr + Magic_no) == Magic_code)
643 break;
644 msleep(10);
645 }
646 if (readw(baseAddr + Magic_no) != Magic_code)
647 return -EIO;
03718234 648 }
03718234
JS
649 brd->intNdx = baseAddr + IRQindex;
650 brd->intPend = baseAddr + IRQpending;
651 brd->intTable = baseAddr + IRQtable;
652
653 return 0;
654}
655
656static int moxa_load_code(struct moxa_board_conf *brd, const void *ptr,
657 size_t len)
658{
659 void __iomem *ofsAddr, *baseAddr = brd->basemem;
660 struct moxa_port *port;
661 int retval, i;
662
663 if (len % 2) {
eaa95a8d 664 printk(KERN_ERR "MOXA: bios length is not even\n");
03718234
JS
665 return -EINVAL;
666 }
667
5292bcd3
JS
668 retval = moxa_real_load_code(brd, ptr, len); /* may change numPorts */
669 if (retval)
670 return retval;
671
03718234
JS
672 switch (brd->boardType) {
673 case MOXA_BOARD_C218_ISA:
674 case MOXA_BOARD_C218_PCI:
675 case MOXA_BOARD_CP204J:
03718234
JS
676 port = brd->ports;
677 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 678 port->board = brd;
03718234
JS
679 port->DCDState = 0;
680 port->tableAddr = baseAddr + Extern_table +
681 Extern_size * i;
682 ofsAddr = port->tableAddr;
683 writew(C218rx_mask, ofsAddr + RX_mask);
684 writew(C218tx_mask, ofsAddr + TX_mask);
685 writew(C218rx_spage + i * C218buf_pageno, ofsAddr + Page_rxb);
686 writew(readw(ofsAddr + Page_rxb) + C218rx_pageno, ofsAddr + EndPage_rxb);
687
688 writew(C218tx_spage + i * C218buf_pageno, ofsAddr + Page_txb);
689 writew(readw(ofsAddr + Page_txb) + C218tx_pageno, ofsAddr + EndPage_txb);
690
691 }
692 break;
693 default:
03718234
JS
694 port = brd->ports;
695 for (i = 0; i < brd->numPorts; i++, port++) {
b4173f45 696 port->board = brd;
03718234
JS
697 port->DCDState = 0;
698 port->tableAddr = baseAddr + Extern_table +
699 Extern_size * i;
700 ofsAddr = port->tableAddr;
701 switch (brd->numPorts) {
702 case 8:
703 writew(C320p8rx_mask, ofsAddr + RX_mask);
704 writew(C320p8tx_mask, ofsAddr + TX_mask);
705 writew(C320p8rx_spage + i * C320p8buf_pgno, ofsAddr + Page_rxb);
706 writew(readw(ofsAddr + Page_rxb) + C320p8rx_pgno, ofsAddr + EndPage_rxb);
707 writew(C320p8tx_spage + i * C320p8buf_pgno, ofsAddr + Page_txb);
708 writew(readw(ofsAddr + Page_txb) + C320p8tx_pgno, ofsAddr + EndPage_txb);
709
710 break;
711 case 16:
712 writew(C320p16rx_mask, ofsAddr + RX_mask);
713 writew(C320p16tx_mask, ofsAddr + TX_mask);
714 writew(C320p16rx_spage + i * C320p16buf_pgno, ofsAddr + Page_rxb);
715 writew(readw(ofsAddr + Page_rxb) + C320p16rx_pgno, ofsAddr + EndPage_rxb);
716 writew(C320p16tx_spage + i * C320p16buf_pgno, ofsAddr + Page_txb);
717 writew(readw(ofsAddr + Page_txb) + C320p16tx_pgno, ofsAddr + EndPage_txb);
718 break;
719
720 case 24:
721 writew(C320p24rx_mask, ofsAddr + RX_mask);
722 writew(C320p24tx_mask, ofsAddr + TX_mask);
723 writew(C320p24rx_spage + i * C320p24buf_pgno, ofsAddr + Page_rxb);
724 writew(readw(ofsAddr + Page_rxb) + C320p24rx_pgno, ofsAddr + EndPage_rxb);
725 writew(C320p24tx_spage + i * C320p24buf_pgno, ofsAddr + Page_txb);
726 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
727 break;
728 case 32:
729 writew(C320p32rx_mask, ofsAddr + RX_mask);
730 writew(C320p32tx_mask, ofsAddr + TX_mask);
731 writew(C320p32tx_ofs, ofsAddr + Ofs_txb);
732 writew(C320p32rx_spage + i * C320p32buf_pgno, ofsAddr + Page_rxb);
733 writew(readb(ofsAddr + Page_rxb), ofsAddr + EndPage_rxb);
734 writew(C320p32tx_spage + i * C320p32buf_pgno, ofsAddr + Page_txb);
735 writew(readw(ofsAddr + Page_txb), ofsAddr + EndPage_txb);
736 break;
737 }
738 }
739 break;
740 }
03718234
JS
741 return 0;
742}
743
744static int moxa_load_fw(struct moxa_board_conf *brd, const struct firmware *fw)
745{
2bca76e8 746 const void *ptr = fw->data;
03718234
JS
747 char rsn[64];
748 u16 lens[5];
749 size_t len;
750 unsigned int a, lenp, lencnt;
751 int ret = -EINVAL;
752 struct {
753 __le32 magic; /* 0x34303430 */
754 u8 reserved1[2];
755 u8 type; /* UNIX = 3 */
756 u8 model; /* C218T=1, C320T=2, CP204=3 */
757 u8 reserved2[8];
758 __le16 len[5];
2bca76e8 759 } const *hdr = ptr;
03718234
JS
760
761 BUILD_BUG_ON(ARRAY_SIZE(hdr->len) != ARRAY_SIZE(lens));
762
763 if (fw->size < MOXA_FW_HDRLEN) {
764 strcpy(rsn, "too short (even header won't fit)");
765 goto err;
766 }
767 if (hdr->magic != cpu_to_le32(0x30343034)) {
768 sprintf(rsn, "bad magic: %.8x", le32_to_cpu(hdr->magic));
769 goto err;
770 }
771 if (hdr->type != 3) {
772 sprintf(rsn, "not for linux, type is %u", hdr->type);
773 goto err;
774 }
775 if (moxa_check_fw_model(brd, hdr->model)) {
776 sprintf(rsn, "not for this card, model is %u", hdr->model);
777 goto err;
778 }
779
780 len = MOXA_FW_HDRLEN;
781 lencnt = hdr->model == 2 ? 5 : 3;
782 for (a = 0; a < ARRAY_SIZE(lens); a++) {
783 lens[a] = le16_to_cpu(hdr->len[a]);
784 if (lens[a] && len + lens[a] <= fw->size &&
785 moxa_check_fw(&fw->data[len]))
eaa95a8d 786 printk(KERN_WARNING "MOXA firmware: unexpected input "
03718234
JS
787 "at offset %u, but going on\n", (u32)len);
788 if (!lens[a] && a < lencnt) {
789 sprintf(rsn, "too few entries in fw file");
790 goto err;
791 }
792 len += lens[a];
793 }
794
795 if (len != fw->size) {
796 sprintf(rsn, "bad length: %u (should be %u)", (u32)fw->size,
797 (u32)len);
798 goto err;
799 }
800
801 ptr += MOXA_FW_HDRLEN;
802 lenp = 0; /* bios */
803
804 strcpy(rsn, "read above");
805
806 ret = moxa_load_bios(brd, ptr, lens[lenp]);
807 if (ret)
808 goto err;
809
810 /* we skip the tty section (lens[1]), since we don't need it */
811 ptr += lens[lenp] + lens[lenp + 1];
812 lenp += 2; /* comm */
813
814 if (hdr->model == 2) {
815 ret = moxa_load_320b(brd, ptr, lens[lenp]);
816 if (ret)
817 goto err;
818 /* skip another tty */
819 ptr += lens[lenp] + lens[lenp + 1];
820 lenp += 2;
821 }
822
823 ret = moxa_load_code(brd, ptr, lens[lenp]);
824 if (ret)
825 goto err;
826
827 return 0;
828err:
829 printk(KERN_ERR "firmware failed to load, reason: %s\n", rsn);
830 return ret;
831}
832
833static int moxa_init_board(struct moxa_board_conf *brd, struct device *dev)
834{
835 const struct firmware *fw;
836 const char *file;
810ab09b
JS
837 struct moxa_port *p;
838 unsigned int i;
03718234
JS
839 int ret;
840
810ab09b
JS
841 brd->ports = kcalloc(MAX_PORTS_PER_BOARD, sizeof(*brd->ports),
842 GFP_KERNEL);
843 if (brd->ports == NULL) {
844 printk(KERN_ERR "cannot allocate memory for ports\n");
845 ret = -ENOMEM;
846 goto err;
847 }
848
849 for (i = 0, p = brd->ports; i < MAX_PORTS_PER_BOARD; i++, p++) {
44b7d1b3 850 tty_port_init(&p->port);
31f35939 851 p->port.ops = &moxa_port_ops;
810ab09b 852 p->type = PORT_16550A;
810ab09b 853 p->cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
810ab09b
JS
854 }
855
03718234
JS
856 switch (brd->boardType) {
857 case MOXA_BOARD_C218_ISA:
858 case MOXA_BOARD_C218_PCI:
859 file = "c218tunx.cod";
860 break;
861 case MOXA_BOARD_CP204J:
862 file = "cp204unx.cod";
863 break;
864 default:
865 file = "c320tunx.cod";
866 break;
867 }
868
869 ret = request_firmware(&fw, file, dev);
870 if (ret) {
ec09cd56
JS
871 printk(KERN_ERR "MOXA: request_firmware failed. Make sure "
872 "you've placed '%s' file into your firmware "
873 "loader directory (e.g. /lib/firmware)\n",
874 file);
810ab09b 875 goto err_free;
03718234
JS
876 }
877
878 ret = moxa_load_fw(brd, fw);
879
880 release_firmware(fw);
810ab09b
JS
881
882 if (ret)
883 goto err_free;
884
2a541341 885 spin_lock_bh(&moxa_lock);
810ab09b 886 brd->ready = 1;
0bcc4caa
JS
887 if (!timer_pending(&moxaTimer))
888 mod_timer(&moxaTimer, jiffies + HZ / 50);
2a541341 889 spin_unlock_bh(&moxa_lock);
0bcc4caa 890
810ab09b
JS
891 return 0;
892err_free:
893 kfree(brd->ports);
894err:
03718234
JS
895 return ret;
896}
897
810ab09b
JS
898static void moxa_board_deinit(struct moxa_board_conf *brd)
899{
a8f5cda0
JS
900 unsigned int a, opened;
901
902 mutex_lock(&moxa_openlock);
7bcf97d1 903 spin_lock_bh(&moxa_lock);
810ab09b 904 brd->ready = 0;
7bcf97d1 905 spin_unlock_bh(&moxa_lock);
a8f5cda0
JS
906
907 /* pci hot-un-plug support */
908 for (a = 0; a < brd->numPorts; a++)
d450b5a0
AC
909 if (brd->ports[a].port.flags & ASYNC_INITIALIZED) {
910 struct tty_struct *tty = tty_port_tty_get(
911 &brd->ports[a].port);
912 if (tty) {
913 tty_hangup(tty);
914 tty_kref_put(tty);
915 }
916 }
a8f5cda0
JS
917 while (1) {
918 opened = 0;
919 for (a = 0; a < brd->numPorts; a++)
9de6a51f 920 if (brd->ports[a].port.flags & ASYNC_INITIALIZED)
a8f5cda0
JS
921 opened++;
922 mutex_unlock(&moxa_openlock);
923 if (!opened)
924 break;
925 msleep(50);
926 mutex_lock(&moxa_openlock);
927 }
928
810ab09b
JS
929 iounmap(brd->basemem);
930 brd->basemem = NULL;
931 kfree(brd->ports);
932}
933
1da177e4 934#ifdef CONFIG_PCI
9cde5bf0
JS
935static int __devinit moxa_pci_probe(struct pci_dev *pdev,
936 const struct pci_device_id *ent)
1da177e4 937{
9cde5bf0
JS
938 struct moxa_board_conf *board;
939 unsigned int i;
940 int board_type = ent->driver_data;
941 int retval;
942
943 retval = pci_enable_device(pdev);
7aeb95da
JS
944 if (retval) {
945 dev_err(&pdev->dev, "can't enable pci device\n");
9cde5bf0 946 goto err;
7aeb95da 947 }
9cde5bf0
JS
948
949 for (i = 0; i < MAX_BOARDS; i++)
950 if (moxa_boards[i].basemem == NULL)
951 break;
952
953 retval = -ENODEV;
954 if (i >= MAX_BOARDS) {
7aeb95da 955 dev_warn(&pdev->dev, "more than %u MOXA Intellio family boards "
9cde5bf0
JS
956 "found. Board is ignored.\n", MAX_BOARDS);
957 goto err;
958 }
959
960 board = &moxa_boards[i];
e46a5e3f
JS
961
962 retval = pci_request_region(pdev, 2, "moxa-base");
963 if (retval) {
964 dev_err(&pdev->dev, "can't request pci region 2\n");
965 goto err;
966 }
967
24cb2335 968 board->basemem = ioremap_nocache(pci_resource_start(pdev, 2), 0x4000);
7aeb95da
JS
969 if (board->basemem == NULL) {
970 dev_err(&pdev->dev, "can't remap io space 2\n");
e46a5e3f 971 goto err_reg;
7aeb95da 972 }
9cde5bf0 973
1da177e4
LT
974 board->boardType = board_type;
975 switch (board_type) {
976 case MOXA_BOARD_C218_ISA:
977 case MOXA_BOARD_C218_PCI:
978 board->numPorts = 8;
979 break;
980
981 case MOXA_BOARD_CP204J:
982 board->numPorts = 4;
983 break;
984 default:
985 board->numPorts = 0;
986 break;
987 }
988 board->busType = MOXA_BUS_TYPE_PCI;
a784bf7c 989
03718234
JS
990 retval = moxa_init_board(board, &pdev->dev);
991 if (retval)
992 goto err_base;
993
9cde5bf0 994 pci_set_drvdata(pdev, board);
1da177e4 995
bb9f910a
JS
996 dev_info(&pdev->dev, "board '%s' ready (%u ports, firmware loaded)\n",
997 moxa_brdname[board_type - 1], board->numPorts);
998
eaa95a8d 999 return 0;
03718234
JS
1000err_base:
1001 iounmap(board->basemem);
1002 board->basemem = NULL;
e46a5e3f
JS
1003err_reg:
1004 pci_release_region(pdev, 2);
9cde5bf0
JS
1005err:
1006 return retval;
1007}
1008
1009static void __devexit moxa_pci_remove(struct pci_dev *pdev)
1010{
1011 struct moxa_board_conf *brd = pci_get_drvdata(pdev);
1012
810ab09b
JS
1013 moxa_board_deinit(brd);
1014
e46a5e3f 1015 pci_release_region(pdev, 2);
1da177e4 1016}
a784bf7c
JS
1017
1018static struct pci_driver moxa_pci_driver = {
1019 .name = "moxa",
1020 .id_table = moxa_pcibrds,
1021 .probe = moxa_pci_probe,
1022 .remove = __devexit_p(moxa_pci_remove)
1023};
1da177e4
LT
1024#endif /* CONFIG_PCI */
1025
1026static int __init moxa_init(void)
1027{
810ab09b 1028 unsigned int isabrds = 0;
d353eca4 1029 int retval = 0;
c6fc826e
RM
1030 struct moxa_board_conf *brd = moxa_boards;
1031 unsigned int i;
1da177e4 1032
7aeb95da
JS
1033 printk(KERN_INFO "MOXA Intellio family driver version %s\n",
1034 MOXA_VERSION);
1da177e4
LT
1035 moxaDriver = alloc_tty_driver(MAX_PORTS + 1);
1036 if (!moxaDriver)
1037 return -ENOMEM;
1038
1da177e4 1039 moxaDriver->owner = THIS_MODULE;
9b4e3b13 1040 moxaDriver->name = "ttyMX";
1da177e4
LT
1041 moxaDriver->major = ttymajor;
1042 moxaDriver->minor_start = 0;
1043 moxaDriver->type = TTY_DRIVER_TYPE_SERIAL;
1044 moxaDriver->subtype = SERIAL_TYPE_NORMAL;
1045 moxaDriver->init_termios = tty_std_termios;
1da177e4 1046 moxaDriver->init_termios.c_cflag = B9600 | CS8 | CREAD | CLOCAL | HUPCL;
606d099c
AC
1047 moxaDriver->init_termios.c_ispeed = 9600;
1048 moxaDriver->init_termios.c_ospeed = 9600;
1da177e4
LT
1049 moxaDriver->flags = TTY_DRIVER_REAL_RAW;
1050 tty_set_operations(moxaDriver, &moxa_ops);
1051
1da177e4 1052 if (tty_register_driver(moxaDriver)) {
eaa95a8d 1053 printk(KERN_ERR "can't register MOXA Smartio tty driver!\n");
1da177e4
LT
1054 put_tty_driver(moxaDriver);
1055 return -1;
1056 }
1da177e4 1057
d353eca4 1058 /* Find the boards defined from module args. */
c6fc826e 1059
1da177e4 1060 for (i = 0; i < MAX_BOARDS; i++) {
d353eca4
JS
1061 if (!baseaddr[i])
1062 break;
1063 if (type[i] == MOXA_BOARD_C218_ISA ||
1064 type[i] == MOXA_BOARD_C320_ISA) {
7aeb95da 1065 pr_debug("Moxa board %2d: %s board(baseAddr=%lx)\n",
d353eca4
JS
1066 isabrds + 1, moxa_brdname[type[i] - 1],
1067 baseaddr[i]);
1068 brd->boardType = type[i];
1069 brd->numPorts = type[i] == MOXA_BOARD_C218_ISA ? 8 :
1070 numports[i];
1071 brd->busType = MOXA_BUS_TYPE_ISA;
24cb2335 1072 brd->basemem = ioremap_nocache(baseaddr[i], 0x4000);
d353eca4 1073 if (!brd->basemem) {
eaa95a8d 1074 printk(KERN_ERR "MOXA: can't remap %lx\n",
d353eca4 1075 baseaddr[i]);
1da177e4
LT
1076 continue;
1077 }
03718234
JS
1078 if (moxa_init_board(brd, NULL)) {
1079 iounmap(brd->basemem);
1080 brd->basemem = NULL;
1081 continue;
1082 }
d353eca4 1083
bb9f910a
JS
1084 printk(KERN_INFO "MOXA isa board found at 0x%.8lu and "
1085 "ready (%u ports, firmware loaded)\n",
1086 baseaddr[i], brd->numPorts);
1087
d353eca4
JS
1088 brd++;
1089 isabrds++;
1da177e4
LT
1090 }
1091 }
a784bf7c 1092
1da177e4 1093#ifdef CONFIG_PCI
a784bf7c
JS
1094 retval = pci_register_driver(&moxa_pci_driver);
1095 if (retval) {
eaa95a8d 1096 printk(KERN_ERR "Can't register MOXA pci driver!\n");
d353eca4 1097 if (isabrds)
a784bf7c 1098 retval = 0;
1da177e4
LT
1099 }
1100#endif
a784bf7c 1101
a784bf7c 1102 return retval;
1da177e4
LT
1103}
1104
1105static void __exit moxa_exit(void)
1106{
eaa95a8d 1107 unsigned int i;
1da177e4 1108
9cde5bf0 1109#ifdef CONFIG_PCI
a784bf7c 1110 pci_unregister_driver(&moxa_pci_driver);
9cde5bf0 1111#endif
a784bf7c 1112
810ab09b
JS
1113 for (i = 0; i < MAX_BOARDS; i++) /* ISA boards */
1114 if (moxa_boards[i].ready)
1115 moxa_board_deinit(&moxa_boards[i]);
2a541341
JS
1116
1117 del_timer_sync(&moxaTimer);
1118
1119 if (tty_unregister_driver(moxaDriver))
1120 printk(KERN_ERR "Couldn't unregister MOXA Intellio family "
1121 "serial driver\n");
1122 put_tty_driver(moxaDriver);
1da177e4
LT
1123}
1124
1125module_init(moxa_init);
1126module_exit(moxa_exit);
1127
f176178b 1128static void moxa_shutdown(struct tty_port *port)
a8f5cda0 1129{
f176178b
AC
1130 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1131 MoxaPortDisable(ch);
a8f5cda0 1132 MoxaPortFlushData(ch, 2);
a8f5cda0
JS
1133}
1134
31f35939
AC
1135static int moxa_carrier_raised(struct tty_port *port)
1136{
1137 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1138 int dcd;
1139
8482bcd5 1140 spin_lock_irq(&port->lock);
31f35939 1141 dcd = ch->DCDState;
8482bcd5 1142 spin_unlock_irq(&port->lock);
31f35939
AC
1143 return dcd;
1144}
1145
f176178b 1146static void moxa_dtr_rts(struct tty_port *port, int onoff)
a8f5cda0 1147{
f176178b
AC
1148 struct moxa_port *ch = container_of(port, struct moxa_port, port);
1149 MoxaPortLineCtrl(ch, onoff, onoff);
a8f5cda0
JS
1150}
1151
f176178b 1152
1da177e4
LT
1153static int moxa_open(struct tty_struct *tty, struct file *filp)
1154{
810ab09b 1155 struct moxa_board_conf *brd;
8f8ecbad 1156 struct moxa_port *ch;
1da177e4 1157 int port;
1da177e4 1158
11324edd 1159 port = tty->index;
1da177e4 1160 if (port == MAX_PORTS) {
74d7d97b 1161 return capable(CAP_SYS_ADMIN) ? 0 : -EPERM;
1da177e4 1162 }
a8f5cda0
JS
1163 if (mutex_lock_interruptible(&moxa_openlock))
1164 return -ERESTARTSYS;
810ab09b 1165 brd = &moxa_boards[port / MAX_PORTS_PER_BOARD];
a8f5cda0
JS
1166 if (!brd->ready) {
1167 mutex_unlock(&moxa_openlock);
810ab09b 1168 return -ENODEV;
a8f5cda0 1169 }
1da177e4 1170
f0e85277
DE
1171 if (port % MAX_PORTS_PER_BOARD >= brd->numPorts) {
1172 mutex_unlock(&moxa_openlock);
1173 return -ENODEV;
1174 }
1175
810ab09b 1176 ch = &brd->ports[port % MAX_PORTS_PER_BOARD];
9de6a51f 1177 ch->port.count++;
1da177e4 1178 tty->driver_data = ch;
d450b5a0 1179 tty_port_tty_set(&ch->port, tty);
f176178b 1180 mutex_lock(&ch->port.mutex);
9de6a51f 1181 if (!(ch->port.flags & ASYNC_INITIALIZED)) {
1da177e4 1182 ch->statusflags = 0;
db1acaa6 1183 moxa_set_tty_param(tty, tty->termios);
b4173f45
JS
1184 MoxaPortLineCtrl(ch, 1, 1);
1185 MoxaPortEnable(ch);
a8f5cda0 1186 MoxaSetFifo(ch, ch->type == PORT_16550A);
9de6a51f 1187 ch->port.flags |= ASYNC_INITIALIZED;
1da177e4 1188 }
f176178b 1189 mutex_unlock(&ch->port.mutex);
a8f5cda0 1190 mutex_unlock(&moxa_openlock);
1da177e4 1191
7c31bdb6 1192 return tty_port_block_til_ready(&ch->port, tty, filp);
1da177e4
LT
1193}
1194
1195static void moxa_close(struct tty_struct *tty, struct file *filp)
1196{
f176178b 1197 struct moxa_port *ch = tty->driver_data;
1da177e4 1198 ch->cflag = tty->termios->c_cflag;
f176178b 1199 tty_port_close(&ch->port, tty, filp);
1da177e4
LT
1200}
1201
1202static int moxa_write(struct tty_struct *tty,
1203 const unsigned char *buf, int count)
1204{
b4173f45 1205 struct moxa_port *ch = tty->driver_data;
0ad7c9af 1206 unsigned long flags;
b4173f45 1207 int len;
1da177e4 1208
1da177e4 1209 if (ch == NULL)
b4173f45 1210 return 0;
33f0f88f 1211
0ad7c9af 1212 spin_lock_irqsave(&moxa_lock, flags);
d450b5a0 1213 len = MoxaPortWriteData(tty, buf, count);
0ad7c9af 1214 spin_unlock_irqrestore(&moxa_lock, flags);
1da177e4 1215
a808ac0c 1216 set_bit(LOWWAIT, &ch->statusflags);
eaa95a8d 1217 return len;
1da177e4
LT
1218}
1219
1220static int moxa_write_room(struct tty_struct *tty)
1221{
8f8ecbad 1222 struct moxa_port *ch;
1da177e4
LT
1223
1224 if (tty->stopped)
eaa95a8d 1225 return 0;
b4173f45 1226 ch = tty->driver_data;
1da177e4 1227 if (ch == NULL)
eaa95a8d 1228 return 0;
b4173f45 1229 return MoxaPortTxFree(ch);
1da177e4
LT
1230}
1231
1232static void moxa_flush_buffer(struct tty_struct *tty)
1233{
b4173f45 1234 struct moxa_port *ch = tty->driver_data;
1da177e4
LT
1235
1236 if (ch == NULL)
1237 return;
b4173f45 1238 MoxaPortFlushData(ch, 1);
1da177e4
LT
1239 tty_wakeup(tty);
1240}
1241
1242static int moxa_chars_in_buffer(struct tty_struct *tty)
1243{
b4173f45 1244 struct moxa_port *ch = tty->driver_data;
1da177e4 1245 int chars;
1da177e4 1246
b4173f45 1247 chars = MoxaPortTxQueue(ch);
f710ebd7 1248 if (chars)
1da177e4
LT
1249 /*
1250 * Make it possible to wakeup anything waiting for output
1251 * in tty_ioctl.c, etc.
1252 */
f710ebd7 1253 set_bit(EMPTYWAIT, &ch->statusflags);
eaa95a8d 1254 return chars;
1da177e4
LT
1255}
1256
60b33c13 1257static int moxa_tiocmget(struct tty_struct *tty)
1da177e4 1258{
8482bcd5 1259 struct moxa_port *ch = tty->driver_data;
1da177e4
LT
1260 int flag = 0, dtr, rts;
1261
b4173f45 1262 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT
1263 if (dtr)
1264 flag |= TIOCM_DTR;
1265 if (rts)
1266 flag |= TIOCM_RTS;
b4173f45 1267 dtr = MoxaPortLineStatus(ch);
1da177e4
LT
1268 if (dtr & 1)
1269 flag |= TIOCM_CTS;
1270 if (dtr & 2)
1271 flag |= TIOCM_DSR;
1272 if (dtr & 4)
1273 flag |= TIOCM_CD;
1274 return flag;
1275}
1276
20b9d177 1277static int moxa_tiocmset(struct tty_struct *tty,
1da177e4
LT
1278 unsigned int set, unsigned int clear)
1279{
a8f5cda0 1280 struct moxa_port *ch;
1da177e4
LT
1281 int dtr, rts;
1282
a8f5cda0
JS
1283 mutex_lock(&moxa_openlock);
1284 ch = tty->driver_data;
1285 if (!ch) {
1286 mutex_unlock(&moxa_openlock);
74d7d97b 1287 return -EINVAL;
a8f5cda0 1288 }
1da177e4 1289
b4173f45 1290 MoxaPortGetLineOut(ch, &dtr, &rts);
1da177e4
LT
1291 if (set & TIOCM_RTS)
1292 rts = 1;
1293 if (set & TIOCM_DTR)
1294 dtr = 1;
1295 if (clear & TIOCM_RTS)
1296 rts = 0;
1297 if (clear & TIOCM_DTR)
1298 dtr = 0;
b4173f45 1299 MoxaPortLineCtrl(ch, dtr, rts);
a8f5cda0 1300 mutex_unlock(&moxa_openlock);
1da177e4
LT
1301 return 0;
1302}
1303
1da177e4 1304static void moxa_set_termios(struct tty_struct *tty,
eaa95a8d 1305 struct ktermios *old_termios)
1da177e4 1306{
eaa95a8d 1307 struct moxa_port *ch = tty->driver_data;
1da177e4
LT
1308
1309 if (ch == NULL)
1310 return;
db1acaa6 1311 moxa_set_tty_param(tty, old_termios);
eaa95a8d 1312 if (!(old_termios->c_cflag & CLOCAL) && C_CLOCAL(tty))
9de6a51f 1313 wake_up_interruptible(&ch->port.open_wait);
1da177e4
LT
1314}
1315
1316static void moxa_stop(struct tty_struct *tty)
1317{
eaa95a8d 1318 struct moxa_port *ch = tty->driver_data;
1da177e4
LT
1319
1320 if (ch == NULL)
1321 return;
b4173f45 1322 MoxaPortTxDisable(ch);
a808ac0c 1323 set_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT
1324}
1325
1326
1327static void moxa_start(struct tty_struct *tty)
1328{
eaa95a8d 1329 struct moxa_port *ch = tty->driver_data;
1da177e4
LT
1330
1331 if (ch == NULL)
1332 return;
1333
1334 if (!(ch->statusflags & TXSTOPPED))
1335 return;
1336
b4173f45 1337 MoxaPortTxEnable(ch);
a808ac0c 1338 clear_bit(TXSTOPPED, &ch->statusflags);
1da177e4
LT
1339}
1340
1341static void moxa_hangup(struct tty_struct *tty)
1342{
a808ac0c 1343 struct moxa_port *ch = tty->driver_data;
f176178b 1344 tty_port_hangup(&ch->port);
1da177e4
LT
1345}
1346
7bcf97d1 1347static void moxa_new_dcdstate(struct moxa_port *p, u8 dcd)
1da177e4 1348{
d450b5a0 1349 struct tty_struct *tty;
8482bcd5 1350 unsigned long flags;
7bcf97d1 1351 dcd = !!dcd;
1da177e4 1352
8482bcd5 1353 spin_lock_irqsave(&p->port.lock, flags);
d450b5a0 1354 if (dcd != p->DCDState) {
8482bcd5
AC
1355 p->DCDState = dcd;
1356 spin_unlock_irqrestore(&p->port.lock, flags);
d450b5a0
AC
1357 tty = tty_port_tty_get(&p->port);
1358 if (tty && C_CLOCAL(tty) && !dcd)
1359 tty_hangup(tty);
1360 tty_kref_put(tty);
7bcf97d1 1361 }
8482bcd5
AC
1362 else
1363 spin_unlock_irqrestore(&p->port.lock, flags);
7bcf97d1 1364}
1da177e4 1365
7bcf97d1
JS
1366static int moxa_poll_port(struct moxa_port *p, unsigned int handle,
1367 u16 __iomem *ip)
1368{
d450b5a0 1369 struct tty_struct *tty = tty_port_tty_get(&p->port);
7bcf97d1 1370 void __iomem *ofsAddr;
9de6a51f 1371 unsigned int inited = p->port.flags & ASYNC_INITIALIZED;
7bcf97d1
JS
1372 u16 intr;
1373
1374 if (tty) {
a808ac0c 1375 if (test_bit(EMPTYWAIT, &p->statusflags) &&
7bcf97d1 1376 MoxaPortTxQueue(p) == 0) {
a808ac0c 1377 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1
JS
1378 tty_wakeup(tty);
1379 }
a808ac0c 1380 if (test_bit(LOWWAIT, &p->statusflags) && !tty->stopped &&
7bcf97d1 1381 MoxaPortTxQueue(p) <= WAKEUP_CHARS) {
a808ac0c 1382 clear_bit(LOWWAIT, &p->statusflags);
7bcf97d1
JS
1383 tty_wakeup(tty);
1384 }
1385
f9b412a8 1386 if (inited && !test_bit(TTY_THROTTLED, &tty->flags) &&
7bcf97d1
JS
1387 MoxaPortRxQueue(p) > 0) { /* RX */
1388 MoxaPortReadData(p);
1389 tty_schedule_flip(tty);
1390 }
1391 } else {
a808ac0c 1392 clear_bit(EMPTYWAIT, &p->statusflags);
7bcf97d1 1393 MoxaPortFlushData(p, 0); /* flush RX */
1da177e4 1394 }
0bcc4caa 1395
7bcf97d1 1396 if (!handle) /* nothing else to do */
0e0fd7d7 1397 goto put;
7bcf97d1
JS
1398
1399 intr = readw(ip); /* port irq status */
1400 if (intr == 0)
0e0fd7d7 1401 goto put;
7bcf97d1
JS
1402
1403 writew(0, ip); /* ACK port */
1404 ofsAddr = p->tableAddr;
1405 if (intr & IntrTx) /* disable tx intr */
1406 writew(readw(ofsAddr + HostStat) & ~WakeupTx,
1407 ofsAddr + HostStat);
1408
1409 if (!inited)
0e0fd7d7 1410 goto put;
7bcf97d1
JS
1411
1412 if (tty && (intr & IntrBreak) && !I_IGNBRK(tty)) { /* BREAK */
1413 tty_insert_flip_char(tty, 0, TTY_BREAK);
1414 tty_schedule_flip(tty);
1415 }
1416
1417 if (intr & IntrLine)
1418 moxa_new_dcdstate(p, readb(ofsAddr + FlagStat) & DCD_state);
0e0fd7d7
JS
1419put:
1420 tty_kref_put(tty);
7bcf97d1
JS
1421
1422 return 0;
1423}
1424
1425static void moxa_poll(unsigned long ignored)
1426{
1427 struct moxa_board_conf *brd;
1428 u16 __iomem *ip;
2a541341 1429 unsigned int card, port, served = 0;
7bcf97d1
JS
1430
1431 spin_lock(&moxa_lock);
1da177e4 1432 for (card = 0; card < MAX_BOARDS; card++) {
7bcf97d1
JS
1433 brd = &moxa_boards[card];
1434 if (!brd->ready)
1da177e4 1435 continue;
7bcf97d1 1436
2a541341
JS
1437 served++;
1438
7bcf97d1
JS
1439 ip = NULL;
1440 if (readb(brd->intPend) == 0xff)
1441 ip = brd->intTable + readb(brd->intNdx);
1442
1443 for (port = 0; port < brd->numPorts; port++)
1444 moxa_poll_port(&brd->ports[port], !!ip, ip + port);
1445
1446 if (ip)
1447 writeb(0, brd->intPend); /* ACK */
1448
1449 if (moxaLowWaterChk) {
1450 struct moxa_port *p = brd->ports;
1451 for (port = 0; port < brd->numPorts; port++, p++)
1452 if (p->lowChkFlag) {
1453 p->lowChkFlag = 0;
1454 moxa_low_water_check(p->tableAddr);
1da177e4 1455 }
1da177e4
LT
1456 }
1457 }
7bcf97d1 1458 moxaLowWaterChk = 0;
1da177e4 1459
2a541341
JS
1460 if (served)
1461 mod_timer(&moxaTimer, jiffies + HZ / 50);
1462 spin_unlock(&moxa_lock);
1da177e4
LT
1463}
1464
1465/******************************************************************************/
1466
db1acaa6 1467static void moxa_set_tty_param(struct tty_struct *tty, struct ktermios *old_termios)
1da177e4 1468{
eaa95a8d
JS
1469 register struct ktermios *ts = tty->termios;
1470 struct moxa_port *ch = tty->driver_data;
db1acaa6 1471 int rts, cts, txflow, rxflow, xany, baud;
1da177e4 1472
1da177e4
LT
1473 rts = cts = txflow = rxflow = xany = 0;
1474 if (ts->c_cflag & CRTSCTS)
1475 rts = cts = 1;
1476 if (ts->c_iflag & IXON)
1477 txflow = 1;
1478 if (ts->c_iflag & IXOFF)
1479 rxflow = 1;
1480 if (ts->c_iflag & IXANY)
1481 xany = 1;
db1acaa6
AC
1482
1483 /* Clear the features we don't support */
1484 ts->c_cflag &= ~CMSPAR;
b4173f45
JS
1485 MoxaPortFlowCtrl(ch, rts, cts, txflow, rxflow, xany);
1486 baud = MoxaPortSetTermio(ch, ts, tty_get_baud_rate(tty));
db1acaa6
AC
1487 if (baud == -1)
1488 baud = tty_termios_baud_rate(old_termios);
1489 /* Not put the baud rate into the termios data */
1490 tty_encode_baud_rate(tty, baud, baud);
1da177e4
LT
1491}
1492
1da177e4
LT
1493/*****************************************************************************
1494 * Driver level functions: *
1da177e4 1495 *****************************************************************************/
1da177e4 1496
b4173f45 1497static void MoxaPortFlushData(struct moxa_port *port, int mode)
1da177e4
LT
1498{
1499 void __iomem *ofsAddr;
eaa95a8d 1500 if (mode < 0 || mode > 2)
1da177e4 1501 return;
b4173f45 1502 ofsAddr = port->tableAddr;
1da177e4
LT
1503 moxafunc(ofsAddr, FC_FlushQueue, mode);
1504 if (mode != 1) {
b4173f45 1505 port->lowChkFlag = 0;
6f56b658 1506 moxa_low_water_check(ofsAddr);
1da177e4
LT
1507 }
1508}
1509
1da177e4
LT
1510/*
1511 * Moxa Port Number Description:
1512 *
1513 * MOXA serial driver supports up to 4 MOXA-C218/C320 boards. And,
1514 * the port number using in MOXA driver functions will be 0 to 31 for
1515 * first MOXA board, 32 to 63 for second, 64 to 95 for third and 96
1516 * to 127 for fourth. For example, if you setup three MOXA boards,
1517 * first board is C218, second board is C320-16 and third board is
1518 * C320-32. The port number of first board (C218 - 8 ports) is from
1519 * 0 to 7. The port number of second board (C320 - 16 ports) is form
1520 * 32 to 47. The port number of third board (C320 - 32 ports) is from
1521 * 64 to 95. And those port numbers form 8 to 31, 48 to 63 and 96 to
1522 * 127 will be invalid.
1523 *
1524 *
1525 * Moxa Functions Description:
1526 *
1527 * Function 1: Driver initialization routine, this routine must be
1528 * called when initialized driver.
1529 * Syntax:
1530 * void MoxaDriverInit();
1531 *
1532 *
1533 * Function 2: Moxa driver private IOCTL command processing.
1534 * Syntax:
1535 * int MoxaDriverIoctl(unsigned int cmd, unsigned long arg, int port);
1536 *
1537 * unsigned int cmd : IOCTL command
1538 * unsigned long arg : IOCTL argument
1539 * int port : port number (0 - 127)
1540 *
1541 * return: 0 (OK)
1542 * -EINVAL
1543 * -ENOIOCTLCMD
1544 *
1545 *
1da177e4
LT
1546 * Function 6: Enable this port to start Tx/Rx data.
1547 * Syntax:
1548 * void MoxaPortEnable(int port);
1549 * int port : port number (0 - 127)
1550 *
1551 *
1552 * Function 7: Disable this port
1553 * Syntax:
1554 * void MoxaPortDisable(int port);
1555 * int port : port number (0 - 127)
1556 *
1557 *
1da177e4
LT
1558 * Function 10: Setting baud rate of this port.
1559 * Syntax:
08d01c79 1560 * speed_t MoxaPortSetBaud(int port, speed_t baud);
1da177e4
LT
1561 * int port : port number (0 - 127)
1562 * long baud : baud rate (50 - 115200)
1563 *
1564 * return: 0 : this port is invalid or baud < 50
1565 * 50 - 115200 : the real baud rate set to the port, if
1566 * the argument baud is large than maximun
1567 * available baud rate, the real setting
1568 * baud rate will be the maximun baud rate.
1569 *
1570 *
1da177e4
LT
1571 * Function 12: Configure the port.
1572 * Syntax:
606d099c 1573 * int MoxaPortSetTermio(int port, struct ktermios *termio, speed_t baud);
1da177e4 1574 * int port : port number (0 - 127)
606d099c 1575 * struct ktermios * termio : termio structure pointer
c7bce309 1576 * speed_t baud : baud rate
1da177e4
LT
1577 *
1578 * return: -1 : this port is invalid or termio == NULL
1579 * 0 : setting O.K.
1580 *
1581 *
1582 * Function 13: Get the DTR/RTS state of this port.
1583 * Syntax:
1584 * int MoxaPortGetLineOut(int port, int *dtrState, int *rtsState);
1585 * int port : port number (0 - 127)
1586 * int * dtrState : pointer to INT to receive the current DTR
1587 * state. (if NULL, this function will not
1588 * write to this address)
1589 * int * rtsState : pointer to INT to receive the current RTS
1590 * state. (if NULL, this function will not
1591 * write to this address)
1592 *
1593 * return: -1 : this port is invalid
1594 * 0 : O.K.
1595 *
1596 *
1597 * Function 14: Setting the DTR/RTS output state of this port.
1598 * Syntax:
1599 * void MoxaPortLineCtrl(int port, int dtrState, int rtsState);
1600 * int port : port number (0 - 127)
1601 * int dtrState : DTR output state (0: off, 1: on)
1602 * int rtsState : RTS output state (0: off, 1: on)
1603 *
1604 *
1605 * Function 15: Setting the flow control of this port.
1606 * Syntax:
1607 * void MoxaPortFlowCtrl(int port, int rtsFlow, int ctsFlow, int rxFlow,
1608 * int txFlow,int xany);
1609 * int port : port number (0 - 127)
1610 * int rtsFlow : H/W RTS flow control (0: no, 1: yes)
1611 * int ctsFlow : H/W CTS flow control (0: no, 1: yes)
1612 * int rxFlow : S/W Rx XON/XOFF flow control (0: no, 1: yes)
1613 * int txFlow : S/W Tx XON/XOFF flow control (0: no, 1: yes)
1614 * int xany : S/W XANY flow control (0: no, 1: yes)
1615 *
1616 *
1617 * Function 16: Get ths line status of this port
1618 * Syntax:
1619 * int MoxaPortLineStatus(int port);
1620 * int port : port number (0 - 127)
1621 *
1622 * return: Bit 0 - CTS state (0: off, 1: on)
1623 * Bit 1 - DSR state (0: off, 1: on)
1624 * Bit 2 - DCD state (0: off, 1: on)
1625 *
1626 *
1da177e4
LT
1627 * Function 19: Flush the Rx/Tx buffer data of this port.
1628 * Syntax:
1629 * void MoxaPortFlushData(int port, int mode);
1630 * int port : port number (0 - 127)
1631 * int mode
1632 * 0 : flush the Rx buffer
1633 * 1 : flush the Tx buffer
1634 * 2 : flush the Rx and Tx buffer
1635 *
1636 *
1637 * Function 20: Write data.
1638 * Syntax:
1639 * int MoxaPortWriteData(int port, unsigned char * buffer, int length);
1640 * int port : port number (0 - 127)
1641 * unsigned char * buffer : pointer to write data buffer.
1642 * int length : write data length
1643 *
1644 * return: 0 - length : real write data length
1645 *
1646 *
1647 * Function 21: Read data.
1648 * Syntax:
33f0f88f 1649 * int MoxaPortReadData(int port, struct tty_struct *tty);
1da177e4 1650 * int port : port number (0 - 127)
33f0f88f 1651 * struct tty_struct *tty : tty for data
1da177e4
LT
1652 *
1653 * return: 0 - length : real read data length
1654 *
1655 *
1da177e4
LT
1656 * Function 24: Get the Tx buffer current queued data bytes
1657 * Syntax:
1658 * int MoxaPortTxQueue(int port);
1659 * int port : port number (0 - 127)
1660 *
1661 * return: .. : Tx buffer current queued data bytes
1662 *
1663 *
1664 * Function 25: Get the Tx buffer current free space
1665 * Syntax:
1666 * int MoxaPortTxFree(int port);
1667 * int port : port number (0 - 127)
1668 *
1669 * return: .. : Tx buffer current free space
1670 *
1671 *
1672 * Function 26: Get the Rx buffer current queued data bytes
1673 * Syntax:
1674 * int MoxaPortRxQueue(int port);
1675 * int port : port number (0 - 127)
1676 *
1677 * return: .. : Rx buffer current queued data bytes
1678 *
1679 *
1da177e4
LT
1680 * Function 28: Disable port data transmission.
1681 * Syntax:
1682 * void MoxaPortTxDisable(int port);
1683 * int port : port number (0 - 127)
1684 *
1685 *
1686 * Function 29: Enable port data transmission.
1687 * Syntax:
1688 * void MoxaPortTxEnable(int port);
1689 * int port : port number (0 - 127)
1690 *
1691 *
1da177e4
LT
1692 * Function 31: Get the received BREAK signal count and reset it.
1693 * Syntax:
1694 * int MoxaPortResetBrkCnt(int port);
1695 * int port : port number (0 - 127)
1696 *
1697 * return: 0 - .. : BREAK signal count
1698 *
1699 *
1da177e4 1700 */
1da177e4 1701
b4173f45 1702static void MoxaPortEnable(struct moxa_port *port)
1da177e4
LT
1703{
1704 void __iomem *ofsAddr;
eaa95a8d 1705 u16 lowwater = 512;
1da177e4 1706
b4173f45 1707 ofsAddr = port->tableAddr;
1da177e4 1708 writew(lowwater, ofsAddr + Low_water);
08d01c79 1709 if (MOXA_IS_320(port->board))
1da177e4 1710 moxafunc(ofsAddr, FC_SetBreakIrq, 0);
eaa95a8d
JS
1711 else
1712 writew(readw(ofsAddr + HostStat) | WakeupBreak,
1713 ofsAddr + HostStat);
1da177e4
LT
1714
1715 moxafunc(ofsAddr, FC_SetLineIrq, Magic_code);
1716 moxafunc(ofsAddr, FC_FlushQueue, 2);
1717
1718 moxafunc(ofsAddr, FC_EnableCH, Magic_code);
1719 MoxaPortLineStatus(port);
1720}
1721
b4173f45 1722static void MoxaPortDisable(struct moxa_port *port)
1da177e4 1723{
b4173f45 1724 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT
1725
1726 moxafunc(ofsAddr, FC_SetFlowCtl, 0); /* disable flow control */
1727 moxafunc(ofsAddr, FC_ClrLineIrq, Magic_code);
1728 writew(0, ofsAddr + HostStat);
1729 moxafunc(ofsAddr, FC_DisableCH, Magic_code);
1730}
1731
08d01c79 1732static speed_t MoxaPortSetBaud(struct moxa_port *port, speed_t baud)
1da177e4 1733{
08d01c79
JS
1734 void __iomem *ofsAddr = port->tableAddr;
1735 unsigned int clock, val;
1736 speed_t max;
1da177e4 1737
08d01c79
JS
1738 max = MOXA_IS_320(port->board) ? 460800 : 921600;
1739 if (baud < 50)
eaa95a8d 1740 return 0;
1da177e4
LT
1741 if (baud > max)
1742 baud = max;
08d01c79 1743 clock = 921600;
1da177e4
LT
1744 val = clock / baud;
1745 moxafunc(ofsAddr, FC_SetBaud, val);
1746 baud = clock / val;
eaa95a8d 1747 return baud;
1da177e4
LT
1748}
1749
b4173f45
JS
1750static int MoxaPortSetTermio(struct moxa_port *port, struct ktermios *termio,
1751 speed_t baud)
1da177e4
LT
1752{
1753 void __iomem *ofsAddr;
1da177e4
LT
1754 tcflag_t mode = 0;
1755
b4173f45 1756 ofsAddr = port->tableAddr;
1da177e4
LT
1757
1758 mode = termio->c_cflag & CSIZE;
1759 if (mode == CS5)
1760 mode = MX_CS5;
1761 else if (mode == CS6)
1762 mode = MX_CS6;
1763 else if (mode == CS7)
1764 mode = MX_CS7;
1765 else if (mode == CS8)
1766 mode = MX_CS8;
1767
1768 if (termio->c_cflag & CSTOPB) {
1769 if (mode == MX_CS5)
1770 mode |= MX_STOP15;
1771 else
1772 mode |= MX_STOP2;
1773 } else
1774 mode |= MX_STOP1;
1775
1776 if (termio->c_cflag & PARENB) {
1777 if (termio->c_cflag & PARODD)
1778 mode |= MX_PARODD;
1779 else
1780 mode |= MX_PAREVEN;
1781 } else
1782 mode |= MX_PARNONE;
1783
eaa95a8d 1784 moxafunc(ofsAddr, FC_SetDataMode, (u16)mode);
1da177e4 1785
08d01c79
JS
1786 if (MOXA_IS_320(port->board) && baud >= 921600)
1787 return -1;
1788
db1acaa6 1789 baud = MoxaPortSetBaud(port, baud);
1da177e4
LT
1790
1791 if (termio->c_iflag & (IXON | IXOFF | IXANY)) {
f5c5a36d 1792 spin_lock_irq(&moxafunc_lock);
1da177e4
LT
1793 writeb(termio->c_cc[VSTART], ofsAddr + FuncArg);
1794 writeb(termio->c_cc[VSTOP], ofsAddr + FuncArg1);
1795 writeb(FC_SetXonXoff, ofsAddr + FuncCode);
6f56b658 1796 moxa_wait_finish(ofsAddr);
a808ac0c 1797 spin_unlock_irq(&moxafunc_lock);
1da177e4
LT
1798
1799 }
eaa95a8d 1800 return baud;
1da177e4
LT
1801}
1802
b4173f45
JS
1803static int MoxaPortGetLineOut(struct moxa_port *port, int *dtrState,
1804 int *rtsState)
1da177e4 1805{
b4173f45
JS
1806 if (dtrState)
1807 *dtrState = !!(port->lineCtrl & DTR_ON);
1808 if (rtsState)
1809 *rtsState = !!(port->lineCtrl & RTS_ON);
1810
eaa95a8d 1811 return 0;
1da177e4
LT
1812}
1813
b4173f45 1814static void MoxaPortLineCtrl(struct moxa_port *port, int dtr, int rts)
1da177e4 1815{
eaa95a8d 1816 u8 mode = 0;
1da177e4 1817
1da177e4
LT
1818 if (dtr)
1819 mode |= DTR_ON;
1820 if (rts)
1821 mode |= RTS_ON;
b4173f45
JS
1822 port->lineCtrl = mode;
1823 moxafunc(port->tableAddr, FC_LineControl, mode);
1da177e4
LT
1824}
1825
b4173f45
JS
1826static void MoxaPortFlowCtrl(struct moxa_port *port, int rts, int cts,
1827 int txflow, int rxflow, int txany)
1da177e4 1828{
b4173f45 1829 int mode = 0;
1da177e4 1830
1da177e4
LT
1831 if (rts)
1832 mode |= RTS_FlowCtl;
1833 if (cts)
1834 mode |= CTS_FlowCtl;
1835 if (txflow)
1836 mode |= Tx_FlowCtl;
1837 if (rxflow)
1838 mode |= Rx_FlowCtl;
1839 if (txany)
1840 mode |= IXM_IXANY;
b4173f45 1841 moxafunc(port->tableAddr, FC_SetFlowCtl, mode);
1da177e4
LT
1842}
1843
b4173f45 1844static int MoxaPortLineStatus(struct moxa_port *port)
1da177e4
LT
1845{
1846 void __iomem *ofsAddr;
1847 int val;
1848
b4173f45 1849 ofsAddr = port->tableAddr;
f5c5a36d
AC
1850 if (MOXA_IS_320(port->board))
1851 val = moxafuncret(ofsAddr, FC_LineStatus, 0);
1852 else
1da177e4 1853 val = readw(ofsAddr + FlagStat) >> 4;
1da177e4 1854 val &= 0x0B;
7bcf97d1 1855 if (val & 8)
1da177e4 1856 val |= 4;
7bcf97d1 1857 moxa_new_dcdstate(port, val & 8);
1da177e4 1858 val &= 7;
7bcf97d1 1859 return val;
1da177e4
LT
1860}
1861
d450b5a0 1862static int MoxaPortWriteData(struct tty_struct *tty,
2108eba5 1863 const unsigned char *buffer, int len)
1da177e4 1864{
d450b5a0 1865 struct moxa_port *port = tty->driver_data;
1da177e4 1866 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS
1867 unsigned int c, total;
1868 u16 head, tail, tx_mask, spage, epage;
1869 u16 pageno, pageofs, bufhead;
1da177e4 1870
b4173f45
JS
1871 ofsAddr = port->tableAddr;
1872 baseAddr = port->board->basemem;
1da177e4
LT
1873 tx_mask = readw(ofsAddr + TX_mask);
1874 spage = readw(ofsAddr + Page_txb);
1875 epage = readw(ofsAddr + EndPage_txb);
1876 tail = readw(ofsAddr + TXwptr);
1877 head = readw(ofsAddr + TXrptr);
2108eba5 1878 c = (head > tail) ? (head - tail - 1) : (head - tail + tx_mask);
1da177e4
LT
1879 if (c > len)
1880 c = len;
9de6a51f 1881 moxaLog.txcnt[port->port.tty->index] += c;
1da177e4
LT
1882 total = c;
1883 if (spage == epage) {
1884 bufhead = readw(ofsAddr + Ofs_txb);
1885 writew(spage, baseAddr + Control_reg);
1886 while (c > 0) {
1887 if (head > tail)
1888 len = head - tail - 1;
1889 else
1890 len = tx_mask + 1 - tail;
1891 len = (c > len) ? len : c;
1892 ofs = baseAddr + DynPage_addr + bufhead + tail;
2108eba5
JS
1893 memcpy_toio(ofs, buffer, len);
1894 buffer += len;
1da177e4
LT
1895 tail = (tail + len) & tx_mask;
1896 c -= len;
1897 }
1da177e4 1898 } else {
1da177e4
LT
1899 pageno = spage + (tail >> 13);
1900 pageofs = tail & Page_mask;
2108eba5
JS
1901 while (c > 0) {
1902 len = Page_size - pageofs;
1903 if (len > c)
1904 len = c;
1da177e4
LT
1905 writeb(pageno, baseAddr + Control_reg);
1906 ofs = baseAddr + DynPage_addr + pageofs;
2108eba5
JS
1907 memcpy_toio(ofs, buffer, len);
1908 buffer += len;
1da177e4
LT
1909 if (++pageno == epage)
1910 pageno = spage;
1911 pageofs = 0;
2108eba5
JS
1912 c -= len;
1913 }
1914 tail = (tail + total) & tx_mask;
1da177e4 1915 }
2108eba5 1916 writew(tail, ofsAddr + TXwptr);
1da177e4 1917 writeb(1, ofsAddr + CD180TXirq); /* start to send */
2108eba5 1918 return total;
1da177e4
LT
1919}
1920
7bcf97d1 1921static int MoxaPortReadData(struct moxa_port *port)
1da177e4 1922{
9de6a51f 1923 struct tty_struct *tty = port->port.tty;
2108eba5 1924 unsigned char *dst;
1da177e4 1925 void __iomem *baseAddr, *ofsAddr, *ofs;
2108eba5
JS
1926 unsigned int count, len, total;
1927 u16 tail, rx_mask, spage, epage;
1928 u16 pageno, pageofs, bufhead, head;
1da177e4 1929
b4173f45
JS
1930 ofsAddr = port->tableAddr;
1931 baseAddr = port->board->basemem;
1da177e4
LT
1932 head = readw(ofsAddr + RXrptr);
1933 tail = readw(ofsAddr + RXwptr);
1934 rx_mask = readw(ofsAddr + RX_mask);
1935 spage = readw(ofsAddr + Page_rxb);
1936 epage = readw(ofsAddr + EndPage_rxb);
2108eba5 1937 count = (tail >= head) ? (tail - head) : (tail - head + rx_mask + 1);
1da177e4 1938 if (count == 0)
33f0f88f 1939 return 0;
1da177e4 1940
33f0f88f 1941 total = count;
7bcf97d1 1942 moxaLog.rxcnt[tty->index] += total;
1da177e4
LT
1943 if (spage == epage) {
1944 bufhead = readw(ofsAddr + Ofs_rxb);
1945 writew(spage, baseAddr + Control_reg);
1946 while (count > 0) {
1da177e4 1947 ofs = baseAddr + DynPage_addr + bufhead + head;
2108eba5
JS
1948 len = (tail >= head) ? (tail - head) :
1949 (rx_mask + 1 - head);
1950 len = tty_prepare_flip_string(tty, &dst,
1951 min(len, count));
1952 memcpy_fromio(dst, ofs, len);
1da177e4
LT
1953 head = (head + len) & rx_mask;
1954 count -= len;
1955 }
1da177e4 1956 } else {
1da177e4
LT
1957 pageno = spage + (head >> 13);
1958 pageofs = head & Page_mask;
2108eba5 1959 while (count > 0) {
1da177e4
LT
1960 writew(pageno, baseAddr + Control_reg);
1961 ofs = baseAddr + DynPage_addr + pageofs;
2108eba5
JS
1962 len = tty_prepare_flip_string(tty, &dst,
1963 min(Page_size - pageofs, count));
1964 memcpy_fromio(dst, ofs, len);
1965
1966 count -= len;
1967 pageofs = (pageofs + len) & Page_mask;
1968 if (pageofs == 0 && ++pageno == epage)
1da177e4 1969 pageno = spage;
2108eba5
JS
1970 }
1971 head = (head + total) & rx_mask;
1da177e4 1972 }
2108eba5
JS
1973 writew(head, ofsAddr + RXrptr);
1974 if (readb(ofsAddr + FlagStat) & Xoff_state) {
1da177e4 1975 moxaLowWaterChk = 1;
b4173f45 1976 port->lowChkFlag = 1;
1da177e4 1977 }
2108eba5 1978 return total;
1da177e4
LT
1979}
1980
1981
b4173f45 1982static int MoxaPortTxQueue(struct moxa_port *port)
1da177e4 1983{
b4173f45 1984 void __iomem *ofsAddr = port->tableAddr;
2108eba5 1985 u16 rptr, wptr, mask;
1da177e4 1986
1da177e4
LT
1987 rptr = readw(ofsAddr + TXrptr);
1988 wptr = readw(ofsAddr + TXwptr);
1989 mask = readw(ofsAddr + TX_mask);
2108eba5 1990 return (wptr - rptr) & mask;
1da177e4
LT
1991}
1992
b4173f45 1993static int MoxaPortTxFree(struct moxa_port *port)
1da177e4 1994{
b4173f45 1995 void __iomem *ofsAddr = port->tableAddr;
2108eba5 1996 u16 rptr, wptr, mask;
1da177e4 1997
1da177e4
LT
1998 rptr = readw(ofsAddr + TXrptr);
1999 wptr = readw(ofsAddr + TXwptr);
2000 mask = readw(ofsAddr + TX_mask);
2108eba5 2001 return mask - ((wptr - rptr) & mask);
1da177e4
LT
2002}
2003
b4173f45 2004static int MoxaPortRxQueue(struct moxa_port *port)
1da177e4 2005{
b4173f45 2006 void __iomem *ofsAddr = port->tableAddr;
2108eba5 2007 u16 rptr, wptr, mask;
1da177e4 2008
1da177e4
LT
2009 rptr = readw(ofsAddr + RXrptr);
2010 wptr = readw(ofsAddr + RXwptr);
2011 mask = readw(ofsAddr + RX_mask);
2108eba5 2012 return (wptr - rptr) & mask;
1da177e4
LT
2013}
2014
b4173f45 2015static void MoxaPortTxDisable(struct moxa_port *port)
1da177e4 2016{
b4173f45 2017 moxafunc(port->tableAddr, FC_SetXoffState, Magic_code);
1da177e4
LT
2018}
2019
b4173f45 2020static void MoxaPortTxEnable(struct moxa_port *port)
1da177e4 2021{
b4173f45 2022 moxafunc(port->tableAddr, FC_SetXonState, Magic_code);
1da177e4
LT
2023}
2024
8f8ecbad 2025static int moxa_get_serial_info(struct moxa_port *info,
eaa95a8d 2026 struct serial_struct __user *retinfo)
1da177e4 2027{
eaa95a8d
JS
2028 struct serial_struct tmp = {
2029 .type = info->type,
9de6a51f
AC
2030 .line = info->port.tty->index,
2031 .flags = info->port.flags,
eaa95a8d 2032 .baud_base = 921600,
44b7d1b3 2033 .close_delay = info->port.close_delay
eaa95a8d
JS
2034 };
2035 return copy_to_user(retinfo, &tmp, sizeof(*retinfo)) ? -EFAULT : 0;
1da177e4
LT
2036}
2037
2038
8f8ecbad 2039static int moxa_set_serial_info(struct moxa_port *info,
eaa95a8d 2040 struct serial_struct __user *new_info)
1da177e4
LT
2041{
2042 struct serial_struct new_serial;
2043
eaa95a8d 2044 if (copy_from_user(&new_serial, new_info, sizeof(new_serial)))
1da177e4
LT
2045 return -EFAULT;
2046
eaa95a8d
JS
2047 if (new_serial.irq != 0 || new_serial.port != 0 ||
2048 new_serial.custom_divisor != 0 ||
2049 new_serial.baud_base != 921600)
2050 return -EPERM;
1da177e4
LT
2051
2052 if (!capable(CAP_SYS_ADMIN)) {
2053 if (((new_serial.flags & ~ASYNC_USR_MASK) !=
9de6a51f 2054 (info->port.flags & ~ASYNC_USR_MASK)))
eaa95a8d
JS
2055 return -EPERM;
2056 } else
44b7d1b3 2057 info->port.close_delay = new_serial.close_delay * HZ / 100;
1da177e4
LT
2058
2059 new_serial.flags = (new_serial.flags & ~ASYNC_FLAGS);
9de6a51f 2060 new_serial.flags |= (info->port.flags & ASYNC_FLAGS);
1da177e4 2061
eaa95a8d 2062 MoxaSetFifo(info, new_serial.type == PORT_16550A);
1da177e4
LT
2063
2064 info->type = new_serial.type;
eaa95a8d 2065 return 0;
1da177e4
LT
2066}
2067
2068
2069
2070/*****************************************************************************
2071 * Static local functions: *
2072 *****************************************************************************/
1da177e4 2073
b4173f45 2074static void MoxaSetFifo(struct moxa_port *port, int enable)
1da177e4 2075{
b4173f45 2076 void __iomem *ofsAddr = port->tableAddr;
1da177e4
LT
2077
2078 if (!enable) {
2079 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 0);
2080 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 1);
2081 } else {
2082 moxafunc(ofsAddr, FC_SetRxFIFOTrig, 3);
2083 moxafunc(ofsAddr, FC_SetTxFIFOCnt, 16);
2084 }
2085}