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b0407983 MW |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | /* | |
3 | * USB4 specific functionality | |
4 | * | |
5 | * Copyright (C) 2019, Intel Corporation | |
6 | * Authors: Mika Westerberg <mika.westerberg@linux.intel.com> | |
7 | * Rajmohan Mani <rajmohan.mani@intel.com> | |
8 | */ | |
9 | ||
10 | #include <linux/delay.h> | |
11 | #include <linux/ktime.h> | |
12 | ||
02d12855 | 13 | #include "sb_regs.h" |
b0407983 MW |
14 | #include "tb.h" |
15 | ||
16 | #define USB4_DATA_DWORDS 16 | |
17 | #define USB4_DATA_RETRIES 3 | |
18 | ||
19 | enum usb4_switch_op { | |
20 | USB4_SWITCH_OP_QUERY_DP_RESOURCE = 0x10, | |
21 | USB4_SWITCH_OP_ALLOC_DP_RESOURCE = 0x11, | |
22 | USB4_SWITCH_OP_DEALLOC_DP_RESOURCE = 0x12, | |
23 | USB4_SWITCH_OP_NVM_WRITE = 0x20, | |
24 | USB4_SWITCH_OP_NVM_AUTH = 0x21, | |
25 | USB4_SWITCH_OP_NVM_READ = 0x22, | |
26 | USB4_SWITCH_OP_NVM_SET_OFFSET = 0x23, | |
27 | USB4_SWITCH_OP_DROM_READ = 0x24, | |
28 | USB4_SWITCH_OP_NVM_SECTOR_SIZE = 0x25, | |
29 | }; | |
30 | ||
02d12855 RM |
31 | enum usb4_sb_target { |
32 | USB4_SB_TARGET_ROUTER, | |
33 | USB4_SB_TARGET_PARTNER, | |
34 | USB4_SB_TARGET_RETIMER, | |
35 | }; | |
36 | ||
b0407983 MW |
37 | #define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2) |
38 | #define USB4_NVM_READ_OFFSET_SHIFT 2 | |
39 | #define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24) | |
40 | #define USB4_NVM_READ_LENGTH_SHIFT 24 | |
41 | ||
42 | #define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK | |
43 | #define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT | |
44 | ||
45 | #define USB4_DROM_ADDRESS_MASK GENMASK(14, 2) | |
46 | #define USB4_DROM_ADDRESS_SHIFT 2 | |
47 | #define USB4_DROM_SIZE_MASK GENMASK(19, 15) | |
48 | #define USB4_DROM_SIZE_SHIFT 15 | |
49 | ||
50 | #define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0) | |
51 | ||
7e72846b MW |
52 | typedef int (*read_block_fn)(void *, unsigned int, void *, size_t); |
53 | typedef int (*write_block_fn)(void *, const void *, size_t); | |
b0407983 MW |
54 | |
55 | static int usb4_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit, | |
56 | u32 value, int timeout_msec) | |
57 | { | |
58 | ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec); | |
59 | ||
60 | do { | |
61 | u32 val; | |
62 | int ret; | |
63 | ||
64 | ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1); | |
65 | if (ret) | |
66 | return ret; | |
67 | ||
68 | if ((val & bit) == value) | |
69 | return 0; | |
70 | ||
71 | usleep_range(50, 100); | |
72 | } while (ktime_before(ktime_get(), timeout)); | |
73 | ||
74 | return -ETIMEDOUT; | |
75 | } | |
76 | ||
77 | static int usb4_switch_op_read_data(struct tb_switch *sw, void *data, | |
78 | size_t dwords) | |
79 | { | |
80 | if (dwords > USB4_DATA_DWORDS) | |
81 | return -EINVAL; | |
82 | ||
83 | return tb_sw_read(sw, data, TB_CFG_SWITCH, ROUTER_CS_9, dwords); | |
84 | } | |
85 | ||
86 | static int usb4_switch_op_write_data(struct tb_switch *sw, const void *data, | |
87 | size_t dwords) | |
88 | { | |
89 | if (dwords > USB4_DATA_DWORDS) | |
90 | return -EINVAL; | |
91 | ||
92 | return tb_sw_write(sw, data, TB_CFG_SWITCH, ROUTER_CS_9, dwords); | |
93 | } | |
94 | ||
95 | static int usb4_switch_op_read_metadata(struct tb_switch *sw, u32 *metadata) | |
96 | { | |
97 | return tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1); | |
98 | } | |
99 | ||
100 | static int usb4_switch_op_write_metadata(struct tb_switch *sw, u32 metadata) | |
101 | { | |
102 | return tb_sw_write(sw, &metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1); | |
103 | } | |
104 | ||
7e72846b MW |
105 | static int usb4_do_read_data(u16 address, void *buf, size_t size, |
106 | read_block_fn read_block, void *read_block_data) | |
b0407983 MW |
107 | { |
108 | unsigned int retries = USB4_DATA_RETRIES; | |
109 | unsigned int offset; | |
110 | ||
111 | offset = address & 3; | |
112 | address = address & ~3; | |
113 | ||
114 | do { | |
115 | size_t nbytes = min_t(size_t, size, USB4_DATA_DWORDS * 4); | |
116 | unsigned int dwaddress, dwords; | |
117 | u8 data[USB4_DATA_DWORDS * 4]; | |
118 | int ret; | |
119 | ||
120 | dwaddress = address / 4; | |
121 | dwords = ALIGN(nbytes, 4) / 4; | |
122 | ||
7e72846b | 123 | ret = read_block(read_block_data, dwaddress, data, dwords); |
b0407983 | 124 | if (ret) { |
6bfe3347 MW |
125 | if (ret != -ENODEV && retries--) |
126 | continue; | |
b0407983 MW |
127 | return ret; |
128 | } | |
129 | ||
130 | memcpy(buf, data + offset, nbytes); | |
131 | ||
132 | size -= nbytes; | |
133 | address += nbytes; | |
134 | buf += nbytes; | |
135 | } while (size > 0); | |
136 | ||
137 | return 0; | |
138 | } | |
139 | ||
7e72846b MW |
140 | static int usb4_do_write_data(unsigned int address, const void *buf, size_t size, |
141 | write_block_fn write_next_block, void *write_block_data) | |
b0407983 MW |
142 | { |
143 | unsigned int retries = USB4_DATA_RETRIES; | |
144 | unsigned int offset; | |
145 | ||
146 | offset = address & 3; | |
147 | address = address & ~3; | |
148 | ||
149 | do { | |
150 | u32 nbytes = min_t(u32, size, USB4_DATA_DWORDS * 4); | |
151 | u8 data[USB4_DATA_DWORDS * 4]; | |
152 | int ret; | |
153 | ||
154 | memcpy(data + offset, buf, nbytes); | |
155 | ||
7e72846b | 156 | ret = write_next_block(write_block_data, data, nbytes / 4); |
b0407983 MW |
157 | if (ret) { |
158 | if (ret == -ETIMEDOUT) { | |
159 | if (retries--) | |
160 | continue; | |
161 | ret = -EIO; | |
162 | } | |
163 | return ret; | |
164 | } | |
165 | ||
166 | size -= nbytes; | |
167 | address += nbytes; | |
168 | buf += nbytes; | |
169 | } while (size > 0); | |
170 | ||
171 | return 0; | |
172 | } | |
173 | ||
174 | static int usb4_switch_op(struct tb_switch *sw, u16 opcode, u8 *status) | |
175 | { | |
176 | u32 val; | |
177 | int ret; | |
178 | ||
179 | val = opcode | ROUTER_CS_26_OV; | |
180 | ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1); | |
181 | if (ret) | |
182 | return ret; | |
183 | ||
184 | ret = usb4_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500); | |
185 | if (ret) | |
186 | return ret; | |
187 | ||
188 | ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1); | |
c3bf9930 MW |
189 | if (ret) |
190 | return ret; | |
191 | ||
b0407983 MW |
192 | if (val & ROUTER_CS_26_ONS) |
193 | return -EOPNOTSUPP; | |
194 | ||
661b1947 MW |
195 | if (status) |
196 | *status = (val & ROUTER_CS_26_STATUS_MASK) >> | |
197 | ROUTER_CS_26_STATUS_SHIFT; | |
b0407983 MW |
198 | return 0; |
199 | } | |
200 | ||
b2911a59 MW |
201 | static void usb4_switch_check_wakes(struct tb_switch *sw) |
202 | { | |
203 | struct tb_port *port; | |
204 | bool wakeup = false; | |
205 | u32 val; | |
206 | ||
207 | if (!device_may_wakeup(&sw->dev)) | |
208 | return; | |
209 | ||
210 | if (tb_route(sw)) { | |
211 | if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1)) | |
212 | return; | |
213 | ||
214 | tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n", | |
215 | (val & ROUTER_CS_6_WOPS) ? "yes" : "no", | |
216 | (val & ROUTER_CS_6_WOUS) ? "yes" : "no"); | |
217 | ||
218 | wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS); | |
219 | } | |
220 | ||
221 | /* Check for any connected downstream ports for USB4 wake */ | |
222 | tb_switch_for_each_port(sw, port) { | |
223 | if (!tb_port_has_remote(port)) | |
224 | continue; | |
225 | ||
226 | if (tb_port_read(port, &val, TB_CFG_PORT, | |
227 | port->cap_usb4 + PORT_CS_18, 1)) | |
228 | break; | |
229 | ||
230 | tb_port_dbg(port, "USB4 wake: %s\n", | |
231 | (val & PORT_CS_18_WOU4S) ? "yes" : "no"); | |
232 | ||
233 | if (val & PORT_CS_18_WOU4S) | |
234 | wakeup = true; | |
235 | } | |
236 | ||
237 | if (wakeup) | |
238 | pm_wakeup_event(&sw->dev, 0); | |
239 | } | |
240 | ||
bbcf40b3 MW |
241 | static bool link_is_usb4(struct tb_port *port) |
242 | { | |
243 | u32 val; | |
244 | ||
245 | if (!port->cap_usb4) | |
246 | return false; | |
247 | ||
248 | if (tb_port_read(port, &val, TB_CFG_PORT, | |
249 | port->cap_usb4 + PORT_CS_18, 1)) | |
250 | return false; | |
251 | ||
252 | return !(val & PORT_CS_18_TCM); | |
253 | } | |
254 | ||
b0407983 MW |
255 | /** |
256 | * usb4_switch_setup() - Additional setup for USB4 device | |
257 | * @sw: USB4 router to setup | |
258 | * | |
259 | * USB4 routers need additional settings in order to enable all the | |
260 | * tunneling. This function enables USB and PCIe tunneling if it can be | |
261 | * enabled (e.g the parent switch also supports them). If USB tunneling | |
262 | * is not available for some reason (like that there is Thunderbolt 3 | |
263 | * switch upstream) then the internal xHCI controller is enabled | |
264 | * instead. | |
265 | */ | |
266 | int usb4_switch_setup(struct tb_switch *sw) | |
267 | { | |
bbcf40b3 | 268 | struct tb_port *downstream_port; |
b0407983 MW |
269 | struct tb_switch *parent; |
270 | bool tbt3, xhci; | |
271 | u32 val = 0; | |
272 | int ret; | |
273 | ||
b2911a59 MW |
274 | usb4_switch_check_wakes(sw); |
275 | ||
b0407983 MW |
276 | if (!tb_route(sw)) |
277 | return 0; | |
278 | ||
279 | ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1); | |
280 | if (ret) | |
281 | return ret; | |
282 | ||
bbcf40b3 MW |
283 | parent = tb_switch_parent(sw); |
284 | downstream_port = tb_port_at(tb_route(sw), parent); | |
285 | sw->link_usb4 = link_is_usb4(downstream_port); | |
286 | tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT3"); | |
287 | ||
b0407983 MW |
288 | xhci = val & ROUTER_CS_6_HCI; |
289 | tbt3 = !(val & ROUTER_CS_6_TNS); | |
290 | ||
291 | tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n", | |
292 | tbt3 ? "yes" : "no", xhci ? "yes" : "no"); | |
293 | ||
294 | ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1); | |
295 | if (ret) | |
296 | return ret; | |
297 | ||
bbcf40b3 | 298 | if (sw->link_usb4 && tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) { |
e6f81858 RM |
299 | val |= ROUTER_CS_5_UTO; |
300 | xhci = false; | |
301 | } | |
302 | ||
b0407983 MW |
303 | /* Only enable PCIe tunneling if the parent router supports it */ |
304 | if (tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) { | |
305 | val |= ROUTER_CS_5_PTO; | |
e6f81858 RM |
306 | /* |
307 | * xHCI can be enabled if PCIe tunneling is supported | |
308 | * and the parent does not have any USB3 dowstream | |
309 | * adapters (so we cannot do USB 3.x tunneling). | |
310 | */ | |
c7a7ac84 | 311 | if (xhci) |
b0407983 MW |
312 | val |= ROUTER_CS_5_HCO; |
313 | } | |
314 | ||
315 | /* TBT3 supported by the CM */ | |
316 | val |= ROUTER_CS_5_C3S; | |
317 | /* Tunneling configuration is ready now */ | |
318 | val |= ROUTER_CS_5_CV; | |
319 | ||
320 | ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1); | |
321 | if (ret) | |
322 | return ret; | |
323 | ||
324 | return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR, | |
325 | ROUTER_CS_6_CR, 50); | |
326 | } | |
327 | ||
328 | /** | |
329 | * usb4_switch_read_uid() - Read UID from USB4 router | |
330 | * @sw: USB4 router | |
21d78d86 | 331 | * @uid: UID is stored here |
b0407983 MW |
332 | * |
333 | * Reads 64-bit UID from USB4 router config space. | |
334 | */ | |
335 | int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid) | |
336 | { | |
337 | return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2); | |
338 | } | |
339 | ||
7e72846b | 340 | static int usb4_switch_drom_read_block(void *data, |
b0407983 MW |
341 | unsigned int dwaddress, void *buf, |
342 | size_t dwords) | |
343 | { | |
7e72846b | 344 | struct tb_switch *sw = data; |
b0407983 MW |
345 | u8 status = 0; |
346 | u32 metadata; | |
347 | int ret; | |
348 | ||
349 | metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK; | |
350 | metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) & | |
351 | USB4_DROM_ADDRESS_MASK; | |
352 | ||
353 | ret = usb4_switch_op_write_metadata(sw, metadata); | |
354 | if (ret) | |
355 | return ret; | |
356 | ||
357 | ret = usb4_switch_op(sw, USB4_SWITCH_OP_DROM_READ, &status); | |
358 | if (ret) | |
359 | return ret; | |
360 | ||
361 | if (status) | |
362 | return -EIO; | |
363 | ||
364 | return usb4_switch_op_read_data(sw, buf, dwords); | |
365 | } | |
366 | ||
367 | /** | |
368 | * usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM | |
369 | * @sw: USB4 router | |
21d78d86 MW |
370 | * @address: Byte address inside DROM to start reading |
371 | * @buf: Buffer where the DROM content is stored | |
372 | * @size: Number of bytes to read from DROM | |
b0407983 MW |
373 | * |
374 | * Uses USB4 router operations to read router DROM. For devices this | |
375 | * should always work but for hosts it may return %-EOPNOTSUPP in which | |
376 | * case the host router does not have DROM. | |
377 | */ | |
378 | int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf, | |
379 | size_t size) | |
380 | { | |
7e72846b MW |
381 | return usb4_do_read_data(address, buf, size, |
382 | usb4_switch_drom_read_block, sw); | |
b0407983 MW |
383 | } |
384 | ||
b0407983 MW |
385 | /** |
386 | * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding | |
387 | * @sw: USB4 router | |
388 | * | |
389 | * Checks whether conditions are met so that lane bonding can be | |
390 | * established with the upstream router. Call only for device routers. | |
391 | */ | |
392 | bool usb4_switch_lane_bonding_possible(struct tb_switch *sw) | |
393 | { | |
394 | struct tb_port *up; | |
395 | int ret; | |
396 | u32 val; | |
397 | ||
398 | up = tb_upstream_port(sw); | |
399 | ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1); | |
400 | if (ret) | |
401 | return false; | |
402 | ||
403 | return !!(val & PORT_CS_18_BE); | |
404 | } | |
405 | ||
b2911a59 MW |
406 | /** |
407 | * usb4_switch_set_wake() - Enabled/disable wake | |
408 | * @sw: USB4 router | |
409 | * @flags: Wakeup flags (%0 to disable) | |
410 | * | |
411 | * Enables/disables router to wake up from sleep. | |
412 | */ | |
413 | int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags) | |
414 | { | |
415 | struct tb_port *port; | |
416 | u64 route = tb_route(sw); | |
417 | u32 val; | |
418 | int ret; | |
419 | ||
420 | /* | |
421 | * Enable wakes coming from all USB4 downstream ports (from | |
422 | * child routers). For device routers do this also for the | |
423 | * upstream USB4 port. | |
424 | */ | |
425 | tb_switch_for_each_port(sw, port) { | |
426 | if (!route && tb_is_upstream_port(port)) | |
427 | continue; | |
428 | ||
429 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
430 | port->cap_usb4 + PORT_CS_19, 1); | |
431 | if (ret) | |
432 | return ret; | |
433 | ||
434 | val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4); | |
435 | ||
436 | if (flags & TB_WAKE_ON_CONNECT) | |
437 | val |= PORT_CS_19_WOC; | |
438 | if (flags & TB_WAKE_ON_DISCONNECT) | |
439 | val |= PORT_CS_19_WOD; | |
440 | if (flags & TB_WAKE_ON_USB4) | |
441 | val |= PORT_CS_19_WOU4; | |
442 | ||
443 | ret = tb_port_write(port, &val, TB_CFG_PORT, | |
444 | port->cap_usb4 + PORT_CS_19, 1); | |
445 | if (ret) | |
446 | return ret; | |
447 | } | |
448 | ||
449 | /* | |
450 | * Enable wakes from PCIe and USB 3.x on this router. Only | |
451 | * needed for device routers. | |
452 | */ | |
453 | if (route) { | |
454 | ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1); | |
455 | if (ret) | |
456 | return ret; | |
457 | ||
458 | val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU); | |
459 | if (flags & TB_WAKE_ON_USB3) | |
460 | val |= ROUTER_CS_5_WOU; | |
461 | if (flags & TB_WAKE_ON_PCIE) | |
462 | val |= ROUTER_CS_5_WOP; | |
463 | ||
464 | ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1); | |
465 | if (ret) | |
466 | return ret; | |
467 | } | |
468 | ||
469 | return 0; | |
470 | } | |
471 | ||
b0407983 MW |
472 | /** |
473 | * usb4_switch_set_sleep() - Prepare the router to enter sleep | |
474 | * @sw: USB4 router | |
475 | * | |
b2911a59 MW |
476 | * Sets sleep bit for the router. Returns when the router sleep ready |
477 | * bit has been asserted. | |
b0407983 MW |
478 | */ |
479 | int usb4_switch_set_sleep(struct tb_switch *sw) | |
480 | { | |
481 | int ret; | |
482 | u32 val; | |
483 | ||
484 | /* Set sleep bit and wait for sleep ready to be asserted */ | |
485 | ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1); | |
486 | if (ret) | |
487 | return ret; | |
488 | ||
489 | val |= ROUTER_CS_5_SLP; | |
490 | ||
491 | ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1); | |
492 | if (ret) | |
493 | return ret; | |
494 | ||
495 | return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR, | |
496 | ROUTER_CS_6_SLPR, 500); | |
497 | } | |
498 | ||
499 | /** | |
500 | * usb4_switch_nvm_sector_size() - Return router NVM sector size | |
501 | * @sw: USB4 router | |
502 | * | |
503 | * If the router supports NVM operations this function returns the NVM | |
504 | * sector size in bytes. If NVM operations are not supported returns | |
505 | * %-EOPNOTSUPP. | |
506 | */ | |
507 | int usb4_switch_nvm_sector_size(struct tb_switch *sw) | |
508 | { | |
509 | u32 metadata; | |
510 | u8 status; | |
511 | int ret; | |
512 | ||
513 | ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &status); | |
514 | if (ret) | |
515 | return ret; | |
516 | ||
517 | if (status) | |
518 | return status == 0x2 ? -EOPNOTSUPP : -EIO; | |
519 | ||
520 | ret = usb4_switch_op_read_metadata(sw, &metadata); | |
521 | if (ret) | |
522 | return ret; | |
523 | ||
524 | return metadata & USB4_NVM_SECTOR_SIZE_MASK; | |
525 | } | |
526 | ||
7e72846b | 527 | static int usb4_switch_nvm_read_block(void *data, |
b0407983 MW |
528 | unsigned int dwaddress, void *buf, size_t dwords) |
529 | { | |
7e72846b | 530 | struct tb_switch *sw = data; |
b0407983 MW |
531 | u8 status = 0; |
532 | u32 metadata; | |
533 | int ret; | |
534 | ||
535 | metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) & | |
536 | USB4_NVM_READ_LENGTH_MASK; | |
537 | metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) & | |
538 | USB4_NVM_READ_OFFSET_MASK; | |
539 | ||
540 | ret = usb4_switch_op_write_metadata(sw, metadata); | |
541 | if (ret) | |
542 | return ret; | |
543 | ||
544 | ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_READ, &status); | |
545 | if (ret) | |
546 | return ret; | |
547 | ||
548 | if (status) | |
549 | return -EIO; | |
550 | ||
551 | return usb4_switch_op_read_data(sw, buf, dwords); | |
552 | } | |
553 | ||
554 | /** | |
555 | * usb4_switch_nvm_read() - Read arbitrary bytes from router NVM | |
556 | * @sw: USB4 router | |
557 | * @address: Starting address in bytes | |
558 | * @buf: Read data is placed here | |
559 | * @size: How many bytes to read | |
560 | * | |
561 | * Reads NVM contents of the router. If NVM is not supported returns | |
562 | * %-EOPNOTSUPP. | |
563 | */ | |
564 | int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf, | |
565 | size_t size) | |
566 | { | |
7e72846b MW |
567 | return usb4_do_read_data(address, buf, size, |
568 | usb4_switch_nvm_read_block, sw); | |
b0407983 MW |
569 | } |
570 | ||
571 | static int usb4_switch_nvm_set_offset(struct tb_switch *sw, | |
572 | unsigned int address) | |
573 | { | |
574 | u32 metadata, dwaddress; | |
575 | u8 status = 0; | |
576 | int ret; | |
577 | ||
578 | dwaddress = address / 4; | |
579 | metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) & | |
580 | USB4_NVM_SET_OFFSET_MASK; | |
581 | ||
582 | ret = usb4_switch_op_write_metadata(sw, metadata); | |
583 | if (ret) | |
584 | return ret; | |
585 | ||
586 | ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &status); | |
587 | if (ret) | |
588 | return ret; | |
589 | ||
590 | return status ? -EIO : 0; | |
591 | } | |
592 | ||
7e72846b MW |
593 | static int usb4_switch_nvm_write_next_block(void *data, const void *buf, |
594 | size_t dwords) | |
b0407983 | 595 | { |
7e72846b | 596 | struct tb_switch *sw = data; |
b0407983 MW |
597 | u8 status; |
598 | int ret; | |
599 | ||
600 | ret = usb4_switch_op_write_data(sw, buf, dwords); | |
601 | if (ret) | |
602 | return ret; | |
603 | ||
604 | ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_WRITE, &status); | |
605 | if (ret) | |
606 | return ret; | |
607 | ||
608 | return status ? -EIO : 0; | |
609 | } | |
610 | ||
611 | /** | |
612 | * usb4_switch_nvm_write() - Write to the router NVM | |
613 | * @sw: USB4 router | |
614 | * @address: Start address where to write in bytes | |
615 | * @buf: Pointer to the data to write | |
616 | * @size: Size of @buf in bytes | |
617 | * | |
618 | * Writes @buf to the router NVM using USB4 router operations. If NVM | |
619 | * write is not supported returns %-EOPNOTSUPP. | |
620 | */ | |
621 | int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address, | |
622 | const void *buf, size_t size) | |
623 | { | |
624 | int ret; | |
625 | ||
626 | ret = usb4_switch_nvm_set_offset(sw, address); | |
627 | if (ret) | |
628 | return ret; | |
629 | ||
7e72846b MW |
630 | return usb4_do_write_data(address, buf, size, |
631 | usb4_switch_nvm_write_next_block, sw); | |
b0407983 MW |
632 | } |
633 | ||
634 | /** | |
635 | * usb4_switch_nvm_authenticate() - Authenticate new NVM | |
636 | * @sw: USB4 router | |
637 | * | |
638 | * After the new NVM has been written via usb4_switch_nvm_write(), this | |
661b1947 MW |
639 | * function triggers NVM authentication process. The router gets power |
640 | * cycled and if the authentication is successful the new NVM starts | |
b0407983 | 641 | * running. In case of failure returns negative errno. |
661b1947 MW |
642 | * |
643 | * The caller should call usb4_switch_nvm_authenticate_status() to read | |
644 | * the status of the authentication after power cycle. It should be the | |
645 | * first router operation to avoid the status being lost. | |
b0407983 MW |
646 | */ |
647 | int usb4_switch_nvm_authenticate(struct tb_switch *sw) | |
648 | { | |
b0407983 MW |
649 | int ret; |
650 | ||
661b1947 MW |
651 | ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, NULL); |
652 | switch (ret) { | |
653 | /* | |
654 | * The router is power cycled once NVM_AUTH is started so it is | |
655 | * expected to get any of the following errors back. | |
656 | */ | |
657 | case -EACCES: | |
658 | case -ENOTCONN: | |
659 | case -ETIMEDOUT: | |
660 | return 0; | |
661 | ||
662 | default: | |
663 | return ret; | |
664 | } | |
665 | } | |
666 | ||
667 | /** | |
668 | * usb4_switch_nvm_authenticate_status() - Read status of last NVM authenticate | |
669 | * @sw: USB4 router | |
670 | * @status: Status code of the operation | |
671 | * | |
672 | * The function checks if there is status available from the last NVM | |
673 | * authenticate router operation. If there is status then %0 is returned | |
674 | * and the status code is placed in @status. Returns negative errno in case | |
675 | * of failure. | |
676 | * | |
677 | * Must be called before any other router operation. | |
678 | */ | |
679 | int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status) | |
680 | { | |
681 | u16 opcode; | |
682 | u32 val; | |
683 | int ret; | |
684 | ||
685 | ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1); | |
b0407983 MW |
686 | if (ret) |
687 | return ret; | |
688 | ||
661b1947 MW |
689 | /* Check that the opcode is correct */ |
690 | opcode = val & ROUTER_CS_26_OPCODE_MASK; | |
691 | if (opcode == USB4_SWITCH_OP_NVM_AUTH) { | |
692 | if (val & ROUTER_CS_26_OV) | |
693 | return -EBUSY; | |
694 | if (val & ROUTER_CS_26_ONS) | |
695 | return -EOPNOTSUPP; | |
696 | ||
697 | *status = (val & ROUTER_CS_26_STATUS_MASK) >> | |
698 | ROUTER_CS_26_STATUS_SHIFT; | |
699 | } else { | |
700 | *status = 0; | |
b0407983 | 701 | } |
661b1947 MW |
702 | |
703 | return 0; | |
b0407983 MW |
704 | } |
705 | ||
706 | /** | |
707 | * usb4_switch_query_dp_resource() - Query availability of DP IN resource | |
708 | * @sw: USB4 router | |
709 | * @in: DP IN adapter | |
710 | * | |
711 | * For DP tunneling this function can be used to query availability of | |
712 | * DP IN resource. Returns true if the resource is available for DP | |
713 | * tunneling, false otherwise. | |
714 | */ | |
715 | bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in) | |
716 | { | |
717 | u8 status; | |
718 | int ret; | |
719 | ||
720 | ret = usb4_switch_op_write_metadata(sw, in->port); | |
721 | if (ret) | |
722 | return false; | |
723 | ||
724 | ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &status); | |
725 | /* | |
726 | * If DP resource allocation is not supported assume it is | |
727 | * always available. | |
728 | */ | |
729 | if (ret == -EOPNOTSUPP) | |
730 | return true; | |
731 | else if (ret) | |
732 | return false; | |
733 | ||
734 | return !status; | |
735 | } | |
736 | ||
737 | /** | |
738 | * usb4_switch_alloc_dp_resource() - Allocate DP IN resource | |
739 | * @sw: USB4 router | |
740 | * @in: DP IN adapter | |
741 | * | |
742 | * Allocates DP IN resource for DP tunneling using USB4 router | |
743 | * operations. If the resource was allocated returns %0. Otherwise | |
744 | * returns negative errno, in particular %-EBUSY if the resource is | |
745 | * already allocated. | |
746 | */ | |
747 | int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in) | |
748 | { | |
749 | u8 status; | |
750 | int ret; | |
751 | ||
752 | ret = usb4_switch_op_write_metadata(sw, in->port); | |
753 | if (ret) | |
754 | return ret; | |
755 | ||
756 | ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &status); | |
757 | if (ret == -EOPNOTSUPP) | |
758 | return 0; | |
759 | else if (ret) | |
760 | return ret; | |
761 | ||
762 | return status ? -EBUSY : 0; | |
763 | } | |
764 | ||
765 | /** | |
766 | * usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource | |
767 | * @sw: USB4 router | |
768 | * @in: DP IN adapter | |
769 | * | |
770 | * Releases the previously allocated DP IN resource. | |
771 | */ | |
772 | int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in) | |
773 | { | |
774 | u8 status; | |
775 | int ret; | |
776 | ||
777 | ret = usb4_switch_op_write_metadata(sw, in->port); | |
778 | if (ret) | |
779 | return ret; | |
780 | ||
781 | ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &status); | |
782 | if (ret == -EOPNOTSUPP) | |
783 | return 0; | |
784 | else if (ret) | |
785 | return ret; | |
786 | ||
787 | return status ? -EIO : 0; | |
788 | } | |
789 | ||
790 | static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port) | |
791 | { | |
792 | struct tb_port *p; | |
793 | int usb4_idx = 0; | |
794 | ||
795 | /* Assume port is primary */ | |
796 | tb_switch_for_each_port(sw, p) { | |
797 | if (!tb_port_is_null(p)) | |
798 | continue; | |
799 | if (tb_is_upstream_port(p)) | |
800 | continue; | |
801 | if (!p->link_nr) { | |
802 | if (p == port) | |
803 | break; | |
804 | usb4_idx++; | |
805 | } | |
806 | } | |
807 | ||
808 | return usb4_idx; | |
809 | } | |
810 | ||
811 | /** | |
812 | * usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter | |
813 | * @sw: USB4 router | |
814 | * @port: USB4 port | |
815 | * | |
816 | * USB4 routers have direct mapping between USB4 ports and PCIe | |
817 | * downstream adapters where the PCIe topology is extended. This | |
818 | * function returns the corresponding downstream PCIe adapter or %NULL | |
819 | * if no such mapping was possible. | |
820 | */ | |
821 | struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw, | |
822 | const struct tb_port *port) | |
823 | { | |
824 | int usb4_idx = usb4_port_idx(sw, port); | |
825 | struct tb_port *p; | |
826 | int pcie_idx = 0; | |
827 | ||
828 | /* Find PCIe down port matching usb4_port */ | |
829 | tb_switch_for_each_port(sw, p) { | |
830 | if (!tb_port_is_pcie_down(p)) | |
831 | continue; | |
832 | ||
9cac51a0 | 833 | if (pcie_idx == usb4_idx) |
b0407983 MW |
834 | return p; |
835 | ||
836 | pcie_idx++; | |
837 | } | |
838 | ||
839 | return NULL; | |
840 | } | |
841 | ||
e6f81858 RM |
842 | /** |
843 | * usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter | |
844 | * @sw: USB4 router | |
845 | * @port: USB4 port | |
846 | * | |
847 | * USB4 routers have direct mapping between USB4 ports and USB 3.x | |
848 | * downstream adapters where the USB 3.x topology is extended. This | |
849 | * function returns the corresponding downstream USB 3.x adapter or | |
850 | * %NULL if no such mapping was possible. | |
851 | */ | |
852 | struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw, | |
853 | const struct tb_port *port) | |
854 | { | |
855 | int usb4_idx = usb4_port_idx(sw, port); | |
856 | struct tb_port *p; | |
857 | int usb_idx = 0; | |
858 | ||
859 | /* Find USB3 down port matching usb4_port */ | |
860 | tb_switch_for_each_port(sw, p) { | |
861 | if (!tb_port_is_usb3_down(p)) | |
862 | continue; | |
863 | ||
77cfa40f | 864 | if (usb_idx == usb4_idx) |
e6f81858 RM |
865 | return p; |
866 | ||
867 | usb_idx++; | |
868 | } | |
869 | ||
870 | return NULL; | |
871 | } | |
872 | ||
b0407983 MW |
873 | /** |
874 | * usb4_port_unlock() - Unlock USB4 downstream port | |
875 | * @port: USB4 port to unlock | |
876 | * | |
877 | * Unlocks USB4 downstream port so that the connection manager can | |
878 | * access the router below this port. | |
879 | */ | |
880 | int usb4_port_unlock(struct tb_port *port) | |
881 | { | |
882 | int ret; | |
883 | u32 val; | |
884 | ||
885 | ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1); | |
886 | if (ret) | |
887 | return ret; | |
888 | ||
889 | val &= ~ADP_CS_4_LCK; | |
890 | return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1); | |
891 | } | |
3b1d8d57 | 892 | |
e28178bf MW |
893 | static int usb4_port_set_configured(struct tb_port *port, bool configured) |
894 | { | |
895 | int ret; | |
896 | u32 val; | |
897 | ||
898 | if (!port->cap_usb4) | |
899 | return -EINVAL; | |
900 | ||
901 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
902 | port->cap_usb4 + PORT_CS_19, 1); | |
903 | if (ret) | |
904 | return ret; | |
905 | ||
906 | if (configured) | |
907 | val |= PORT_CS_19_PC; | |
908 | else | |
909 | val &= ~PORT_CS_19_PC; | |
910 | ||
911 | return tb_port_write(port, &val, TB_CFG_PORT, | |
912 | port->cap_usb4 + PORT_CS_19, 1); | |
913 | } | |
914 | ||
915 | /** | |
916 | * usb4_port_configure() - Set USB4 port configured | |
917 | * @port: USB4 router | |
918 | * | |
919 | * Sets the USB4 link to be configured for power management purposes. | |
920 | */ | |
921 | int usb4_port_configure(struct tb_port *port) | |
922 | { | |
923 | return usb4_port_set_configured(port, true); | |
924 | } | |
925 | ||
926 | /** | |
927 | * usb4_port_unconfigure() - Set USB4 port unconfigured | |
928 | * @port: USB4 router | |
929 | * | |
930 | * Sets the USB4 link to be unconfigured for power management purposes. | |
931 | */ | |
932 | void usb4_port_unconfigure(struct tb_port *port) | |
933 | { | |
934 | usb4_port_set_configured(port, false); | |
935 | } | |
936 | ||
284652a4 MW |
937 | static int usb4_set_xdomain_configured(struct tb_port *port, bool configured) |
938 | { | |
939 | int ret; | |
940 | u32 val; | |
941 | ||
942 | if (!port->cap_usb4) | |
943 | return -EINVAL; | |
944 | ||
945 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
946 | port->cap_usb4 + PORT_CS_19, 1); | |
947 | if (ret) | |
948 | return ret; | |
949 | ||
950 | if (configured) | |
951 | val |= PORT_CS_19_PID; | |
952 | else | |
953 | val &= ~PORT_CS_19_PID; | |
954 | ||
955 | return tb_port_write(port, &val, TB_CFG_PORT, | |
956 | port->cap_usb4 + PORT_CS_19, 1); | |
957 | } | |
958 | ||
959 | /** | |
960 | * usb4_port_configure_xdomain() - Configure port for XDomain | |
961 | * @port: USB4 port connected to another host | |
962 | * | |
963 | * Marks the USB4 port as being connected to another host. Returns %0 in | |
964 | * success and negative errno in failure. | |
965 | */ | |
966 | int usb4_port_configure_xdomain(struct tb_port *port) | |
967 | { | |
968 | return usb4_set_xdomain_configured(port, true); | |
969 | } | |
970 | ||
971 | /** | |
972 | * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain | |
973 | * @port: USB4 port that was connected to another host | |
974 | * | |
975 | * Clears USB4 port from being marked as XDomain. | |
976 | */ | |
977 | void usb4_port_unconfigure_xdomain(struct tb_port *port) | |
978 | { | |
979 | usb4_set_xdomain_configured(port, false); | |
980 | } | |
981 | ||
3b1d8d57 MW |
982 | static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit, |
983 | u32 value, int timeout_msec) | |
984 | { | |
985 | ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec); | |
986 | ||
987 | do { | |
988 | u32 val; | |
989 | int ret; | |
990 | ||
991 | ret = tb_port_read(port, &val, TB_CFG_PORT, offset, 1); | |
992 | if (ret) | |
993 | return ret; | |
994 | ||
995 | if ((val & bit) == value) | |
996 | return 0; | |
997 | ||
998 | usleep_range(50, 100); | |
999 | } while (ktime_before(ktime_get(), timeout)); | |
1000 | ||
1001 | return -ETIMEDOUT; | |
1002 | } | |
1003 | ||
02d12855 RM |
1004 | static int usb4_port_read_data(struct tb_port *port, void *data, size_t dwords) |
1005 | { | |
1006 | if (dwords > USB4_DATA_DWORDS) | |
1007 | return -EINVAL; | |
1008 | ||
1009 | return tb_port_read(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2, | |
1010 | dwords); | |
1011 | } | |
1012 | ||
1013 | static int usb4_port_write_data(struct tb_port *port, const void *data, | |
1014 | size_t dwords) | |
1015 | { | |
1016 | if (dwords > USB4_DATA_DWORDS) | |
1017 | return -EINVAL; | |
1018 | ||
1019 | return tb_port_write(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2, | |
1020 | dwords); | |
1021 | } | |
1022 | ||
1023 | static int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target, | |
1024 | u8 index, u8 reg, void *buf, u8 size) | |
1025 | { | |
1026 | size_t dwords = DIV_ROUND_UP(size, 4); | |
1027 | int ret; | |
1028 | u32 val; | |
1029 | ||
1030 | if (!port->cap_usb4) | |
1031 | return -EINVAL; | |
1032 | ||
1033 | val = reg; | |
1034 | val |= size << PORT_CS_1_LENGTH_SHIFT; | |
1035 | val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK; | |
1036 | if (target == USB4_SB_TARGET_RETIMER) | |
1037 | val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT); | |
1038 | val |= PORT_CS_1_PND; | |
1039 | ||
1040 | ret = tb_port_write(port, &val, TB_CFG_PORT, | |
1041 | port->cap_usb4 + PORT_CS_1, 1); | |
1042 | if (ret) | |
1043 | return ret; | |
1044 | ||
1045 | ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1, | |
1046 | PORT_CS_1_PND, 0, 500); | |
1047 | if (ret) | |
1048 | return ret; | |
1049 | ||
1050 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
1051 | port->cap_usb4 + PORT_CS_1, 1); | |
1052 | if (ret) | |
1053 | return ret; | |
1054 | ||
1055 | if (val & PORT_CS_1_NR) | |
1056 | return -ENODEV; | |
1057 | if (val & PORT_CS_1_RC) | |
1058 | return -EIO; | |
1059 | ||
1060 | return buf ? usb4_port_read_data(port, buf, dwords) : 0; | |
1061 | } | |
1062 | ||
1063 | static int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target, | |
1064 | u8 index, u8 reg, const void *buf, u8 size) | |
1065 | { | |
1066 | size_t dwords = DIV_ROUND_UP(size, 4); | |
1067 | int ret; | |
1068 | u32 val; | |
1069 | ||
1070 | if (!port->cap_usb4) | |
1071 | return -EINVAL; | |
1072 | ||
1073 | if (buf) { | |
1074 | ret = usb4_port_write_data(port, buf, dwords); | |
1075 | if (ret) | |
1076 | return ret; | |
1077 | } | |
1078 | ||
1079 | val = reg; | |
1080 | val |= size << PORT_CS_1_LENGTH_SHIFT; | |
1081 | val |= PORT_CS_1_WNR_WRITE; | |
1082 | val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK; | |
1083 | if (target == USB4_SB_TARGET_RETIMER) | |
1084 | val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT); | |
1085 | val |= PORT_CS_1_PND; | |
1086 | ||
1087 | ret = tb_port_write(port, &val, TB_CFG_PORT, | |
1088 | port->cap_usb4 + PORT_CS_1, 1); | |
1089 | if (ret) | |
1090 | return ret; | |
1091 | ||
1092 | ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1, | |
1093 | PORT_CS_1_PND, 0, 500); | |
1094 | if (ret) | |
1095 | return ret; | |
1096 | ||
1097 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
1098 | port->cap_usb4 + PORT_CS_1, 1); | |
1099 | if (ret) | |
1100 | return ret; | |
1101 | ||
1102 | if (val & PORT_CS_1_NR) | |
1103 | return -ENODEV; | |
1104 | if (val & PORT_CS_1_RC) | |
1105 | return -EIO; | |
1106 | ||
1107 | return 0; | |
1108 | } | |
1109 | ||
1110 | static int usb4_port_sb_op(struct tb_port *port, enum usb4_sb_target target, | |
1111 | u8 index, enum usb4_sb_opcode opcode, int timeout_msec) | |
1112 | { | |
1113 | ktime_t timeout; | |
1114 | u32 val; | |
1115 | int ret; | |
1116 | ||
1117 | val = opcode; | |
1118 | ret = usb4_port_sb_write(port, target, index, USB4_SB_OPCODE, &val, | |
1119 | sizeof(val)); | |
1120 | if (ret) | |
1121 | return ret; | |
1122 | ||
1123 | timeout = ktime_add_ms(ktime_get(), timeout_msec); | |
1124 | ||
1125 | do { | |
1126 | /* Check results */ | |
1127 | ret = usb4_port_sb_read(port, target, index, USB4_SB_OPCODE, | |
1128 | &val, sizeof(val)); | |
1129 | if (ret) | |
1130 | return ret; | |
1131 | ||
1132 | switch (val) { | |
1133 | case 0: | |
1134 | return 0; | |
1135 | ||
1136 | case USB4_SB_OPCODE_ERR: | |
1137 | return -EAGAIN; | |
1138 | ||
1139 | case USB4_SB_OPCODE_ONS: | |
1140 | return -EOPNOTSUPP; | |
1141 | ||
1142 | default: | |
1143 | if (val != opcode) | |
1144 | return -EIO; | |
1145 | break; | |
1146 | } | |
1147 | } while (ktime_before(ktime_get(), timeout)); | |
1148 | ||
1149 | return -ETIMEDOUT; | |
1150 | } | |
1151 | ||
1152 | /** | |
1153 | * usb4_port_enumerate_retimers() - Send RT broadcast transaction | |
1154 | * @port: USB4 port | |
1155 | * | |
1156 | * This forces the USB4 port to send broadcast RT transaction which | |
1157 | * makes the retimers on the link to assign index to themselves. Returns | |
1158 | * %0 in case of success and negative errno if there was an error. | |
1159 | */ | |
1160 | int usb4_port_enumerate_retimers(struct tb_port *port) | |
1161 | { | |
1162 | u32 val; | |
1163 | ||
1164 | val = USB4_SB_OPCODE_ENUMERATE_RETIMERS; | |
1165 | return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0, | |
1166 | USB4_SB_OPCODE, &val, sizeof(val)); | |
1167 | } | |
1168 | ||
1169 | static inline int usb4_port_retimer_op(struct tb_port *port, u8 index, | |
1170 | enum usb4_sb_opcode opcode, | |
1171 | int timeout_msec) | |
1172 | { | |
1173 | return usb4_port_sb_op(port, USB4_SB_TARGET_RETIMER, index, opcode, | |
1174 | timeout_msec); | |
1175 | } | |
1176 | ||
1177 | /** | |
1178 | * usb4_port_retimer_read() - Read from retimer sideband registers | |
1179 | * @port: USB4 port | |
1180 | * @index: Retimer index | |
1181 | * @reg: Sideband register to read | |
1182 | * @buf: Data from @reg is stored here | |
1183 | * @size: Number of bytes to read | |
1184 | * | |
1185 | * Function reads retimer sideband registers starting from @reg. The | |
1186 | * retimer is connected to @port at @index. Returns %0 in case of | |
1187 | * success, and read data is copied to @buf. If there is no retimer | |
1188 | * present at given @index returns %-ENODEV. In any other failure | |
1189 | * returns negative errno. | |
1190 | */ | |
1191 | int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf, | |
1192 | u8 size) | |
1193 | { | |
1194 | return usb4_port_sb_read(port, USB4_SB_TARGET_RETIMER, index, reg, buf, | |
1195 | size); | |
1196 | } | |
1197 | ||
1198 | /** | |
1199 | * usb4_port_retimer_write() - Write to retimer sideband registers | |
1200 | * @port: USB4 port | |
1201 | * @index: Retimer index | |
1202 | * @reg: Sideband register to write | |
1203 | * @buf: Data that is written starting from @reg | |
1204 | * @size: Number of bytes to write | |
1205 | * | |
1206 | * Writes retimer sideband registers starting from @reg. The retimer is | |
1207 | * connected to @port at @index. Returns %0 in case of success. If there | |
1208 | * is no retimer present at given @index returns %-ENODEV. In any other | |
1209 | * failure returns negative errno. | |
1210 | */ | |
1211 | int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg, | |
1212 | const void *buf, u8 size) | |
1213 | { | |
1214 | return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, reg, buf, | |
1215 | size); | |
1216 | } | |
1217 | ||
1218 | /** | |
1219 | * usb4_port_retimer_is_last() - Is the retimer last on-board retimer | |
1220 | * @port: USB4 port | |
1221 | * @index: Retimer index | |
1222 | * | |
1223 | * If the retimer at @index is last one (connected directly to the | |
1224 | * Type-C port) this function returns %1. If it is not returns %0. If | |
1225 | * the retimer is not present returns %-ENODEV. Otherwise returns | |
1226 | * negative errno. | |
1227 | */ | |
1228 | int usb4_port_retimer_is_last(struct tb_port *port, u8 index) | |
1229 | { | |
1230 | u32 metadata; | |
1231 | int ret; | |
1232 | ||
1233 | ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_QUERY_LAST_RETIMER, | |
1234 | 500); | |
1235 | if (ret) | |
1236 | return ret; | |
1237 | ||
1238 | ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata, | |
1239 | sizeof(metadata)); | |
1240 | return ret ? ret : metadata & 1; | |
1241 | } | |
1242 | ||
1243 | /** | |
1244 | * usb4_port_retimer_nvm_sector_size() - Read retimer NVM sector size | |
1245 | * @port: USB4 port | |
1246 | * @index: Retimer index | |
1247 | * | |
1248 | * Reads NVM sector size (in bytes) of a retimer at @index. This | |
1249 | * operation can be used to determine whether the retimer supports NVM | |
1250 | * upgrade for example. Returns sector size in bytes or negative errno | |
1251 | * in case of error. Specifically returns %-ENODEV if there is no | |
1252 | * retimer at @index. | |
1253 | */ | |
1254 | int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index) | |
1255 | { | |
1256 | u32 metadata; | |
1257 | int ret; | |
1258 | ||
1259 | ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE, | |
1260 | 500); | |
1261 | if (ret) | |
1262 | return ret; | |
1263 | ||
1264 | ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata, | |
1265 | sizeof(metadata)); | |
1266 | return ret ? ret : metadata & USB4_NVM_SECTOR_SIZE_MASK; | |
1267 | } | |
1268 | ||
1269 | static int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index, | |
1270 | unsigned int address) | |
1271 | { | |
1272 | u32 metadata, dwaddress; | |
1273 | int ret; | |
1274 | ||
1275 | dwaddress = address / 4; | |
1276 | metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) & | |
1277 | USB4_NVM_SET_OFFSET_MASK; | |
1278 | ||
1279 | ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata, | |
1280 | sizeof(metadata)); | |
1281 | if (ret) | |
1282 | return ret; | |
1283 | ||
1284 | return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_SET_OFFSET, | |
1285 | 500); | |
1286 | } | |
1287 | ||
1288 | struct retimer_info { | |
1289 | struct tb_port *port; | |
1290 | u8 index; | |
1291 | }; | |
1292 | ||
1293 | static int usb4_port_retimer_nvm_write_next_block(void *data, const void *buf, | |
1294 | size_t dwords) | |
1295 | ||
1296 | { | |
1297 | const struct retimer_info *info = data; | |
1298 | struct tb_port *port = info->port; | |
1299 | u8 index = info->index; | |
1300 | int ret; | |
1301 | ||
1302 | ret = usb4_port_retimer_write(port, index, USB4_SB_DATA, | |
1303 | buf, dwords * 4); | |
1304 | if (ret) | |
1305 | return ret; | |
1306 | ||
1307 | return usb4_port_retimer_op(port, index, | |
1308 | USB4_SB_OPCODE_NVM_BLOCK_WRITE, 1000); | |
1309 | } | |
1310 | ||
1311 | /** | |
1312 | * usb4_port_retimer_nvm_write() - Write to retimer NVM | |
1313 | * @port: USB4 port | |
1314 | * @index: Retimer index | |
1315 | * @address: Byte address where to start the write | |
1316 | * @buf: Data to write | |
1317 | * @size: Size in bytes how much to write | |
1318 | * | |
1319 | * Writes @size bytes from @buf to the retimer NVM. Used for NVM | |
1320 | * upgrade. Returns %0 if the data was written successfully and negative | |
1321 | * errno in case of failure. Specifically returns %-ENODEV if there is | |
1322 | * no retimer at @index. | |
1323 | */ | |
1324 | int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, unsigned int address, | |
1325 | const void *buf, size_t size) | |
1326 | { | |
1327 | struct retimer_info info = { .port = port, .index = index }; | |
1328 | int ret; | |
1329 | ||
1330 | ret = usb4_port_retimer_nvm_set_offset(port, index, address); | |
1331 | if (ret) | |
1332 | return ret; | |
1333 | ||
1334 | return usb4_do_write_data(address, buf, size, | |
1335 | usb4_port_retimer_nvm_write_next_block, &info); | |
1336 | } | |
1337 | ||
1338 | /** | |
1339 | * usb4_port_retimer_nvm_authenticate() - Start retimer NVM upgrade | |
1340 | * @port: USB4 port | |
1341 | * @index: Retimer index | |
1342 | * | |
1343 | * After the new NVM image has been written via usb4_port_retimer_nvm_write() | |
1344 | * this function can be used to trigger the NVM upgrade process. If | |
1345 | * successful the retimer restarts with the new NVM and may not have the | |
1346 | * index set so one needs to call usb4_port_enumerate_retimers() to | |
1347 | * force index to be assigned. | |
1348 | */ | |
1349 | int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index) | |
1350 | { | |
1351 | u32 val; | |
1352 | ||
1353 | /* | |
1354 | * We need to use the raw operation here because once the | |
1355 | * authentication completes the retimer index is not set anymore | |
1356 | * so we do not get back the status now. | |
1357 | */ | |
1358 | val = USB4_SB_OPCODE_NVM_AUTH_WRITE; | |
1359 | return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, | |
1360 | USB4_SB_OPCODE, &val, sizeof(val)); | |
1361 | } | |
1362 | ||
1363 | /** | |
1364 | * usb4_port_retimer_nvm_authenticate_status() - Read status of NVM upgrade | |
1365 | * @port: USB4 port | |
1366 | * @index: Retimer index | |
1367 | * @status: Raw status code read from metadata | |
1368 | * | |
1369 | * This can be called after usb4_port_retimer_nvm_authenticate() and | |
1370 | * usb4_port_enumerate_retimers() to fetch status of the NVM upgrade. | |
1371 | * | |
1372 | * Returns %0 if the authentication status was successfully read. The | |
1373 | * completion metadata (the result) is then stored into @status. If | |
1374 | * reading the status fails, returns negative errno. | |
1375 | */ | |
1376 | int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index, | |
1377 | u32 *status) | |
1378 | { | |
1379 | u32 metadata, val; | |
1380 | int ret; | |
1381 | ||
1382 | ret = usb4_port_retimer_read(port, index, USB4_SB_OPCODE, &val, | |
1383 | sizeof(val)); | |
1384 | if (ret) | |
1385 | return ret; | |
1386 | ||
1387 | switch (val) { | |
1388 | case 0: | |
1389 | *status = 0; | |
1390 | return 0; | |
1391 | ||
1392 | case USB4_SB_OPCODE_ERR: | |
1393 | ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, | |
1394 | &metadata, sizeof(metadata)); | |
1395 | if (ret) | |
1396 | return ret; | |
1397 | ||
1398 | *status = metadata & USB4_SB_METADATA_NVM_AUTH_WRITE_MASK; | |
1399 | return 0; | |
1400 | ||
1401 | case USB4_SB_OPCODE_ONS: | |
1402 | return -EOPNOTSUPP; | |
1403 | ||
1404 | default: | |
1405 | return -EIO; | |
1406 | } | |
1407 | } | |
1408 | ||
1409 | static int usb4_port_retimer_nvm_read_block(void *data, unsigned int dwaddress, | |
1410 | void *buf, size_t dwords) | |
1411 | { | |
1412 | const struct retimer_info *info = data; | |
1413 | struct tb_port *port = info->port; | |
1414 | u8 index = info->index; | |
1415 | u32 metadata; | |
1416 | int ret; | |
1417 | ||
1418 | metadata = dwaddress << USB4_NVM_READ_OFFSET_SHIFT; | |
1419 | if (dwords < USB4_DATA_DWORDS) | |
1420 | metadata |= dwords << USB4_NVM_READ_LENGTH_SHIFT; | |
1421 | ||
1422 | ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata, | |
1423 | sizeof(metadata)); | |
1424 | if (ret) | |
1425 | return ret; | |
1426 | ||
1427 | ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_READ, 500); | |
1428 | if (ret) | |
1429 | return ret; | |
1430 | ||
1431 | return usb4_port_retimer_read(port, index, USB4_SB_DATA, buf, | |
1432 | dwords * 4); | |
1433 | } | |
1434 | ||
1435 | /** | |
1436 | * usb4_port_retimer_nvm_read() - Read contents of retimer NVM | |
1437 | * @port: USB4 port | |
1438 | * @index: Retimer index | |
1439 | * @address: NVM address (in bytes) to start reading | |
1440 | * @buf: Data read from NVM is stored here | |
1441 | * @size: Number of bytes to read | |
1442 | * | |
1443 | * Reads retimer NVM and copies the contents to @buf. Returns %0 if the | |
1444 | * read was successful and negative errno in case of failure. | |
1445 | * Specifically returns %-ENODEV if there is no retimer at @index. | |
1446 | */ | |
1447 | int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index, | |
1448 | unsigned int address, void *buf, size_t size) | |
1449 | { | |
1450 | struct retimer_info info = { .port = port, .index = index }; | |
1451 | ||
1452 | return usb4_do_read_data(address, buf, size, | |
1453 | usb4_port_retimer_nvm_read_block, &info); | |
1454 | } | |
1455 | ||
3b1d8d57 MW |
1456 | /** |
1457 | * usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate | |
1458 | * @port: USB3 adapter port | |
1459 | * | |
1460 | * Return maximum supported link rate of a USB3 adapter in Mb/s. | |
1461 | * Negative errno in case of error. | |
1462 | */ | |
1463 | int usb4_usb3_port_max_link_rate(struct tb_port *port) | |
1464 | { | |
1465 | int ret, lr; | |
1466 | u32 val; | |
1467 | ||
1468 | if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port)) | |
1469 | return -EINVAL; | |
1470 | ||
1471 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
1472 | port->cap_adap + ADP_USB3_CS_4, 1); | |
1473 | if (ret) | |
1474 | return ret; | |
1475 | ||
1476 | lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT; | |
1477 | return lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000; | |
1478 | } | |
1479 | ||
1480 | /** | |
1481 | * usb4_usb3_port_actual_link_rate() - Established USB3 link rate | |
1482 | * @port: USB3 adapter port | |
1483 | * | |
1484 | * Return actual established link rate of a USB3 adapter in Mb/s. If the | |
1485 | * link is not up returns %0 and negative errno in case of failure. | |
1486 | */ | |
1487 | int usb4_usb3_port_actual_link_rate(struct tb_port *port) | |
1488 | { | |
1489 | int ret, lr; | |
1490 | u32 val; | |
1491 | ||
1492 | if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port)) | |
1493 | return -EINVAL; | |
1494 | ||
1495 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
1496 | port->cap_adap + ADP_USB3_CS_4, 1); | |
1497 | if (ret) | |
1498 | return ret; | |
1499 | ||
1500 | if (!(val & ADP_USB3_CS_4_ULV)) | |
1501 | return 0; | |
1502 | ||
1503 | lr = val & ADP_USB3_CS_4_ALR_MASK; | |
1504 | return lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000; | |
1505 | } | |
1506 | ||
1507 | static int usb4_usb3_port_cm_request(struct tb_port *port, bool request) | |
1508 | { | |
1509 | int ret; | |
1510 | u32 val; | |
1511 | ||
1512 | if (!tb_port_is_usb3_down(port)) | |
1513 | return -EINVAL; | |
1514 | if (tb_route(port->sw)) | |
1515 | return -EINVAL; | |
1516 | ||
1517 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
1518 | port->cap_adap + ADP_USB3_CS_2, 1); | |
1519 | if (ret) | |
1520 | return ret; | |
1521 | ||
1522 | if (request) | |
1523 | val |= ADP_USB3_CS_2_CMR; | |
1524 | else | |
1525 | val &= ~ADP_USB3_CS_2_CMR; | |
1526 | ||
1527 | ret = tb_port_write(port, &val, TB_CFG_PORT, | |
1528 | port->cap_adap + ADP_USB3_CS_2, 1); | |
1529 | if (ret) | |
1530 | return ret; | |
1531 | ||
1532 | /* | |
1533 | * We can use val here directly as the CMR bit is in the same place | |
1534 | * as HCA. Just mask out others. | |
1535 | */ | |
1536 | val &= ADP_USB3_CS_2_CMR; | |
1537 | return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1, | |
1538 | ADP_USB3_CS_1_HCA, val, 1500); | |
1539 | } | |
1540 | ||
1541 | static inline int usb4_usb3_port_set_cm_request(struct tb_port *port) | |
1542 | { | |
1543 | return usb4_usb3_port_cm_request(port, true); | |
1544 | } | |
1545 | ||
1546 | static inline int usb4_usb3_port_clear_cm_request(struct tb_port *port) | |
1547 | { | |
1548 | return usb4_usb3_port_cm_request(port, false); | |
1549 | } | |
1550 | ||
1551 | static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale) | |
1552 | { | |
1553 | unsigned long uframes; | |
1554 | ||
4c767ce4 | 1555 | uframes = bw * 512UL << scale; |
3b1d8d57 MW |
1556 | return DIV_ROUND_CLOSEST(uframes * 8000, 1000 * 1000); |
1557 | } | |
1558 | ||
1559 | static u32 mbps_to_usb3_bw(unsigned int mbps, u8 scale) | |
1560 | { | |
1561 | unsigned long uframes; | |
1562 | ||
1563 | /* 1 uframe is 1/8 ms (125 us) -> 1 / 8000 s */ | |
1564 | uframes = ((unsigned long)mbps * 1000 * 1000) / 8000; | |
4c767ce4 | 1565 | return DIV_ROUND_UP(uframes, 512UL << scale); |
3b1d8d57 MW |
1566 | } |
1567 | ||
1568 | static int usb4_usb3_port_read_allocated_bandwidth(struct tb_port *port, | |
1569 | int *upstream_bw, | |
1570 | int *downstream_bw) | |
1571 | { | |
1572 | u32 val, bw, scale; | |
1573 | int ret; | |
1574 | ||
1575 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
1576 | port->cap_adap + ADP_USB3_CS_2, 1); | |
1577 | if (ret) | |
1578 | return ret; | |
1579 | ||
1580 | ret = tb_port_read(port, &scale, TB_CFG_PORT, | |
1581 | port->cap_adap + ADP_USB3_CS_3, 1); | |
1582 | if (ret) | |
1583 | return ret; | |
1584 | ||
1585 | scale &= ADP_USB3_CS_3_SCALE_MASK; | |
1586 | ||
1587 | bw = val & ADP_USB3_CS_2_AUBW_MASK; | |
1588 | *upstream_bw = usb3_bw_to_mbps(bw, scale); | |
1589 | ||
1590 | bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT; | |
1591 | *downstream_bw = usb3_bw_to_mbps(bw, scale); | |
1592 | ||
1593 | return 0; | |
1594 | } | |
1595 | ||
1596 | /** | |
1597 | * usb4_usb3_port_allocated_bandwidth() - Bandwidth allocated for USB3 | |
1598 | * @port: USB3 adapter port | |
1599 | * @upstream_bw: Allocated upstream bandwidth is stored here | |
1600 | * @downstream_bw: Allocated downstream bandwidth is stored here | |
1601 | * | |
1602 | * Stores currently allocated USB3 bandwidth into @upstream_bw and | |
1603 | * @downstream_bw in Mb/s. Returns %0 in case of success and negative | |
1604 | * errno in failure. | |
1605 | */ | |
1606 | int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw, | |
1607 | int *downstream_bw) | |
1608 | { | |
1609 | int ret; | |
1610 | ||
1611 | ret = usb4_usb3_port_set_cm_request(port); | |
1612 | if (ret) | |
1613 | return ret; | |
1614 | ||
1615 | ret = usb4_usb3_port_read_allocated_bandwidth(port, upstream_bw, | |
1616 | downstream_bw); | |
1617 | usb4_usb3_port_clear_cm_request(port); | |
1618 | ||
1619 | return ret; | |
1620 | } | |
1621 | ||
1622 | static int usb4_usb3_port_read_consumed_bandwidth(struct tb_port *port, | |
1623 | int *upstream_bw, | |
1624 | int *downstream_bw) | |
1625 | { | |
1626 | u32 val, bw, scale; | |
1627 | int ret; | |
1628 | ||
1629 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
1630 | port->cap_adap + ADP_USB3_CS_1, 1); | |
1631 | if (ret) | |
1632 | return ret; | |
1633 | ||
1634 | ret = tb_port_read(port, &scale, TB_CFG_PORT, | |
1635 | port->cap_adap + ADP_USB3_CS_3, 1); | |
1636 | if (ret) | |
1637 | return ret; | |
1638 | ||
1639 | scale &= ADP_USB3_CS_3_SCALE_MASK; | |
1640 | ||
1641 | bw = val & ADP_USB3_CS_1_CUBW_MASK; | |
1642 | *upstream_bw = usb3_bw_to_mbps(bw, scale); | |
1643 | ||
1644 | bw = (val & ADP_USB3_CS_1_CDBW_MASK) >> ADP_USB3_CS_1_CDBW_SHIFT; | |
1645 | *downstream_bw = usb3_bw_to_mbps(bw, scale); | |
1646 | ||
1647 | return 0; | |
1648 | } | |
1649 | ||
1650 | static int usb4_usb3_port_write_allocated_bandwidth(struct tb_port *port, | |
1651 | int upstream_bw, | |
1652 | int downstream_bw) | |
1653 | { | |
1654 | u32 val, ubw, dbw, scale; | |
1655 | int ret; | |
1656 | ||
1657 | /* Read the used scale, hardware default is 0 */ | |
1658 | ret = tb_port_read(port, &scale, TB_CFG_PORT, | |
1659 | port->cap_adap + ADP_USB3_CS_3, 1); | |
1660 | if (ret) | |
1661 | return ret; | |
1662 | ||
1663 | scale &= ADP_USB3_CS_3_SCALE_MASK; | |
1664 | ubw = mbps_to_usb3_bw(upstream_bw, scale); | |
1665 | dbw = mbps_to_usb3_bw(downstream_bw, scale); | |
1666 | ||
1667 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
1668 | port->cap_adap + ADP_USB3_CS_2, 1); | |
1669 | if (ret) | |
1670 | return ret; | |
1671 | ||
1672 | val &= ~(ADP_USB3_CS_2_AUBW_MASK | ADP_USB3_CS_2_ADBW_MASK); | |
1673 | val |= dbw << ADP_USB3_CS_2_ADBW_SHIFT; | |
1674 | val |= ubw; | |
1675 | ||
1676 | return tb_port_write(port, &val, TB_CFG_PORT, | |
1677 | port->cap_adap + ADP_USB3_CS_2, 1); | |
1678 | } | |
1679 | ||
1680 | /** | |
1681 | * usb4_usb3_port_allocate_bandwidth() - Allocate bandwidth for USB3 | |
1682 | * @port: USB3 adapter port | |
1683 | * @upstream_bw: New upstream bandwidth | |
1684 | * @downstream_bw: New downstream bandwidth | |
1685 | * | |
1686 | * This can be used to set how much bandwidth is allocated for the USB3 | |
1687 | * tunneled isochronous traffic. @upstream_bw and @downstream_bw are the | |
1688 | * new values programmed to the USB3 adapter allocation registers. If | |
1689 | * the values are lower than what is currently consumed the allocation | |
1690 | * is set to what is currently consumed instead (consumed bandwidth | |
1691 | * cannot be taken away by CM). The actual new values are returned in | |
1692 | * @upstream_bw and @downstream_bw. | |
1693 | * | |
1694 | * Returns %0 in case of success and negative errno if there was a | |
1695 | * failure. | |
1696 | */ | |
1697 | int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw, | |
1698 | int *downstream_bw) | |
1699 | { | |
1700 | int ret, consumed_up, consumed_down, allocate_up, allocate_down; | |
1701 | ||
1702 | ret = usb4_usb3_port_set_cm_request(port); | |
1703 | if (ret) | |
1704 | return ret; | |
1705 | ||
1706 | ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up, | |
1707 | &consumed_down); | |
1708 | if (ret) | |
1709 | goto err_request; | |
1710 | ||
1711 | /* Don't allow it go lower than what is consumed */ | |
1712 | allocate_up = max(*upstream_bw, consumed_up); | |
1713 | allocate_down = max(*downstream_bw, consumed_down); | |
1714 | ||
1715 | ret = usb4_usb3_port_write_allocated_bandwidth(port, allocate_up, | |
1716 | allocate_down); | |
1717 | if (ret) | |
1718 | goto err_request; | |
1719 | ||
1720 | *upstream_bw = allocate_up; | |
1721 | *downstream_bw = allocate_down; | |
1722 | ||
1723 | err_request: | |
1724 | usb4_usb3_port_clear_cm_request(port); | |
1725 | return ret; | |
1726 | } | |
1727 | ||
1728 | /** | |
1729 | * usb4_usb3_port_release_bandwidth() - Release allocated USB3 bandwidth | |
1730 | * @port: USB3 adapter port | |
1731 | * @upstream_bw: New allocated upstream bandwidth | |
1732 | * @downstream_bw: New allocated downstream bandwidth | |
1733 | * | |
1734 | * Releases USB3 allocated bandwidth down to what is actually consumed. | |
1735 | * The new bandwidth is returned in @upstream_bw and @downstream_bw. | |
1736 | * | |
1737 | * Returns 0% in success and negative errno in case of failure. | |
1738 | */ | |
1739 | int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw, | |
1740 | int *downstream_bw) | |
1741 | { | |
1742 | int ret, consumed_up, consumed_down; | |
1743 | ||
1744 | ret = usb4_usb3_port_set_cm_request(port); | |
1745 | if (ret) | |
1746 | return ret; | |
1747 | ||
1748 | ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up, | |
1749 | &consumed_down); | |
1750 | if (ret) | |
1751 | goto err_request; | |
1752 | ||
1753 | /* | |
1754 | * Always keep 1000 Mb/s to make sure xHCI has at least some | |
1755 | * bandwidth available for isochronous traffic. | |
1756 | */ | |
1757 | if (consumed_up < 1000) | |
1758 | consumed_up = 1000; | |
1759 | if (consumed_down < 1000) | |
1760 | consumed_down = 1000; | |
1761 | ||
1762 | ret = usb4_usb3_port_write_allocated_bandwidth(port, consumed_up, | |
1763 | consumed_down); | |
1764 | if (ret) | |
1765 | goto err_request; | |
1766 | ||
1767 | *upstream_bw = consumed_up; | |
1768 | *downstream_bw = consumed_down; | |
1769 | ||
1770 | err_request: | |
1771 | usb4_usb3_port_clear_cm_request(port); | |
1772 | return ret; | |
1773 | } |