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Merge tag 'pm-5.12-rc1-2' of git://git.kernel.org/pub/scm/linux/kernel/git/rafael...
[linux-2.6-block.git] / drivers / thunderbolt / usb4.c
CommitLineData
b0407983
MW		 1// SPDX-License-Identifier: GPL-2.0
2/*
3 * USB4 specific functionality
4 *
5 * Copyright (C) 2019, Intel Corporation
6 * Authors: Mika Westerberg <mika.westerberg@linux.intel.com>
7 * Rajmohan Mani <rajmohan.mani@intel.com>
8 */
9
10#include <linux/delay.h>
11#include <linux/ktime.h>
12
02d12855 13#include "sb_regs.h"
b0407983
MW		 14#include "tb.h"
15
16#define USB4_DATA_DWORDS 16
17#define USB4_DATA_RETRIES 3
18
02d12855
RM		 19enum usb4_sb_target {
20 USB4_SB_TARGET_ROUTER,
21 USB4_SB_TARGET_PARTNER,
22 USB4_SB_TARGET_RETIMER,
23};
24
b0407983
MW		 25#define USB4_NVM_READ_OFFSET_MASK GENMASK(23, 2)
26#define USB4_NVM_READ_OFFSET_SHIFT 2
27#define USB4_NVM_READ_LENGTH_MASK GENMASK(27, 24)
28#define USB4_NVM_READ_LENGTH_SHIFT 24
29
30#define USB4_NVM_SET_OFFSET_MASK USB4_NVM_READ_OFFSET_MASK
31#define USB4_NVM_SET_OFFSET_SHIFT USB4_NVM_READ_OFFSET_SHIFT
32
33#define USB4_DROM_ADDRESS_MASK GENMASK(14, 2)
34#define USB4_DROM_ADDRESS_SHIFT 2
35#define USB4_DROM_SIZE_MASK GENMASK(19, 15)
36#define USB4_DROM_SIZE_SHIFT 15
37
38#define USB4_NVM_SECTOR_SIZE_MASK GENMASK(23, 0)
39
7e72846b
MW		 40typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
41typedef int (*write_block_fn)(void *, const void *, size_t);
b0407983
MW		 42
43static int usb4_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
44 u32 value, int timeout_msec)
45{
46 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
47
48 do {
49 u32 val;
50 int ret;
51
52 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1);
53 if (ret)
54 return ret;
55
56 if ((val & bit) == value)
57 return 0;
58
59 usleep_range(50, 100);
60 } while (ktime_before(ktime_get(), timeout));
61
62 return -ETIMEDOUT;
63}
64
7e72846b
MW		 65static int usb4_do_read_data(u16 address, void *buf, size_t size,
66 read_block_fn read_block, void *read_block_data)
b0407983
MW		 67{
68 unsigned int retries = USB4_DATA_RETRIES;
69 unsigned int offset;
70
71 offset = address & 3;
72 address = address & ~3;
73
74 do {
75 size_t nbytes = min_t(size_t, size, USB4_DATA_DWORDS * 4);
76 unsigned int dwaddress, dwords;
77 u8 data[USB4_DATA_DWORDS * 4];
78 int ret;
79
80 dwaddress = address / 4;
81 dwords = ALIGN(nbytes, 4) / 4;
82
7e72846b 83 ret = read_block(read_block_data, dwaddress, data, dwords);
b0407983 84 if (ret) {
6bfe3347
MW		 85 if (ret != -ENODEV && retries--)
86 continue;
b0407983
MW		 87 return ret;
88 }
89
90 memcpy(buf, data + offset, nbytes);
91
92 size -= nbytes;
93 address += nbytes;
94 buf += nbytes;
95 } while (size > 0);
96
97 return 0;
98}
99
7e72846b
MW		 100static int usb4_do_write_data(unsigned int address, const void *buf, size_t size,
101 write_block_fn write_next_block, void *write_block_data)
b0407983
MW		 102{
103 unsigned int retries = USB4_DATA_RETRIES;
104 unsigned int offset;
105
106 offset = address & 3;
107 address = address & ~3;
108
109 do {
110 u32 nbytes = min_t(u32, size, USB4_DATA_DWORDS * 4);
111 u8 data[USB4_DATA_DWORDS * 4];
112 int ret;
113
114 memcpy(data + offset, buf, nbytes);
115
7e72846b 116 ret = write_next_block(write_block_data, data, nbytes / 4);
b0407983
MW		 117 if (ret) {
118 if (ret == -ETIMEDOUT) {
119 if (retries--)
120 continue;
121 ret = -EIO;
122 }
123 return ret;
124 }
125
126 size -= nbytes;
127 address += nbytes;
128 buf += nbytes;
129 } while (size > 0);
130
131 return 0;
132}
133
9490f711
MW		 134static int usb4_native_switch_op(struct tb_switch *sw, u16 opcode,
135 u32 *metadata, u8 *status,
136 const void *tx_data, size_t tx_dwords,
137 void *rx_data, size_t rx_dwords)
b0407983
MW		 138{
139 u32 val;
140 int ret;
141
fe265a06
MW		 142 if (metadata) {
143 ret = tb_sw_write(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
144 if (ret)
145 return ret;
146 }
83bab44a
MW		 147 if (tx_dwords) {
148 ret = tb_sw_write(sw, tx_data, TB_CFG_SWITCH, ROUTER_CS_9,
149 tx_dwords);
150 if (ret)
151 return ret;
152 }
fe265a06 153
b0407983
MW		 154 val = opcode | ROUTER_CS_26_OV;
155 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
156 if (ret)
157 return ret;
158
159 ret = usb4_switch_wait_for_bit(sw, ROUTER_CS_26, ROUTER_CS_26_OV, 0, 500);
160 if (ret)
161 return ret;
162
163 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
c3bf9930
MW		 164 if (ret)
165 return ret;
166
b0407983
MW		 167 if (val & ROUTER_CS_26_ONS)
168 return -EOPNOTSUPP;
169
661b1947
MW		 170 if (status)
171 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
172 ROUTER_CS_26_STATUS_SHIFT;
fe265a06 173
83bab44a
MW		 174 if (metadata) {
175 ret = tb_sw_read(sw, metadata, TB_CFG_SWITCH, ROUTER_CS_25, 1);
176 if (ret)
177 return ret;
178 }
179 if (rx_dwords) {
180 ret = tb_sw_read(sw, rx_data, TB_CFG_SWITCH, ROUTER_CS_9,
181 rx_dwords);
182 if (ret)
183 return ret;
184 }
185
b0407983
MW		 186 return 0;
187}
188
9490f711
MW		 189static int __usb4_switch_op(struct tb_switch *sw, u16 opcode, u32 *metadata,
190 u8 *status, const void *tx_data, size_t tx_dwords,
191 void *rx_data, size_t rx_dwords)
192{
193 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
194
195 if (tx_dwords > USB4_DATA_DWORDS || rx_dwords > USB4_DATA_DWORDS)
196 return -EINVAL;
197
198 /*
199 * If the connection manager implementation provides USB4 router
200 * operation proxy callback, call it here instead of running the
201 * operation natively.
202 */
203 if (cm_ops->usb4_switch_op) {
204 int ret;
205
206 ret = cm_ops->usb4_switch_op(sw, opcode, metadata, status,
207 tx_data, tx_dwords, rx_data,
208 rx_dwords);
209 if (ret != -EOPNOTSUPP)
210 return ret;
211
212 /*
213 * If the proxy was not supported then run the native
214 * router operation instead.
215 */
216 }
217
218 return usb4_native_switch_op(sw, opcode, metadata, status, tx_data,
219 tx_dwords, rx_data, rx_dwords);
220}
221
83bab44a
MW		 222static inline int usb4_switch_op(struct tb_switch *sw, u16 opcode,
223 u32 *metadata, u8 *status)
224{
225 return __usb4_switch_op(sw, opcode, metadata, status, NULL, 0, NULL, 0);
226}
227
228static inline int usb4_switch_op_data(struct tb_switch *sw, u16 opcode,
229 u32 *metadata, u8 *status,
230 const void *tx_data, size_t tx_dwords,
231 void *rx_data, size_t rx_dwords)
232{
233 return __usb4_switch_op(sw, opcode, metadata, status, tx_data,
234 tx_dwords, rx_data, rx_dwords);
b0407983
MW		 235}
236
b2911a59
MW		 237static void usb4_switch_check_wakes(struct tb_switch *sw)
238{
239 struct tb_port *port;
240 bool wakeup = false;
241 u32 val;
242
243 if (!device_may_wakeup(&sw->dev))
244 return;
245
246 if (tb_route(sw)) {
247 if (tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1))
248 return;
249
250 tb_sw_dbg(sw, "PCIe wake: %s, USB3 wake: %s\n",
251 (val & ROUTER_CS_6_WOPS) ? "yes" : "no",
252 (val & ROUTER_CS_6_WOUS) ? "yes" : "no");
253
254 wakeup = val & (ROUTER_CS_6_WOPS | ROUTER_CS_6_WOUS);
255 }
256
257 /* Check for any connected downstream ports for USB4 wake */
258 tb_switch_for_each_port(sw, port) {
259 if (!tb_port_has_remote(port))
260 continue;
261
262 if (tb_port_read(port, &val, TB_CFG_PORT,
263 port->cap_usb4 + PORT_CS_18, 1))
264 break;
265
266 tb_port_dbg(port, "USB4 wake: %s\n",
267 (val & PORT_CS_18_WOU4S) ? "yes" : "no");
268
269 if (val & PORT_CS_18_WOU4S)
270 wakeup = true;
271 }
272
273 if (wakeup)
274 pm_wakeup_event(&sw->dev, 0);
275}
276
bbcf40b3
MW		 277static bool link_is_usb4(struct tb_port *port)
278{
279 u32 val;
280
281 if (!port->cap_usb4)
282 return false;
283
284 if (tb_port_read(port, &val, TB_CFG_PORT,
285 port->cap_usb4 + PORT_CS_18, 1))
286 return false;
287
288 return !(val & PORT_CS_18_TCM);
289}
290
b0407983
MW		 291/**
292 * usb4_switch_setup() - Additional setup for USB4 device
293 * @sw: USB4 router to setup
294 *
295 * USB4 routers need additional settings in order to enable all the
296 * tunneling. This function enables USB and PCIe tunneling if it can be
297 * enabled (e.g the parent switch also supports them). If USB tunneling
298 * is not available for some reason (like that there is Thunderbolt 3
299 * switch upstream) then the internal xHCI controller is enabled
300 * instead.
301 */
302int usb4_switch_setup(struct tb_switch *sw)
303{
bbcf40b3 304 struct tb_port *downstream_port;
b0407983
MW		 305 struct tb_switch *parent;
306 bool tbt3, xhci;
307 u32 val = 0;
308 int ret;
309
b2911a59
MW		 310 usb4_switch_check_wakes(sw);
311
b0407983
MW		 312 if (!tb_route(sw))
313 return 0;
314
315 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_6, 1);
316 if (ret)
317 return ret;
318
bbcf40b3
MW		 319 parent = tb_switch_parent(sw);
320 downstream_port = tb_port_at(tb_route(sw), parent);
321 sw->link_usb4 = link_is_usb4(downstream_port);
322 tb_sw_dbg(sw, "link: %s\n", sw->link_usb4 ? "USB4" : "TBT3");
323
b0407983
MW		 324 xhci = val & ROUTER_CS_6_HCI;
325 tbt3 = !(val & ROUTER_CS_6_TNS);
326
327 tb_sw_dbg(sw, "TBT3 support: %s, xHCI: %s\n",
328 tbt3 ? "yes" : "no", xhci ? "yes" : "no");
329
330 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
331 if (ret)
332 return ret;
333
c6da62a2
MW		 334 if (tb_acpi_may_tunnel_usb3() && sw->link_usb4 &&
335 tb_switch_find_port(parent, TB_TYPE_USB3_DOWN)) {
e6f81858
RM		 336 val |= ROUTER_CS_5_UTO;
337 xhci = false;
338 }
339
c6da62a2
MW		 340 /*
341 * Only enable PCIe tunneling if the parent router supports it
342 * and it is not disabled.
343 */
344 if (tb_acpi_may_tunnel_pcie() &&
345 tb_switch_find_port(parent, TB_TYPE_PCIE_DOWN)) {
b0407983 346 val |= ROUTER_CS_5_PTO;
e6f81858
RM		 347 /*
348 * xHCI can be enabled if PCIe tunneling is supported
349 * and the parent does not have any USB3 dowstream
350 * adapters (so we cannot do USB 3.x tunneling).
351 */
c7a7ac84 352 if (xhci)
b0407983
MW		 353 val |= ROUTER_CS_5_HCO;
354 }
355
356 /* TBT3 supported by the CM */
357 val |= ROUTER_CS_5_C3S;
358 /* Tunneling configuration is ready now */
359 val |= ROUTER_CS_5_CV;
360
361 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
362 if (ret)
363 return ret;
364
365 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_CR,
366 ROUTER_CS_6_CR, 50);
367}
368
369/**
370 * usb4_switch_read_uid() - Read UID from USB4 router
371 * @sw: USB4 router
21d78d86 372 * @uid: UID is stored here
b0407983
MW		 373 *
374 * Reads 64-bit UID from USB4 router config space.
375 */
376int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid)
377{
378 return tb_sw_read(sw, uid, TB_CFG_SWITCH, ROUTER_CS_7, 2);
379}
380
7e72846b 381static int usb4_switch_drom_read_block(void *data,
b0407983
MW		 382 unsigned int dwaddress, void *buf,
383 size_t dwords)
384{
7e72846b 385 struct tb_switch *sw = data;
b0407983
MW		 386 u8 status = 0;
387 u32 metadata;
388 int ret;
389
390 metadata = (dwords << USB4_DROM_SIZE_SHIFT) & USB4_DROM_SIZE_MASK;
391 metadata |= (dwaddress << USB4_DROM_ADDRESS_SHIFT) &
392 USB4_DROM_ADDRESS_MASK;
393
83bab44a
MW		 394 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_DROM_READ, &metadata,
395 &status, NULL, 0, buf, dwords);
b0407983
MW		 396 if (ret)
397 return ret;
398
83bab44a 399 return status ? -EIO : 0;
b0407983
MW		 400}
401
402/**
403 * usb4_switch_drom_read() - Read arbitrary bytes from USB4 router DROM
404 * @sw: USB4 router
21d78d86
MW		 405 * @address: Byte address inside DROM to start reading
406 * @buf: Buffer where the DROM content is stored
407 * @size: Number of bytes to read from DROM
b0407983
MW		 408 *
409 * Uses USB4 router operations to read router DROM. For devices this
410 * should always work but for hosts it may return %-EOPNOTSUPP in which
411 * case the host router does not have DROM.
412 */
413int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
414 size_t size)
415{
7e72846b
MW		 416 return usb4_do_read_data(address, buf, size,
417 usb4_switch_drom_read_block, sw);
b0407983
MW		 418}
419
b0407983
MW		 420/**
421 * usb4_switch_lane_bonding_possible() - Are conditions met for lane bonding
422 * @sw: USB4 router
423 *
424 * Checks whether conditions are met so that lane bonding can be
425 * established with the upstream router. Call only for device routers.
426 */
427bool usb4_switch_lane_bonding_possible(struct tb_switch *sw)
428{
429 struct tb_port *up;
430 int ret;
431 u32 val;
432
433 up = tb_upstream_port(sw);
434 ret = tb_port_read(up, &val, TB_CFG_PORT, up->cap_usb4 + PORT_CS_18, 1);
435 if (ret)
436 return false;
437
438 return !!(val & PORT_CS_18_BE);
439}
440
b2911a59
MW		 441/**
442 * usb4_switch_set_wake() - Enabled/disable wake
443 * @sw: USB4 router
444 * @flags: Wakeup flags (%0 to disable)
445 *
446 * Enables/disables router to wake up from sleep.
447 */
448int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags)
449{
450 struct tb_port *port;
451 u64 route = tb_route(sw);
452 u32 val;
453 int ret;
454
455 /*
456 * Enable wakes coming from all USB4 downstream ports (from
457 * child routers). For device routers do this also for the
458 * upstream USB4 port.
459 */
460 tb_switch_for_each_port(sw, port) {
f8fa2c2e
MW		 461 if (!tb_port_is_null(port))
462 continue;
b2911a59
MW		 463 if (!route && tb_is_upstream_port(port))
464 continue;
f8fa2c2e
MW		 465 if (!port->cap_usb4)
466 continue;
b2911a59
MW		 467
468 ret = tb_port_read(port, &val, TB_CFG_PORT,
469 port->cap_usb4 + PORT_CS_19, 1);
470 if (ret)
471 return ret;
472
473 val &= ~(PORT_CS_19_WOC | PORT_CS_19_WOD | PORT_CS_19_WOU4);
474
475 if (flags & TB_WAKE_ON_CONNECT)
476 val |= PORT_CS_19_WOC;
477 if (flags & TB_WAKE_ON_DISCONNECT)
478 val |= PORT_CS_19_WOD;
479 if (flags & TB_WAKE_ON_USB4)
480 val |= PORT_CS_19_WOU4;
481
482 ret = tb_port_write(port, &val, TB_CFG_PORT,
483 port->cap_usb4 + PORT_CS_19, 1);
484 if (ret)
485 return ret;
486 }
487
488 /*
489 * Enable wakes from PCIe and USB 3.x on this router. Only
490 * needed for device routers.
491 */
492 if (route) {
493 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
494 if (ret)
495 return ret;
496
497 val &= ~(ROUTER_CS_5_WOP | ROUTER_CS_5_WOU);
498 if (flags & TB_WAKE_ON_USB3)
499 val |= ROUTER_CS_5_WOU;
500 if (flags & TB_WAKE_ON_PCIE)
501 val |= ROUTER_CS_5_WOP;
502
503 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
504 if (ret)
505 return ret;
506 }
507
508 return 0;
509}
510
b0407983
MW		 511/**
512 * usb4_switch_set_sleep() - Prepare the router to enter sleep
513 * @sw: USB4 router
514 *
b2911a59
MW		 515 * Sets sleep bit for the router. Returns when the router sleep ready
516 * bit has been asserted.
b0407983
MW		 517 */
518int usb4_switch_set_sleep(struct tb_switch *sw)
519{
520 int ret;
521 u32 val;
522
523 /* Set sleep bit and wait for sleep ready to be asserted */
524 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
525 if (ret)
526 return ret;
527
528 val |= ROUTER_CS_5_SLP;
529
530 ret = tb_sw_write(sw, &val, TB_CFG_SWITCH, ROUTER_CS_5, 1);
531 if (ret)
532 return ret;
533
534 return usb4_switch_wait_for_bit(sw, ROUTER_CS_6, ROUTER_CS_6_SLPR,
535 ROUTER_CS_6_SLPR, 500);
536}
537
538/**
539 * usb4_switch_nvm_sector_size() - Return router NVM sector size
540 * @sw: USB4 router
541 *
542 * If the router supports NVM operations this function returns the NVM
543 * sector size in bytes. If NVM operations are not supported returns
544 * %-EOPNOTSUPP.
545 */
546int usb4_switch_nvm_sector_size(struct tb_switch *sw)
547{
548 u32 metadata;
549 u8 status;
550 int ret;
551
fe265a06
MW		 552 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SECTOR_SIZE, &metadata,
553 &status);
b0407983
MW		 554 if (ret)
555 return ret;
556
557 if (status)
558 return status == 0x2 ? -EOPNOTSUPP : -EIO;
559
b0407983
MW		 560 return metadata & USB4_NVM_SECTOR_SIZE_MASK;
561}
562
7e72846b 563static int usb4_switch_nvm_read_block(void *data,
b0407983
MW		 564 unsigned int dwaddress, void *buf, size_t dwords)
565{
7e72846b 566 struct tb_switch *sw = data;
b0407983
MW		 567 u8 status = 0;
568 u32 metadata;
569 int ret;
570
571 metadata = (dwords << USB4_NVM_READ_LENGTH_SHIFT) &
572 USB4_NVM_READ_LENGTH_MASK;
573 metadata |= (dwaddress << USB4_NVM_READ_OFFSET_SHIFT) &
574 USB4_NVM_READ_OFFSET_MASK;
575
83bab44a
MW		 576 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_READ, &metadata,
577 &status, NULL, 0, buf, dwords);
b0407983
MW		 578 if (ret)
579 return ret;
580
83bab44a 581 return status ? -EIO : 0;
b0407983
MW		 582}
583
584/**
585 * usb4_switch_nvm_read() - Read arbitrary bytes from router NVM
586 * @sw: USB4 router
587 * @address: Starting address in bytes
588 * @buf: Read data is placed here
589 * @size: How many bytes to read
590 *
591 * Reads NVM contents of the router. If NVM is not supported returns
592 * %-EOPNOTSUPP.
593 */
594int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
595 size_t size)
596{
7e72846b
MW		 597 return usb4_do_read_data(address, buf, size,
598 usb4_switch_nvm_read_block, sw);
b0407983
MW		 599}
600
601static int usb4_switch_nvm_set_offset(struct tb_switch *sw,
602 unsigned int address)
603{
604 u32 metadata, dwaddress;
605 u8 status = 0;
606 int ret;
607
608 dwaddress = address / 4;
609 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
610 USB4_NVM_SET_OFFSET_MASK;
611
fe265a06
MW		 612 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_SET_OFFSET, &metadata,
613 &status);
b0407983
MW		 614 if (ret)
615 return ret;
616
617 return status ? -EIO : 0;
618}
619
7e72846b
MW		 620static int usb4_switch_nvm_write_next_block(void *data, const void *buf,
621 size_t dwords)
b0407983 622{
7e72846b 623 struct tb_switch *sw = data;
b0407983
MW		 624 u8 status;
625 int ret;
626
83bab44a
MW		 627 ret = usb4_switch_op_data(sw, USB4_SWITCH_OP_NVM_WRITE, NULL, &status,
628 buf, dwords, NULL, 0);
b0407983
MW		 629 if (ret)
630 return ret;
631
632 return status ? -EIO : 0;
633}
634
635/**
636 * usb4_switch_nvm_write() - Write to the router NVM
637 * @sw: USB4 router
638 * @address: Start address where to write in bytes
639 * @buf: Pointer to the data to write
640 * @size: Size of @buf in bytes
641 *
642 * Writes @buf to the router NVM using USB4 router operations. If NVM
643 * write is not supported returns %-EOPNOTSUPP.
644 */
645int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
646 const void *buf, size_t size)
647{
648 int ret;
649
650 ret = usb4_switch_nvm_set_offset(sw, address);
651 if (ret)
652 return ret;
653
7e72846b
MW		 654 return usb4_do_write_data(address, buf, size,
655 usb4_switch_nvm_write_next_block, sw);
b0407983
MW		 656}
657
658/**
659 * usb4_switch_nvm_authenticate() - Authenticate new NVM
660 * @sw: USB4 router
661 *
662 * After the new NVM has been written via usb4_switch_nvm_write(), this
661b1947
MW		 663 * function triggers NVM authentication process. The router gets power
664 * cycled and if the authentication is successful the new NVM starts
b0407983 665 * running. In case of failure returns negative errno.
661b1947
MW		 666 *
667 * The caller should call usb4_switch_nvm_authenticate_status() to read
668 * the status of the authentication after power cycle. It should be the
669 * first router operation to avoid the status being lost.
b0407983
MW		 670 */
671int usb4_switch_nvm_authenticate(struct tb_switch *sw)
672{
b0407983
MW		 673 int ret;
674
fe265a06 675 ret = usb4_switch_op(sw, USB4_SWITCH_OP_NVM_AUTH, NULL, NULL);
661b1947
MW		 676 switch (ret) {
677 /*
678 * The router is power cycled once NVM_AUTH is started so it is
679 * expected to get any of the following errors back.
680 */
681 case -EACCES:
682 case -ENOTCONN:
683 case -ETIMEDOUT:
684 return 0;
685
686 default:
687 return ret;
688 }
689}
690
691/**
692 * usb4_switch_nvm_authenticate_status() - Read status of last NVM authenticate
693 * @sw: USB4 router
694 * @status: Status code of the operation
695 *
696 * The function checks if there is status available from the last NVM
697 * authenticate router operation. If there is status then %0 is returned
698 * and the status code is placed in @status. Returns negative errno in case
699 * of failure.
700 *
701 * Must be called before any other router operation.
702 */
703int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status)
704{
9490f711 705 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
661b1947
MW		 706 u16 opcode;
707 u32 val;
708 int ret;
709
9490f711
MW		 710 if (cm_ops->usb4_switch_nvm_authenticate_status) {
711 ret = cm_ops->usb4_switch_nvm_authenticate_status(sw, status);
712 if (ret != -EOPNOTSUPP)
713 return ret;
714 }
715
661b1947 716 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, ROUTER_CS_26, 1);
b0407983
MW		 717 if (ret)
718 return ret;
719
661b1947
MW		 720 /* Check that the opcode is correct */
721 opcode = val & ROUTER_CS_26_OPCODE_MASK;
722 if (opcode == USB4_SWITCH_OP_NVM_AUTH) {
723 if (val & ROUTER_CS_26_OV)
724 return -EBUSY;
725 if (val & ROUTER_CS_26_ONS)
726 return -EOPNOTSUPP;
727
728 *status = (val & ROUTER_CS_26_STATUS_MASK) >>
729 ROUTER_CS_26_STATUS_SHIFT;
730 } else {
731 *status = 0;
b0407983 732 }
661b1947
MW		 733
734 return 0;
b0407983
MW		 735}
736
737/**
738 * usb4_switch_query_dp_resource() - Query availability of DP IN resource
739 * @sw: USB4 router
740 * @in: DP IN adapter
741 *
742 * For DP tunneling this function can be used to query availability of
743 * DP IN resource. Returns true if the resource is available for DP
744 * tunneling, false otherwise.
745 */
746bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
747{
fe265a06 748 u32 metadata = in->port;
b0407983
MW		 749 u8 status;
750 int ret;
751
fe265a06
MW		 752 ret = usb4_switch_op(sw, USB4_SWITCH_OP_QUERY_DP_RESOURCE, &metadata,
753 &status);
b0407983
MW		 754 /*
755 * If DP resource allocation is not supported assume it is
756 * always available.
757 */
758 if (ret == -EOPNOTSUPP)
759 return true;
760 else if (ret)
761 return false;
762
763 return !status;
764}
765
766/**
767 * usb4_switch_alloc_dp_resource() - Allocate DP IN resource
768 * @sw: USB4 router
769 * @in: DP IN adapter
770 *
771 * Allocates DP IN resource for DP tunneling using USB4 router
772 * operations. If the resource was allocated returns %0. Otherwise
773 * returns negative errno, in particular %-EBUSY if the resource is
774 * already allocated.
775 */
776int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
777{
fe265a06 778 u32 metadata = in->port;
b0407983
MW		 779 u8 status;
780 int ret;
781
fe265a06
MW		 782 ret = usb4_switch_op(sw, USB4_SWITCH_OP_ALLOC_DP_RESOURCE, &metadata,
783 &status);
b0407983
MW		 784 if (ret == -EOPNOTSUPP)
785 return 0;
786 else if (ret)
787 return ret;
788
789 return status ? -EBUSY : 0;
790}
791
792/**
793 * usb4_switch_dealloc_dp_resource() - Releases allocated DP IN resource
794 * @sw: USB4 router
795 * @in: DP IN adapter
796 *
797 * Releases the previously allocated DP IN resource.
798 */
799int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
800{
fe265a06 801 u32 metadata = in->port;
b0407983
MW		 802 u8 status;
803 int ret;
804
fe265a06
MW		 805 ret = usb4_switch_op(sw, USB4_SWITCH_OP_DEALLOC_DP_RESOURCE, &metadata,
806 &status);
b0407983
MW		 807 if (ret == -EOPNOTSUPP)
808 return 0;
809 else if (ret)
810 return ret;
811
812 return status ? -EIO : 0;
813}
814
815static int usb4_port_idx(const struct tb_switch *sw, const struct tb_port *port)
816{
817 struct tb_port *p;
818 int usb4_idx = 0;
819
820 /* Assume port is primary */
821 tb_switch_for_each_port(sw, p) {
822 if (!tb_port_is_null(p))
823 continue;
824 if (tb_is_upstream_port(p))
825 continue;
826 if (!p->link_nr) {
827 if (p == port)
828 break;
829 usb4_idx++;
830 }
831 }
832
833 return usb4_idx;
834}
835
836/**
837 * usb4_switch_map_pcie_down() - Map USB4 port to a PCIe downstream adapter
838 * @sw: USB4 router
839 * @port: USB4 port
840 *
841 * USB4 routers have direct mapping between USB4 ports and PCIe
842 * downstream adapters where the PCIe topology is extended. This
843 * function returns the corresponding downstream PCIe adapter or %NULL
844 * if no such mapping was possible.
845 */
846struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
847 const struct tb_port *port)
848{
849 int usb4_idx = usb4_port_idx(sw, port);
850 struct tb_port *p;
851 int pcie_idx = 0;
852
853 /* Find PCIe down port matching usb4_port */
854 tb_switch_for_each_port(sw, p) {
855 if (!tb_port_is_pcie_down(p))
856 continue;
857
9cac51a0 858 if (pcie_idx == usb4_idx)
b0407983
MW		 859 return p;
860
861 pcie_idx++;
862 }
863
864 return NULL;
865}
866
e6f81858
RM		 867/**
868 * usb4_switch_map_usb3_down() - Map USB4 port to a USB3 downstream adapter
869 * @sw: USB4 router
870 * @port: USB4 port
871 *
872 * USB4 routers have direct mapping between USB4 ports and USB 3.x
873 * downstream adapters where the USB 3.x topology is extended. This
874 * function returns the corresponding downstream USB 3.x adapter or
875 * %NULL if no such mapping was possible.
876 */
877struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
878 const struct tb_port *port)
879{
880 int usb4_idx = usb4_port_idx(sw, port);
881 struct tb_port *p;
882 int usb_idx = 0;
883
884 /* Find USB3 down port matching usb4_port */
885 tb_switch_for_each_port(sw, p) {
886 if (!tb_port_is_usb3_down(p))
887 continue;
888
77cfa40f 889 if (usb_idx == usb4_idx)
e6f81858
RM		 890 return p;
891
892 usb_idx++;
893 }
894
895 return NULL;
896}
897
b0407983
MW		 898/**
899 * usb4_port_unlock() - Unlock USB4 downstream port
900 * @port: USB4 port to unlock
901 *
902 * Unlocks USB4 downstream port so that the connection manager can
903 * access the router below this port.
904 */
905int usb4_port_unlock(struct tb_port *port)
906{
907 int ret;
908 u32 val;
909
910 ret = tb_port_read(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
911 if (ret)
912 return ret;
913
914 val &= ~ADP_CS_4_LCK;
915 return tb_port_write(port, &val, TB_CFG_PORT, ADP_CS_4, 1);
916}
3b1d8d57 917
e28178bf
MW		 918static int usb4_port_set_configured(struct tb_port *port, bool configured)
919{
920 int ret;
921 u32 val;
922
923 if (!port->cap_usb4)
924 return -EINVAL;
925
926 ret = tb_port_read(port, &val, TB_CFG_PORT,
927 port->cap_usb4 + PORT_CS_19, 1);
928 if (ret)
929 return ret;
930
931 if (configured)
932 val |= PORT_CS_19_PC;
933 else
934 val &= ~PORT_CS_19_PC;
935
936 return tb_port_write(port, &val, TB_CFG_PORT,
937 port->cap_usb4 + PORT_CS_19, 1);
938}
939
940/**
941 * usb4_port_configure() - Set USB4 port configured
942 * @port: USB4 router
943 *
944 * Sets the USB4 link to be configured for power management purposes.
945 */
946int usb4_port_configure(struct tb_port *port)
947{
948 return usb4_port_set_configured(port, true);
949}
950
951/**
952 * usb4_port_unconfigure() - Set USB4 port unconfigured
953 * @port: USB4 router
954 *
955 * Sets the USB4 link to be unconfigured for power management purposes.
956 */
957void usb4_port_unconfigure(struct tb_port *port)
958{
959 usb4_port_set_configured(port, false);
960}
961
284652a4
MW		 962static int usb4_set_xdomain_configured(struct tb_port *port, bool configured)
963{
964 int ret;
965 u32 val;
966
967 if (!port->cap_usb4)
968 return -EINVAL;
969
970 ret = tb_port_read(port, &val, TB_CFG_PORT,
971 port->cap_usb4 + PORT_CS_19, 1);
972 if (ret)
973 return ret;
974
975 if (configured)
976 val |= PORT_CS_19_PID;
977 else
978 val &= ~PORT_CS_19_PID;
979
980 return tb_port_write(port, &val, TB_CFG_PORT,
981 port->cap_usb4 + PORT_CS_19, 1);
982}
983
984/**
985 * usb4_port_configure_xdomain() - Configure port for XDomain
986 * @port: USB4 port connected to another host
987 *
988 * Marks the USB4 port as being connected to another host. Returns %0 in
989 * success and negative errno in failure.
990 */
991int usb4_port_configure_xdomain(struct tb_port *port)
992{
993 return usb4_set_xdomain_configured(port, true);
994}
995
996/**
997 * usb4_port_unconfigure_xdomain() - Unconfigure port for XDomain
998 * @port: USB4 port that was connected to another host
999 *
1000 * Clears USB4 port from being marked as XDomain.
1001 */
1002void usb4_port_unconfigure_xdomain(struct tb_port *port)
1003{
1004 usb4_set_xdomain_configured(port, false);
1005}
1006
3b1d8d57
MW		 1007static int usb4_port_wait_for_bit(struct tb_port *port, u32 offset, u32 bit,
1008 u32 value, int timeout_msec)
1009{
1010 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
1011
1012 do {
1013 u32 val;
1014 int ret;
1015
1016 ret = tb_port_read(port, &val, TB_CFG_PORT, offset, 1);
1017 if (ret)
1018 return ret;
1019
1020 if ((val & bit) == value)
1021 return 0;
1022
1023 usleep_range(50, 100);
1024 } while (ktime_before(ktime_get(), timeout));
1025
1026 return -ETIMEDOUT;
1027}
1028
02d12855
RM		 1029static int usb4_port_read_data(struct tb_port *port, void *data, size_t dwords)
1030{
1031 if (dwords > USB4_DATA_DWORDS)
1032 return -EINVAL;
1033
1034 return tb_port_read(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1035 dwords);
1036}
1037
1038static int usb4_port_write_data(struct tb_port *port, const void *data,
1039 size_t dwords)
1040{
1041 if (dwords > USB4_DATA_DWORDS)
1042 return -EINVAL;
1043
1044 return tb_port_write(port, data, TB_CFG_PORT, port->cap_usb4 + PORT_CS_2,
1045 dwords);
1046}
1047
1048static int usb4_port_sb_read(struct tb_port *port, enum usb4_sb_target target,
1049 u8 index, u8 reg, void *buf, u8 size)
1050{
1051 size_t dwords = DIV_ROUND_UP(size, 4);
1052 int ret;
1053 u32 val;
1054
1055 if (!port->cap_usb4)
1056 return -EINVAL;
1057
1058 val = reg;
1059 val |= size << PORT_CS_1_LENGTH_SHIFT;
1060 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1061 if (target == USB4_SB_TARGET_RETIMER)
1062 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1063 val |= PORT_CS_1_PND;
1064
1065 ret = tb_port_write(port, &val, TB_CFG_PORT,
1066 port->cap_usb4 + PORT_CS_1, 1);
1067 if (ret)
1068 return ret;
1069
1070 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1071 PORT_CS_1_PND, 0, 500);
1072 if (ret)
1073 return ret;
1074
1075 ret = tb_port_read(port, &val, TB_CFG_PORT,
1076 port->cap_usb4 + PORT_CS_1, 1);
1077 if (ret)
1078 return ret;
1079
1080 if (val & PORT_CS_1_NR)
1081 return -ENODEV;
1082 if (val & PORT_CS_1_RC)
1083 return -EIO;
1084
1085 return buf ? usb4_port_read_data(port, buf, dwords) : 0;
1086}
1087
1088static int usb4_port_sb_write(struct tb_port *port, enum usb4_sb_target target,
1089 u8 index, u8 reg, const void *buf, u8 size)
1090{
1091 size_t dwords = DIV_ROUND_UP(size, 4);
1092 int ret;
1093 u32 val;
1094
1095 if (!port->cap_usb4)
1096 return -EINVAL;
1097
1098 if (buf) {
1099 ret = usb4_port_write_data(port, buf, dwords);
1100 if (ret)
1101 return ret;
1102 }
1103
1104 val = reg;
1105 val |= size << PORT_CS_1_LENGTH_SHIFT;
1106 val |= PORT_CS_1_WNR_WRITE;
1107 val |= (target << PORT_CS_1_TARGET_SHIFT) & PORT_CS_1_TARGET_MASK;
1108 if (target == USB4_SB_TARGET_RETIMER)
1109 val |= (index << PORT_CS_1_RETIMER_INDEX_SHIFT);
1110 val |= PORT_CS_1_PND;
1111
1112 ret = tb_port_write(port, &val, TB_CFG_PORT,
1113 port->cap_usb4 + PORT_CS_1, 1);
1114 if (ret)
1115 return ret;
1116
1117 ret = usb4_port_wait_for_bit(port, port->cap_usb4 + PORT_CS_1,
1118 PORT_CS_1_PND, 0, 500);
1119 if (ret)
1120 return ret;
1121
1122 ret = tb_port_read(port, &val, TB_CFG_PORT,
1123 port->cap_usb4 + PORT_CS_1, 1);
1124 if (ret)
1125 return ret;
1126
1127 if (val & PORT_CS_1_NR)
1128 return -ENODEV;
1129 if (val & PORT_CS_1_RC)
1130 return -EIO;
1131
1132 return 0;
1133}
1134
1135static int usb4_port_sb_op(struct tb_port *port, enum usb4_sb_target target,
1136 u8 index, enum usb4_sb_opcode opcode, int timeout_msec)
1137{
1138 ktime_t timeout;
1139 u32 val;
1140 int ret;
1141
1142 val = opcode;
1143 ret = usb4_port_sb_write(port, target, index, USB4_SB_OPCODE, &val,
1144 sizeof(val));
1145 if (ret)
1146 return ret;
1147
1148 timeout = ktime_add_ms(ktime_get(), timeout_msec);
1149
1150 do {
1151 /* Check results */
1152 ret = usb4_port_sb_read(port, target, index, USB4_SB_OPCODE,
1153 &val, sizeof(val));
1154 if (ret)
1155 return ret;
1156
1157 switch (val) {
1158 case 0:
1159 return 0;
1160
1161 case USB4_SB_OPCODE_ERR:
1162 return -EAGAIN;
1163
1164 case USB4_SB_OPCODE_ONS:
1165 return -EOPNOTSUPP;
1166
1167 default:
1168 if (val != opcode)
1169 return -EIO;
1170 break;
1171 }
1172 } while (ktime_before(ktime_get(), timeout));
1173
1174 return -ETIMEDOUT;
1175}
1176
1177/**
1178 * usb4_port_enumerate_retimers() - Send RT broadcast transaction
1179 * @port: USB4 port
1180 *
1181 * This forces the USB4 port to send broadcast RT transaction which
1182 * makes the retimers on the link to assign index to themselves. Returns
1183 * %0 in case of success and negative errno if there was an error.
1184 */
1185int usb4_port_enumerate_retimers(struct tb_port *port)
1186{
1187 u32 val;
1188
1189 val = USB4_SB_OPCODE_ENUMERATE_RETIMERS;
1190 return usb4_port_sb_write(port, USB4_SB_TARGET_ROUTER, 0,
1191 USB4_SB_OPCODE, &val, sizeof(val));
1192}
1193
1194static inline int usb4_port_retimer_op(struct tb_port *port, u8 index,
1195 enum usb4_sb_opcode opcode,
1196 int timeout_msec)
1197{
1198 return usb4_port_sb_op(port, USB4_SB_TARGET_RETIMER, index, opcode,
1199 timeout_msec);
1200}
1201
1202/**
1203 * usb4_port_retimer_read() - Read from retimer sideband registers
1204 * @port: USB4 port
1205 * @index: Retimer index
1206 * @reg: Sideband register to read
1207 * @buf: Data from @reg is stored here
1208 * @size: Number of bytes to read
1209 *
1210 * Function reads retimer sideband registers starting from @reg. The
1211 * retimer is connected to @port at @index. Returns %0 in case of
1212 * success, and read data is copied to @buf. If there is no retimer
1213 * present at given @index returns %-ENODEV. In any other failure
1214 * returns negative errno.
1215 */
1216int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1217 u8 size)
1218{
1219 return usb4_port_sb_read(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1220 size);
1221}
1222
1223/**
1224 * usb4_port_retimer_write() - Write to retimer sideband registers
1225 * @port: USB4 port
1226 * @index: Retimer index
1227 * @reg: Sideband register to write
1228 * @buf: Data that is written starting from @reg
1229 * @size: Number of bytes to write
1230 *
1231 * Writes retimer sideband registers starting from @reg. The retimer is
1232 * connected to @port at @index. Returns %0 in case of success. If there
1233 * is no retimer present at given @index returns %-ENODEV. In any other
1234 * failure returns negative errno.
1235 */
1236int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1237 const void *buf, u8 size)
1238{
1239 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index, reg, buf,
1240 size);
1241}
1242
1243/**
1244 * usb4_port_retimer_is_last() - Is the retimer last on-board retimer
1245 * @port: USB4 port
1246 * @index: Retimer index
1247 *
1248 * If the retimer at @index is last one (connected directly to the
1249 * Type-C port) this function returns %1. If it is not returns %0. If
1250 * the retimer is not present returns %-ENODEV. Otherwise returns
1251 * negative errno.
1252 */
1253int usb4_port_retimer_is_last(struct tb_port *port, u8 index)
1254{
1255 u32 metadata;
1256 int ret;
1257
1258 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_QUERY_LAST_RETIMER,
1259 500);
1260 if (ret)
1261 return ret;
1262
1263 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1264 sizeof(metadata));
1265 return ret ? ret : metadata & 1;
1266}
1267
1268/**
1269 * usb4_port_retimer_nvm_sector_size() - Read retimer NVM sector size
1270 * @port: USB4 port
1271 * @index: Retimer index
1272 *
1273 * Reads NVM sector size (in bytes) of a retimer at @index. This
1274 * operation can be used to determine whether the retimer supports NVM
1275 * upgrade for example. Returns sector size in bytes or negative errno
1276 * in case of error. Specifically returns %-ENODEV if there is no
1277 * retimer at @index.
1278 */
1279int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index)
1280{
1281 u32 metadata;
1282 int ret;
1283
1284 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_GET_NVM_SECTOR_SIZE,
1285 500);
1286 if (ret)
1287 return ret;
1288
1289 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA, &metadata,
1290 sizeof(metadata));
1291 return ret ? ret : metadata & USB4_NVM_SECTOR_SIZE_MASK;
1292}
1293
1294static int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1295 unsigned int address)
1296{
1297 u32 metadata, dwaddress;
1298 int ret;
1299
1300 dwaddress = address / 4;
1301 metadata = (dwaddress << USB4_NVM_SET_OFFSET_SHIFT) &
1302 USB4_NVM_SET_OFFSET_MASK;
1303
1304 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1305 sizeof(metadata));
1306 if (ret)
1307 return ret;
1308
1309 return usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_SET_OFFSET,
1310 500);
1311}
1312
1313struct retimer_info {
1314 struct tb_port *port;
1315 u8 index;
1316};
1317
1318static int usb4_port_retimer_nvm_write_next_block(void *data, const void *buf,
1319 size_t dwords)
1320
1321{
1322 const struct retimer_info *info = data;
1323 struct tb_port *port = info->port;
1324 u8 index = info->index;
1325 int ret;
1326
1327 ret = usb4_port_retimer_write(port, index, USB4_SB_DATA,
1328 buf, dwords * 4);
1329 if (ret)
1330 return ret;
1331
1332 return usb4_port_retimer_op(port, index,
1333 USB4_SB_OPCODE_NVM_BLOCK_WRITE, 1000);
1334}
1335
1336/**
1337 * usb4_port_retimer_nvm_write() - Write to retimer NVM
1338 * @port: USB4 port
1339 * @index: Retimer index
1340 * @address: Byte address where to start the write
1341 * @buf: Data to write
1342 * @size: Size in bytes how much to write
1343 *
1344 * Writes @size bytes from @buf to the retimer NVM. Used for NVM
1345 * upgrade. Returns %0 if the data was written successfully and negative
1346 * errno in case of failure. Specifically returns %-ENODEV if there is
1347 * no retimer at @index.
1348 */
1349int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, unsigned int address,
1350 const void *buf, size_t size)
1351{
1352 struct retimer_info info = { .port = port, .index = index };
1353 int ret;
1354
1355 ret = usb4_port_retimer_nvm_set_offset(port, index, address);
1356 if (ret)
1357 return ret;
1358
1359 return usb4_do_write_data(address, buf, size,
1360 usb4_port_retimer_nvm_write_next_block, &info);
1361}
1362
1363/**
1364 * usb4_port_retimer_nvm_authenticate() - Start retimer NVM upgrade
1365 * @port: USB4 port
1366 * @index: Retimer index
1367 *
1368 * After the new NVM image has been written via usb4_port_retimer_nvm_write()
1369 * this function can be used to trigger the NVM upgrade process. If
1370 * successful the retimer restarts with the new NVM and may not have the
1371 * index set so one needs to call usb4_port_enumerate_retimers() to
1372 * force index to be assigned.
1373 */
1374int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index)
1375{
1376 u32 val;
1377
1378 /*
1379 * We need to use the raw operation here because once the
1380 * authentication completes the retimer index is not set anymore
1381 * so we do not get back the status now.
1382 */
1383 val = USB4_SB_OPCODE_NVM_AUTH_WRITE;
1384 return usb4_port_sb_write(port, USB4_SB_TARGET_RETIMER, index,
1385 USB4_SB_OPCODE, &val, sizeof(val));
1386}
1387
1388/**
1389 * usb4_port_retimer_nvm_authenticate_status() - Read status of NVM upgrade
1390 * @port: USB4 port
1391 * @index: Retimer index
1392 * @status: Raw status code read from metadata
1393 *
1394 * This can be called after usb4_port_retimer_nvm_authenticate() and
1395 * usb4_port_enumerate_retimers() to fetch status of the NVM upgrade.
1396 *
1397 * Returns %0 if the authentication status was successfully read. The
1398 * completion metadata (the result) is then stored into @status. If
1399 * reading the status fails, returns negative errno.
1400 */
1401int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1402 u32 *status)
1403{
1404 u32 metadata, val;
1405 int ret;
1406
1407 ret = usb4_port_retimer_read(port, index, USB4_SB_OPCODE, &val,
1408 sizeof(val));
1409 if (ret)
1410 return ret;
1411
1412 switch (val) {
1413 case 0:
1414 *status = 0;
1415 return 0;
1416
1417 case USB4_SB_OPCODE_ERR:
1418 ret = usb4_port_retimer_read(port, index, USB4_SB_METADATA,
1419 &metadata, sizeof(metadata));
1420 if (ret)
1421 return ret;
1422
1423 *status = metadata & USB4_SB_METADATA_NVM_AUTH_WRITE_MASK;
1424 return 0;
1425
1426 case USB4_SB_OPCODE_ONS:
1427 return -EOPNOTSUPP;
1428
1429 default:
1430 return -EIO;
1431 }
1432}
1433
1434static int usb4_port_retimer_nvm_read_block(void *data, unsigned int dwaddress,
1435 void *buf, size_t dwords)
1436{
1437 const struct retimer_info *info = data;
1438 struct tb_port *port = info->port;
1439 u8 index = info->index;
1440 u32 metadata;
1441 int ret;
1442
1443 metadata = dwaddress << USB4_NVM_READ_OFFSET_SHIFT;
1444 if (dwords < USB4_DATA_DWORDS)
1445 metadata |= dwords << USB4_NVM_READ_LENGTH_SHIFT;
1446
1447 ret = usb4_port_retimer_write(port, index, USB4_SB_METADATA, &metadata,
1448 sizeof(metadata));
1449 if (ret)
1450 return ret;
1451
1452 ret = usb4_port_retimer_op(port, index, USB4_SB_OPCODE_NVM_READ, 500);
1453 if (ret)
1454 return ret;
1455
1456 return usb4_port_retimer_read(port, index, USB4_SB_DATA, buf,
1457 dwords * 4);
1458}
1459
1460/**
1461 * usb4_port_retimer_nvm_read() - Read contents of retimer NVM
1462 * @port: USB4 port
1463 * @index: Retimer index
1464 * @address: NVM address (in bytes) to start reading
1465 * @buf: Data read from NVM is stored here
1466 * @size: Number of bytes to read
1467 *
1468 * Reads retimer NVM and copies the contents to @buf. Returns %0 if the
1469 * read was successful and negative errno in case of failure.
1470 * Specifically returns %-ENODEV if there is no retimer at @index.
1471 */
1472int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1473 unsigned int address, void *buf, size_t size)
1474{
1475 struct retimer_info info = { .port = port, .index = index };
1476
1477 return usb4_do_read_data(address, buf, size,
1478 usb4_port_retimer_nvm_read_block, &info);
1479}
1480
3b1d8d57
MW		 1481/**
1482 * usb4_usb3_port_max_link_rate() - Maximum support USB3 link rate
1483 * @port: USB3 adapter port
1484 *
1485 * Return maximum supported link rate of a USB3 adapter in Mb/s.
1486 * Negative errno in case of error.
1487 */
1488int usb4_usb3_port_max_link_rate(struct tb_port *port)
1489{
1490 int ret, lr;
1491 u32 val;
1492
1493 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1494 return -EINVAL;
1495
1496 ret = tb_port_read(port, &val, TB_CFG_PORT,
1497 port->cap_adap + ADP_USB3_CS_4, 1);
1498 if (ret)
1499 return ret;
1500
1501 lr = (val & ADP_USB3_CS_4_MSLR_MASK) >> ADP_USB3_CS_4_MSLR_SHIFT;
1502 return lr == ADP_USB3_CS_4_MSLR_20G ? 20000 : 10000;
1503}
1504
1505/**
1506 * usb4_usb3_port_actual_link_rate() - Established USB3 link rate
1507 * @port: USB3 adapter port
1508 *
1509 * Return actual established link rate of a USB3 adapter in Mb/s. If the
1510 * link is not up returns %0 and negative errno in case of failure.
1511 */
1512int usb4_usb3_port_actual_link_rate(struct tb_port *port)
1513{
1514 int ret, lr;
1515 u32 val;
1516
1517 if (!tb_port_is_usb3_down(port) && !tb_port_is_usb3_up(port))
1518 return -EINVAL;
1519
1520 ret = tb_port_read(port, &val, TB_CFG_PORT,
1521 port->cap_adap + ADP_USB3_CS_4, 1);
1522 if (ret)
1523 return ret;
1524
1525 if (!(val & ADP_USB3_CS_4_ULV))
1526 return 0;
1527
1528 lr = val & ADP_USB3_CS_4_ALR_MASK;
1529 return lr == ADP_USB3_CS_4_ALR_20G ? 20000 : 10000;
1530}
1531
1532static int usb4_usb3_port_cm_request(struct tb_port *port, bool request)
1533{
1534 int ret;
1535 u32 val;
1536
1537 if (!tb_port_is_usb3_down(port))
1538 return -EINVAL;
1539 if (tb_route(port->sw))
1540 return -EINVAL;
1541
1542 ret = tb_port_read(port, &val, TB_CFG_PORT,
1543 port->cap_adap + ADP_USB3_CS_2, 1);
1544 if (ret)
1545 return ret;
1546
1547 if (request)
1548 val |= ADP_USB3_CS_2_CMR;
1549 else
1550 val &= ~ADP_USB3_CS_2_CMR;
1551
1552 ret = tb_port_write(port, &val, TB_CFG_PORT,
1553 port->cap_adap + ADP_USB3_CS_2, 1);
1554 if (ret)
1555 return ret;
1556
1557 /*
1558 * We can use val here directly as the CMR bit is in the same place
1559 * as HCA. Just mask out others.
1560 */
1561 val &= ADP_USB3_CS_2_CMR;
1562 return usb4_port_wait_for_bit(port, port->cap_adap + ADP_USB3_CS_1,
1563 ADP_USB3_CS_1_HCA, val, 1500);
1564}
1565
1566static inline int usb4_usb3_port_set_cm_request(struct tb_port *port)
1567{
1568 return usb4_usb3_port_cm_request(port, true);
1569}
1570
1571static inline int usb4_usb3_port_clear_cm_request(struct tb_port *port)
1572{
1573 return usb4_usb3_port_cm_request(port, false);
1574}
1575
1576static unsigned int usb3_bw_to_mbps(u32 bw, u8 scale)
1577{
1578 unsigned long uframes;
1579
4c767ce4 1580 uframes = bw * 512UL << scale;
3b1d8d57
MW		 1581 return DIV_ROUND_CLOSEST(uframes * 8000, 1000 * 1000);
1582}
1583
1584static u32 mbps_to_usb3_bw(unsigned int mbps, u8 scale)
1585{
1586 unsigned long uframes;
1587
1588 /* 1 uframe is 1/8 ms (125 us) -> 1 / 8000 s */
1589 uframes = ((unsigned long)mbps * 1000 * 1000) / 8000;
4c767ce4 1590 return DIV_ROUND_UP(uframes, 512UL << scale);
3b1d8d57
MW		 1591}
1592
1593static int usb4_usb3_port_read_allocated_bandwidth(struct tb_port *port,
1594 int *upstream_bw,
1595 int *downstream_bw)
1596{
1597 u32 val, bw, scale;
1598 int ret;
1599
1600 ret = tb_port_read(port, &val, TB_CFG_PORT,
1601 port->cap_adap + ADP_USB3_CS_2, 1);
1602 if (ret)
1603 return ret;
1604
1605 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1606 port->cap_adap + ADP_USB3_CS_3, 1);
1607 if (ret)
1608 return ret;
1609
1610 scale &= ADP_USB3_CS_3_SCALE_MASK;
1611
1612 bw = val & ADP_USB3_CS_2_AUBW_MASK;
1613 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1614
1615 bw = (val & ADP_USB3_CS_2_ADBW_MASK) >> ADP_USB3_CS_2_ADBW_SHIFT;
1616 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1617
1618 return 0;
1619}
1620
1621/**
1622 * usb4_usb3_port_allocated_bandwidth() - Bandwidth allocated for USB3
1623 * @port: USB3 adapter port
1624 * @upstream_bw: Allocated upstream bandwidth is stored here
1625 * @downstream_bw: Allocated downstream bandwidth is stored here
1626 *
1627 * Stores currently allocated USB3 bandwidth into @upstream_bw and
1628 * @downstream_bw in Mb/s. Returns %0 in case of success and negative
1629 * errno in failure.
1630 */
1631int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1632 int *downstream_bw)
1633{
1634 int ret;
1635
1636 ret = usb4_usb3_port_set_cm_request(port);
1637 if (ret)
1638 return ret;
1639
1640 ret = usb4_usb3_port_read_allocated_bandwidth(port, upstream_bw,
1641 downstream_bw);
1642 usb4_usb3_port_clear_cm_request(port);
1643
1644 return ret;
1645}
1646
1647static int usb4_usb3_port_read_consumed_bandwidth(struct tb_port *port,
1648 int *upstream_bw,
1649 int *downstream_bw)
1650{
1651 u32 val, bw, scale;
1652 int ret;
1653
1654 ret = tb_port_read(port, &val, TB_CFG_PORT,
1655 port->cap_adap + ADP_USB3_CS_1, 1);
1656 if (ret)
1657 return ret;
1658
1659 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1660 port->cap_adap + ADP_USB3_CS_3, 1);
1661 if (ret)
1662 return ret;
1663
1664 scale &= ADP_USB3_CS_3_SCALE_MASK;
1665
1666 bw = val & ADP_USB3_CS_1_CUBW_MASK;
1667 *upstream_bw = usb3_bw_to_mbps(bw, scale);
1668
1669 bw = (val & ADP_USB3_CS_1_CDBW_MASK) >> ADP_USB3_CS_1_CDBW_SHIFT;
1670 *downstream_bw = usb3_bw_to_mbps(bw, scale);
1671
1672 return 0;
1673}
1674
1675static int usb4_usb3_port_write_allocated_bandwidth(struct tb_port *port,
1676 int upstream_bw,
1677 int downstream_bw)
1678{
1679 u32 val, ubw, dbw, scale;
1680 int ret;
1681
1682 /* Read the used scale, hardware default is 0 */
1683 ret = tb_port_read(port, &scale, TB_CFG_PORT,
1684 port->cap_adap + ADP_USB3_CS_3, 1);
1685 if (ret)
1686 return ret;
1687
1688 scale &= ADP_USB3_CS_3_SCALE_MASK;
1689 ubw = mbps_to_usb3_bw(upstream_bw, scale);
1690 dbw = mbps_to_usb3_bw(downstream_bw, scale);
1691
1692 ret = tb_port_read(port, &val, TB_CFG_PORT,
1693 port->cap_adap + ADP_USB3_CS_2, 1);
1694 if (ret)
1695 return ret;
1696
1697 val &= ~(ADP_USB3_CS_2_AUBW_MASK | ADP_USB3_CS_2_ADBW_MASK);
1698 val |= dbw << ADP_USB3_CS_2_ADBW_SHIFT;
1699 val |= ubw;
1700
1701 return tb_port_write(port, &val, TB_CFG_PORT,
1702 port->cap_adap + ADP_USB3_CS_2, 1);
1703}
1704
1705/**
1706 * usb4_usb3_port_allocate_bandwidth() - Allocate bandwidth for USB3
1707 * @port: USB3 adapter port
1708 * @upstream_bw: New upstream bandwidth
1709 * @downstream_bw: New downstream bandwidth
1710 *
1711 * This can be used to set how much bandwidth is allocated for the USB3
1712 * tunneled isochronous traffic. @upstream_bw and @downstream_bw are the
1713 * new values programmed to the USB3 adapter allocation registers. If
1714 * the values are lower than what is currently consumed the allocation
1715 * is set to what is currently consumed instead (consumed bandwidth
1716 * cannot be taken away by CM). The actual new values are returned in
1717 * @upstream_bw and @downstream_bw.
1718 *
1719 * Returns %0 in case of success and negative errno if there was a
1720 * failure.
1721 */
1722int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1723 int *downstream_bw)
1724{
1725 int ret, consumed_up, consumed_down, allocate_up, allocate_down;
1726
1727 ret = usb4_usb3_port_set_cm_request(port);
1728 if (ret)
1729 return ret;
1730
1731 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1732 &consumed_down);
1733 if (ret)
1734 goto err_request;
1735
1736 /* Don't allow it go lower than what is consumed */
1737 allocate_up = max(*upstream_bw, consumed_up);
1738 allocate_down = max(*downstream_bw, consumed_down);
1739
1740 ret = usb4_usb3_port_write_allocated_bandwidth(port, allocate_up,
1741 allocate_down);
1742 if (ret)
1743 goto err_request;
1744
1745 *upstream_bw = allocate_up;
1746 *downstream_bw = allocate_down;
1747
1748err_request:
1749 usb4_usb3_port_clear_cm_request(port);
1750 return ret;
1751}
1752
1753/**
1754 * usb4_usb3_port_release_bandwidth() - Release allocated USB3 bandwidth
1755 * @port: USB3 adapter port
1756 * @upstream_bw: New allocated upstream bandwidth
1757 * @downstream_bw: New allocated downstream bandwidth
1758 *
1759 * Releases USB3 allocated bandwidth down to what is actually consumed.
1760 * The new bandwidth is returned in @upstream_bw and @downstream_bw.
1761 *
1762 * Returns 0% in success and negative errno in case of failure.
1763 */
1764int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1765 int *downstream_bw)
1766{
1767 int ret, consumed_up, consumed_down;
1768
1769 ret = usb4_usb3_port_set_cm_request(port);
1770 if (ret)
1771 return ret;
1772
1773 ret = usb4_usb3_port_read_consumed_bandwidth(port, &consumed_up,
1774 &consumed_down);
1775 if (ret)
1776 goto err_request;
1777
1778 /*
1779 * Always keep 1000 Mb/s to make sure xHCI has at least some
1780 * bandwidth available for isochronous traffic.
1781 */
1782 if (consumed_up < 1000)
1783 consumed_up = 1000;
1784 if (consumed_down < 1000)
1785 consumed_down = 1000;
1786
1787 ret = usb4_usb3_port_write_allocated_bandwidth(port, consumed_up,
1788 consumed_down);
1789 if (ret)
1790 goto err_request;
1791
1792 *upstream_bw = consumed_up;
1793 *downstream_bw = consumed_down;
1794
1795err_request:
1796 usb4_usb3_port_clear_cm_request(port);
1797 return ret;
1798}
Linux 6.x block layer and io_uring tree(s)