Commit | Line | Data |
---|---|---|
fd3b339c | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
32af9434 MW |
2 | /* |
3 | * Thunderbolt control channel messages | |
4 | * | |
5 | * Copyright (C) 2014 Andreas Noever <andreas.noever@gmail.com> | |
6 | * Copyright (C) 2017, Intel Corporation | |
32af9434 MW |
7 | */ |
8 | ||
9 | #ifndef _TB_MSGS | |
10 | #define _TB_MSGS | |
11 | ||
12 | #include <linux/types.h> | |
f67cf491 | 13 | #include <linux/uuid.h> |
32af9434 | 14 | |
32af9434 MW |
15 | enum tb_cfg_space { |
16 | TB_CFG_HOPS = 0, | |
17 | TB_CFG_PORT = 1, | |
18 | TB_CFG_SWITCH = 2, | |
19 | TB_CFG_COUNTERS = 3, | |
20 | }; | |
21 | ||
22 | enum tb_cfg_error { | |
23 | TB_CFG_ERROR_PORT_NOT_CONNECTED = 0, | |
24 | TB_CFG_ERROR_LINK_ERROR = 1, | |
25 | TB_CFG_ERROR_INVALID_CONFIG_SPACE = 2, | |
26 | TB_CFG_ERROR_NO_SUCH_PORT = 4, | |
27 | TB_CFG_ERROR_ACK_PLUG_EVENT = 7, /* send as reply to TB_CFG_PKG_EVENT */ | |
28 | TB_CFG_ERROR_LOOP = 8, | |
29 | TB_CFG_ERROR_HEC_ERROR_DETECTED = 12, | |
30 | TB_CFG_ERROR_FLOW_CONTROL_ERROR = 13, | |
31 | }; | |
32 | ||
33 | /* common header */ | |
34 | struct tb_cfg_header { | |
35 | u32 route_hi:22; | |
36 | u32 unknown:10; /* highest order bit is set on replies */ | |
37 | u32 route_lo; | |
38 | } __packed; | |
39 | ||
40 | /* additional header for read/write packets */ | |
41 | struct tb_cfg_address { | |
42 | u32 offset:13; /* in dwords */ | |
43 | u32 length:6; /* in dwords */ | |
44 | u32 port:6; | |
45 | enum tb_cfg_space space:2; | |
46 | u32 seq:2; /* sequence number */ | |
47 | u32 zero:3; | |
48 | } __packed; | |
49 | ||
50 | /* TB_CFG_PKG_READ, response for TB_CFG_PKG_WRITE */ | |
51 | struct cfg_read_pkg { | |
52 | struct tb_cfg_header header; | |
53 | struct tb_cfg_address addr; | |
54 | } __packed; | |
55 | ||
56 | /* TB_CFG_PKG_WRITE, response for TB_CFG_PKG_READ */ | |
57 | struct cfg_write_pkg { | |
58 | struct tb_cfg_header header; | |
59 | struct tb_cfg_address addr; | |
60 | u32 data[64]; /* maximum size, tb_cfg_address.length has 6 bits */ | |
61 | } __packed; | |
62 | ||
63 | /* TB_CFG_PKG_ERROR */ | |
64 | struct cfg_error_pkg { | |
65 | struct tb_cfg_header header; | |
66 | enum tb_cfg_error error:4; | |
67 | u32 zero1:4; | |
68 | u32 port:6; | |
69 | u32 zero2:2; /* Both should be zero, still they are different fields. */ | |
70 | u32 zero3:16; | |
71 | } __packed; | |
72 | ||
73 | /* TB_CFG_PKG_EVENT */ | |
74 | struct cfg_event_pkg { | |
75 | struct tb_cfg_header header; | |
76 | u32 port:6; | |
77 | u32 zero:25; | |
78 | bool unplug:1; | |
79 | } __packed; | |
80 | ||
81 | /* TB_CFG_PKG_RESET */ | |
82 | struct cfg_reset_pkg { | |
83 | struct tb_cfg_header header; | |
84 | } __packed; | |
85 | ||
86 | /* TB_CFG_PKG_PREPARE_TO_SLEEP */ | |
87 | struct cfg_pts_pkg { | |
88 | struct tb_cfg_header header; | |
89 | u32 data; | |
90 | } __packed; | |
91 | ||
f67cf491 MW |
92 | /* ICM messages */ |
93 | ||
94 | enum icm_pkg_code { | |
95 | ICM_GET_TOPOLOGY = 0x1, | |
96 | ICM_DRIVER_READY = 0x3, | |
97 | ICM_APPROVE_DEVICE = 0x4, | |
98 | ICM_CHALLENGE_DEVICE = 0x5, | |
99 | ICM_ADD_DEVICE_KEY = 0x6, | |
100 | ICM_GET_ROUTE = 0xa, | |
d1ff7024 | 101 | ICM_APPROVE_XDOMAIN = 0x10, |
4bac471d | 102 | ICM_DISCONNECT_XDOMAIN = 0x11, |
9aaa3b8b | 103 | ICM_PREBOOT_ACL = 0x18, |
f67cf491 MW |
104 | }; |
105 | ||
106 | enum icm_event_code { | |
107 | ICM_EVENT_DEVICE_CONNECTED = 3, | |
108 | ICM_EVENT_DEVICE_DISCONNECTED = 4, | |
d1ff7024 MW |
109 | ICM_EVENT_XDOMAIN_CONNECTED = 6, |
110 | ICM_EVENT_XDOMAIN_DISCONNECTED = 7, | |
f67cf491 MW |
111 | }; |
112 | ||
113 | struct icm_pkg_header { | |
114 | u8 code; | |
115 | u8 flags; | |
116 | u8 packet_id; | |
117 | u8 total_packets; | |
80671708 | 118 | }; |
f67cf491 MW |
119 | |
120 | #define ICM_FLAGS_ERROR BIT(0) | |
121 | #define ICM_FLAGS_NO_KEY BIT(1) | |
122 | #define ICM_FLAGS_SLEVEL_SHIFT 3 | |
123 | #define ICM_FLAGS_SLEVEL_MASK GENMASK(4, 3) | |
9aaa3b8b | 124 | #define ICM_FLAGS_WRITE BIT(7) |
f67cf491 MW |
125 | |
126 | struct icm_pkg_driver_ready { | |
127 | struct icm_pkg_header hdr; | |
80671708 | 128 | }; |
f67cf491 | 129 | |
9aaa3b8b | 130 | /* Falcon Ridge only messages */ |
3080e197 MW |
131 | |
132 | struct icm_fr_pkg_driver_ready_response { | |
f67cf491 MW |
133 | struct icm_pkg_header hdr; |
134 | u8 romver; | |
135 | u8 ramver; | |
136 | u16 security_level; | |
80671708 | 137 | }; |
f67cf491 | 138 | |
3080e197 | 139 | #define ICM_FR_SLEVEL_MASK 0xf |
f67cf491 | 140 | |
9aaa3b8b MW |
141 | /* Falcon Ridge & Alpine Ridge common messages */ |
142 | ||
f67cf491 MW |
143 | struct icm_fr_pkg_get_topology { |
144 | struct icm_pkg_header hdr; | |
80671708 | 145 | }; |
f67cf491 MW |
146 | |
147 | #define ICM_GET_TOPOLOGY_PACKETS 14 | |
148 | ||
149 | struct icm_fr_pkg_get_topology_response { | |
150 | struct icm_pkg_header hdr; | |
151 | u32 route_lo; | |
152 | u32 route_hi; | |
153 | u8 first_data; | |
154 | u8 second_data; | |
155 | u8 drom_i2c_address_index; | |
156 | u8 switch_index; | |
157 | u32 reserved[2]; | |
158 | u32 ports[16]; | |
159 | u32 port_hop_info[16]; | |
80671708 | 160 | }; |
f67cf491 MW |
161 | |
162 | #define ICM_SWITCH_USED BIT(0) | |
163 | #define ICM_SWITCH_UPSTREAM_PORT_MASK GENMASK(7, 1) | |
164 | #define ICM_SWITCH_UPSTREAM_PORT_SHIFT 1 | |
165 | ||
166 | #define ICM_PORT_TYPE_MASK GENMASK(23, 0) | |
167 | #define ICM_PORT_INDEX_SHIFT 24 | |
168 | #define ICM_PORT_INDEX_MASK GENMASK(31, 24) | |
169 | ||
170 | struct icm_fr_event_device_connected { | |
171 | struct icm_pkg_header hdr; | |
7c39ffe7 | 172 | uuid_t ep_uuid; |
f67cf491 MW |
173 | u8 connection_key; |
174 | u8 connection_id; | |
175 | u16 link_info; | |
176 | u32 ep_name[55]; | |
80671708 | 177 | }; |
f67cf491 MW |
178 | |
179 | #define ICM_LINK_INFO_LINK_MASK 0x7 | |
180 | #define ICM_LINK_INFO_DEPTH_SHIFT 4 | |
181 | #define ICM_LINK_INFO_DEPTH_MASK GENMASK(7, 4) | |
182 | #define ICM_LINK_INFO_APPROVED BIT(8) | |
cb653eec | 183 | #define ICM_LINK_INFO_REJECTED BIT(9) |
14862ee3 | 184 | #define ICM_LINK_INFO_BOOT BIT(10) |
f67cf491 MW |
185 | |
186 | struct icm_fr_pkg_approve_device { | |
187 | struct icm_pkg_header hdr; | |
7c39ffe7 | 188 | uuid_t ep_uuid; |
f67cf491 MW |
189 | u8 connection_key; |
190 | u8 connection_id; | |
191 | u16 reserved; | |
80671708 | 192 | }; |
f67cf491 MW |
193 | |
194 | struct icm_fr_event_device_disconnected { | |
195 | struct icm_pkg_header hdr; | |
196 | u16 reserved; | |
197 | u16 link_info; | |
80671708 | 198 | }; |
f67cf491 | 199 | |
d1ff7024 MW |
200 | struct icm_fr_event_xdomain_connected { |
201 | struct icm_pkg_header hdr; | |
202 | u16 reserved; | |
203 | u16 link_info; | |
204 | uuid_t remote_uuid; | |
205 | uuid_t local_uuid; | |
206 | u32 local_route_hi; | |
207 | u32 local_route_lo; | |
208 | u32 remote_route_hi; | |
209 | u32 remote_route_lo; | |
210 | }; | |
211 | ||
212 | struct icm_fr_event_xdomain_disconnected { | |
213 | struct icm_pkg_header hdr; | |
214 | u16 reserved; | |
215 | u16 link_info; | |
216 | uuid_t remote_uuid; | |
217 | }; | |
218 | ||
f67cf491 MW |
219 | struct icm_fr_pkg_add_device_key { |
220 | struct icm_pkg_header hdr; | |
7c39ffe7 | 221 | uuid_t ep_uuid; |
f67cf491 MW |
222 | u8 connection_key; |
223 | u8 connection_id; | |
224 | u16 reserved; | |
225 | u32 key[8]; | |
80671708 | 226 | }; |
f67cf491 MW |
227 | |
228 | struct icm_fr_pkg_add_device_key_response { | |
229 | struct icm_pkg_header hdr; | |
7c39ffe7 | 230 | uuid_t ep_uuid; |
f67cf491 MW |
231 | u8 connection_key; |
232 | u8 connection_id; | |
233 | u16 reserved; | |
80671708 | 234 | }; |
f67cf491 MW |
235 | |
236 | struct icm_fr_pkg_challenge_device { | |
237 | struct icm_pkg_header hdr; | |
7c39ffe7 | 238 | uuid_t ep_uuid; |
f67cf491 MW |
239 | u8 connection_key; |
240 | u8 connection_id; | |
241 | u16 reserved; | |
242 | u32 challenge[8]; | |
80671708 | 243 | }; |
f67cf491 MW |
244 | |
245 | struct icm_fr_pkg_challenge_device_response { | |
246 | struct icm_pkg_header hdr; | |
7c39ffe7 | 247 | uuid_t ep_uuid; |
f67cf491 MW |
248 | u8 connection_key; |
249 | u8 connection_id; | |
250 | u16 reserved; | |
251 | u32 challenge[8]; | |
252 | u32 response[8]; | |
80671708 | 253 | }; |
f67cf491 | 254 | |
d1ff7024 MW |
255 | struct icm_fr_pkg_approve_xdomain { |
256 | struct icm_pkg_header hdr; | |
257 | u16 reserved; | |
258 | u16 link_info; | |
259 | uuid_t remote_uuid; | |
260 | u16 transmit_path; | |
261 | u16 transmit_ring; | |
262 | u16 receive_path; | |
263 | u16 receive_ring; | |
264 | }; | |
265 | ||
266 | struct icm_fr_pkg_approve_xdomain_response { | |
267 | struct icm_pkg_header hdr; | |
268 | u16 reserved; | |
269 | u16 link_info; | |
270 | uuid_t remote_uuid; | |
271 | u16 transmit_path; | |
272 | u16 transmit_ring; | |
273 | u16 receive_path; | |
274 | u16 receive_ring; | |
275 | }; | |
276 | ||
f67cf491 MW |
277 | /* Alpine Ridge only messages */ |
278 | ||
9aaa3b8b MW |
279 | struct icm_ar_pkg_driver_ready_response { |
280 | struct icm_pkg_header hdr; | |
281 | u8 romver; | |
282 | u8 ramver; | |
283 | u16 info; | |
284 | }; | |
285 | ||
2d8ff0b5 MW |
286 | #define ICM_AR_FLAGS_RTD3 BIT(6) |
287 | ||
9aaa3b8b MW |
288 | #define ICM_AR_INFO_SLEVEL_MASK GENMASK(3, 0) |
289 | #define ICM_AR_INFO_BOOT_ACL_SHIFT 7 | |
290 | #define ICM_AR_INFO_BOOT_ACL_MASK GENMASK(11, 7) | |
291 | #define ICM_AR_INFO_BOOT_ACL_SUPPORTED BIT(13) | |
292 | ||
f67cf491 MW |
293 | struct icm_ar_pkg_get_route { |
294 | struct icm_pkg_header hdr; | |
295 | u16 reserved; | |
296 | u16 link_info; | |
80671708 | 297 | }; |
f67cf491 MW |
298 | |
299 | struct icm_ar_pkg_get_route_response { | |
300 | struct icm_pkg_header hdr; | |
301 | u16 reserved; | |
302 | u16 link_info; | |
303 | u32 route_hi; | |
304 | u32 route_lo; | |
80671708 | 305 | }; |
f67cf491 | 306 | |
9aaa3b8b MW |
307 | struct icm_ar_boot_acl_entry { |
308 | u32 uuid_lo; | |
309 | u32 uuid_hi; | |
310 | }; | |
311 | ||
312 | #define ICM_AR_PREBOOT_ACL_ENTRIES 16 | |
313 | ||
314 | struct icm_ar_pkg_preboot_acl { | |
315 | struct icm_pkg_header hdr; | |
316 | struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES]; | |
317 | }; | |
318 | ||
319 | struct icm_ar_pkg_preboot_acl_response { | |
320 | struct icm_pkg_header hdr; | |
321 | struct icm_ar_boot_acl_entry acl[ICM_AR_PREBOOT_ACL_ENTRIES]; | |
322 | }; | |
323 | ||
4bac471d RM |
324 | /* Titan Ridge messages */ |
325 | ||
326 | struct icm_tr_pkg_driver_ready_response { | |
327 | struct icm_pkg_header hdr; | |
328 | u16 reserved1; | |
329 | u16 info; | |
330 | u32 nvm_version; | |
331 | u16 device_id; | |
332 | u16 reserved2; | |
333 | }; | |
334 | ||
2d8ff0b5 MW |
335 | #define ICM_TR_FLAGS_RTD3 BIT(6) |
336 | ||
4bac471d RM |
337 | #define ICM_TR_INFO_SLEVEL_MASK GENMASK(2, 0) |
338 | #define ICM_TR_INFO_BOOT_ACL_SHIFT 7 | |
339 | #define ICM_TR_INFO_BOOT_ACL_MASK GENMASK(12, 7) | |
340 | ||
341 | struct icm_tr_event_device_connected { | |
342 | struct icm_pkg_header hdr; | |
343 | uuid_t ep_uuid; | |
344 | u32 route_hi; | |
345 | u32 route_lo; | |
346 | u8 connection_id; | |
347 | u8 reserved; | |
348 | u16 link_info; | |
349 | u32 ep_name[55]; | |
350 | }; | |
351 | ||
352 | struct icm_tr_event_device_disconnected { | |
353 | struct icm_pkg_header hdr; | |
354 | u32 route_hi; | |
355 | u32 route_lo; | |
356 | }; | |
357 | ||
358 | struct icm_tr_event_xdomain_connected { | |
359 | struct icm_pkg_header hdr; | |
360 | u16 reserved; | |
361 | u16 link_info; | |
362 | uuid_t remote_uuid; | |
363 | uuid_t local_uuid; | |
364 | u32 local_route_hi; | |
365 | u32 local_route_lo; | |
366 | u32 remote_route_hi; | |
367 | u32 remote_route_lo; | |
368 | }; | |
369 | ||
370 | struct icm_tr_event_xdomain_disconnected { | |
371 | struct icm_pkg_header hdr; | |
372 | u32 route_hi; | |
373 | u32 route_lo; | |
374 | uuid_t remote_uuid; | |
375 | }; | |
376 | ||
377 | struct icm_tr_pkg_approve_device { | |
378 | struct icm_pkg_header hdr; | |
379 | uuid_t ep_uuid; | |
380 | u32 route_hi; | |
381 | u32 route_lo; | |
382 | u8 connection_id; | |
383 | u8 reserved1[3]; | |
384 | }; | |
385 | ||
386 | struct icm_tr_pkg_add_device_key { | |
387 | struct icm_pkg_header hdr; | |
388 | uuid_t ep_uuid; | |
389 | u32 route_hi; | |
390 | u32 route_lo; | |
391 | u8 connection_id; | |
392 | u8 reserved[3]; | |
393 | u32 key[8]; | |
394 | }; | |
395 | ||
396 | struct icm_tr_pkg_challenge_device { | |
397 | struct icm_pkg_header hdr; | |
398 | uuid_t ep_uuid; | |
399 | u32 route_hi; | |
400 | u32 route_lo; | |
401 | u8 connection_id; | |
402 | u8 reserved[3]; | |
403 | u32 challenge[8]; | |
404 | }; | |
405 | ||
406 | struct icm_tr_pkg_approve_xdomain { | |
407 | struct icm_pkg_header hdr; | |
408 | u32 route_hi; | |
409 | u32 route_lo; | |
410 | uuid_t remote_uuid; | |
411 | u16 transmit_path; | |
412 | u16 transmit_ring; | |
413 | u16 receive_path; | |
414 | u16 receive_ring; | |
415 | }; | |
416 | ||
417 | struct icm_tr_pkg_disconnect_xdomain { | |
418 | struct icm_pkg_header hdr; | |
419 | u8 stage; | |
420 | u8 reserved[3]; | |
421 | u32 route_hi; | |
422 | u32 route_lo; | |
423 | uuid_t remote_uuid; | |
424 | }; | |
425 | ||
426 | struct icm_tr_pkg_challenge_device_response { | |
427 | struct icm_pkg_header hdr; | |
428 | uuid_t ep_uuid; | |
429 | u32 route_hi; | |
430 | u32 route_lo; | |
431 | u8 connection_id; | |
432 | u8 reserved[3]; | |
433 | u32 challenge[8]; | |
434 | u32 response[8]; | |
435 | }; | |
436 | ||
437 | struct icm_tr_pkg_add_device_key_response { | |
438 | struct icm_pkg_header hdr; | |
439 | uuid_t ep_uuid; | |
440 | u32 route_hi; | |
441 | u32 route_lo; | |
442 | u8 connection_id; | |
443 | u8 reserved[3]; | |
444 | }; | |
445 | ||
446 | struct icm_tr_pkg_approve_xdomain_response { | |
447 | struct icm_pkg_header hdr; | |
448 | u32 route_hi; | |
449 | u32 route_lo; | |
450 | uuid_t remote_uuid; | |
451 | u16 transmit_path; | |
452 | u16 transmit_ring; | |
453 | u16 receive_path; | |
454 | u16 receive_ring; | |
455 | }; | |
456 | ||
457 | struct icm_tr_pkg_disconnect_xdomain_response { | |
458 | struct icm_pkg_header hdr; | |
459 | u8 stage; | |
460 | u8 reserved[3]; | |
461 | u32 route_hi; | |
462 | u32 route_lo; | |
463 | uuid_t remote_uuid; | |
464 | }; | |
465 | ||
d1ff7024 MW |
466 | /* XDomain messages */ |
467 | ||
468 | struct tb_xdomain_header { | |
469 | u32 route_hi; | |
470 | u32 route_lo; | |
471 | u32 length_sn; | |
472 | }; | |
473 | ||
474 | #define TB_XDOMAIN_LENGTH_MASK GENMASK(5, 0) | |
475 | #define TB_XDOMAIN_SN_MASK GENMASK(28, 27) | |
476 | #define TB_XDOMAIN_SN_SHIFT 27 | |
477 | ||
478 | enum tb_xdp_type { | |
479 | UUID_REQUEST_OLD = 1, | |
480 | UUID_RESPONSE = 2, | |
481 | PROPERTIES_REQUEST, | |
482 | PROPERTIES_RESPONSE, | |
483 | PROPERTIES_CHANGED_REQUEST, | |
484 | PROPERTIES_CHANGED_RESPONSE, | |
485 | ERROR_RESPONSE, | |
486 | UUID_REQUEST = 12, | |
487 | }; | |
488 | ||
489 | struct tb_xdp_header { | |
490 | struct tb_xdomain_header xd_hdr; | |
491 | uuid_t uuid; | |
492 | u32 type; | |
493 | }; | |
494 | ||
3b4b3235 MW |
495 | struct tb_xdp_uuid { |
496 | struct tb_xdp_header hdr; | |
497 | }; | |
498 | ||
499 | struct tb_xdp_uuid_response { | |
500 | struct tb_xdp_header hdr; | |
501 | uuid_t src_uuid; | |
502 | u32 src_route_hi; | |
503 | u32 src_route_lo; | |
504 | }; | |
505 | ||
d1ff7024 MW |
506 | struct tb_xdp_properties { |
507 | struct tb_xdp_header hdr; | |
508 | uuid_t src_uuid; | |
509 | uuid_t dst_uuid; | |
510 | u16 offset; | |
511 | u16 reserved; | |
512 | }; | |
513 | ||
514 | struct tb_xdp_properties_response { | |
515 | struct tb_xdp_header hdr; | |
516 | uuid_t src_uuid; | |
517 | uuid_t dst_uuid; | |
518 | u16 offset; | |
519 | u16 data_length; | |
520 | u32 generation; | |
521 | u32 data[0]; | |
522 | }; | |
523 | ||
524 | /* | |
525 | * Max length of data array single XDomain property response is allowed | |
526 | * to carry. | |
527 | */ | |
528 | #define TB_XDP_PROPERTIES_MAX_DATA_LENGTH \ | |
529 | (((256 - 4 - sizeof(struct tb_xdp_properties_response))) / 4) | |
530 | ||
531 | /* Maximum size of the total property block in dwords we allow */ | |
532 | #define TB_XDP_PROPERTIES_MAX_LENGTH 500 | |
533 | ||
534 | struct tb_xdp_properties_changed { | |
535 | struct tb_xdp_header hdr; | |
536 | uuid_t src_uuid; | |
537 | }; | |
538 | ||
539 | struct tb_xdp_properties_changed_response { | |
540 | struct tb_xdp_header hdr; | |
541 | }; | |
542 | ||
543 | enum tb_xdp_error { | |
544 | ERROR_SUCCESS, | |
545 | ERROR_UNKNOWN_PACKET, | |
546 | ERROR_UNKNOWN_DOMAIN, | |
547 | ERROR_NOT_SUPPORTED, | |
548 | ERROR_NOT_READY, | |
549 | }; | |
550 | ||
551 | struct tb_xdp_error_response { | |
552 | struct tb_xdp_header hdr; | |
553 | u32 error; | |
554 | }; | |
555 | ||
32af9434 | 556 | #endif |