Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
d6cc51cd | 2 | /* |
15c6784c | 3 | * Thunderbolt driver - bus logic (NHI independent) |
d6cc51cd AN |
4 | * |
5 | * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> | |
15c6784c | 6 | * Copyright (C) 2018, Intel Corporation |
d6cc51cd AN |
7 | */ |
8 | ||
9 | #ifndef TB_H_ | |
10 | #define TB_H_ | |
11 | ||
e6b245cc | 12 | #include <linux/nvmem-provider.h> |
a25c8b2f | 13 | #include <linux/pci.h> |
d1ff7024 | 14 | #include <linux/thunderbolt.h> |
bfe778ac | 15 | #include <linux/uuid.h> |
a25c8b2f AN |
16 | |
17 | #include "tb_regs.h" | |
d6cc51cd | 18 | #include "ctl.h" |
3e136768 | 19 | #include "dma_port.h" |
d6cc51cd | 20 | |
719a5fe8 MW |
21 | #define NVM_MIN_SIZE SZ_32K |
22 | #define NVM_MAX_SIZE SZ_512K | |
23 | ||
24 | /* Intel specific NVM offsets */ | |
25 | #define NVM_DEVID 0x05 | |
26 | #define NVM_VERSION 0x08 | |
27 | #define NVM_FLASH_SIZE 0x45 | |
28 | ||
e6b245cc | 29 | /** |
719a5fe8 MW |
30 | * struct tb_nvm - Structure holding NVM information |
31 | * @dev: Owner of the NVM | |
e6b245cc MW |
32 | * @major: Major version number of the active NVM portion |
33 | * @minor: Minor version number of the active NVM portion | |
34 | * @id: Identifier used with both NVM portions | |
35 | * @active: Active portion NVMem device | |
36 | * @non_active: Non-active portion NVMem device | |
37 | * @buf: Buffer where the NVM image is stored before it is written to | |
38 | * the actual NVM flash device | |
39 | * @buf_data_size: Number of bytes actually consumed by the new NVM | |
40 | * image | |
719a5fe8 | 41 | * @authenticating: The device is authenticating the new NVM |
4b794f80 | 42 | * @flushed: The image has been flushed to the storage area |
719a5fe8 MW |
43 | * |
44 | * The user of this structure needs to handle serialization of possible | |
45 | * concurrent access. | |
e6b245cc | 46 | */ |
719a5fe8 MW |
47 | struct tb_nvm { |
48 | struct device *dev; | |
e6b245cc MW |
49 | u8 major; |
50 | u8 minor; | |
51 | int id; | |
52 | struct nvmem_device *active; | |
53 | struct nvmem_device *non_active; | |
54 | void *buf; | |
55 | size_t buf_data_size; | |
56 | bool authenticating; | |
4b794f80 | 57 | bool flushed; |
e6b245cc MW |
58 | }; |
59 | ||
f67cf491 | 60 | #define TB_SWITCH_KEY_SIZE 32 |
f0342e75 | 61 | #define TB_SWITCH_MAX_DEPTH 6 |
b0407983 | 62 | #define USB4_SWITCH_MAX_DEPTH 5 |
f67cf491 | 63 | |
cf29b9af RM |
64 | /** |
65 | * enum tb_switch_tmu_rate - TMU refresh rate | |
66 | * @TB_SWITCH_TMU_RATE_OFF: %0 (Disable Time Sync handshake) | |
67 | * @TB_SWITCH_TMU_RATE_HIFI: %16 us time interval between successive | |
68 | * transmission of the Delay Request TSNOS | |
69 | * (Time Sync Notification Ordered Set) on a Link | |
70 | * @TB_SWITCH_TMU_RATE_NORMAL: %1 ms time interval between successive | |
71 | * transmission of the Delay Request TSNOS on | |
72 | * a Link | |
73 | */ | |
74 | enum tb_switch_tmu_rate { | |
75 | TB_SWITCH_TMU_RATE_OFF = 0, | |
76 | TB_SWITCH_TMU_RATE_HIFI = 16, | |
77 | TB_SWITCH_TMU_RATE_NORMAL = 1000, | |
78 | }; | |
79 | ||
80 | /** | |
81 | * struct tb_switch_tmu - Structure holding switch TMU configuration | |
82 | * @cap: Offset to the TMU capability (%0 if not found) | |
83 | * @has_ucap: Does the switch support uni-directional mode | |
84 | * @rate: TMU refresh rate related to upstream switch. In case of root | |
85 | * switch this holds the domain rate. | |
86 | * @unidirectional: Is the TMU in uni-directional or bi-directional mode | |
87 | * related to upstream switch. Don't case for root switch. | |
88 | */ | |
89 | struct tb_switch_tmu { | |
90 | int cap; | |
91 | bool has_ucap; | |
92 | enum tb_switch_tmu_rate rate; | |
93 | bool unidirectional; | |
94 | }; | |
95 | ||
a25c8b2f AN |
96 | /** |
97 | * struct tb_switch - a thunderbolt switch | |
bfe778ac MW |
98 | * @dev: Device for the switch |
99 | * @config: Switch configuration | |
100 | * @ports: Ports in this switch | |
3e136768 MW |
101 | * @dma_port: If the switch has port supporting DMA configuration based |
102 | * mailbox this will hold the pointer to that (%NULL | |
e6b245cc MW |
103 | * otherwise). If set it also means the switch has |
104 | * upgradeable NVM. | |
cf29b9af | 105 | * @tmu: The switch TMU configuration |
bfe778ac MW |
106 | * @tb: Pointer to the domain the switch belongs to |
107 | * @uid: Unique ID of the switch | |
108 | * @uuid: UUID of the switch (or %NULL if not supported) | |
109 | * @vendor: Vendor ID of the switch | |
110 | * @device: Device ID of the switch | |
72ee3390 MW |
111 | * @vendor_name: Name of the vendor (or %NULL if not known) |
112 | * @device_name: Name of the device (or %NULL if not known) | |
91c0c120 MW |
113 | * @link_speed: Speed of the link in Gb/s |
114 | * @link_width: Width of the link (1 or 2) | |
bbcf40b3 | 115 | * @link_usb4: Upstream link is USB4 |
2c3c4197 | 116 | * @generation: Switch Thunderbolt generation |
bfe778ac | 117 | * @cap_plug_events: Offset to the plug events capability (%0 if not found) |
a9be5582 | 118 | * @cap_lc: Offset to the link controller capability (%0 if not found) |
bfe778ac MW |
119 | * @is_unplugged: The switch is going away |
120 | * @drom: DROM of the switch (%NULL if not found) | |
e6b245cc MW |
121 | * @nvm: Pointer to the NVM if the switch has one (%NULL otherwise) |
122 | * @no_nvm_upgrade: Prevent NVM upgrade of this switch | |
123 | * @safe_mode: The switch is in safe-mode | |
14862ee3 | 124 | * @boot: Whether the switch was already authorized on boot or not |
2d8ff0b5 | 125 | * @rpm: The switch supports runtime PM |
f67cf491 | 126 | * @authorized: Whether the switch is authorized by user or policy |
f67cf491 MW |
127 | * @security_level: Switch supported security level |
128 | * @key: Contains the key used to challenge the device or %NULL if not | |
129 | * supported. Size of the key is %TB_SWITCH_KEY_SIZE. | |
130 | * @connection_id: Connection ID used with ICM messaging | |
131 | * @connection_key: Connection key used with ICM messaging | |
132 | * @link: Root switch link this switch is connected (ICM only) | |
133 | * @depth: Depth in the chain this switch is connected (ICM only) | |
4f7c2e0d MW |
134 | * @rpm_complete: Completion used to wait for runtime resume to |
135 | * complete (ICM only) | |
1cb36293 | 136 | * @quirks: Quirks used for this Thunderbolt switch |
f67cf491 MW |
137 | * |
138 | * When the switch is being added or removed to the domain (other | |
09f11b6c | 139 | * switches) you need to have domain lock held. |
a25c8b2f AN |
140 | */ |
141 | struct tb_switch { | |
bfe778ac | 142 | struct device dev; |
a25c8b2f AN |
143 | struct tb_regs_switch_header config; |
144 | struct tb_port *ports; | |
3e136768 | 145 | struct tb_dma_port *dma_port; |
cf29b9af | 146 | struct tb_switch_tmu tmu; |
a25c8b2f | 147 | struct tb *tb; |
c90553b3 | 148 | u64 uid; |
7c39ffe7 | 149 | uuid_t *uuid; |
bfe778ac MW |
150 | u16 vendor; |
151 | u16 device; | |
72ee3390 MW |
152 | const char *vendor_name; |
153 | const char *device_name; | |
91c0c120 MW |
154 | unsigned int link_speed; |
155 | unsigned int link_width; | |
bbcf40b3 | 156 | bool link_usb4; |
2c3c4197 | 157 | unsigned int generation; |
bfe778ac | 158 | int cap_plug_events; |
a9be5582 | 159 | int cap_lc; |
bfe778ac | 160 | bool is_unplugged; |
cd22e73b | 161 | u8 *drom; |
719a5fe8 | 162 | struct tb_nvm *nvm; |
e6b245cc MW |
163 | bool no_nvm_upgrade; |
164 | bool safe_mode; | |
14862ee3 | 165 | bool boot; |
2d8ff0b5 | 166 | bool rpm; |
f67cf491 | 167 | unsigned int authorized; |
f67cf491 MW |
168 | enum tb_security_level security_level; |
169 | u8 *key; | |
170 | u8 connection_id; | |
171 | u8 connection_key; | |
172 | u8 link; | |
173 | u8 depth; | |
4f7c2e0d | 174 | struct completion rpm_complete; |
1cb36293 | 175 | unsigned long quirks; |
a25c8b2f AN |
176 | }; |
177 | ||
178 | /** | |
179 | * struct tb_port - a thunderbolt port, part of a tb_switch | |
d1ff7024 MW |
180 | * @config: Cached port configuration read from registers |
181 | * @sw: Switch the port belongs to | |
182 | * @remote: Remote port (%NULL if not connected) | |
183 | * @xdomain: Remote host (%NULL if not connected) | |
184 | * @cap_phy: Offset, zero if not found | |
cf29b9af | 185 | * @cap_tmu: Offset of the adapter specific TMU capability (%0 if not present) |
56183c88 | 186 | * @cap_adap: Offset of the adapter specific capability (%0 if not present) |
b0407983 | 187 | * @cap_usb4: Offset to the USB4 port capability (%0 if not present) |
d1ff7024 MW |
188 | * @port: Port number on switch |
189 | * @disabled: Disabled by eeprom | |
91c0c120 | 190 | * @bonded: true if the port is bonded (two lanes combined as one) |
d1ff7024 MW |
191 | * @dual_link_port: If the switch is connected using two ports, points |
192 | * to the other port. | |
193 | * @link_nr: Is this primary or secondary port on the dual_link. | |
0b2863ac MW |
194 | * @in_hopids: Currently allocated input HopIDs |
195 | * @out_hopids: Currently allocated output HopIDs | |
8afe909b | 196 | * @list: Used to link ports to DP resources list |
a25c8b2f AN |
197 | */ |
198 | struct tb_port { | |
199 | struct tb_regs_port_header config; | |
200 | struct tb_switch *sw; | |
d1ff7024 MW |
201 | struct tb_port *remote; |
202 | struct tb_xdomain *xdomain; | |
203 | int cap_phy; | |
cf29b9af | 204 | int cap_tmu; |
56183c88 | 205 | int cap_adap; |
b0407983 | 206 | int cap_usb4; |
d1ff7024 MW |
207 | u8 port; |
208 | bool disabled; | |
91c0c120 | 209 | bool bonded; |
cd22e73b AN |
210 | struct tb_port *dual_link_port; |
211 | u8 link_nr:1; | |
0b2863ac MW |
212 | struct ida in_hopids; |
213 | struct ida out_hopids; | |
8afe909b | 214 | struct list_head list; |
a25c8b2f AN |
215 | }; |
216 | ||
dacb1287 KK |
217 | /** |
218 | * tb_retimer: Thunderbolt retimer | |
219 | * @dev: Device for the retimer | |
220 | * @tb: Pointer to the domain the retimer belongs to | |
221 | * @index: Retimer index facing the router USB4 port | |
222 | * @vendor: Vendor ID of the retimer | |
223 | * @device: Device ID of the retimer | |
224 | * @port: Pointer to the lane 0 adapter | |
225 | * @nvm: Pointer to the NVM if the retimer has one (%NULL otherwise) | |
226 | * @auth_status: Status of last NVM authentication | |
227 | */ | |
228 | struct tb_retimer { | |
229 | struct device dev; | |
230 | struct tb *tb; | |
231 | u8 index; | |
232 | u32 vendor; | |
233 | u32 device; | |
234 | struct tb_port *port; | |
235 | struct tb_nvm *nvm; | |
236 | u32 auth_status; | |
237 | }; | |
238 | ||
520b6702 AN |
239 | /** |
240 | * struct tb_path_hop - routing information for a tb_path | |
8c7acaaf MW |
241 | * @in_port: Ingress port of a switch |
242 | * @out_port: Egress port of a switch where the packet is routed out | |
243 | * (must be on the same switch than @in_port) | |
244 | * @in_hop_index: HopID where the path configuration entry is placed in | |
245 | * the path config space of @in_port. | |
246 | * @in_counter_index: Used counter index (not used in the driver | |
247 | * currently, %-1 to disable) | |
248 | * @next_hop_index: HopID of the packet when it is routed out from @out_port | |
0414bec5 MW |
249 | * @initial_credits: Number of initial flow control credits allocated for |
250 | * the path | |
520b6702 AN |
251 | * |
252 | * Hop configuration is always done on the IN port of a switch. | |
253 | * in_port and out_port have to be on the same switch. Packets arriving on | |
254 | * in_port with "hop" = in_hop_index will get routed to through out_port. The | |
8c7acaaf MW |
255 | * next hop to take (on out_port->remote) is determined by |
256 | * next_hop_index. When routing packet to another switch (out->remote is | |
257 | * set) the @next_hop_index must match the @in_hop_index of that next | |
258 | * hop to make routing possible. | |
520b6702 AN |
259 | * |
260 | * in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in | |
261 | * port. | |
262 | */ | |
263 | struct tb_path_hop { | |
264 | struct tb_port *in_port; | |
265 | struct tb_port *out_port; | |
266 | int in_hop_index; | |
8c7acaaf | 267 | int in_counter_index; |
520b6702 | 268 | int next_hop_index; |
0414bec5 | 269 | unsigned int initial_credits; |
520b6702 AN |
270 | }; |
271 | ||
272 | /** | |
273 | * enum tb_path_port - path options mask | |
8c7acaaf MW |
274 | * @TB_PATH_NONE: Do not activate on any hop on path |
275 | * @TB_PATH_SOURCE: Activate on the first hop (out of src) | |
276 | * @TB_PATH_INTERNAL: Activate on the intermediate hops (not the first/last) | |
277 | * @TB_PATH_DESTINATION: Activate on the last hop (into dst) | |
278 | * @TB_PATH_ALL: Activate on all hops on the path | |
520b6702 AN |
279 | */ |
280 | enum tb_path_port { | |
281 | TB_PATH_NONE = 0, | |
8c7acaaf MW |
282 | TB_PATH_SOURCE = 1, |
283 | TB_PATH_INTERNAL = 2, | |
284 | TB_PATH_DESTINATION = 4, | |
520b6702 AN |
285 | TB_PATH_ALL = 7, |
286 | }; | |
287 | ||
288 | /** | |
289 | * struct tb_path - a unidirectional path between two ports | |
8c7acaaf MW |
290 | * @tb: Pointer to the domain structure |
291 | * @name: Name of the path (used for debugging) | |
292 | * @nfc_credits: Number of non flow controlled credits allocated for the path | |
293 | * @ingress_shared_buffer: Shared buffering used for ingress ports on the path | |
294 | * @egress_shared_buffer: Shared buffering used for egress ports on the path | |
295 | * @ingress_fc_enable: Flow control for ingress ports on the path | |
296 | * @egress_fc_enable: Flow control for egress ports on the path | |
297 | * @priority: Priority group if the path | |
298 | * @weight: Weight of the path inside the priority group | |
299 | * @drop_packages: Drop packages from queue tail or head | |
300 | * @activated: Is the path active | |
44242d6c MW |
301 | * @clear_fc: Clear all flow control from the path config space entries |
302 | * when deactivating this path | |
8c7acaaf MW |
303 | * @hops: Path hops |
304 | * @path_length: How many hops the path uses | |
520b6702 | 305 | * |
8c7acaaf MW |
306 | * A path consists of a number of hops (see &struct tb_path_hop). To |
307 | * establish a PCIe tunnel two paths have to be created between the two | |
308 | * PCIe ports. | |
520b6702 AN |
309 | */ |
310 | struct tb_path { | |
311 | struct tb *tb; | |
8c7acaaf MW |
312 | const char *name; |
313 | int nfc_credits; | |
520b6702 AN |
314 | enum tb_path_port ingress_shared_buffer; |
315 | enum tb_path_port egress_shared_buffer; | |
316 | enum tb_path_port ingress_fc_enable; | |
317 | enum tb_path_port egress_fc_enable; | |
318 | ||
37209783 | 319 | unsigned int priority:3; |
520b6702 AN |
320 | int weight:4; |
321 | bool drop_packages; | |
322 | bool activated; | |
44242d6c | 323 | bool clear_fc; |
520b6702 | 324 | struct tb_path_hop *hops; |
8c7acaaf | 325 | int path_length; |
520b6702 AN |
326 | }; |
327 | ||
0b2863ac MW |
328 | /* HopIDs 0-7 are reserved by the Thunderbolt protocol */ |
329 | #define TB_PATH_MIN_HOPID 8 | |
c738a794 MW |
330 | /* |
331 | * Support paths from the farthest (depth 6) router to the host and back | |
332 | * to the same level (not necessarily to the same router). | |
333 | */ | |
334 | #define TB_PATH_MAX_HOPS (7 * 2) | |
0b2863ac | 335 | |
9d3cce0b MW |
336 | /** |
337 | * struct tb_cm_ops - Connection manager specific operations vector | |
f67cf491 MW |
338 | * @driver_ready: Called right after control channel is started. Used by |
339 | * ICM to send driver ready message to the firmware. | |
9d3cce0b MW |
340 | * @start: Starts the domain |
341 | * @stop: Stops the domain | |
342 | * @suspend_noirq: Connection manager specific suspend_noirq | |
343 | * @resume_noirq: Connection manager specific resume_noirq | |
f67cf491 MW |
344 | * @suspend: Connection manager specific suspend |
345 | * @complete: Connection manager specific complete | |
2d8ff0b5 MW |
346 | * @runtime_suspend: Connection manager specific runtime_suspend |
347 | * @runtime_resume: Connection manager specific runtime_resume | |
4f7c2e0d MW |
348 | * @runtime_suspend_switch: Runtime suspend a switch |
349 | * @runtime_resume_switch: Runtime resume a switch | |
81a54b5e | 350 | * @handle_event: Handle thunderbolt event |
9aaa3b8b MW |
351 | * @get_boot_acl: Get boot ACL list |
352 | * @set_boot_acl: Set boot ACL list | |
f67cf491 MW |
353 | * @approve_switch: Approve switch |
354 | * @add_switch_key: Add key to switch | |
355 | * @challenge_switch_key: Challenge switch using key | |
e6b245cc | 356 | * @disconnect_pcie_paths: Disconnects PCIe paths before NVM update |
d1ff7024 MW |
357 | * @approve_xdomain_paths: Approve (establish) XDomain DMA paths |
358 | * @disconnect_xdomain_paths: Disconnect XDomain DMA paths | |
9d3cce0b MW |
359 | */ |
360 | struct tb_cm_ops { | |
f67cf491 | 361 | int (*driver_ready)(struct tb *tb); |
9d3cce0b MW |
362 | int (*start)(struct tb *tb); |
363 | void (*stop)(struct tb *tb); | |
364 | int (*suspend_noirq)(struct tb *tb); | |
365 | int (*resume_noirq)(struct tb *tb); | |
f67cf491 MW |
366 | int (*suspend)(struct tb *tb); |
367 | void (*complete)(struct tb *tb); | |
2d8ff0b5 MW |
368 | int (*runtime_suspend)(struct tb *tb); |
369 | int (*runtime_resume)(struct tb *tb); | |
4f7c2e0d MW |
370 | int (*runtime_suspend_switch)(struct tb_switch *sw); |
371 | int (*runtime_resume_switch)(struct tb_switch *sw); | |
81a54b5e MW |
372 | void (*handle_event)(struct tb *tb, enum tb_cfg_pkg_type, |
373 | const void *buf, size_t size); | |
9aaa3b8b MW |
374 | int (*get_boot_acl)(struct tb *tb, uuid_t *uuids, size_t nuuids); |
375 | int (*set_boot_acl)(struct tb *tb, const uuid_t *uuids, size_t nuuids); | |
f67cf491 MW |
376 | int (*approve_switch)(struct tb *tb, struct tb_switch *sw); |
377 | int (*add_switch_key)(struct tb *tb, struct tb_switch *sw); | |
378 | int (*challenge_switch_key)(struct tb *tb, struct tb_switch *sw, | |
379 | const u8 *challenge, u8 *response); | |
e6b245cc | 380 | int (*disconnect_pcie_paths)(struct tb *tb); |
d1ff7024 MW |
381 | int (*approve_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd); |
382 | int (*disconnect_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd); | |
9d3cce0b | 383 | }; |
520b6702 | 384 | |
9d3cce0b MW |
385 | static inline void *tb_priv(struct tb *tb) |
386 | { | |
387 | return (void *)tb->privdata; | |
388 | } | |
389 | ||
2d8ff0b5 MW |
390 | #define TB_AUTOSUSPEND_DELAY 15000 /* ms */ |
391 | ||
a25c8b2f AN |
392 | /* helper functions & macros */ |
393 | ||
394 | /** | |
395 | * tb_upstream_port() - return the upstream port of a switch | |
396 | * | |
397 | * Every switch has an upstream port (for the root switch it is the NHI). | |
398 | * | |
399 | * During switch alloc/init tb_upstream_port()->remote may be NULL, even for | |
400 | * non root switches (on the NHI port remote is always NULL). | |
401 | * | |
402 | * Return: Returns the upstream port of the switch. | |
403 | */ | |
404 | static inline struct tb_port *tb_upstream_port(struct tb_switch *sw) | |
405 | { | |
406 | return &sw->ports[sw->config.upstream_port_number]; | |
407 | } | |
408 | ||
dfe40ca4 MW |
409 | /** |
410 | * tb_is_upstream_port() - Is the port upstream facing | |
411 | * @port: Port to check | |
412 | * | |
413 | * Returns true if @port is upstream facing port. In case of dual link | |
414 | * ports both return true. | |
415 | */ | |
416 | static inline bool tb_is_upstream_port(const struct tb_port *port) | |
417 | { | |
418 | const struct tb_port *upstream_port = tb_upstream_port(port->sw); | |
419 | return port == upstream_port || port->dual_link_port == upstream_port; | |
420 | } | |
421 | ||
b323a98f | 422 | static inline u64 tb_route(const struct tb_switch *sw) |
a25c8b2f AN |
423 | { |
424 | return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo; | |
425 | } | |
426 | ||
f67cf491 MW |
427 | static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw) |
428 | { | |
429 | u8 port; | |
430 | ||
431 | port = route >> (sw->config.depth * 8); | |
432 | if (WARN_ON(port > sw->config.max_port_number)) | |
433 | return NULL; | |
434 | return &sw->ports[port]; | |
435 | } | |
436 | ||
dfe40ca4 MW |
437 | /** |
438 | * tb_port_has_remote() - Does the port have switch connected downstream | |
439 | * @port: Port to check | |
440 | * | |
441 | * Returns true only when the port is primary port and has remote set. | |
442 | */ | |
443 | static inline bool tb_port_has_remote(const struct tb_port *port) | |
444 | { | |
445 | if (tb_is_upstream_port(port)) | |
446 | return false; | |
447 | if (!port->remote) | |
448 | return false; | |
449 | if (port->dual_link_port && port->link_nr) | |
450 | return false; | |
451 | ||
452 | return true; | |
453 | } | |
454 | ||
344e0643 MW |
455 | static inline bool tb_port_is_null(const struct tb_port *port) |
456 | { | |
457 | return port && port->port && port->config.type == TB_TYPE_PORT; | |
458 | } | |
459 | ||
99cabbb0 MW |
460 | static inline bool tb_port_is_pcie_down(const struct tb_port *port) |
461 | { | |
462 | return port && port->config.type == TB_TYPE_PCIE_DOWN; | |
463 | } | |
464 | ||
0414bec5 MW |
465 | static inline bool tb_port_is_pcie_up(const struct tb_port *port) |
466 | { | |
467 | return port && port->config.type == TB_TYPE_PCIE_UP; | |
468 | } | |
469 | ||
4f807e47 MW |
470 | static inline bool tb_port_is_dpin(const struct tb_port *port) |
471 | { | |
472 | return port && port->config.type == TB_TYPE_DP_HDMI_IN; | |
473 | } | |
474 | ||
475 | static inline bool tb_port_is_dpout(const struct tb_port *port) | |
476 | { | |
477 | return port && port->config.type == TB_TYPE_DP_HDMI_OUT; | |
478 | } | |
479 | ||
e6f81858 RM |
480 | static inline bool tb_port_is_usb3_down(const struct tb_port *port) |
481 | { | |
482 | return port && port->config.type == TB_TYPE_USB3_DOWN; | |
483 | } | |
484 | ||
485 | static inline bool tb_port_is_usb3_up(const struct tb_port *port) | |
486 | { | |
487 | return port && port->config.type == TB_TYPE_USB3_UP; | |
488 | } | |
489 | ||
a25c8b2f AN |
490 | static inline int tb_sw_read(struct tb_switch *sw, void *buffer, |
491 | enum tb_cfg_space space, u32 offset, u32 length) | |
492 | { | |
4708384f MW |
493 | if (sw->is_unplugged) |
494 | return -ENODEV; | |
a25c8b2f AN |
495 | return tb_cfg_read(sw->tb->ctl, |
496 | buffer, | |
497 | tb_route(sw), | |
498 | 0, | |
499 | space, | |
500 | offset, | |
501 | length); | |
502 | } | |
503 | ||
826c6a17 | 504 | static inline int tb_sw_write(struct tb_switch *sw, const void *buffer, |
a25c8b2f AN |
505 | enum tb_cfg_space space, u32 offset, u32 length) |
506 | { | |
4708384f MW |
507 | if (sw->is_unplugged) |
508 | return -ENODEV; | |
a25c8b2f AN |
509 | return tb_cfg_write(sw->tb->ctl, |
510 | buffer, | |
511 | tb_route(sw), | |
512 | 0, | |
513 | space, | |
514 | offset, | |
515 | length); | |
516 | } | |
517 | ||
518 | static inline int tb_port_read(struct tb_port *port, void *buffer, | |
519 | enum tb_cfg_space space, u32 offset, u32 length) | |
520 | { | |
4708384f MW |
521 | if (port->sw->is_unplugged) |
522 | return -ENODEV; | |
a25c8b2f AN |
523 | return tb_cfg_read(port->sw->tb->ctl, |
524 | buffer, | |
525 | tb_route(port->sw), | |
526 | port->port, | |
527 | space, | |
528 | offset, | |
529 | length); | |
530 | } | |
531 | ||
16a1258a | 532 | static inline int tb_port_write(struct tb_port *port, const void *buffer, |
a25c8b2f AN |
533 | enum tb_cfg_space space, u32 offset, u32 length) |
534 | { | |
4708384f MW |
535 | if (port->sw->is_unplugged) |
536 | return -ENODEV; | |
a25c8b2f AN |
537 | return tb_cfg_write(port->sw->tb->ctl, |
538 | buffer, | |
539 | tb_route(port->sw), | |
540 | port->port, | |
541 | space, | |
542 | offset, | |
543 | length); | |
544 | } | |
545 | ||
546 | #define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg) | |
547 | #define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg) | |
548 | #define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg) | |
549 | #define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg) | |
daa5140f | 550 | #define tb_dbg(tb, fmt, arg...) dev_dbg(&(tb)->nhi->pdev->dev, fmt, ## arg) |
a25c8b2f AN |
551 | |
552 | #define __TB_SW_PRINT(level, sw, fmt, arg...) \ | |
553 | do { \ | |
b323a98f | 554 | const struct tb_switch *__sw = (sw); \ |
a25c8b2f AN |
555 | level(__sw->tb, "%llx: " fmt, \ |
556 | tb_route(__sw), ## arg); \ | |
557 | } while (0) | |
558 | #define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg) | |
559 | #define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg) | |
560 | #define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg) | |
daa5140f | 561 | #define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg) |
a25c8b2f AN |
562 | |
563 | #define __TB_PORT_PRINT(level, _port, fmt, arg...) \ | |
564 | do { \ | |
b323a98f | 565 | const struct tb_port *__port = (_port); \ |
a25c8b2f AN |
566 | level(__port->sw->tb, "%llx:%x: " fmt, \ |
567 | tb_route(__port->sw), __port->port, ## arg); \ | |
568 | } while (0) | |
569 | #define tb_port_WARN(port, fmt, arg...) \ | |
570 | __TB_PORT_PRINT(tb_WARN, port, fmt, ##arg) | |
571 | #define tb_port_warn(port, fmt, arg...) \ | |
572 | __TB_PORT_PRINT(tb_warn, port, fmt, ##arg) | |
573 | #define tb_port_info(port, fmt, arg...) \ | |
574 | __TB_PORT_PRINT(tb_info, port, fmt, ##arg) | |
daa5140f MW |
575 | #define tb_port_dbg(port, fmt, arg...) \ |
576 | __TB_PORT_PRINT(tb_dbg, port, fmt, ##arg) | |
a25c8b2f | 577 | |
f67cf491 | 578 | struct tb *icm_probe(struct tb_nhi *nhi); |
9d3cce0b MW |
579 | struct tb *tb_probe(struct tb_nhi *nhi); |
580 | ||
9d3cce0b | 581 | extern struct device_type tb_domain_type; |
dacb1287 | 582 | extern struct device_type tb_retimer_type; |
bfe778ac | 583 | extern struct device_type tb_switch_type; |
9d3cce0b MW |
584 | |
585 | int tb_domain_init(void); | |
586 | void tb_domain_exit(void); | |
d1ff7024 MW |
587 | int tb_xdomain_init(void); |
588 | void tb_xdomain_exit(void); | |
a25c8b2f | 589 | |
9d3cce0b MW |
590 | struct tb *tb_domain_alloc(struct tb_nhi *nhi, size_t privsize); |
591 | int tb_domain_add(struct tb *tb); | |
592 | void tb_domain_remove(struct tb *tb); | |
593 | int tb_domain_suspend_noirq(struct tb *tb); | |
594 | int tb_domain_resume_noirq(struct tb *tb); | |
f67cf491 MW |
595 | int tb_domain_suspend(struct tb *tb); |
596 | void tb_domain_complete(struct tb *tb); | |
2d8ff0b5 MW |
597 | int tb_domain_runtime_suspend(struct tb *tb); |
598 | int tb_domain_runtime_resume(struct tb *tb); | |
f67cf491 MW |
599 | int tb_domain_approve_switch(struct tb *tb, struct tb_switch *sw); |
600 | int tb_domain_approve_switch_key(struct tb *tb, struct tb_switch *sw); | |
601 | int tb_domain_challenge_switch_key(struct tb *tb, struct tb_switch *sw); | |
e6b245cc | 602 | int tb_domain_disconnect_pcie_paths(struct tb *tb); |
d1ff7024 MW |
603 | int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd); |
604 | int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd); | |
605 | int tb_domain_disconnect_all_paths(struct tb *tb); | |
9d3cce0b | 606 | |
559c1e1e MW |
607 | static inline struct tb *tb_domain_get(struct tb *tb) |
608 | { | |
609 | if (tb) | |
610 | get_device(&tb->dev); | |
611 | return tb; | |
612 | } | |
613 | ||
9d3cce0b MW |
614 | static inline void tb_domain_put(struct tb *tb) |
615 | { | |
616 | put_device(&tb->dev); | |
617 | } | |
d6cc51cd | 618 | |
719a5fe8 MW |
619 | struct tb_nvm *tb_nvm_alloc(struct device *dev); |
620 | int tb_nvm_add_active(struct tb_nvm *nvm, size_t size, nvmem_reg_read_t reg_read); | |
621 | int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val, | |
622 | size_t bytes); | |
623 | int tb_nvm_add_non_active(struct tb_nvm *nvm, size_t size, | |
624 | nvmem_reg_write_t reg_write); | |
625 | void tb_nvm_free(struct tb_nvm *nvm); | |
626 | void tb_nvm_exit(void); | |
627 | ||
bfe778ac MW |
628 | struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent, |
629 | u64 route); | |
e6b245cc MW |
630 | struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb, |
631 | struct device *parent, u64 route); | |
bfe778ac MW |
632 | int tb_switch_configure(struct tb_switch *sw); |
633 | int tb_switch_add(struct tb_switch *sw); | |
634 | void tb_switch_remove(struct tb_switch *sw); | |
23dd5bb4 AN |
635 | void tb_switch_suspend(struct tb_switch *sw); |
636 | int tb_switch_resume(struct tb_switch *sw); | |
356b6c4e | 637 | int tb_switch_reset(struct tb_switch *sw); |
aae20bb6 | 638 | void tb_sw_set_unplugged(struct tb_switch *sw); |
386e5e29 MW |
639 | struct tb_port *tb_switch_find_port(struct tb_switch *sw, |
640 | enum tb_port_type type); | |
f67cf491 MW |
641 | struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link, |
642 | u8 depth); | |
7c39ffe7 | 643 | struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid); |
8e9267bb | 644 | struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route); |
f67cf491 | 645 | |
b433d010 MW |
646 | /** |
647 | * tb_switch_for_each_port() - Iterate over each switch port | |
648 | * @sw: Switch whose ports to iterate | |
649 | * @p: Port used as iterator | |
650 | * | |
651 | * Iterates over each switch port skipping the control port (port %0). | |
652 | */ | |
653 | #define tb_switch_for_each_port(sw, p) \ | |
654 | for ((p) = &(sw)->ports[1]; \ | |
655 | (p) <= &(sw)->ports[(sw)->config.max_port_number]; (p)++) | |
656 | ||
b6b0ea70 MW |
657 | static inline struct tb_switch *tb_switch_get(struct tb_switch *sw) |
658 | { | |
659 | if (sw) | |
660 | get_device(&sw->dev); | |
661 | return sw; | |
662 | } | |
663 | ||
bfe778ac MW |
664 | static inline void tb_switch_put(struct tb_switch *sw) |
665 | { | |
666 | put_device(&sw->dev); | |
667 | } | |
668 | ||
669 | static inline bool tb_is_switch(const struct device *dev) | |
670 | { | |
671 | return dev->type == &tb_switch_type; | |
672 | } | |
673 | ||
674 | static inline struct tb_switch *tb_to_switch(struct device *dev) | |
675 | { | |
676 | if (tb_is_switch(dev)) | |
677 | return container_of(dev, struct tb_switch, dev); | |
678 | return NULL; | |
679 | } | |
680 | ||
0414bec5 MW |
681 | static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw) |
682 | { | |
683 | return tb_to_switch(sw->dev.parent); | |
684 | } | |
685 | ||
17a8f815 | 686 | static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw) |
8b0110d9 MW |
687 | { |
688 | return sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE; | |
689 | } | |
690 | ||
17a8f815 | 691 | static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw) |
8b0110d9 MW |
692 | { |
693 | return sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE; | |
694 | } | |
695 | ||
17a8f815 | 696 | static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw) |
99cabbb0 MW |
697 | { |
698 | switch (sw->config.device_id) { | |
699 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C: | |
700 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C: | |
701 | return true; | |
702 | default: | |
703 | return false; | |
704 | } | |
705 | } | |
706 | ||
17a8f815 | 707 | static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw) |
99cabbb0 MW |
708 | { |
709 | switch (sw->config.device_id) { | |
710 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE: | |
711 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE: | |
712 | return true; | |
713 | default: | |
714 | return false; | |
715 | } | |
716 | } | |
717 | ||
7bffd97e MW |
718 | static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw) |
719 | { | |
720 | switch (sw->config.device_id) { | |
721 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE: | |
722 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE: | |
723 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE: | |
724 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE: | |
725 | return true; | |
726 | default: | |
727 | return false; | |
728 | } | |
729 | } | |
730 | ||
731 | static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw) | |
732 | { | |
733 | switch (sw->config.device_id) { | |
734 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE: | |
735 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE: | |
736 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE: | |
737 | return true; | |
738 | default: | |
739 | return false; | |
740 | } | |
741 | } | |
742 | ||
b0407983 MW |
743 | /** |
744 | * tb_switch_is_usb4() - Is the switch USB4 compliant | |
745 | * @sw: Switch to check | |
746 | * | |
747 | * Returns true if the @sw is USB4 compliant router, false otherwise. | |
748 | */ | |
749 | static inline bool tb_switch_is_usb4(const struct tb_switch *sw) | |
750 | { | |
751 | return sw->config.thunderbolt_version == USB4_VERSION_1_0; | |
752 | } | |
753 | ||
f07a3608 MW |
754 | /** |
755 | * tb_switch_is_icm() - Is the switch handled by ICM firmware | |
756 | * @sw: Switch to check | |
757 | * | |
758 | * In case there is a need to differentiate whether ICM firmware or SW CM | |
759 | * is handling @sw this function can be called. It is valid to call this | |
760 | * after tb_switch_alloc() and tb_switch_configure() has been called | |
761 | * (latter only for SW CM case). | |
762 | */ | |
763 | static inline bool tb_switch_is_icm(const struct tb_switch *sw) | |
764 | { | |
765 | return !sw->config.enabled; | |
766 | } | |
767 | ||
91c0c120 MW |
768 | int tb_switch_lane_bonding_enable(struct tb_switch *sw); |
769 | void tb_switch_lane_bonding_disable(struct tb_switch *sw); | |
de462039 MW |
770 | int tb_switch_configure_link(struct tb_switch *sw); |
771 | void tb_switch_unconfigure_link(struct tb_switch *sw); | |
91c0c120 | 772 | |
8afe909b MW |
773 | bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in); |
774 | int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in); | |
775 | void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in); | |
776 | ||
cf29b9af RM |
777 | int tb_switch_tmu_init(struct tb_switch *sw); |
778 | int tb_switch_tmu_post_time(struct tb_switch *sw); | |
779 | int tb_switch_tmu_disable(struct tb_switch *sw); | |
780 | int tb_switch_tmu_enable(struct tb_switch *sw); | |
781 | ||
782 | static inline bool tb_switch_tmu_is_enabled(const struct tb_switch *sw) | |
783 | { | |
784 | return sw->tmu.rate == TB_SWITCH_TMU_RATE_HIFI && | |
785 | !sw->tmu.unidirectional; | |
786 | } | |
787 | ||
9da672a4 | 788 | int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged); |
520b6702 | 789 | int tb_port_add_nfc_credits(struct tb_port *port, int credits); |
44242d6c | 790 | int tb_port_set_initial_credits(struct tb_port *port, u32 credits); |
520b6702 | 791 | int tb_port_clear_counter(struct tb_port *port, int counter); |
b0407983 | 792 | int tb_port_unlock(struct tb_port *port); |
0b2863ac MW |
793 | int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid); |
794 | void tb_port_release_in_hopid(struct tb_port *port, int hopid); | |
795 | int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid); | |
796 | void tb_port_release_out_hopid(struct tb_port *port, int hopid); | |
fb19fac1 MW |
797 | struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end, |
798 | struct tb_port *prev); | |
9da672a4 | 799 | |
c64c3f3a MW |
800 | /** |
801 | * tb_for_each_port_on_path() - Iterate over each port on path | |
802 | * @src: Source port | |
803 | * @dst: Destination port | |
804 | * @p: Port used as iterator | |
805 | * | |
806 | * Walks over each port on path from @src to @dst. | |
807 | */ | |
808 | #define tb_for_each_port_on_path(src, dst, p) \ | |
809 | for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \ | |
810 | (p) = tb_next_port_on_path((src), (dst), (p))) | |
811 | ||
5b7b8c0a MW |
812 | int tb_port_get_link_speed(struct tb_port *port); |
813 | ||
da2da04b | 814 | int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec); |
aa43a9dc | 815 | int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap); |
da2da04b | 816 | int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap); |
e78db6f0 | 817 | bool tb_port_is_enabled(struct tb_port *port); |
e2b8785e | 818 | |
e6f81858 RM |
819 | bool tb_usb3_port_is_enabled(struct tb_port *port); |
820 | int tb_usb3_port_enable(struct tb_port *port, bool enable); | |
821 | ||
0414bec5 | 822 | bool tb_pci_port_is_enabled(struct tb_port *port); |
93f36ade MW |
823 | int tb_pci_port_enable(struct tb_port *port, bool enable); |
824 | ||
4f807e47 MW |
825 | int tb_dp_port_hpd_is_active(struct tb_port *port); |
826 | int tb_dp_port_hpd_clear(struct tb_port *port); | |
827 | int tb_dp_port_set_hops(struct tb_port *port, unsigned int video, | |
828 | unsigned int aux_tx, unsigned int aux_rx); | |
829 | bool tb_dp_port_is_enabled(struct tb_port *port); | |
830 | int tb_dp_port_enable(struct tb_port *port, bool enable); | |
831 | ||
0414bec5 MW |
832 | struct tb_path *tb_path_discover(struct tb_port *src, int src_hopid, |
833 | struct tb_port *dst, int dst_hopid, | |
834 | struct tb_port **last, const char *name); | |
8c7acaaf MW |
835 | struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int src_hopid, |
836 | struct tb_port *dst, int dst_hopid, int link_nr, | |
837 | const char *name); | |
520b6702 AN |
838 | void tb_path_free(struct tb_path *path); |
839 | int tb_path_activate(struct tb_path *path); | |
840 | void tb_path_deactivate(struct tb_path *path); | |
841 | bool tb_path_is_invalid(struct tb_path *path); | |
0bd680cd MW |
842 | bool tb_path_port_on_path(const struct tb_path *path, |
843 | const struct tb_port *port); | |
520b6702 | 844 | |
cd22e73b AN |
845 | int tb_drom_read(struct tb_switch *sw); |
846 | int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid); | |
c90553b3 | 847 | |
a9be5582 | 848 | int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid); |
e879a709 MW |
849 | int tb_lc_configure_link(struct tb_switch *sw); |
850 | void tb_lc_unconfigure_link(struct tb_switch *sw); | |
5480dfc2 | 851 | int tb_lc_set_sleep(struct tb_switch *sw); |
91c0c120 | 852 | bool tb_lc_lane_bonding_possible(struct tb_switch *sw); |
8afe909b MW |
853 | bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in); |
854 | int tb_lc_dp_sink_alloc(struct tb_switch *sw, struct tb_port *in); | |
855 | int tb_lc_dp_sink_dealloc(struct tb_switch *sw, struct tb_port *in); | |
1cb36293 | 856 | int tb_lc_force_power(struct tb_switch *sw); |
a25c8b2f AN |
857 | |
858 | static inline int tb_route_length(u64 route) | |
859 | { | |
860 | return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT; | |
861 | } | |
862 | ||
9da672a4 AN |
863 | /** |
864 | * tb_downstream_route() - get route to downstream switch | |
865 | * | |
866 | * Port must not be the upstream port (otherwise a loop is created). | |
867 | * | |
868 | * Return: Returns a route to the switch behind @port. | |
869 | */ | |
870 | static inline u64 tb_downstream_route(struct tb_port *port) | |
871 | { | |
872 | return tb_route(port->sw) | |
873 | | ((u64) port->port << (port->sw->config.depth * 8)); | |
874 | } | |
875 | ||
d1ff7024 MW |
876 | bool tb_xdomain_handle_request(struct tb *tb, enum tb_cfg_pkg_type type, |
877 | const void *buf, size_t size); | |
878 | struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent, | |
879 | u64 route, const uuid_t *local_uuid, | |
880 | const uuid_t *remote_uuid); | |
881 | void tb_xdomain_add(struct tb_xdomain *xd); | |
882 | void tb_xdomain_remove(struct tb_xdomain *xd); | |
883 | struct tb_xdomain *tb_xdomain_find_by_link_depth(struct tb *tb, u8 link, | |
884 | u8 depth); | |
885 | ||
dacb1287 KK |
886 | int tb_retimer_scan(struct tb_port *port); |
887 | void tb_retimer_remove_all(struct tb_port *port); | |
888 | ||
889 | static inline bool tb_is_retimer(const struct device *dev) | |
890 | { | |
891 | return dev->type == &tb_retimer_type; | |
892 | } | |
893 | ||
894 | static inline struct tb_retimer *tb_to_retimer(struct device *dev) | |
895 | { | |
896 | if (tb_is_retimer(dev)) | |
897 | return container_of(dev, struct tb_retimer, dev); | |
898 | return NULL; | |
899 | } | |
900 | ||
b0407983 MW |
901 | int usb4_switch_setup(struct tb_switch *sw); |
902 | int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid); | |
903 | int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf, | |
904 | size_t size); | |
905 | int usb4_switch_configure_link(struct tb_switch *sw); | |
906 | void usb4_switch_unconfigure_link(struct tb_switch *sw); | |
907 | bool usb4_switch_lane_bonding_possible(struct tb_switch *sw); | |
908 | int usb4_switch_set_sleep(struct tb_switch *sw); | |
909 | int usb4_switch_nvm_sector_size(struct tb_switch *sw); | |
910 | int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf, | |
911 | size_t size); | |
912 | int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address, | |
913 | const void *buf, size_t size); | |
914 | int usb4_switch_nvm_authenticate(struct tb_switch *sw); | |
915 | bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in); | |
916 | int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in); | |
917 | int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in); | |
918 | struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw, | |
919 | const struct tb_port *port); | |
e6f81858 RM |
920 | struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw, |
921 | const struct tb_port *port); | |
b0407983 MW |
922 | |
923 | int usb4_port_unlock(struct tb_port *port); | |
02d12855 RM |
924 | int usb4_port_enumerate_retimers(struct tb_port *port); |
925 | ||
926 | int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf, | |
927 | u8 size); | |
928 | int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg, | |
929 | const void *buf, u8 size); | |
930 | int usb4_port_retimer_is_last(struct tb_port *port, u8 index); | |
931 | int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index); | |
932 | int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index, | |
933 | unsigned int address, const void *buf, | |
934 | size_t size); | |
935 | int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index); | |
936 | int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index, | |
937 | u32 *status); | |
938 | int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index, | |
939 | unsigned int address, void *buf, size_t size); | |
3b1d8d57 MW |
940 | |
941 | int usb4_usb3_port_max_link_rate(struct tb_port *port); | |
942 | int usb4_usb3_port_actual_link_rate(struct tb_port *port); | |
943 | int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw, | |
944 | int *downstream_bw); | |
945 | int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw, | |
946 | int *downstream_bw); | |
947 | int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw, | |
948 | int *downstream_bw); | |
1cb36293 ML |
949 | |
950 | /* keep link controller awake during update */ | |
951 | #define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0) | |
952 | ||
953 | void tb_check_quirks(struct tb_switch *sw); | |
954 | ||
d6cc51cd | 955 | #endif |