thunderbolt: Change downstream router's TMU rate in both TMU uni/bidir mode
[linux-block.git] / drivers / thunderbolt / tb.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
d6cc51cd 2/*
15c6784c 3 * Thunderbolt driver - bus logic (NHI independent)
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4 *
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
15c6784c 6 * Copyright (C) 2018, Intel Corporation
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7 */
8
9#ifndef TB_H_
10#define TB_H_
11
e6b245cc 12#include <linux/nvmem-provider.h>
a25c8b2f 13#include <linux/pci.h>
d1ff7024 14#include <linux/thunderbolt.h>
bfe778ac 15#include <linux/uuid.h>
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16
17#include "tb_regs.h"
d6cc51cd 18#include "ctl.h"
3e136768 19#include "dma_port.h"
d6cc51cd 20
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21#define NVM_MIN_SIZE SZ_32K
22#define NVM_MAX_SIZE SZ_512K
9b383037 23#define NVM_DATA_DWORDS 16
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24
25/* Intel specific NVM offsets */
26#define NVM_DEVID 0x05
27#define NVM_VERSION 0x08
28#define NVM_FLASH_SIZE 0x45
29
e6b245cc 30/**
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31 * struct tb_nvm - Structure holding NVM information
32 * @dev: Owner of the NVM
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33 * @major: Major version number of the active NVM portion
34 * @minor: Minor version number of the active NVM portion
35 * @id: Identifier used with both NVM portions
36 * @active: Active portion NVMem device
37 * @non_active: Non-active portion NVMem device
38 * @buf: Buffer where the NVM image is stored before it is written to
39 * the actual NVM flash device
40 * @buf_data_size: Number of bytes actually consumed by the new NVM
41 * image
719a5fe8 42 * @authenticating: The device is authenticating the new NVM
4b794f80 43 * @flushed: The image has been flushed to the storage area
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44 *
45 * The user of this structure needs to handle serialization of possible
46 * concurrent access.
e6b245cc 47 */
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48struct tb_nvm {
49 struct device *dev;
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50 u8 major;
51 u8 minor;
52 int id;
53 struct nvmem_device *active;
54 struct nvmem_device *non_active;
55 void *buf;
56 size_t buf_data_size;
57 bool authenticating;
4b794f80 58 bool flushed;
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59};
60
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61enum tb_nvm_write_ops {
62 WRITE_AND_AUTHENTICATE = 1,
63 WRITE_ONLY = 2,
1cbf680f 64 AUTHENTICATE_ONLY = 3,
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65};
66
f67cf491 67#define TB_SWITCH_KEY_SIZE 32
f0342e75 68#define TB_SWITCH_MAX_DEPTH 6
b0407983 69#define USB4_SWITCH_MAX_DEPTH 5
f67cf491 70
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71/**
72 * enum tb_switch_tmu_rate - TMU refresh rate
73 * @TB_SWITCH_TMU_RATE_OFF: %0 (Disable Time Sync handshake)
74 * @TB_SWITCH_TMU_RATE_HIFI: %16 us time interval between successive
75 * transmission of the Delay Request TSNOS
76 * (Time Sync Notification Ordered Set) on a Link
77 * @TB_SWITCH_TMU_RATE_NORMAL: %1 ms time interval between successive
78 * transmission of the Delay Request TSNOS on
79 * a Link
80 */
81enum tb_switch_tmu_rate {
82 TB_SWITCH_TMU_RATE_OFF = 0,
83 TB_SWITCH_TMU_RATE_HIFI = 16,
84 TB_SWITCH_TMU_RATE_NORMAL = 1000,
85};
86
87/**
88 * struct tb_switch_tmu - Structure holding switch TMU configuration
89 * @cap: Offset to the TMU capability (%0 if not found)
90 * @has_ucap: Does the switch support uni-directional mode
91 * @rate: TMU refresh rate related to upstream switch. In case of root
a28ec0e1 92 * switch this holds the domain rate. Reflects the HW setting.
cf29b9af 93 * @unidirectional: Is the TMU in uni-directional or bi-directional mode
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94 * related to upstream switch. Don't care for root switch.
95 * Reflects the HW setting.
96 * @unidirectional_request: Is the new TMU mode: uni-directional or bi-directional
97 * that is requested to be set. Related to upstream switch.
98 * Don't care for root switch.
99 * @rate_request: TMU new refresh rate related to upstream switch that is
100 * requested to be set. In case of root switch, this holds
101 * the new domain rate that is requested to be set.
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102 */
103struct tb_switch_tmu {
104 int cap;
105 bool has_ucap;
106 enum tb_switch_tmu_rate rate;
107 bool unidirectional;
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108 bool unidirectional_request;
109 enum tb_switch_tmu_rate rate_request;
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110};
111
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112enum tb_clx {
113 TB_CLX_DISABLE,
114 TB_CL0S,
115 TB_CL1,
116 TB_CL2,
117};
118
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119/**
120 * struct tb_switch - a thunderbolt switch
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121 * @dev: Device for the switch
122 * @config: Switch configuration
123 * @ports: Ports in this switch
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124 * @dma_port: If the switch has port supporting DMA configuration based
125 * mailbox this will hold the pointer to that (%NULL
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126 * otherwise). If set it also means the switch has
127 * upgradeable NVM.
cf29b9af 128 * @tmu: The switch TMU configuration
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129 * @tb: Pointer to the domain the switch belongs to
130 * @uid: Unique ID of the switch
131 * @uuid: UUID of the switch (or %NULL if not supported)
132 * @vendor: Vendor ID of the switch
133 * @device: Device ID of the switch
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134 * @vendor_name: Name of the vendor (or %NULL if not known)
135 * @device_name: Name of the device (or %NULL if not known)
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136 * @link_speed: Speed of the link in Gb/s
137 * @link_width: Width of the link (1 or 2)
bbcf40b3 138 * @link_usb4: Upstream link is USB4
2c3c4197 139 * @generation: Switch Thunderbolt generation
bfe778ac 140 * @cap_plug_events: Offset to the plug events capability (%0 if not found)
23ccd21c 141 * @cap_vsec_tmu: Offset to the TMU vendor specific capability (%0 if not found)
a9be5582 142 * @cap_lc: Offset to the link controller capability (%0 if not found)
43f977bc 143 * @cap_lp: Offset to the low power (CLx for TBT) capability (%0 if not found)
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144 * @is_unplugged: The switch is going away
145 * @drom: DROM of the switch (%NULL if not found)
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146 * @nvm: Pointer to the NVM if the switch has one (%NULL otherwise)
147 * @no_nvm_upgrade: Prevent NVM upgrade of this switch
148 * @safe_mode: The switch is in safe-mode
14862ee3 149 * @boot: Whether the switch was already authorized on boot or not
2d8ff0b5 150 * @rpm: The switch supports runtime PM
f67cf491 151 * @authorized: Whether the switch is authorized by user or policy
f67cf491 152 * @security_level: Switch supported security level
54e41810 153 * @debugfs_dir: Pointer to the debugfs structure
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154 * @key: Contains the key used to challenge the device or %NULL if not
155 * supported. Size of the key is %TB_SWITCH_KEY_SIZE.
156 * @connection_id: Connection ID used with ICM messaging
157 * @connection_key: Connection key used with ICM messaging
158 * @link: Root switch link this switch is connected (ICM only)
159 * @depth: Depth in the chain this switch is connected (ICM only)
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160 * @rpm_complete: Completion used to wait for runtime resume to
161 * complete (ICM only)
1cb36293 162 * @quirks: Quirks used for this Thunderbolt switch
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163 * @credit_allocation: Are the below buffer allocation parameters valid
164 * @max_usb3_credits: Router preferred number of buffers for USB 3.x
165 * @min_dp_aux_credits: Router preferred minimum number of buffers for DP AUX
166 * @min_dp_main_credits: Router preferred minimum number of buffers for DP MAIN
167 * @max_pcie_credits: Router preferred number of buffers for PCIe
168 * @max_dma_credits: Router preferred number of buffers for DMA/P2P
8a90e4fa 169 * @clx: CLx state on the upstream link of the router
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170 *
171 * When the switch is being added or removed to the domain (other
09f11b6c 172 * switches) you need to have domain lock held.
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173 *
174 * In USB4 terminology this structure represents a router.
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175 */
176struct tb_switch {
bfe778ac 177 struct device dev;
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178 struct tb_regs_switch_header config;
179 struct tb_port *ports;
3e136768 180 struct tb_dma_port *dma_port;
cf29b9af 181 struct tb_switch_tmu tmu;
a25c8b2f 182 struct tb *tb;
c90553b3 183 u64 uid;
7c39ffe7 184 uuid_t *uuid;
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185 u16 vendor;
186 u16 device;
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187 const char *vendor_name;
188 const char *device_name;
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189 unsigned int link_speed;
190 unsigned int link_width;
bbcf40b3 191 bool link_usb4;
2c3c4197 192 unsigned int generation;
bfe778ac 193 int cap_plug_events;
23ccd21c 194 int cap_vsec_tmu;
a9be5582 195 int cap_lc;
43f977bc 196 int cap_lp;
bfe778ac 197 bool is_unplugged;
cd22e73b 198 u8 *drom;
719a5fe8 199 struct tb_nvm *nvm;
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200 bool no_nvm_upgrade;
201 bool safe_mode;
14862ee3 202 bool boot;
2d8ff0b5 203 bool rpm;
f67cf491 204 unsigned int authorized;
f67cf491 205 enum tb_security_level security_level;
54e41810 206 struct dentry *debugfs_dir;
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207 u8 *key;
208 u8 connection_id;
209 u8 connection_key;
210 u8 link;
211 u8 depth;
4f7c2e0d 212 struct completion rpm_complete;
1cb36293 213 unsigned long quirks;
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214 bool credit_allocation;
215 unsigned int max_usb3_credits;
216 unsigned int min_dp_aux_credits;
217 unsigned int min_dp_main_credits;
218 unsigned int max_pcie_credits;
219 unsigned int max_dma_credits;
8a90e4fa 220 enum tb_clx clx;
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221};
222
223/**
224 * struct tb_port - a thunderbolt port, part of a tb_switch
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225 * @config: Cached port configuration read from registers
226 * @sw: Switch the port belongs to
227 * @remote: Remote port (%NULL if not connected)
228 * @xdomain: Remote host (%NULL if not connected)
229 * @cap_phy: Offset, zero if not found
cf29b9af 230 * @cap_tmu: Offset of the adapter specific TMU capability (%0 if not present)
56183c88 231 * @cap_adap: Offset of the adapter specific capability (%0 if not present)
b0407983 232 * @cap_usb4: Offset to the USB4 port capability (%0 if not present)
cae5f515 233 * @usb4: Pointer to the USB4 port structure (only if @cap_usb4 is != %0)
d1ff7024 234 * @port: Port number on switch
8824d19b 235 * @disabled: Disabled by eeprom or enabled but not implemented
91c0c120 236 * @bonded: true if the port is bonded (two lanes combined as one)
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237 * @dual_link_port: If the switch is connected using two ports, points
238 * to the other port.
239 * @link_nr: Is this primary or secondary port on the dual_link.
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240 * @in_hopids: Currently allocated input HopIDs
241 * @out_hopids: Currently allocated output HopIDs
8afe909b 242 * @list: Used to link ports to DP resources list
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243 * @total_credits: Total number of buffers available for this port
244 * @ctl_credits: Buffers reserved for control path
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245 * @dma_credits: Number of credits allocated for DMA tunneling for all
246 * DMA paths through this port.
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247 *
248 * In USB4 terminology this structure represents an adapter (protocol or
249 * lane adapter).
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250 */
251struct tb_port {
252 struct tb_regs_port_header config;
253 struct tb_switch *sw;
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254 struct tb_port *remote;
255 struct tb_xdomain *xdomain;
256 int cap_phy;
cf29b9af 257 int cap_tmu;
56183c88 258 int cap_adap;
b0407983 259 int cap_usb4;
cae5f515 260 struct usb4_port *usb4;
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261 u8 port;
262 bool disabled;
91c0c120 263 bool bonded;
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264 struct tb_port *dual_link_port;
265 u8 link_nr:1;
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266 struct ida in_hopids;
267 struct ida out_hopids;
8afe909b 268 struct list_head list;
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269 unsigned int total_credits;
270 unsigned int ctl_credits;
6ed541c5 271 unsigned int dma_credits;
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272};
273
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274/**
275 * struct usb4_port - USB4 port device
276 * @dev: Device for the port
277 * @port: Pointer to the lane 0 adapter
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278 * @can_offline: Does the port have necessary platform support to moved
279 * it into offline mode and back
3fb10ea4 280 * @offline: The port is currently in offline mode
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281 */
282struct usb4_port {
283 struct device dev;
284 struct tb_port *port;
ccc5cb8a 285 bool can_offline;
3fb10ea4 286 bool offline;
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287};
288
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289/**
290 * tb_retimer: Thunderbolt retimer
291 * @dev: Device for the retimer
292 * @tb: Pointer to the domain the retimer belongs to
293 * @index: Retimer index facing the router USB4 port
294 * @vendor: Vendor ID of the retimer
295 * @device: Device ID of the retimer
296 * @port: Pointer to the lane 0 adapter
297 * @nvm: Pointer to the NVM if the retimer has one (%NULL otherwise)
298 * @auth_status: Status of last NVM authentication
299 */
300struct tb_retimer {
301 struct device dev;
302 struct tb *tb;
303 u8 index;
304 u32 vendor;
305 u32 device;
306 struct tb_port *port;
307 struct tb_nvm *nvm;
308 u32 auth_status;
309};
310
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311/**
312 * struct tb_path_hop - routing information for a tb_path
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313 * @in_port: Ingress port of a switch
314 * @out_port: Egress port of a switch where the packet is routed out
315 * (must be on the same switch than @in_port)
316 * @in_hop_index: HopID where the path configuration entry is placed in
317 * the path config space of @in_port.
318 * @in_counter_index: Used counter index (not used in the driver
319 * currently, %-1 to disable)
320 * @next_hop_index: HopID of the packet when it is routed out from @out_port
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321 * @initial_credits: Number of initial flow control credits allocated for
322 * the path
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323 * @nfc_credits: Number of non-flow controlled buffers allocated for the
324 * @in_port.
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325 *
326 * Hop configuration is always done on the IN port of a switch.
327 * in_port and out_port have to be on the same switch. Packets arriving on
328 * in_port with "hop" = in_hop_index will get routed to through out_port. The
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329 * next hop to take (on out_port->remote) is determined by
330 * next_hop_index. When routing packet to another switch (out->remote is
331 * set) the @next_hop_index must match the @in_hop_index of that next
332 * hop to make routing possible.
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333 *
334 * in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in
335 * port.
336 */
337struct tb_path_hop {
338 struct tb_port *in_port;
339 struct tb_port *out_port;
340 int in_hop_index;
8c7acaaf 341 int in_counter_index;
520b6702 342 int next_hop_index;
0414bec5 343 unsigned int initial_credits;
02c5e7c2 344 unsigned int nfc_credits;
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345};
346
347/**
348 * enum tb_path_port - path options mask
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349 * @TB_PATH_NONE: Do not activate on any hop on path
350 * @TB_PATH_SOURCE: Activate on the first hop (out of src)
351 * @TB_PATH_INTERNAL: Activate on the intermediate hops (not the first/last)
352 * @TB_PATH_DESTINATION: Activate on the last hop (into dst)
353 * @TB_PATH_ALL: Activate on all hops on the path
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354 */
355enum tb_path_port {
356 TB_PATH_NONE = 0,
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357 TB_PATH_SOURCE = 1,
358 TB_PATH_INTERNAL = 2,
359 TB_PATH_DESTINATION = 4,
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360 TB_PATH_ALL = 7,
361};
362
363/**
364 * struct tb_path - a unidirectional path between two ports
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365 * @tb: Pointer to the domain structure
366 * @name: Name of the path (used for debugging)
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367 * @ingress_shared_buffer: Shared buffering used for ingress ports on the path
368 * @egress_shared_buffer: Shared buffering used for egress ports on the path
369 * @ingress_fc_enable: Flow control for ingress ports on the path
370 * @egress_fc_enable: Flow control for egress ports on the path
371 * @priority: Priority group if the path
372 * @weight: Weight of the path inside the priority group
373 * @drop_packages: Drop packages from queue tail or head
374 * @activated: Is the path active
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375 * @clear_fc: Clear all flow control from the path config space entries
376 * when deactivating this path
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377 * @hops: Path hops
378 * @path_length: How many hops the path uses
43bddb26 379 * @alloc_hopid: Does this path consume port HopID
520b6702 380 *
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381 * A path consists of a number of hops (see &struct tb_path_hop). To
382 * establish a PCIe tunnel two paths have to be created between the two
383 * PCIe ports.
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384 */
385struct tb_path {
386 struct tb *tb;
8c7acaaf 387 const char *name;
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388 enum tb_path_port ingress_shared_buffer;
389 enum tb_path_port egress_shared_buffer;
390 enum tb_path_port ingress_fc_enable;
391 enum tb_path_port egress_fc_enable;
392
37209783 393 unsigned int priority:3;
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394 int weight:4;
395 bool drop_packages;
396 bool activated;
44242d6c 397 bool clear_fc;
520b6702 398 struct tb_path_hop *hops;
8c7acaaf 399 int path_length;
43bddb26 400 bool alloc_hopid;
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401};
402
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403/* HopIDs 0-7 are reserved by the Thunderbolt protocol */
404#define TB_PATH_MIN_HOPID 8
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405/*
406 * Support paths from the farthest (depth 6) router to the host and back
407 * to the same level (not necessarily to the same router).
408 */
409#define TB_PATH_MAX_HOPS (7 * 2)
0b2863ac 410
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411/* Possible wake types */
412#define TB_WAKE_ON_CONNECT BIT(0)
413#define TB_WAKE_ON_DISCONNECT BIT(1)
414#define TB_WAKE_ON_USB4 BIT(2)
415#define TB_WAKE_ON_USB3 BIT(3)
416#define TB_WAKE_ON_PCIE BIT(4)
6026b703 417#define TB_WAKE_ON_DP BIT(5)
b2911a59 418
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419/**
420 * struct tb_cm_ops - Connection manager specific operations vector
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421 * @driver_ready: Called right after control channel is started. Used by
422 * ICM to send driver ready message to the firmware.
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423 * @start: Starts the domain
424 * @stop: Stops the domain
425 * @suspend_noirq: Connection manager specific suspend_noirq
426 * @resume_noirq: Connection manager specific resume_noirq
f67cf491 427 * @suspend: Connection manager specific suspend
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428 * @freeze_noirq: Connection manager specific freeze_noirq
429 * @thaw_noirq: Connection manager specific thaw_noirq
f67cf491 430 * @complete: Connection manager specific complete
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431 * @runtime_suspend: Connection manager specific runtime_suspend
432 * @runtime_resume: Connection manager specific runtime_resume
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433 * @runtime_suspend_switch: Runtime suspend a switch
434 * @runtime_resume_switch: Runtime resume a switch
81a54b5e 435 * @handle_event: Handle thunderbolt event
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436 * @get_boot_acl: Get boot ACL list
437 * @set_boot_acl: Set boot ACL list
3da88be2 438 * @disapprove_switch: Disapprove switch (disconnect PCIe tunnel)
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439 * @approve_switch: Approve switch
440 * @add_switch_key: Add key to switch
441 * @challenge_switch_key: Challenge switch using key
e6b245cc 442 * @disconnect_pcie_paths: Disconnects PCIe paths before NVM update
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443 * @approve_xdomain_paths: Approve (establish) XDomain DMA paths
444 * @disconnect_xdomain_paths: Disconnect XDomain DMA paths
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445 * @usb4_switch_op: Optional proxy for USB4 router operations. If set
446 * this will be called whenever USB4 router operation is
447 * performed. If this returns %-EOPNOTSUPP then the
448 * native USB4 router operation is called.
449 * @usb4_switch_nvm_authenticate_status: Optional callback that the CM
450 * implementation can be used to
451 * return status of USB4 NVM_AUTH
452 * router operation.
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453 */
454struct tb_cm_ops {
f67cf491 455 int (*driver_ready)(struct tb *tb);
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456 int (*start)(struct tb *tb);
457 void (*stop)(struct tb *tb);
458 int (*suspend_noirq)(struct tb *tb);
459 int (*resume_noirq)(struct tb *tb);
f67cf491 460 int (*suspend)(struct tb *tb);
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461 int (*freeze_noirq)(struct tb *tb);
462 int (*thaw_noirq)(struct tb *tb);
f67cf491 463 void (*complete)(struct tb *tb);
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464 int (*runtime_suspend)(struct tb *tb);
465 int (*runtime_resume)(struct tb *tb);
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466 int (*runtime_suspend_switch)(struct tb_switch *sw);
467 int (*runtime_resume_switch)(struct tb_switch *sw);
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468 void (*handle_event)(struct tb *tb, enum tb_cfg_pkg_type,
469 const void *buf, size_t size);
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470 int (*get_boot_acl)(struct tb *tb, uuid_t *uuids, size_t nuuids);
471 int (*set_boot_acl)(struct tb *tb, const uuid_t *uuids, size_t nuuids);
3da88be2 472 int (*disapprove_switch)(struct tb *tb, struct tb_switch *sw);
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473 int (*approve_switch)(struct tb *tb, struct tb_switch *sw);
474 int (*add_switch_key)(struct tb *tb, struct tb_switch *sw);
475 int (*challenge_switch_key)(struct tb *tb, struct tb_switch *sw,
476 const u8 *challenge, u8 *response);
e6b245cc 477 int (*disconnect_pcie_paths)(struct tb *tb);
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478 int (*approve_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
479 int transmit_path, int transmit_ring,
480 int receive_path, int receive_ring);
481 int (*disconnect_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
482 int transmit_path, int transmit_ring,
483 int receive_path, int receive_ring);
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484 int (*usb4_switch_op)(struct tb_switch *sw, u16 opcode, u32 *metadata,
485 u8 *status, const void *tx_data, size_t tx_data_len,
486 void *rx_data, size_t rx_data_len);
487 int (*usb4_switch_nvm_authenticate_status)(struct tb_switch *sw,
488 u32 *status);
9d3cce0b 489};
520b6702 490
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491static inline void *tb_priv(struct tb *tb)
492{
493 return (void *)tb->privdata;
494}
495
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496#define TB_AUTOSUSPEND_DELAY 15000 /* ms */
497
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498/* helper functions & macros */
499
500/**
501 * tb_upstream_port() - return the upstream port of a switch
502 *
503 * Every switch has an upstream port (for the root switch it is the NHI).
504 *
505 * During switch alloc/init tb_upstream_port()->remote may be NULL, even for
506 * non root switches (on the NHI port remote is always NULL).
507 *
508 * Return: Returns the upstream port of the switch.
509 */
510static inline struct tb_port *tb_upstream_port(struct tb_switch *sw)
511{
512 return &sw->ports[sw->config.upstream_port_number];
513}
514
dfe40ca4
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515/**
516 * tb_is_upstream_port() - Is the port upstream facing
517 * @port: Port to check
518 *
519 * Returns true if @port is upstream facing port. In case of dual link
520 * ports both return true.
521 */
522static inline bool tb_is_upstream_port(const struct tb_port *port)
523{
524 const struct tb_port *upstream_port = tb_upstream_port(port->sw);
525 return port == upstream_port || port->dual_link_port == upstream_port;
526}
527
b323a98f 528static inline u64 tb_route(const struct tb_switch *sw)
a25c8b2f
AN
529{
530 return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo;
531}
532
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533static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw)
534{
535 u8 port;
536
537 port = route >> (sw->config.depth * 8);
538 if (WARN_ON(port > sw->config.max_port_number))
539 return NULL;
540 return &sw->ports[port];
541}
542
dfe40ca4
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543/**
544 * tb_port_has_remote() - Does the port have switch connected downstream
545 * @port: Port to check
546 *
547 * Returns true only when the port is primary port and has remote set.
548 */
549static inline bool tb_port_has_remote(const struct tb_port *port)
550{
551 if (tb_is_upstream_port(port))
552 return false;
553 if (!port->remote)
554 return false;
555 if (port->dual_link_port && port->link_nr)
556 return false;
557
558 return true;
559}
560
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MW
561static inline bool tb_port_is_null(const struct tb_port *port)
562{
563 return port && port->port && port->config.type == TB_TYPE_PORT;
564}
565
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566static inline bool tb_port_is_nhi(const struct tb_port *port)
567{
568 return port && port->config.type == TB_TYPE_NHI;
569}
570
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571static inline bool tb_port_is_pcie_down(const struct tb_port *port)
572{
573 return port && port->config.type == TB_TYPE_PCIE_DOWN;
574}
575
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576static inline bool tb_port_is_pcie_up(const struct tb_port *port)
577{
578 return port && port->config.type == TB_TYPE_PCIE_UP;
579}
580
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581static inline bool tb_port_is_dpin(const struct tb_port *port)
582{
583 return port && port->config.type == TB_TYPE_DP_HDMI_IN;
584}
585
586static inline bool tb_port_is_dpout(const struct tb_port *port)
587{
588 return port && port->config.type == TB_TYPE_DP_HDMI_OUT;
589}
590
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591static inline bool tb_port_is_usb3_down(const struct tb_port *port)
592{
593 return port && port->config.type == TB_TYPE_USB3_DOWN;
594}
595
596static inline bool tb_port_is_usb3_up(const struct tb_port *port)
597{
598 return port && port->config.type == TB_TYPE_USB3_UP;
599}
600
a25c8b2f
AN
601static inline int tb_sw_read(struct tb_switch *sw, void *buffer,
602 enum tb_cfg_space space, u32 offset, u32 length)
603{
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604 if (sw->is_unplugged)
605 return -ENODEV;
a25c8b2f
AN
606 return tb_cfg_read(sw->tb->ctl,
607 buffer,
608 tb_route(sw),
609 0,
610 space,
611 offset,
612 length);
613}
614
826c6a17 615static inline int tb_sw_write(struct tb_switch *sw, const void *buffer,
a25c8b2f
AN
616 enum tb_cfg_space space, u32 offset, u32 length)
617{
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MW
618 if (sw->is_unplugged)
619 return -ENODEV;
a25c8b2f
AN
620 return tb_cfg_write(sw->tb->ctl,
621 buffer,
622 tb_route(sw),
623 0,
624 space,
625 offset,
626 length);
627}
628
629static inline int tb_port_read(struct tb_port *port, void *buffer,
630 enum tb_cfg_space space, u32 offset, u32 length)
631{
4708384f
MW
632 if (port->sw->is_unplugged)
633 return -ENODEV;
a25c8b2f
AN
634 return tb_cfg_read(port->sw->tb->ctl,
635 buffer,
636 tb_route(port->sw),
637 port->port,
638 space,
639 offset,
640 length);
641}
642
16a1258a 643static inline int tb_port_write(struct tb_port *port, const void *buffer,
a25c8b2f
AN
644 enum tb_cfg_space space, u32 offset, u32 length)
645{
4708384f
MW
646 if (port->sw->is_unplugged)
647 return -ENODEV;
a25c8b2f
AN
648 return tb_cfg_write(port->sw->tb->ctl,
649 buffer,
650 tb_route(port->sw),
651 port->port,
652 space,
653 offset,
654 length);
655}
656
657#define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg)
658#define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg)
659#define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg)
660#define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg)
daa5140f 661#define tb_dbg(tb, fmt, arg...) dev_dbg(&(tb)->nhi->pdev->dev, fmt, ## arg)
a25c8b2f
AN
662
663#define __TB_SW_PRINT(level, sw, fmt, arg...) \
664 do { \
b323a98f 665 const struct tb_switch *__sw = (sw); \
a25c8b2f
AN
666 level(__sw->tb, "%llx: " fmt, \
667 tb_route(__sw), ## arg); \
668 } while (0)
669#define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg)
670#define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg)
671#define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg)
daa5140f 672#define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg)
a25c8b2f
AN
673
674#define __TB_PORT_PRINT(level, _port, fmt, arg...) \
675 do { \
b323a98f 676 const struct tb_port *__port = (_port); \
ebe99c0f 677 level(__port->sw->tb, "%llx:%u: " fmt, \
a25c8b2f
AN
678 tb_route(__port->sw), __port->port, ## arg); \
679 } while (0)
680#define tb_port_WARN(port, fmt, arg...) \
681 __TB_PORT_PRINT(tb_WARN, port, fmt, ##arg)
682#define tb_port_warn(port, fmt, arg...) \
683 __TB_PORT_PRINT(tb_warn, port, fmt, ##arg)
684#define tb_port_info(port, fmt, arg...) \
685 __TB_PORT_PRINT(tb_info, port, fmt, ##arg)
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686#define tb_port_dbg(port, fmt, arg...) \
687 __TB_PORT_PRINT(tb_dbg, port, fmt, ##arg)
a25c8b2f 688
f67cf491 689struct tb *icm_probe(struct tb_nhi *nhi);
9d3cce0b
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690struct tb *tb_probe(struct tb_nhi *nhi);
691
9d3cce0b 692extern struct device_type tb_domain_type;
dacb1287 693extern struct device_type tb_retimer_type;
bfe778ac 694extern struct device_type tb_switch_type;
cae5f515 695extern struct device_type usb4_port_device_type;
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696
697int tb_domain_init(void);
698void tb_domain_exit(void);
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699int tb_xdomain_init(void);
700void tb_xdomain_exit(void);
a25c8b2f 701
7f0a34d7 702struct tb *tb_domain_alloc(struct tb_nhi *nhi, int timeout_msec, size_t privsize);
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703int tb_domain_add(struct tb *tb);
704void tb_domain_remove(struct tb *tb);
705int tb_domain_suspend_noirq(struct tb *tb);
706int tb_domain_resume_noirq(struct tb *tb);
f67cf491 707int tb_domain_suspend(struct tb *tb);
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708int tb_domain_freeze_noirq(struct tb *tb);
709int tb_domain_thaw_noirq(struct tb *tb);
f67cf491 710void tb_domain_complete(struct tb *tb);
2d8ff0b5
MW
711int tb_domain_runtime_suspend(struct tb *tb);
712int tb_domain_runtime_resume(struct tb *tb);
3da88be2 713int tb_domain_disapprove_switch(struct tb *tb, struct tb_switch *sw);
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714int tb_domain_approve_switch(struct tb *tb, struct tb_switch *sw);
715int tb_domain_approve_switch_key(struct tb *tb, struct tb_switch *sw);
716int tb_domain_challenge_switch_key(struct tb *tb, struct tb_switch *sw);
e6b245cc 717int tb_domain_disconnect_pcie_paths(struct tb *tb);
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718int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
719 int transmit_path, int transmit_ring,
720 int receive_path, int receive_ring);
721int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
722 int transmit_path, int transmit_ring,
723 int receive_path, int receive_ring);
d1ff7024 724int tb_domain_disconnect_all_paths(struct tb *tb);
9d3cce0b 725
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726static inline struct tb *tb_domain_get(struct tb *tb)
727{
728 if (tb)
729 get_device(&tb->dev);
730 return tb;
731}
732
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733static inline void tb_domain_put(struct tb *tb)
734{
735 put_device(&tb->dev);
736}
d6cc51cd 737
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738struct tb_nvm *tb_nvm_alloc(struct device *dev);
739int tb_nvm_add_active(struct tb_nvm *nvm, size_t size, nvmem_reg_read_t reg_read);
740int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val,
741 size_t bytes);
742int tb_nvm_add_non_active(struct tb_nvm *nvm, size_t size,
743 nvmem_reg_write_t reg_write);
744void tb_nvm_free(struct tb_nvm *nvm);
745void tb_nvm_exit(void);
746
9b383037
MW
747typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
748typedef int (*write_block_fn)(void *, unsigned int, const void *, size_t);
749
750int tb_nvm_read_data(unsigned int address, void *buf, size_t size,
751 unsigned int retries, read_block_fn read_block,
752 void *read_block_data);
753int tb_nvm_write_data(unsigned int address, const void *buf, size_t size,
754 unsigned int retries, write_block_fn write_next_block,
755 void *write_block_data);
756
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757struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent,
758 u64 route);
e6b245cc
MW
759struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb,
760 struct device *parent, u64 route);
bfe778ac
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761int tb_switch_configure(struct tb_switch *sw);
762int tb_switch_add(struct tb_switch *sw);
763void tb_switch_remove(struct tb_switch *sw);
6ac6faee 764void tb_switch_suspend(struct tb_switch *sw, bool runtime);
23dd5bb4 765int tb_switch_resume(struct tb_switch *sw);
356b6c4e 766int tb_switch_reset(struct tb_switch *sw);
1639664f
GF
767int tb_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
768 u32 value, int timeout_msec);
aae20bb6 769void tb_sw_set_unplugged(struct tb_switch *sw);
386e5e29
MW
770struct tb_port *tb_switch_find_port(struct tb_switch *sw,
771 enum tb_port_type type);
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MW
772struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link,
773 u8 depth);
7c39ffe7 774struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid);
8e9267bb 775struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route);
f67cf491 776
b433d010
MW
777/**
778 * tb_switch_for_each_port() - Iterate over each switch port
779 * @sw: Switch whose ports to iterate
780 * @p: Port used as iterator
781 *
782 * Iterates over each switch port skipping the control port (port %0).
783 */
784#define tb_switch_for_each_port(sw, p) \
785 for ((p) = &(sw)->ports[1]; \
786 (p) <= &(sw)->ports[(sw)->config.max_port_number]; (p)++)
787
b6b0ea70
MW
788static inline struct tb_switch *tb_switch_get(struct tb_switch *sw)
789{
790 if (sw)
791 get_device(&sw->dev);
792 return sw;
793}
794
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MW
795static inline void tb_switch_put(struct tb_switch *sw)
796{
797 put_device(&sw->dev);
798}
799
800static inline bool tb_is_switch(const struct device *dev)
801{
802 return dev->type == &tb_switch_type;
803}
804
805static inline struct tb_switch *tb_to_switch(struct device *dev)
806{
807 if (tb_is_switch(dev))
808 return container_of(dev, struct tb_switch, dev);
809 return NULL;
810}
811
0414bec5
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812static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw)
813{
814 return tb_to_switch(sw->dev.parent);
815}
816
17a8f815 817static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw)
8b0110d9 818{
35ee69e9
MW
819 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
820 sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE;
8b0110d9
MW
821}
822
17a8f815 823static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw)
8b0110d9 824{
35ee69e9
MW
825 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
826 sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE;
8b0110d9
MW
827}
828
17a8f815 829static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw)
99cabbb0 830{
35ee69e9
MW
831 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
832 switch (sw->config.device_id) {
833 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
834 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
835 return true;
836 }
99cabbb0 837 }
35ee69e9 838 return false;
99cabbb0
MW
839}
840
17a8f815 841static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw)
99cabbb0 842{
35ee69e9
MW
843 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
844 switch (sw->config.device_id) {
845 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
846 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
847 return true;
848 }
99cabbb0 849 }
35ee69e9 850 return false;
99cabbb0
MW
851}
852
7bffd97e
MW
853static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw)
854{
35ee69e9
MW
855 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
856 switch (sw->config.device_id) {
857 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
f1d5ec3e 858 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE:
35ee69e9
MW
859 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
860 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
861 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
862 return true;
863 }
7bffd97e 864 }
35ee69e9 865 return false;
7bffd97e
MW
866}
867
868static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw)
869{
35ee69e9
MW
870 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
871 switch (sw->config.device_id) {
872 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
873 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
874 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
875 return true;
876 }
7bffd97e 877 }
35ee69e9 878 return false;
7bffd97e
MW
879}
880
8a90e4fa
GF
881static inline bool tb_switch_is_tiger_lake(const struct tb_switch *sw)
882{
883 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
884 switch (sw->config.device_id) {
885 case PCI_DEVICE_ID_INTEL_TGL_NHI0:
886 case PCI_DEVICE_ID_INTEL_TGL_NHI1:
887 case PCI_DEVICE_ID_INTEL_TGL_H_NHI0:
888 case PCI_DEVICE_ID_INTEL_TGL_H_NHI1:
889 return true;
890 }
891 }
892 return false;
893}
894
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895/**
896 * tb_switch_is_usb4() - Is the switch USB4 compliant
897 * @sw: Switch to check
898 *
899 * Returns true if the @sw is USB4 compliant router, false otherwise.
900 */
901static inline bool tb_switch_is_usb4(const struct tb_switch *sw)
902{
903 return sw->config.thunderbolt_version == USB4_VERSION_1_0;
904}
905
f07a3608
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906/**
907 * tb_switch_is_icm() - Is the switch handled by ICM firmware
908 * @sw: Switch to check
909 *
910 * In case there is a need to differentiate whether ICM firmware or SW CM
911 * is handling @sw this function can be called. It is valid to call this
912 * after tb_switch_alloc() and tb_switch_configure() has been called
913 * (latter only for SW CM case).
914 */
915static inline bool tb_switch_is_icm(const struct tb_switch *sw)
916{
917 return !sw->config.enabled;
918}
919
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920int tb_switch_lane_bonding_enable(struct tb_switch *sw);
921void tb_switch_lane_bonding_disable(struct tb_switch *sw);
de462039
MW
922int tb_switch_configure_link(struct tb_switch *sw);
923void tb_switch_unconfigure_link(struct tb_switch *sw);
91c0c120 924
8afe909b
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925bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
926int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
927void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
928
cf29b9af
RM
929int tb_switch_tmu_init(struct tb_switch *sw);
930int tb_switch_tmu_post_time(struct tb_switch *sw);
931int tb_switch_tmu_disable(struct tb_switch *sw);
932int tb_switch_tmu_enable(struct tb_switch *sw);
a28ec0e1
GF
933void tb_switch_tmu_configure(struct tb_switch *sw,
934 enum tb_switch_tmu_rate rate,
935 bool unidirectional);
936/**
937 * tb_switch_tmu_hifi_is_enabled() - Checks if the specified TMU mode is enabled
938 * @sw: Router whose TMU mode to check
939 * @unidirectional: If uni-directional (bi-directional otherwise)
940 *
941 * Return true if hardware TMU configuration matches the one passed in
942 * as parameter. That is HiFi and either uni-directional or bi-directional.
943 */
944static inline bool tb_switch_tmu_hifi_is_enabled(const struct tb_switch *sw,
945 bool unidirectional)
cf29b9af
RM
946{
947 return sw->tmu.rate == TB_SWITCH_TMU_RATE_HIFI &&
a28ec0e1 948 sw->tmu.unidirectional == unidirectional;
cf29b9af
RM
949}
950
8a90e4fa
GF
951int tb_switch_enable_clx(struct tb_switch *sw, enum tb_clx clx);
952int tb_switch_disable_clx(struct tb_switch *sw, enum tb_clx clx);
953
954/**
955 * tb_switch_is_clx_enabled() - Checks if the CLx is enabled
956 * @sw: Router to check the CLx state for
957 *
958 * Checks if the CLx is enabled on the router upstream link.
959 * Not applicable for a host router.
960 */
961static inline bool tb_switch_is_clx_enabled(const struct tb_switch *sw)
962{
963 return sw->clx != TB_CLX_DISABLE;
964}
965
966/**
967 * tb_switch_is_cl0s_enabled() - Checks if the CL0s is enabled
968 * @sw: Router to check for the CL0s
969 *
970 * Checks if the CL0s is enabled on the router upstream link.
971 * Not applicable for a host router.
972 */
973static inline bool tb_switch_is_cl0s_enabled(const struct tb_switch *sw)
974{
975 return sw->clx == TB_CL0S;
976}
977
43f977bc
GF
978/**
979 * tb_switch_is_clx_supported() - Is CLx supported on this type of router
980 * @sw: The router to check CLx support for
981 */
982static inline bool tb_switch_is_clx_supported(const struct tb_switch *sw)
983{
984 return tb_switch_is_usb4(sw) || tb_switch_is_titan_ridge(sw);
985}
986
987int tb_switch_mask_clx_objections(struct tb_switch *sw);
988
989int tb_switch_pcie_l1_enable(struct tb_switch *sw);
990
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991int tb_switch_xhci_connect(struct tb_switch *sw);
992void tb_switch_xhci_disconnect(struct tb_switch *sw);
993
94581b25 994int tb_port_state(struct tb_port *port);
9da672a4 995int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged);
520b6702
AN
996int tb_port_add_nfc_credits(struct tb_port *port, int credits);
997int tb_port_clear_counter(struct tb_port *port, int counter);
b0407983 998int tb_port_unlock(struct tb_port *port);
341d4518
MW
999int tb_port_enable(struct tb_port *port);
1000int tb_port_disable(struct tb_port *port);
0b2863ac
MW
1001int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid);
1002void tb_port_release_in_hopid(struct tb_port *port, int hopid);
1003int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid);
1004void tb_port_release_out_hopid(struct tb_port *port, int hopid);
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MW
1005struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end,
1006 struct tb_port *prev);
9da672a4 1007
56ad3aef
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1008static inline bool tb_port_use_credit_allocation(const struct tb_port *port)
1009{
1010 return tb_port_is_null(port) && port->sw->credit_allocation;
1011}
1012
c64c3f3a
MW
1013/**
1014 * tb_for_each_port_on_path() - Iterate over each port on path
1015 * @src: Source port
1016 * @dst: Destination port
1017 * @p: Port used as iterator
1018 *
1019 * Walks over each port on path from @src to @dst.
1020 */
1021#define tb_for_each_port_on_path(src, dst, p) \
1022 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
1023 (p) = tb_next_port_on_path((src), (dst), (p)))
1024
5b7b8c0a 1025int tb_port_get_link_speed(struct tb_port *port);
4210d50f 1026int tb_port_get_link_width(struct tb_port *port);
0e14dd5e
MW
1027int tb_port_set_link_width(struct tb_port *port, unsigned int width);
1028int tb_port_set_lane_bonding(struct tb_port *port, bool bonding);
5cc0df9c
IH
1029int tb_port_lane_bonding_enable(struct tb_port *port);
1030void tb_port_lane_bonding_disable(struct tb_port *port);
e7051bea
MW
1031int tb_port_wait_for_link_width(struct tb_port *port, int width,
1032 int timeout_msec);
69fea377 1033int tb_port_update_credits(struct tb_port *port);
5b7b8c0a 1034
da2da04b 1035int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec);
aa43a9dc 1036int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap);
6de057ef 1037int tb_switch_next_cap(struct tb_switch *sw, unsigned int offset);
da2da04b 1038int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap);
3c8b228d 1039int tb_port_next_cap(struct tb_port *port, unsigned int offset);
e78db6f0 1040bool tb_port_is_enabled(struct tb_port *port);
e2b8785e 1041
e6f81858
RM
1042bool tb_usb3_port_is_enabled(struct tb_port *port);
1043int tb_usb3_port_enable(struct tb_port *port, bool enable);
1044
0414bec5 1045bool tb_pci_port_is_enabled(struct tb_port *port);
93f36ade
MW
1046int tb_pci_port_enable(struct tb_port *port, bool enable);
1047
4f807e47
MW
1048int tb_dp_port_hpd_is_active(struct tb_port *port);
1049int tb_dp_port_hpd_clear(struct tb_port *port);
1050int tb_dp_port_set_hops(struct tb_port *port, unsigned int video,
1051 unsigned int aux_tx, unsigned int aux_rx);
1052bool tb_dp_port_is_enabled(struct tb_port *port);
1053int tb_dp_port_enable(struct tb_port *port, bool enable);
1054
0414bec5
MW
1055struct tb_path *tb_path_discover(struct tb_port *src, int src_hopid,
1056 struct tb_port *dst, int dst_hopid,
43bddb26
MW
1057 struct tb_port **last, const char *name,
1058 bool alloc_hopid);
8c7acaaf
MW
1059struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int src_hopid,
1060 struct tb_port *dst, int dst_hopid, int link_nr,
1061 const char *name);
520b6702
AN
1062void tb_path_free(struct tb_path *path);
1063int tb_path_activate(struct tb_path *path);
1064void tb_path_deactivate(struct tb_path *path);
1065bool tb_path_is_invalid(struct tb_path *path);
0bd680cd
MW
1066bool tb_path_port_on_path(const struct tb_path *path,
1067 const struct tb_port *port);
520b6702 1068
6ed541c5
MW
1069/**
1070 * tb_path_for_each_hop() - Iterate over each hop on path
1071 * @path: Path whose hops to iterate
1072 * @hop: Hop used as iterator
1073 *
1074 * Iterates over each hop on path.
1075 */
1076#define tb_path_for_each_hop(path, hop) \
1077 for ((hop) = &(path)->hops[0]; \
1078 (hop) <= &(path)->hops[(path)->path_length - 1]; (hop)++)
1079
cd22e73b
AN
1080int tb_drom_read(struct tb_switch *sw);
1081int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
c90553b3 1082
a9be5582 1083int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid);
e28178bf
MW
1084int tb_lc_configure_port(struct tb_port *port);
1085void tb_lc_unconfigure_port(struct tb_port *port);
284652a4
MW
1086int tb_lc_configure_xdomain(struct tb_port *port);
1087void tb_lc_unconfigure_xdomain(struct tb_port *port);
fdb0887c 1088int tb_lc_start_lane_initialization(struct tb_port *port);
43f977bc 1089bool tb_lc_is_clx_supported(struct tb_port *port);
30a4eca6
MW
1090bool tb_lc_is_usb_plugged(struct tb_port *port);
1091bool tb_lc_is_xhci_connected(struct tb_port *port);
1092int tb_lc_xhci_connect(struct tb_port *port);
1093void tb_lc_xhci_disconnect(struct tb_port *port);
b2911a59 1094int tb_lc_set_wake(struct tb_switch *sw, unsigned int flags);
5480dfc2 1095int tb_lc_set_sleep(struct tb_switch *sw);
91c0c120 1096bool tb_lc_lane_bonding_possible(struct tb_switch *sw);
8afe909b
MW
1097bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in);
1098int tb_lc_dp_sink_alloc(struct tb_switch *sw, struct tb_port *in);
1099int tb_lc_dp_sink_dealloc(struct tb_switch *sw, struct tb_port *in);
1cb36293 1100int tb_lc_force_power(struct tb_switch *sw);
a25c8b2f
AN
1101
1102static inline int tb_route_length(u64 route)
1103{
1104 return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT;
1105}
1106
9da672a4
AN
1107/**
1108 * tb_downstream_route() - get route to downstream switch
1109 *
1110 * Port must not be the upstream port (otherwise a loop is created).
1111 *
1112 * Return: Returns a route to the switch behind @port.
1113 */
1114static inline u64 tb_downstream_route(struct tb_port *port)
1115{
1116 return tb_route(port->sw)
1117 | ((u64) port->port << (port->sw->config.depth * 8));
1118}
1119
5ca67688 1120bool tb_is_xdomain_enabled(void);
d1ff7024
MW
1121bool tb_xdomain_handle_request(struct tb *tb, enum tb_cfg_pkg_type type,
1122 const void *buf, size_t size);
1123struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent,
1124 u64 route, const uuid_t *local_uuid,
1125 const uuid_t *remote_uuid);
1126void tb_xdomain_add(struct tb_xdomain *xd);
1127void tb_xdomain_remove(struct tb_xdomain *xd);
1128struct tb_xdomain *tb_xdomain_find_by_link_depth(struct tb *tb, u8 link,
1129 u8 depth);
1130
3fb10ea4 1131int tb_retimer_scan(struct tb_port *port, bool add);
dacb1287
KK
1132void tb_retimer_remove_all(struct tb_port *port);
1133
1134static inline bool tb_is_retimer(const struct device *dev)
1135{
1136 return dev->type == &tb_retimer_type;
1137}
1138
1139static inline struct tb_retimer *tb_to_retimer(struct device *dev)
1140{
1141 if (tb_is_retimer(dev))
1142 return container_of(dev, struct tb_retimer, dev);
1143 return NULL;
1144}
1145
b0407983
MW
1146int usb4_switch_setup(struct tb_switch *sw);
1147int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid);
1148int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
1149 size_t size);
b0407983 1150bool usb4_switch_lane_bonding_possible(struct tb_switch *sw);
b2911a59 1151int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags);
b0407983
MW
1152int usb4_switch_set_sleep(struct tb_switch *sw);
1153int usb4_switch_nvm_sector_size(struct tb_switch *sw);
1154int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
1155 size_t size);
1cbf680f 1156int usb4_switch_nvm_set_offset(struct tb_switch *sw, unsigned int address);
b0407983
MW
1157int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
1158 const void *buf, size_t size);
1159int usb4_switch_nvm_authenticate(struct tb_switch *sw);
661b1947 1160int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status);
56ad3aef 1161int usb4_switch_credits_init(struct tb_switch *sw);
b0407983
MW
1162bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
1163int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1164int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1165struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
1166 const struct tb_port *port);
e6f81858
RM
1167struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
1168 const struct tb_port *port);
cae5f515
MW
1169int usb4_switch_add_ports(struct tb_switch *sw);
1170void usb4_switch_remove_ports(struct tb_switch *sw);
b0407983
MW
1171
1172int usb4_port_unlock(struct tb_port *port);
e28178bf
MW
1173int usb4_port_configure(struct tb_port *port);
1174void usb4_port_unconfigure(struct tb_port *port);
284652a4
MW
1175int usb4_port_configure_xdomain(struct tb_port *port);
1176void usb4_port_unconfigure_xdomain(struct tb_port *port);
3406de7c
RM
1177int usb4_port_router_offline(struct tb_port *port);
1178int usb4_port_router_online(struct tb_port *port);
02d12855 1179int usb4_port_enumerate_retimers(struct tb_port *port);
8a90e4fa 1180bool usb4_port_clx_supported(struct tb_port *port);
02d12855 1181
3406de7c 1182int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index);
02d12855
RM
1183int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1184 u8 size);
1185int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1186 const void *buf, u8 size);
1187int usb4_port_retimer_is_last(struct tb_port *port, u8 index);
1188int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index);
faa1c615
RM
1189int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1190 unsigned int address);
02d12855
RM
1191int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index,
1192 unsigned int address, const void *buf,
1193 size_t size);
1194int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index);
1195int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1196 u32 *status);
1197int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1198 unsigned int address, void *buf, size_t size);
3b1d8d57
MW
1199
1200int usb4_usb3_port_max_link_rate(struct tb_port *port);
1201int usb4_usb3_port_actual_link_rate(struct tb_port *port);
1202int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1203 int *downstream_bw);
1204int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1205 int *downstream_bw);
1206int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1207 int *downstream_bw);
1cb36293 1208
cae5f515
MW
1209static inline bool tb_is_usb4_port_device(const struct device *dev)
1210{
1211 return dev->type == &usb4_port_device_type;
1212}
1213
1214static inline struct usb4_port *tb_to_usb4_port_device(struct device *dev)
1215{
1216 if (tb_is_usb4_port_device(dev))
1217 return container_of(dev, struct usb4_port, dev);
1218 return NULL;
1219}
1220
1221struct usb4_port *usb4_port_device_add(struct tb_port *port);
1222void usb4_port_device_remove(struct usb4_port *usb4);
3fb10ea4 1223int usb4_port_device_resume(struct usb4_port *usb4);
cae5f515 1224
810278da 1225/* Keep link controller awake during update */
1cb36293
ML
1226#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0)
1227
1228void tb_check_quirks(struct tb_switch *sw);
1229
b2be2b05
MW
1230#ifdef CONFIG_ACPI
1231void tb_acpi_add_links(struct tb_nhi *nhi);
c6da62a2
MW
1232
1233bool tb_acpi_is_native(void);
1234bool tb_acpi_may_tunnel_usb3(void);
1235bool tb_acpi_may_tunnel_dp(void);
1236bool tb_acpi_may_tunnel_pcie(void);
1237bool tb_acpi_is_xdomain_allowed(void);
ccc5cb8a
RM
1238
1239int tb_acpi_init(void);
1240void tb_acpi_exit(void);
1241int tb_acpi_power_on_retimers(struct tb_port *port);
1242int tb_acpi_power_off_retimers(struct tb_port *port);
b2be2b05
MW
1243#else
1244static inline void tb_acpi_add_links(struct tb_nhi *nhi) { }
c6da62a2
MW
1245
1246static inline bool tb_acpi_is_native(void) { return true; }
1247static inline bool tb_acpi_may_tunnel_usb3(void) { return true; }
1248static inline bool tb_acpi_may_tunnel_dp(void) { return true; }
1249static inline bool tb_acpi_may_tunnel_pcie(void) { return true; }
1250static inline bool tb_acpi_is_xdomain_allowed(void) { return true; }
ccc5cb8a
RM
1251
1252static inline int tb_acpi_init(void) { return 0; }
1253static inline void tb_acpi_exit(void) { }
1254static inline int tb_acpi_power_on_retimers(struct tb_port *port) { return 0; }
1255static inline int tb_acpi_power_off_retimers(struct tb_port *port) { return 0; }
b2be2b05
MW
1256#endif
1257
54e41810
GF
1258#ifdef CONFIG_DEBUG_FS
1259void tb_debugfs_init(void);
1260void tb_debugfs_exit(void);
1261void tb_switch_debugfs_init(struct tb_switch *sw);
1262void tb_switch_debugfs_remove(struct tb_switch *sw);
407ac931
MW
1263void tb_service_debugfs_init(struct tb_service *svc);
1264void tb_service_debugfs_remove(struct tb_service *svc);
54e41810
GF
1265#else
1266static inline void tb_debugfs_init(void) { }
1267static inline void tb_debugfs_exit(void) { }
1268static inline void tb_switch_debugfs_init(struct tb_switch *sw) { }
1269static inline void tb_switch_debugfs_remove(struct tb_switch *sw) { }
407ac931
MW
1270static inline void tb_service_debugfs_init(struct tb_service *svc) { }
1271static inline void tb_service_debugfs_remove(struct tb_service *svc) { }
54e41810
GF
1272#endif
1273
2c6ea4e2
MW
1274#ifdef CONFIG_USB4_KUNIT_TEST
1275int tb_test_init(void);
1276void tb_test_exit(void);
1277#else
1278static inline int tb_test_init(void) { return 0; }
1279static inline void tb_test_exit(void) { }
1280#endif
1281
d6cc51cd 1282#endif