thunderbolt: Implement USB4 port sideband operations for retimer access
[linux-block.git] / drivers / thunderbolt / tb.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
d6cc51cd 2/*
15c6784c 3 * Thunderbolt driver - bus logic (NHI independent)
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4 *
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
15c6784c 6 * Copyright (C) 2018, Intel Corporation
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7 */
8
9#ifndef TB_H_
10#define TB_H_
11
e6b245cc 12#include <linux/nvmem-provider.h>
a25c8b2f 13#include <linux/pci.h>
d1ff7024 14#include <linux/thunderbolt.h>
bfe778ac 15#include <linux/uuid.h>
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16
17#include "tb_regs.h"
d6cc51cd 18#include "ctl.h"
3e136768 19#include "dma_port.h"
d6cc51cd 20
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21#define NVM_MIN_SIZE SZ_32K
22#define NVM_MAX_SIZE SZ_512K
23
24/* Intel specific NVM offsets */
25#define NVM_DEVID 0x05
26#define NVM_VERSION 0x08
27#define NVM_FLASH_SIZE 0x45
28
e6b245cc 29/**
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30 * struct tb_nvm - Structure holding NVM information
31 * @dev: Owner of the NVM
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32 * @major: Major version number of the active NVM portion
33 * @minor: Minor version number of the active NVM portion
34 * @id: Identifier used with both NVM portions
35 * @active: Active portion NVMem device
36 * @non_active: Non-active portion NVMem device
37 * @buf: Buffer where the NVM image is stored before it is written to
38 * the actual NVM flash device
39 * @buf_data_size: Number of bytes actually consumed by the new NVM
40 * image
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41 * @authenticating: The device is authenticating the new NVM
42 *
43 * The user of this structure needs to handle serialization of possible
44 * concurrent access.
e6b245cc 45 */
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46struct tb_nvm {
47 struct device *dev;
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48 u8 major;
49 u8 minor;
50 int id;
51 struct nvmem_device *active;
52 struct nvmem_device *non_active;
53 void *buf;
54 size_t buf_data_size;
55 bool authenticating;
56};
57
f67cf491 58#define TB_SWITCH_KEY_SIZE 32
f0342e75 59#define TB_SWITCH_MAX_DEPTH 6
b0407983 60#define USB4_SWITCH_MAX_DEPTH 5
f67cf491 61
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62/**
63 * enum tb_switch_tmu_rate - TMU refresh rate
64 * @TB_SWITCH_TMU_RATE_OFF: %0 (Disable Time Sync handshake)
65 * @TB_SWITCH_TMU_RATE_HIFI: %16 us time interval between successive
66 * transmission of the Delay Request TSNOS
67 * (Time Sync Notification Ordered Set) on a Link
68 * @TB_SWITCH_TMU_RATE_NORMAL: %1 ms time interval between successive
69 * transmission of the Delay Request TSNOS on
70 * a Link
71 */
72enum tb_switch_tmu_rate {
73 TB_SWITCH_TMU_RATE_OFF = 0,
74 TB_SWITCH_TMU_RATE_HIFI = 16,
75 TB_SWITCH_TMU_RATE_NORMAL = 1000,
76};
77
78/**
79 * struct tb_switch_tmu - Structure holding switch TMU configuration
80 * @cap: Offset to the TMU capability (%0 if not found)
81 * @has_ucap: Does the switch support uni-directional mode
82 * @rate: TMU refresh rate related to upstream switch. In case of root
83 * switch this holds the domain rate.
84 * @unidirectional: Is the TMU in uni-directional or bi-directional mode
85 * related to upstream switch. Don't case for root switch.
86 */
87struct tb_switch_tmu {
88 int cap;
89 bool has_ucap;
90 enum tb_switch_tmu_rate rate;
91 bool unidirectional;
92};
93
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94/**
95 * struct tb_switch - a thunderbolt switch
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96 * @dev: Device for the switch
97 * @config: Switch configuration
98 * @ports: Ports in this switch
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99 * @dma_port: If the switch has port supporting DMA configuration based
100 * mailbox this will hold the pointer to that (%NULL
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101 * otherwise). If set it also means the switch has
102 * upgradeable NVM.
cf29b9af 103 * @tmu: The switch TMU configuration
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104 * @tb: Pointer to the domain the switch belongs to
105 * @uid: Unique ID of the switch
106 * @uuid: UUID of the switch (or %NULL if not supported)
107 * @vendor: Vendor ID of the switch
108 * @device: Device ID of the switch
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109 * @vendor_name: Name of the vendor (or %NULL if not known)
110 * @device_name: Name of the device (or %NULL if not known)
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111 * @link_speed: Speed of the link in Gb/s
112 * @link_width: Width of the link (1 or 2)
bbcf40b3 113 * @link_usb4: Upstream link is USB4
2c3c4197 114 * @generation: Switch Thunderbolt generation
bfe778ac 115 * @cap_plug_events: Offset to the plug events capability (%0 if not found)
a9be5582 116 * @cap_lc: Offset to the link controller capability (%0 if not found)
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117 * @is_unplugged: The switch is going away
118 * @drom: DROM of the switch (%NULL if not found)
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119 * @nvm: Pointer to the NVM if the switch has one (%NULL otherwise)
120 * @no_nvm_upgrade: Prevent NVM upgrade of this switch
121 * @safe_mode: The switch is in safe-mode
14862ee3 122 * @boot: Whether the switch was already authorized on boot or not
2d8ff0b5 123 * @rpm: The switch supports runtime PM
f67cf491 124 * @authorized: Whether the switch is authorized by user or policy
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125 * @security_level: Switch supported security level
126 * @key: Contains the key used to challenge the device or %NULL if not
127 * supported. Size of the key is %TB_SWITCH_KEY_SIZE.
128 * @connection_id: Connection ID used with ICM messaging
129 * @connection_key: Connection key used with ICM messaging
130 * @link: Root switch link this switch is connected (ICM only)
131 * @depth: Depth in the chain this switch is connected (ICM only)
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132 * @rpm_complete: Completion used to wait for runtime resume to
133 * complete (ICM only)
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134 *
135 * When the switch is being added or removed to the domain (other
09f11b6c 136 * switches) you need to have domain lock held.
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137 */
138struct tb_switch {
bfe778ac 139 struct device dev;
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140 struct tb_regs_switch_header config;
141 struct tb_port *ports;
3e136768 142 struct tb_dma_port *dma_port;
cf29b9af 143 struct tb_switch_tmu tmu;
a25c8b2f 144 struct tb *tb;
c90553b3 145 u64 uid;
7c39ffe7 146 uuid_t *uuid;
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147 u16 vendor;
148 u16 device;
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149 const char *vendor_name;
150 const char *device_name;
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151 unsigned int link_speed;
152 unsigned int link_width;
bbcf40b3 153 bool link_usb4;
2c3c4197 154 unsigned int generation;
bfe778ac 155 int cap_plug_events;
a9be5582 156 int cap_lc;
bfe778ac 157 bool is_unplugged;
cd22e73b 158 u8 *drom;
719a5fe8 159 struct tb_nvm *nvm;
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160 bool no_nvm_upgrade;
161 bool safe_mode;
14862ee3 162 bool boot;
2d8ff0b5 163 bool rpm;
f67cf491 164 unsigned int authorized;
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165 enum tb_security_level security_level;
166 u8 *key;
167 u8 connection_id;
168 u8 connection_key;
169 u8 link;
170 u8 depth;
4f7c2e0d 171 struct completion rpm_complete;
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172};
173
174/**
175 * struct tb_port - a thunderbolt port, part of a tb_switch
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176 * @config: Cached port configuration read from registers
177 * @sw: Switch the port belongs to
178 * @remote: Remote port (%NULL if not connected)
179 * @xdomain: Remote host (%NULL if not connected)
180 * @cap_phy: Offset, zero if not found
cf29b9af 181 * @cap_tmu: Offset of the adapter specific TMU capability (%0 if not present)
56183c88 182 * @cap_adap: Offset of the adapter specific capability (%0 if not present)
b0407983 183 * @cap_usb4: Offset to the USB4 port capability (%0 if not present)
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184 * @port: Port number on switch
185 * @disabled: Disabled by eeprom
91c0c120 186 * @bonded: true if the port is bonded (two lanes combined as one)
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187 * @dual_link_port: If the switch is connected using two ports, points
188 * to the other port.
189 * @link_nr: Is this primary or secondary port on the dual_link.
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190 * @in_hopids: Currently allocated input HopIDs
191 * @out_hopids: Currently allocated output HopIDs
8afe909b 192 * @list: Used to link ports to DP resources list
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193 */
194struct tb_port {
195 struct tb_regs_port_header config;
196 struct tb_switch *sw;
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197 struct tb_port *remote;
198 struct tb_xdomain *xdomain;
199 int cap_phy;
cf29b9af 200 int cap_tmu;
56183c88 201 int cap_adap;
b0407983 202 int cap_usb4;
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203 u8 port;
204 bool disabled;
91c0c120 205 bool bonded;
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206 struct tb_port *dual_link_port;
207 u8 link_nr:1;
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208 struct ida in_hopids;
209 struct ida out_hopids;
8afe909b 210 struct list_head list;
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211};
212
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213/**
214 * struct tb_path_hop - routing information for a tb_path
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215 * @in_port: Ingress port of a switch
216 * @out_port: Egress port of a switch where the packet is routed out
217 * (must be on the same switch than @in_port)
218 * @in_hop_index: HopID where the path configuration entry is placed in
219 * the path config space of @in_port.
220 * @in_counter_index: Used counter index (not used in the driver
221 * currently, %-1 to disable)
222 * @next_hop_index: HopID of the packet when it is routed out from @out_port
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223 * @initial_credits: Number of initial flow control credits allocated for
224 * the path
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225 *
226 * Hop configuration is always done on the IN port of a switch.
227 * in_port and out_port have to be on the same switch. Packets arriving on
228 * in_port with "hop" = in_hop_index will get routed to through out_port. The
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229 * next hop to take (on out_port->remote) is determined by
230 * next_hop_index. When routing packet to another switch (out->remote is
231 * set) the @next_hop_index must match the @in_hop_index of that next
232 * hop to make routing possible.
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233 *
234 * in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in
235 * port.
236 */
237struct tb_path_hop {
238 struct tb_port *in_port;
239 struct tb_port *out_port;
240 int in_hop_index;
8c7acaaf 241 int in_counter_index;
520b6702 242 int next_hop_index;
0414bec5 243 unsigned int initial_credits;
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244};
245
246/**
247 * enum tb_path_port - path options mask
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248 * @TB_PATH_NONE: Do not activate on any hop on path
249 * @TB_PATH_SOURCE: Activate on the first hop (out of src)
250 * @TB_PATH_INTERNAL: Activate on the intermediate hops (not the first/last)
251 * @TB_PATH_DESTINATION: Activate on the last hop (into dst)
252 * @TB_PATH_ALL: Activate on all hops on the path
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253 */
254enum tb_path_port {
255 TB_PATH_NONE = 0,
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256 TB_PATH_SOURCE = 1,
257 TB_PATH_INTERNAL = 2,
258 TB_PATH_DESTINATION = 4,
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259 TB_PATH_ALL = 7,
260};
261
262/**
263 * struct tb_path - a unidirectional path between two ports
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264 * @tb: Pointer to the domain structure
265 * @name: Name of the path (used for debugging)
266 * @nfc_credits: Number of non flow controlled credits allocated for the path
267 * @ingress_shared_buffer: Shared buffering used for ingress ports on the path
268 * @egress_shared_buffer: Shared buffering used for egress ports on the path
269 * @ingress_fc_enable: Flow control for ingress ports on the path
270 * @egress_fc_enable: Flow control for egress ports on the path
271 * @priority: Priority group if the path
272 * @weight: Weight of the path inside the priority group
273 * @drop_packages: Drop packages from queue tail or head
274 * @activated: Is the path active
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275 * @clear_fc: Clear all flow control from the path config space entries
276 * when deactivating this path
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277 * @hops: Path hops
278 * @path_length: How many hops the path uses
520b6702 279 *
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280 * A path consists of a number of hops (see &struct tb_path_hop). To
281 * establish a PCIe tunnel two paths have to be created between the two
282 * PCIe ports.
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283 */
284struct tb_path {
285 struct tb *tb;
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286 const char *name;
287 int nfc_credits;
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288 enum tb_path_port ingress_shared_buffer;
289 enum tb_path_port egress_shared_buffer;
290 enum tb_path_port ingress_fc_enable;
291 enum tb_path_port egress_fc_enable;
292
37209783 293 unsigned int priority:3;
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294 int weight:4;
295 bool drop_packages;
296 bool activated;
44242d6c 297 bool clear_fc;
520b6702 298 struct tb_path_hop *hops;
8c7acaaf 299 int path_length;
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300};
301
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302/* HopIDs 0-7 are reserved by the Thunderbolt protocol */
303#define TB_PATH_MIN_HOPID 8
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304/*
305 * Support paths from the farthest (depth 6) router to the host and back
306 * to the same level (not necessarily to the same router).
307 */
308#define TB_PATH_MAX_HOPS (7 * 2)
0b2863ac 309
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310/**
311 * struct tb_cm_ops - Connection manager specific operations vector
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312 * @driver_ready: Called right after control channel is started. Used by
313 * ICM to send driver ready message to the firmware.
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314 * @start: Starts the domain
315 * @stop: Stops the domain
316 * @suspend_noirq: Connection manager specific suspend_noirq
317 * @resume_noirq: Connection manager specific resume_noirq
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318 * @suspend: Connection manager specific suspend
319 * @complete: Connection manager specific complete
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320 * @runtime_suspend: Connection manager specific runtime_suspend
321 * @runtime_resume: Connection manager specific runtime_resume
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322 * @runtime_suspend_switch: Runtime suspend a switch
323 * @runtime_resume_switch: Runtime resume a switch
81a54b5e 324 * @handle_event: Handle thunderbolt event
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325 * @get_boot_acl: Get boot ACL list
326 * @set_boot_acl: Set boot ACL list
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327 * @approve_switch: Approve switch
328 * @add_switch_key: Add key to switch
329 * @challenge_switch_key: Challenge switch using key
e6b245cc 330 * @disconnect_pcie_paths: Disconnects PCIe paths before NVM update
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331 * @approve_xdomain_paths: Approve (establish) XDomain DMA paths
332 * @disconnect_xdomain_paths: Disconnect XDomain DMA paths
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333 */
334struct tb_cm_ops {
f67cf491 335 int (*driver_ready)(struct tb *tb);
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336 int (*start)(struct tb *tb);
337 void (*stop)(struct tb *tb);
338 int (*suspend_noirq)(struct tb *tb);
339 int (*resume_noirq)(struct tb *tb);
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340 int (*suspend)(struct tb *tb);
341 void (*complete)(struct tb *tb);
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342 int (*runtime_suspend)(struct tb *tb);
343 int (*runtime_resume)(struct tb *tb);
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344 int (*runtime_suspend_switch)(struct tb_switch *sw);
345 int (*runtime_resume_switch)(struct tb_switch *sw);
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346 void (*handle_event)(struct tb *tb, enum tb_cfg_pkg_type,
347 const void *buf, size_t size);
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348 int (*get_boot_acl)(struct tb *tb, uuid_t *uuids, size_t nuuids);
349 int (*set_boot_acl)(struct tb *tb, const uuid_t *uuids, size_t nuuids);
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350 int (*approve_switch)(struct tb *tb, struct tb_switch *sw);
351 int (*add_switch_key)(struct tb *tb, struct tb_switch *sw);
352 int (*challenge_switch_key)(struct tb *tb, struct tb_switch *sw,
353 const u8 *challenge, u8 *response);
e6b245cc 354 int (*disconnect_pcie_paths)(struct tb *tb);
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355 int (*approve_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd);
356 int (*disconnect_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd);
9d3cce0b 357};
520b6702 358
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359static inline void *tb_priv(struct tb *tb)
360{
361 return (void *)tb->privdata;
362}
363
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364#define TB_AUTOSUSPEND_DELAY 15000 /* ms */
365
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366/* helper functions & macros */
367
368/**
369 * tb_upstream_port() - return the upstream port of a switch
370 *
371 * Every switch has an upstream port (for the root switch it is the NHI).
372 *
373 * During switch alloc/init tb_upstream_port()->remote may be NULL, even for
374 * non root switches (on the NHI port remote is always NULL).
375 *
376 * Return: Returns the upstream port of the switch.
377 */
378static inline struct tb_port *tb_upstream_port(struct tb_switch *sw)
379{
380 return &sw->ports[sw->config.upstream_port_number];
381}
382
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383/**
384 * tb_is_upstream_port() - Is the port upstream facing
385 * @port: Port to check
386 *
387 * Returns true if @port is upstream facing port. In case of dual link
388 * ports both return true.
389 */
390static inline bool tb_is_upstream_port(const struct tb_port *port)
391{
392 const struct tb_port *upstream_port = tb_upstream_port(port->sw);
393 return port == upstream_port || port->dual_link_port == upstream_port;
394}
395
b323a98f 396static inline u64 tb_route(const struct tb_switch *sw)
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397{
398 return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo;
399}
400
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401static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw)
402{
403 u8 port;
404
405 port = route >> (sw->config.depth * 8);
406 if (WARN_ON(port > sw->config.max_port_number))
407 return NULL;
408 return &sw->ports[port];
409}
410
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411/**
412 * tb_port_has_remote() - Does the port have switch connected downstream
413 * @port: Port to check
414 *
415 * Returns true only when the port is primary port and has remote set.
416 */
417static inline bool tb_port_has_remote(const struct tb_port *port)
418{
419 if (tb_is_upstream_port(port))
420 return false;
421 if (!port->remote)
422 return false;
423 if (port->dual_link_port && port->link_nr)
424 return false;
425
426 return true;
427}
428
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429static inline bool tb_port_is_null(const struct tb_port *port)
430{
431 return port && port->port && port->config.type == TB_TYPE_PORT;
432}
433
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434static inline bool tb_port_is_pcie_down(const struct tb_port *port)
435{
436 return port && port->config.type == TB_TYPE_PCIE_DOWN;
437}
438
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439static inline bool tb_port_is_pcie_up(const struct tb_port *port)
440{
441 return port && port->config.type == TB_TYPE_PCIE_UP;
442}
443
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444static inline bool tb_port_is_dpin(const struct tb_port *port)
445{
446 return port && port->config.type == TB_TYPE_DP_HDMI_IN;
447}
448
449static inline bool tb_port_is_dpout(const struct tb_port *port)
450{
451 return port && port->config.type == TB_TYPE_DP_HDMI_OUT;
452}
453
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454static inline bool tb_port_is_usb3_down(const struct tb_port *port)
455{
456 return port && port->config.type == TB_TYPE_USB3_DOWN;
457}
458
459static inline bool tb_port_is_usb3_up(const struct tb_port *port)
460{
461 return port && port->config.type == TB_TYPE_USB3_UP;
462}
463
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464static inline int tb_sw_read(struct tb_switch *sw, void *buffer,
465 enum tb_cfg_space space, u32 offset, u32 length)
466{
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467 if (sw->is_unplugged)
468 return -ENODEV;
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469 return tb_cfg_read(sw->tb->ctl,
470 buffer,
471 tb_route(sw),
472 0,
473 space,
474 offset,
475 length);
476}
477
826c6a17 478static inline int tb_sw_write(struct tb_switch *sw, const void *buffer,
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479 enum tb_cfg_space space, u32 offset, u32 length)
480{
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481 if (sw->is_unplugged)
482 return -ENODEV;
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483 return tb_cfg_write(sw->tb->ctl,
484 buffer,
485 tb_route(sw),
486 0,
487 space,
488 offset,
489 length);
490}
491
492static inline int tb_port_read(struct tb_port *port, void *buffer,
493 enum tb_cfg_space space, u32 offset, u32 length)
494{
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495 if (port->sw->is_unplugged)
496 return -ENODEV;
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497 return tb_cfg_read(port->sw->tb->ctl,
498 buffer,
499 tb_route(port->sw),
500 port->port,
501 space,
502 offset,
503 length);
504}
505
16a1258a 506static inline int tb_port_write(struct tb_port *port, const void *buffer,
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507 enum tb_cfg_space space, u32 offset, u32 length)
508{
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509 if (port->sw->is_unplugged)
510 return -ENODEV;
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511 return tb_cfg_write(port->sw->tb->ctl,
512 buffer,
513 tb_route(port->sw),
514 port->port,
515 space,
516 offset,
517 length);
518}
519
520#define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg)
521#define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg)
522#define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg)
523#define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg)
daa5140f 524#define tb_dbg(tb, fmt, arg...) dev_dbg(&(tb)->nhi->pdev->dev, fmt, ## arg)
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525
526#define __TB_SW_PRINT(level, sw, fmt, arg...) \
527 do { \
b323a98f 528 const struct tb_switch *__sw = (sw); \
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529 level(__sw->tb, "%llx: " fmt, \
530 tb_route(__sw), ## arg); \
531 } while (0)
532#define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg)
533#define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg)
534#define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg)
daa5140f 535#define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg)
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536
537#define __TB_PORT_PRINT(level, _port, fmt, arg...) \
538 do { \
b323a98f 539 const struct tb_port *__port = (_port); \
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540 level(__port->sw->tb, "%llx:%x: " fmt, \
541 tb_route(__port->sw), __port->port, ## arg); \
542 } while (0)
543#define tb_port_WARN(port, fmt, arg...) \
544 __TB_PORT_PRINT(tb_WARN, port, fmt, ##arg)
545#define tb_port_warn(port, fmt, arg...) \
546 __TB_PORT_PRINT(tb_warn, port, fmt, ##arg)
547#define tb_port_info(port, fmt, arg...) \
548 __TB_PORT_PRINT(tb_info, port, fmt, ##arg)
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549#define tb_port_dbg(port, fmt, arg...) \
550 __TB_PORT_PRINT(tb_dbg, port, fmt, ##arg)
a25c8b2f 551
f67cf491 552struct tb *icm_probe(struct tb_nhi *nhi);
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553struct tb *tb_probe(struct tb_nhi *nhi);
554
9d3cce0b 555extern struct device_type tb_domain_type;
bfe778ac 556extern struct device_type tb_switch_type;
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557
558int tb_domain_init(void);
559void tb_domain_exit(void);
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560int tb_xdomain_init(void);
561void tb_xdomain_exit(void);
a25c8b2f 562
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563struct tb *tb_domain_alloc(struct tb_nhi *nhi, size_t privsize);
564int tb_domain_add(struct tb *tb);
565void tb_domain_remove(struct tb *tb);
566int tb_domain_suspend_noirq(struct tb *tb);
567int tb_domain_resume_noirq(struct tb *tb);
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568int tb_domain_suspend(struct tb *tb);
569void tb_domain_complete(struct tb *tb);
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570int tb_domain_runtime_suspend(struct tb *tb);
571int tb_domain_runtime_resume(struct tb *tb);
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572int tb_domain_approve_switch(struct tb *tb, struct tb_switch *sw);
573int tb_domain_approve_switch_key(struct tb *tb, struct tb_switch *sw);
574int tb_domain_challenge_switch_key(struct tb *tb, struct tb_switch *sw);
e6b245cc 575int tb_domain_disconnect_pcie_paths(struct tb *tb);
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576int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd);
577int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd);
578int tb_domain_disconnect_all_paths(struct tb *tb);
9d3cce0b 579
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580static inline struct tb *tb_domain_get(struct tb *tb)
581{
582 if (tb)
583 get_device(&tb->dev);
584 return tb;
585}
586
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587static inline void tb_domain_put(struct tb *tb)
588{
589 put_device(&tb->dev);
590}
d6cc51cd 591
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592struct tb_nvm *tb_nvm_alloc(struct device *dev);
593int tb_nvm_add_active(struct tb_nvm *nvm, size_t size, nvmem_reg_read_t reg_read);
594int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val,
595 size_t bytes);
596int tb_nvm_add_non_active(struct tb_nvm *nvm, size_t size,
597 nvmem_reg_write_t reg_write);
598void tb_nvm_free(struct tb_nvm *nvm);
599void tb_nvm_exit(void);
600
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601struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent,
602 u64 route);
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603struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb,
604 struct device *parent, u64 route);
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605int tb_switch_configure(struct tb_switch *sw);
606int tb_switch_add(struct tb_switch *sw);
607void tb_switch_remove(struct tb_switch *sw);
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608void tb_switch_suspend(struct tb_switch *sw);
609int tb_switch_resume(struct tb_switch *sw);
610int tb_switch_reset(struct tb *tb, u64 route);
aae20bb6 611void tb_sw_set_unplugged(struct tb_switch *sw);
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612struct tb_port *tb_switch_find_port(struct tb_switch *sw,
613 enum tb_port_type type);
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614struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link,
615 u8 depth);
7c39ffe7 616struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid);
8e9267bb 617struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route);
f67cf491 618
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619/**
620 * tb_switch_for_each_port() - Iterate over each switch port
621 * @sw: Switch whose ports to iterate
622 * @p: Port used as iterator
623 *
624 * Iterates over each switch port skipping the control port (port %0).
625 */
626#define tb_switch_for_each_port(sw, p) \
627 for ((p) = &(sw)->ports[1]; \
628 (p) <= &(sw)->ports[(sw)->config.max_port_number]; (p)++)
629
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630static inline struct tb_switch *tb_switch_get(struct tb_switch *sw)
631{
632 if (sw)
633 get_device(&sw->dev);
634 return sw;
635}
636
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637static inline void tb_switch_put(struct tb_switch *sw)
638{
639 put_device(&sw->dev);
640}
641
642static inline bool tb_is_switch(const struct device *dev)
643{
644 return dev->type == &tb_switch_type;
645}
646
647static inline struct tb_switch *tb_to_switch(struct device *dev)
648{
649 if (tb_is_switch(dev))
650 return container_of(dev, struct tb_switch, dev);
651 return NULL;
652}
653
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654static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw)
655{
656 return tb_to_switch(sw->dev.parent);
657}
658
17a8f815 659static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw)
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660{
661 return sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE;
662}
663
17a8f815 664static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw)
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665{
666 return sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE;
667}
668
17a8f815 669static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw)
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670{
671 switch (sw->config.device_id) {
672 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
673 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
674 return true;
675 default:
676 return false;
677 }
678}
679
17a8f815 680static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw)
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681{
682 switch (sw->config.device_id) {
683 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
684 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
685 return true;
686 default:
687 return false;
688 }
689}
690
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691static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw)
692{
693 switch (sw->config.device_id) {
694 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
695 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
696 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
697 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
698 return true;
699 default:
700 return false;
701 }
702}
703
704static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw)
705{
706 switch (sw->config.device_id) {
707 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
708 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
709 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
710 return true;
711 default:
712 return false;
713 }
714}
715
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716/**
717 * tb_switch_is_usb4() - Is the switch USB4 compliant
718 * @sw: Switch to check
719 *
720 * Returns true if the @sw is USB4 compliant router, false otherwise.
721 */
722static inline bool tb_switch_is_usb4(const struct tb_switch *sw)
723{
724 return sw->config.thunderbolt_version == USB4_VERSION_1_0;
725}
726
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727/**
728 * tb_switch_is_icm() - Is the switch handled by ICM firmware
729 * @sw: Switch to check
730 *
731 * In case there is a need to differentiate whether ICM firmware or SW CM
732 * is handling @sw this function can be called. It is valid to call this
733 * after tb_switch_alloc() and tb_switch_configure() has been called
734 * (latter only for SW CM case).
735 */
736static inline bool tb_switch_is_icm(const struct tb_switch *sw)
737{
738 return !sw->config.enabled;
739}
740
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741int tb_switch_lane_bonding_enable(struct tb_switch *sw);
742void tb_switch_lane_bonding_disable(struct tb_switch *sw);
743
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744bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
745int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
746void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
747
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748int tb_switch_tmu_init(struct tb_switch *sw);
749int tb_switch_tmu_post_time(struct tb_switch *sw);
750int tb_switch_tmu_disable(struct tb_switch *sw);
751int tb_switch_tmu_enable(struct tb_switch *sw);
752
753static inline bool tb_switch_tmu_is_enabled(const struct tb_switch *sw)
754{
755 return sw->tmu.rate == TB_SWITCH_TMU_RATE_HIFI &&
756 !sw->tmu.unidirectional;
757}
758
9da672a4 759int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged);
520b6702 760int tb_port_add_nfc_credits(struct tb_port *port, int credits);
44242d6c 761int tb_port_set_initial_credits(struct tb_port *port, u32 credits);
520b6702 762int tb_port_clear_counter(struct tb_port *port, int counter);
b0407983 763int tb_port_unlock(struct tb_port *port);
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764int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid);
765void tb_port_release_in_hopid(struct tb_port *port, int hopid);
766int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid);
767void tb_port_release_out_hopid(struct tb_port *port, int hopid);
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768struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end,
769 struct tb_port *prev);
9da672a4 770
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771/**
772 * tb_for_each_port_on_path() - Iterate over each port on path
773 * @src: Source port
774 * @dst: Destination port
775 * @p: Port used as iterator
776 *
777 * Walks over each port on path from @src to @dst.
778 */
779#define tb_for_each_port_on_path(src, dst, p) \
780 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
781 (p) = tb_next_port_on_path((src), (dst), (p)))
782
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783int tb_port_get_link_speed(struct tb_port *port);
784
da2da04b 785int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec);
aa43a9dc 786int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap);
da2da04b 787int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap);
e78db6f0 788bool tb_port_is_enabled(struct tb_port *port);
e2b8785e 789
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790bool tb_usb3_port_is_enabled(struct tb_port *port);
791int tb_usb3_port_enable(struct tb_port *port, bool enable);
792
0414bec5 793bool tb_pci_port_is_enabled(struct tb_port *port);
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794int tb_pci_port_enable(struct tb_port *port, bool enable);
795
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796int tb_dp_port_hpd_is_active(struct tb_port *port);
797int tb_dp_port_hpd_clear(struct tb_port *port);
798int tb_dp_port_set_hops(struct tb_port *port, unsigned int video,
799 unsigned int aux_tx, unsigned int aux_rx);
800bool tb_dp_port_is_enabled(struct tb_port *port);
801int tb_dp_port_enable(struct tb_port *port, bool enable);
802
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803struct tb_path *tb_path_discover(struct tb_port *src, int src_hopid,
804 struct tb_port *dst, int dst_hopid,
805 struct tb_port **last, const char *name);
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806struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int src_hopid,
807 struct tb_port *dst, int dst_hopid, int link_nr,
808 const char *name);
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AN
809void tb_path_free(struct tb_path *path);
810int tb_path_activate(struct tb_path *path);
811void tb_path_deactivate(struct tb_path *path);
812bool tb_path_is_invalid(struct tb_path *path);
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813bool tb_path_port_on_path(const struct tb_path *path,
814 const struct tb_port *port);
520b6702 815
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816int tb_drom_read(struct tb_switch *sw);
817int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
c90553b3 818
a9be5582 819int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid);
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820int tb_lc_configure_link(struct tb_switch *sw);
821void tb_lc_unconfigure_link(struct tb_switch *sw);
5480dfc2 822int tb_lc_set_sleep(struct tb_switch *sw);
91c0c120 823bool tb_lc_lane_bonding_possible(struct tb_switch *sw);
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824bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in);
825int tb_lc_dp_sink_alloc(struct tb_switch *sw, struct tb_port *in);
826int tb_lc_dp_sink_dealloc(struct tb_switch *sw, struct tb_port *in);
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AN
827
828static inline int tb_route_length(u64 route)
829{
830 return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT;
831}
832
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833/**
834 * tb_downstream_route() - get route to downstream switch
835 *
836 * Port must not be the upstream port (otherwise a loop is created).
837 *
838 * Return: Returns a route to the switch behind @port.
839 */
840static inline u64 tb_downstream_route(struct tb_port *port)
841{
842 return tb_route(port->sw)
843 | ((u64) port->port << (port->sw->config.depth * 8));
844}
845
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846bool tb_xdomain_handle_request(struct tb *tb, enum tb_cfg_pkg_type type,
847 const void *buf, size_t size);
848struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent,
849 u64 route, const uuid_t *local_uuid,
850 const uuid_t *remote_uuid);
851void tb_xdomain_add(struct tb_xdomain *xd);
852void tb_xdomain_remove(struct tb_xdomain *xd);
853struct tb_xdomain *tb_xdomain_find_by_link_depth(struct tb *tb, u8 link,
854 u8 depth);
855
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856int usb4_switch_setup(struct tb_switch *sw);
857int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid);
858int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
859 size_t size);
860int usb4_switch_configure_link(struct tb_switch *sw);
861void usb4_switch_unconfigure_link(struct tb_switch *sw);
862bool usb4_switch_lane_bonding_possible(struct tb_switch *sw);
863int usb4_switch_set_sleep(struct tb_switch *sw);
864int usb4_switch_nvm_sector_size(struct tb_switch *sw);
865int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
866 size_t size);
867int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
868 const void *buf, size_t size);
869int usb4_switch_nvm_authenticate(struct tb_switch *sw);
870bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
871int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
872int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
873struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
874 const struct tb_port *port);
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875struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
876 const struct tb_port *port);
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877
878int usb4_port_unlock(struct tb_port *port);
02d12855
RM
879int usb4_port_enumerate_retimers(struct tb_port *port);
880
881int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
882 u8 size);
883int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
884 const void *buf, u8 size);
885int usb4_port_retimer_is_last(struct tb_port *port, u8 index);
886int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index);
887int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index,
888 unsigned int address, const void *buf,
889 size_t size);
890int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index);
891int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
892 u32 *status);
893int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
894 unsigned int address, void *buf, size_t size);
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895
896int usb4_usb3_port_max_link_rate(struct tb_port *port);
897int usb4_usb3_port_actual_link_rate(struct tb_port *port);
898int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
899 int *downstream_bw);
900int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
901 int *downstream_bw);
902int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
903 int *downstream_bw);
d6cc51cd 904#endif