Merge branch 'acpi-uid'
[linux-block.git] / drivers / thunderbolt / tb.h
CommitLineData
b2441318 1/* SPDX-License-Identifier: GPL-2.0 */
d6cc51cd 2/*
15c6784c 3 * Thunderbolt driver - bus logic (NHI independent)
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4 *
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
15c6784c 6 * Copyright (C) 2018, Intel Corporation
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7 */
8
9#ifndef TB_H_
10#define TB_H_
11
e6b245cc 12#include <linux/nvmem-provider.h>
a25c8b2f 13#include <linux/pci.h>
d1ff7024 14#include <linux/thunderbolt.h>
bfe778ac 15#include <linux/uuid.h>
b017a46d 16#include <linux/bitfield.h>
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17
18#include "tb_regs.h"
d6cc51cd 19#include "ctl.h"
3e136768 20#include "dma_port.h"
d6cc51cd 21
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22#define NVM_MIN_SIZE SZ_32K
23#define NVM_MAX_SIZE SZ_512K
9b383037 24#define NVM_DATA_DWORDS 16
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25
26/* Intel specific NVM offsets */
27#define NVM_DEVID 0x05
28#define NVM_VERSION 0x08
29#define NVM_FLASH_SIZE 0x45
30
e6b245cc 31/**
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32 * struct tb_nvm - Structure holding NVM information
33 * @dev: Owner of the NVM
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34 * @major: Major version number of the active NVM portion
35 * @minor: Minor version number of the active NVM portion
36 * @id: Identifier used with both NVM portions
37 * @active: Active portion NVMem device
38 * @non_active: Non-active portion NVMem device
39 * @buf: Buffer where the NVM image is stored before it is written to
40 * the actual NVM flash device
41 * @buf_data_size: Number of bytes actually consumed by the new NVM
42 * image
719a5fe8 43 * @authenticating: The device is authenticating the new NVM
4b794f80 44 * @flushed: The image has been flushed to the storage area
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45 *
46 * The user of this structure needs to handle serialization of possible
47 * concurrent access.
e6b245cc 48 */
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49struct tb_nvm {
50 struct device *dev;
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51 u8 major;
52 u8 minor;
53 int id;
54 struct nvmem_device *active;
55 struct nvmem_device *non_active;
56 void *buf;
57 size_t buf_data_size;
58 bool authenticating;
4b794f80 59 bool flushed;
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60};
61
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62enum tb_nvm_write_ops {
63 WRITE_AND_AUTHENTICATE = 1,
64 WRITE_ONLY = 2,
1cbf680f 65 AUTHENTICATE_ONLY = 3,
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66};
67
f67cf491 68#define TB_SWITCH_KEY_SIZE 32
f0342e75 69#define TB_SWITCH_MAX_DEPTH 6
b0407983 70#define USB4_SWITCH_MAX_DEPTH 5
f67cf491 71
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72/**
73 * enum tb_switch_tmu_rate - TMU refresh rate
74 * @TB_SWITCH_TMU_RATE_OFF: %0 (Disable Time Sync handshake)
75 * @TB_SWITCH_TMU_RATE_HIFI: %16 us time interval between successive
76 * transmission of the Delay Request TSNOS
77 * (Time Sync Notification Ordered Set) on a Link
78 * @TB_SWITCH_TMU_RATE_NORMAL: %1 ms time interval between successive
79 * transmission of the Delay Request TSNOS on
80 * a Link
81 */
82enum tb_switch_tmu_rate {
83 TB_SWITCH_TMU_RATE_OFF = 0,
84 TB_SWITCH_TMU_RATE_HIFI = 16,
85 TB_SWITCH_TMU_RATE_NORMAL = 1000,
86};
87
88/**
89 * struct tb_switch_tmu - Structure holding switch TMU configuration
90 * @cap: Offset to the TMU capability (%0 if not found)
91 * @has_ucap: Does the switch support uni-directional mode
92 * @rate: TMU refresh rate related to upstream switch. In case of root
a28ec0e1 93 * switch this holds the domain rate. Reflects the HW setting.
cf29b9af 94 * @unidirectional: Is the TMU in uni-directional or bi-directional mode
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95 * related to upstream switch. Don't care for root switch.
96 * Reflects the HW setting.
97 * @unidirectional_request: Is the new TMU mode: uni-directional or bi-directional
98 * that is requested to be set. Related to upstream switch.
99 * Don't care for root switch.
100 * @rate_request: TMU new refresh rate related to upstream switch that is
101 * requested to be set. In case of root switch, this holds
102 * the new domain rate that is requested to be set.
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103 */
104struct tb_switch_tmu {
105 int cap;
106 bool has_ucap;
107 enum tb_switch_tmu_rate rate;
108 bool unidirectional;
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109 bool unidirectional_request;
110 enum tb_switch_tmu_rate rate_request;
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111};
112
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113enum tb_clx {
114 TB_CLX_DISABLE,
b017a46d 115 /* CL0s and CL1 are enabled and supported together */
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116 TB_CL1,
117 TB_CL2,
118};
119
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120/**
121 * struct tb_switch - a thunderbolt switch
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122 * @dev: Device for the switch
123 * @config: Switch configuration
124 * @ports: Ports in this switch
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125 * @dma_port: If the switch has port supporting DMA configuration based
126 * mailbox this will hold the pointer to that (%NULL
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127 * otherwise). If set it also means the switch has
128 * upgradeable NVM.
cf29b9af 129 * @tmu: The switch TMU configuration
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130 * @tb: Pointer to the domain the switch belongs to
131 * @uid: Unique ID of the switch
132 * @uuid: UUID of the switch (or %NULL if not supported)
133 * @vendor: Vendor ID of the switch
134 * @device: Device ID of the switch
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135 * @vendor_name: Name of the vendor (or %NULL if not known)
136 * @device_name: Name of the device (or %NULL if not known)
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137 * @link_speed: Speed of the link in Gb/s
138 * @link_width: Width of the link (1 or 2)
bbcf40b3 139 * @link_usb4: Upstream link is USB4
2c3c4197 140 * @generation: Switch Thunderbolt generation
bfe778ac 141 * @cap_plug_events: Offset to the plug events capability (%0 if not found)
23ccd21c 142 * @cap_vsec_tmu: Offset to the TMU vendor specific capability (%0 if not found)
a9be5582 143 * @cap_lc: Offset to the link controller capability (%0 if not found)
43f977bc 144 * @cap_lp: Offset to the low power (CLx for TBT) capability (%0 if not found)
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145 * @is_unplugged: The switch is going away
146 * @drom: DROM of the switch (%NULL if not found)
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147 * @nvm: Pointer to the NVM if the switch has one (%NULL otherwise)
148 * @no_nvm_upgrade: Prevent NVM upgrade of this switch
149 * @safe_mode: The switch is in safe-mode
14862ee3 150 * @boot: Whether the switch was already authorized on boot or not
2d8ff0b5 151 * @rpm: The switch supports runtime PM
f67cf491 152 * @authorized: Whether the switch is authorized by user or policy
f67cf491 153 * @security_level: Switch supported security level
54e41810 154 * @debugfs_dir: Pointer to the debugfs structure
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155 * @key: Contains the key used to challenge the device or %NULL if not
156 * supported. Size of the key is %TB_SWITCH_KEY_SIZE.
157 * @connection_id: Connection ID used with ICM messaging
158 * @connection_key: Connection key used with ICM messaging
159 * @link: Root switch link this switch is connected (ICM only)
160 * @depth: Depth in the chain this switch is connected (ICM only)
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161 * @rpm_complete: Completion used to wait for runtime resume to
162 * complete (ICM only)
1cb36293 163 * @quirks: Quirks used for this Thunderbolt switch
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164 * @credit_allocation: Are the below buffer allocation parameters valid
165 * @max_usb3_credits: Router preferred number of buffers for USB 3.x
166 * @min_dp_aux_credits: Router preferred minimum number of buffers for DP AUX
167 * @min_dp_main_credits: Router preferred minimum number of buffers for DP MAIN
168 * @max_pcie_credits: Router preferred number of buffers for PCIe
169 * @max_dma_credits: Router preferred number of buffers for DMA/P2P
8a90e4fa 170 * @clx: CLx state on the upstream link of the router
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171 *
172 * When the switch is being added or removed to the domain (other
09f11b6c 173 * switches) you need to have domain lock held.
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174 *
175 * In USB4 terminology this structure represents a router.
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176 */
177struct tb_switch {
bfe778ac 178 struct device dev;
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179 struct tb_regs_switch_header config;
180 struct tb_port *ports;
3e136768 181 struct tb_dma_port *dma_port;
cf29b9af 182 struct tb_switch_tmu tmu;
a25c8b2f 183 struct tb *tb;
c90553b3 184 u64 uid;
7c39ffe7 185 uuid_t *uuid;
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186 u16 vendor;
187 u16 device;
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188 const char *vendor_name;
189 const char *device_name;
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190 unsigned int link_speed;
191 unsigned int link_width;
bbcf40b3 192 bool link_usb4;
2c3c4197 193 unsigned int generation;
bfe778ac 194 int cap_plug_events;
23ccd21c 195 int cap_vsec_tmu;
a9be5582 196 int cap_lc;
43f977bc 197 int cap_lp;
bfe778ac 198 bool is_unplugged;
cd22e73b 199 u8 *drom;
719a5fe8 200 struct tb_nvm *nvm;
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201 bool no_nvm_upgrade;
202 bool safe_mode;
14862ee3 203 bool boot;
2d8ff0b5 204 bool rpm;
f67cf491 205 unsigned int authorized;
f67cf491 206 enum tb_security_level security_level;
54e41810 207 struct dentry *debugfs_dir;
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208 u8 *key;
209 u8 connection_id;
210 u8 connection_key;
211 u8 link;
212 u8 depth;
4f7c2e0d 213 struct completion rpm_complete;
1cb36293 214 unsigned long quirks;
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215 bool credit_allocation;
216 unsigned int max_usb3_credits;
217 unsigned int min_dp_aux_credits;
218 unsigned int min_dp_main_credits;
219 unsigned int max_pcie_credits;
220 unsigned int max_dma_credits;
8a90e4fa 221 enum tb_clx clx;
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222};
223
224/**
225 * struct tb_port - a thunderbolt port, part of a tb_switch
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226 * @config: Cached port configuration read from registers
227 * @sw: Switch the port belongs to
228 * @remote: Remote port (%NULL if not connected)
229 * @xdomain: Remote host (%NULL if not connected)
230 * @cap_phy: Offset, zero if not found
cf29b9af 231 * @cap_tmu: Offset of the adapter specific TMU capability (%0 if not present)
56183c88 232 * @cap_adap: Offset of the adapter specific capability (%0 if not present)
b0407983 233 * @cap_usb4: Offset to the USB4 port capability (%0 if not present)
cae5f515 234 * @usb4: Pointer to the USB4 port structure (only if @cap_usb4 is != %0)
d1ff7024 235 * @port: Port number on switch
8824d19b 236 * @disabled: Disabled by eeprom or enabled but not implemented
91c0c120 237 * @bonded: true if the port is bonded (two lanes combined as one)
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238 * @dual_link_port: If the switch is connected using two ports, points
239 * to the other port.
240 * @link_nr: Is this primary or secondary port on the dual_link.
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241 * @in_hopids: Currently allocated input HopIDs
242 * @out_hopids: Currently allocated output HopIDs
8afe909b 243 * @list: Used to link ports to DP resources list
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244 * @total_credits: Total number of buffers available for this port
245 * @ctl_credits: Buffers reserved for control path
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246 * @dma_credits: Number of credits allocated for DMA tunneling for all
247 * DMA paths through this port.
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248 *
249 * In USB4 terminology this structure represents an adapter (protocol or
250 * lane adapter).
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251 */
252struct tb_port {
253 struct tb_regs_port_header config;
254 struct tb_switch *sw;
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255 struct tb_port *remote;
256 struct tb_xdomain *xdomain;
257 int cap_phy;
cf29b9af 258 int cap_tmu;
56183c88 259 int cap_adap;
b0407983 260 int cap_usb4;
cae5f515 261 struct usb4_port *usb4;
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262 u8 port;
263 bool disabled;
91c0c120 264 bool bonded;
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265 struct tb_port *dual_link_port;
266 u8 link_nr:1;
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267 struct ida in_hopids;
268 struct ida out_hopids;
8afe909b 269 struct list_head list;
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270 unsigned int total_credits;
271 unsigned int ctl_credits;
6ed541c5 272 unsigned int dma_credits;
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273};
274
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275/**
276 * struct usb4_port - USB4 port device
277 * @dev: Device for the port
278 * @port: Pointer to the lane 0 adapter
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279 * @can_offline: Does the port have necessary platform support to moved
280 * it into offline mode and back
3fb10ea4 281 * @offline: The port is currently in offline mode
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282 */
283struct usb4_port {
284 struct device dev;
285 struct tb_port *port;
ccc5cb8a 286 bool can_offline;
3fb10ea4 287 bool offline;
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288};
289
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290/**
291 * tb_retimer: Thunderbolt retimer
292 * @dev: Device for the retimer
293 * @tb: Pointer to the domain the retimer belongs to
294 * @index: Retimer index facing the router USB4 port
295 * @vendor: Vendor ID of the retimer
296 * @device: Device ID of the retimer
297 * @port: Pointer to the lane 0 adapter
298 * @nvm: Pointer to the NVM if the retimer has one (%NULL otherwise)
299 * @auth_status: Status of last NVM authentication
300 */
301struct tb_retimer {
302 struct device dev;
303 struct tb *tb;
304 u8 index;
305 u32 vendor;
306 u32 device;
307 struct tb_port *port;
308 struct tb_nvm *nvm;
309 u32 auth_status;
310};
311
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312/**
313 * struct tb_path_hop - routing information for a tb_path
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314 * @in_port: Ingress port of a switch
315 * @out_port: Egress port of a switch where the packet is routed out
316 * (must be on the same switch than @in_port)
317 * @in_hop_index: HopID where the path configuration entry is placed in
318 * the path config space of @in_port.
319 * @in_counter_index: Used counter index (not used in the driver
320 * currently, %-1 to disable)
321 * @next_hop_index: HopID of the packet when it is routed out from @out_port
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322 * @initial_credits: Number of initial flow control credits allocated for
323 * the path
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324 * @nfc_credits: Number of non-flow controlled buffers allocated for the
325 * @in_port.
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326 *
327 * Hop configuration is always done on the IN port of a switch.
328 * in_port and out_port have to be on the same switch. Packets arriving on
329 * in_port with "hop" = in_hop_index will get routed to through out_port. The
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330 * next hop to take (on out_port->remote) is determined by
331 * next_hop_index. When routing packet to another switch (out->remote is
332 * set) the @next_hop_index must match the @in_hop_index of that next
333 * hop to make routing possible.
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334 *
335 * in_counter_index is the index of a counter (in TB_CFG_COUNTERS) on the in
336 * port.
337 */
338struct tb_path_hop {
339 struct tb_port *in_port;
340 struct tb_port *out_port;
341 int in_hop_index;
8c7acaaf 342 int in_counter_index;
520b6702 343 int next_hop_index;
0414bec5 344 unsigned int initial_credits;
02c5e7c2 345 unsigned int nfc_credits;
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346};
347
348/**
349 * enum tb_path_port - path options mask
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350 * @TB_PATH_NONE: Do not activate on any hop on path
351 * @TB_PATH_SOURCE: Activate on the first hop (out of src)
352 * @TB_PATH_INTERNAL: Activate on the intermediate hops (not the first/last)
353 * @TB_PATH_DESTINATION: Activate on the last hop (into dst)
354 * @TB_PATH_ALL: Activate on all hops on the path
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355 */
356enum tb_path_port {
357 TB_PATH_NONE = 0,
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358 TB_PATH_SOURCE = 1,
359 TB_PATH_INTERNAL = 2,
360 TB_PATH_DESTINATION = 4,
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361 TB_PATH_ALL = 7,
362};
363
364/**
365 * struct tb_path - a unidirectional path between two ports
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366 * @tb: Pointer to the domain structure
367 * @name: Name of the path (used for debugging)
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368 * @ingress_shared_buffer: Shared buffering used for ingress ports on the path
369 * @egress_shared_buffer: Shared buffering used for egress ports on the path
370 * @ingress_fc_enable: Flow control for ingress ports on the path
371 * @egress_fc_enable: Flow control for egress ports on the path
372 * @priority: Priority group if the path
373 * @weight: Weight of the path inside the priority group
374 * @drop_packages: Drop packages from queue tail or head
375 * @activated: Is the path active
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376 * @clear_fc: Clear all flow control from the path config space entries
377 * when deactivating this path
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378 * @hops: Path hops
379 * @path_length: How many hops the path uses
43bddb26 380 * @alloc_hopid: Does this path consume port HopID
520b6702 381 *
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382 * A path consists of a number of hops (see &struct tb_path_hop). To
383 * establish a PCIe tunnel two paths have to be created between the two
384 * PCIe ports.
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385 */
386struct tb_path {
387 struct tb *tb;
8c7acaaf 388 const char *name;
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389 enum tb_path_port ingress_shared_buffer;
390 enum tb_path_port egress_shared_buffer;
391 enum tb_path_port ingress_fc_enable;
392 enum tb_path_port egress_fc_enable;
393
37209783 394 unsigned int priority:3;
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395 int weight:4;
396 bool drop_packages;
397 bool activated;
44242d6c 398 bool clear_fc;
520b6702 399 struct tb_path_hop *hops;
8c7acaaf 400 int path_length;
43bddb26 401 bool alloc_hopid;
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402};
403
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404/* HopIDs 0-7 are reserved by the Thunderbolt protocol */
405#define TB_PATH_MIN_HOPID 8
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406/*
407 * Support paths from the farthest (depth 6) router to the host and back
408 * to the same level (not necessarily to the same router).
409 */
410#define TB_PATH_MAX_HOPS (7 * 2)
0b2863ac 411
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412/* Possible wake types */
413#define TB_WAKE_ON_CONNECT BIT(0)
414#define TB_WAKE_ON_DISCONNECT BIT(1)
415#define TB_WAKE_ON_USB4 BIT(2)
416#define TB_WAKE_ON_USB3 BIT(3)
417#define TB_WAKE_ON_PCIE BIT(4)
6026b703 418#define TB_WAKE_ON_DP BIT(5)
b2911a59 419
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420/**
421 * struct tb_cm_ops - Connection manager specific operations vector
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422 * @driver_ready: Called right after control channel is started. Used by
423 * ICM to send driver ready message to the firmware.
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424 * @start: Starts the domain
425 * @stop: Stops the domain
426 * @suspend_noirq: Connection manager specific suspend_noirq
427 * @resume_noirq: Connection manager specific resume_noirq
f67cf491 428 * @suspend: Connection manager specific suspend
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429 * @freeze_noirq: Connection manager specific freeze_noirq
430 * @thaw_noirq: Connection manager specific thaw_noirq
f67cf491 431 * @complete: Connection manager specific complete
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432 * @runtime_suspend: Connection manager specific runtime_suspend
433 * @runtime_resume: Connection manager specific runtime_resume
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434 * @runtime_suspend_switch: Runtime suspend a switch
435 * @runtime_resume_switch: Runtime resume a switch
81a54b5e 436 * @handle_event: Handle thunderbolt event
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437 * @get_boot_acl: Get boot ACL list
438 * @set_boot_acl: Set boot ACL list
3da88be2 439 * @disapprove_switch: Disapprove switch (disconnect PCIe tunnel)
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440 * @approve_switch: Approve switch
441 * @add_switch_key: Add key to switch
442 * @challenge_switch_key: Challenge switch using key
e6b245cc 443 * @disconnect_pcie_paths: Disconnects PCIe paths before NVM update
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444 * @approve_xdomain_paths: Approve (establish) XDomain DMA paths
445 * @disconnect_xdomain_paths: Disconnect XDomain DMA paths
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446 * @usb4_switch_op: Optional proxy for USB4 router operations. If set
447 * this will be called whenever USB4 router operation is
448 * performed. If this returns %-EOPNOTSUPP then the
449 * native USB4 router operation is called.
450 * @usb4_switch_nvm_authenticate_status: Optional callback that the CM
451 * implementation can be used to
452 * return status of USB4 NVM_AUTH
453 * router operation.
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454 */
455struct tb_cm_ops {
f67cf491 456 int (*driver_ready)(struct tb *tb);
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457 int (*start)(struct tb *tb);
458 void (*stop)(struct tb *tb);
459 int (*suspend_noirq)(struct tb *tb);
460 int (*resume_noirq)(struct tb *tb);
f67cf491 461 int (*suspend)(struct tb *tb);
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462 int (*freeze_noirq)(struct tb *tb);
463 int (*thaw_noirq)(struct tb *tb);
f67cf491 464 void (*complete)(struct tb *tb);
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465 int (*runtime_suspend)(struct tb *tb);
466 int (*runtime_resume)(struct tb *tb);
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467 int (*runtime_suspend_switch)(struct tb_switch *sw);
468 int (*runtime_resume_switch)(struct tb_switch *sw);
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469 void (*handle_event)(struct tb *tb, enum tb_cfg_pkg_type,
470 const void *buf, size_t size);
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471 int (*get_boot_acl)(struct tb *tb, uuid_t *uuids, size_t nuuids);
472 int (*set_boot_acl)(struct tb *tb, const uuid_t *uuids, size_t nuuids);
3da88be2 473 int (*disapprove_switch)(struct tb *tb, struct tb_switch *sw);
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474 int (*approve_switch)(struct tb *tb, struct tb_switch *sw);
475 int (*add_switch_key)(struct tb *tb, struct tb_switch *sw);
476 int (*challenge_switch_key)(struct tb *tb, struct tb_switch *sw,
477 const u8 *challenge, u8 *response);
e6b245cc 478 int (*disconnect_pcie_paths)(struct tb *tb);
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479 int (*approve_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
480 int transmit_path, int transmit_ring,
481 int receive_path, int receive_ring);
482 int (*disconnect_xdomain_paths)(struct tb *tb, struct tb_xdomain *xd,
483 int transmit_path, int transmit_ring,
484 int receive_path, int receive_ring);
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485 int (*usb4_switch_op)(struct tb_switch *sw, u16 opcode, u32 *metadata,
486 u8 *status, const void *tx_data, size_t tx_data_len,
487 void *rx_data, size_t rx_data_len);
488 int (*usb4_switch_nvm_authenticate_status)(struct tb_switch *sw,
489 u32 *status);
9d3cce0b 490};
520b6702 491
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492static inline void *tb_priv(struct tb *tb)
493{
494 return (void *)tb->privdata;
495}
496
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497#define TB_AUTOSUSPEND_DELAY 15000 /* ms */
498
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499/* helper functions & macros */
500
501/**
502 * tb_upstream_port() - return the upstream port of a switch
503 *
504 * Every switch has an upstream port (for the root switch it is the NHI).
505 *
506 * During switch alloc/init tb_upstream_port()->remote may be NULL, even for
507 * non root switches (on the NHI port remote is always NULL).
508 *
509 * Return: Returns the upstream port of the switch.
510 */
511static inline struct tb_port *tb_upstream_port(struct tb_switch *sw)
512{
513 return &sw->ports[sw->config.upstream_port_number];
514}
515
dfe40ca4
MW
516/**
517 * tb_is_upstream_port() - Is the port upstream facing
518 * @port: Port to check
519 *
520 * Returns true if @port is upstream facing port. In case of dual link
521 * ports both return true.
522 */
523static inline bool tb_is_upstream_port(const struct tb_port *port)
524{
525 const struct tb_port *upstream_port = tb_upstream_port(port->sw);
526 return port == upstream_port || port->dual_link_port == upstream_port;
527}
528
b323a98f 529static inline u64 tb_route(const struct tb_switch *sw)
a25c8b2f
AN
530{
531 return ((u64) sw->config.route_hi) << 32 | sw->config.route_lo;
532}
533
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534static inline struct tb_port *tb_port_at(u64 route, struct tb_switch *sw)
535{
536 u8 port;
537
538 port = route >> (sw->config.depth * 8);
539 if (WARN_ON(port > sw->config.max_port_number))
540 return NULL;
541 return &sw->ports[port];
542}
543
dfe40ca4
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544/**
545 * tb_port_has_remote() - Does the port have switch connected downstream
546 * @port: Port to check
547 *
548 * Returns true only when the port is primary port and has remote set.
549 */
550static inline bool tb_port_has_remote(const struct tb_port *port)
551{
552 if (tb_is_upstream_port(port))
553 return false;
554 if (!port->remote)
555 return false;
556 if (port->dual_link_port && port->link_nr)
557 return false;
558
559 return true;
560}
561
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562static inline bool tb_port_is_null(const struct tb_port *port)
563{
564 return port && port->port && port->config.type == TB_TYPE_PORT;
565}
566
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567static inline bool tb_port_is_nhi(const struct tb_port *port)
568{
569 return port && port->config.type == TB_TYPE_NHI;
570}
571
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572static inline bool tb_port_is_pcie_down(const struct tb_port *port)
573{
574 return port && port->config.type == TB_TYPE_PCIE_DOWN;
575}
576
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577static inline bool tb_port_is_pcie_up(const struct tb_port *port)
578{
579 return port && port->config.type == TB_TYPE_PCIE_UP;
580}
581
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MW
582static inline bool tb_port_is_dpin(const struct tb_port *port)
583{
584 return port && port->config.type == TB_TYPE_DP_HDMI_IN;
585}
586
587static inline bool tb_port_is_dpout(const struct tb_port *port)
588{
589 return port && port->config.type == TB_TYPE_DP_HDMI_OUT;
590}
591
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592static inline bool tb_port_is_usb3_down(const struct tb_port *port)
593{
594 return port && port->config.type == TB_TYPE_USB3_DOWN;
595}
596
597static inline bool tb_port_is_usb3_up(const struct tb_port *port)
598{
599 return port && port->config.type == TB_TYPE_USB3_UP;
600}
601
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AN
602static inline int tb_sw_read(struct tb_switch *sw, void *buffer,
603 enum tb_cfg_space space, u32 offset, u32 length)
604{
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MW
605 if (sw->is_unplugged)
606 return -ENODEV;
a25c8b2f
AN
607 return tb_cfg_read(sw->tb->ctl,
608 buffer,
609 tb_route(sw),
610 0,
611 space,
612 offset,
613 length);
614}
615
826c6a17 616static inline int tb_sw_write(struct tb_switch *sw, const void *buffer,
a25c8b2f
AN
617 enum tb_cfg_space space, u32 offset, u32 length)
618{
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619 if (sw->is_unplugged)
620 return -ENODEV;
a25c8b2f
AN
621 return tb_cfg_write(sw->tb->ctl,
622 buffer,
623 tb_route(sw),
624 0,
625 space,
626 offset,
627 length);
628}
629
630static inline int tb_port_read(struct tb_port *port, void *buffer,
631 enum tb_cfg_space space, u32 offset, u32 length)
632{
4708384f
MW
633 if (port->sw->is_unplugged)
634 return -ENODEV;
a25c8b2f
AN
635 return tb_cfg_read(port->sw->tb->ctl,
636 buffer,
637 tb_route(port->sw),
638 port->port,
639 space,
640 offset,
641 length);
642}
643
16a1258a 644static inline int tb_port_write(struct tb_port *port, const void *buffer,
a25c8b2f
AN
645 enum tb_cfg_space space, u32 offset, u32 length)
646{
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MW
647 if (port->sw->is_unplugged)
648 return -ENODEV;
a25c8b2f
AN
649 return tb_cfg_write(port->sw->tb->ctl,
650 buffer,
651 tb_route(port->sw),
652 port->port,
653 space,
654 offset,
655 length);
656}
657
658#define tb_err(tb, fmt, arg...) dev_err(&(tb)->nhi->pdev->dev, fmt, ## arg)
659#define tb_WARN(tb, fmt, arg...) dev_WARN(&(tb)->nhi->pdev->dev, fmt, ## arg)
660#define tb_warn(tb, fmt, arg...) dev_warn(&(tb)->nhi->pdev->dev, fmt, ## arg)
661#define tb_info(tb, fmt, arg...) dev_info(&(tb)->nhi->pdev->dev, fmt, ## arg)
daa5140f 662#define tb_dbg(tb, fmt, arg...) dev_dbg(&(tb)->nhi->pdev->dev, fmt, ## arg)
a25c8b2f
AN
663
664#define __TB_SW_PRINT(level, sw, fmt, arg...) \
665 do { \
b323a98f 666 const struct tb_switch *__sw = (sw); \
a25c8b2f
AN
667 level(__sw->tb, "%llx: " fmt, \
668 tb_route(__sw), ## arg); \
669 } while (0)
670#define tb_sw_WARN(sw, fmt, arg...) __TB_SW_PRINT(tb_WARN, sw, fmt, ##arg)
671#define tb_sw_warn(sw, fmt, arg...) __TB_SW_PRINT(tb_warn, sw, fmt, ##arg)
672#define tb_sw_info(sw, fmt, arg...) __TB_SW_PRINT(tb_info, sw, fmt, ##arg)
daa5140f 673#define tb_sw_dbg(sw, fmt, arg...) __TB_SW_PRINT(tb_dbg, sw, fmt, ##arg)
a25c8b2f
AN
674
675#define __TB_PORT_PRINT(level, _port, fmt, arg...) \
676 do { \
b323a98f 677 const struct tb_port *__port = (_port); \
ebe99c0f 678 level(__port->sw->tb, "%llx:%u: " fmt, \
a25c8b2f
AN
679 tb_route(__port->sw), __port->port, ## arg); \
680 } while (0)
681#define tb_port_WARN(port, fmt, arg...) \
682 __TB_PORT_PRINT(tb_WARN, port, fmt, ##arg)
683#define tb_port_warn(port, fmt, arg...) \
684 __TB_PORT_PRINT(tb_warn, port, fmt, ##arg)
685#define tb_port_info(port, fmt, arg...) \
686 __TB_PORT_PRINT(tb_info, port, fmt, ##arg)
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687#define tb_port_dbg(port, fmt, arg...) \
688 __TB_PORT_PRINT(tb_dbg, port, fmt, ##arg)
a25c8b2f 689
f67cf491 690struct tb *icm_probe(struct tb_nhi *nhi);
9d3cce0b
MW
691struct tb *tb_probe(struct tb_nhi *nhi);
692
9d3cce0b 693extern struct device_type tb_domain_type;
dacb1287 694extern struct device_type tb_retimer_type;
bfe778ac 695extern struct device_type tb_switch_type;
cae5f515 696extern struct device_type usb4_port_device_type;
9d3cce0b
MW
697
698int tb_domain_init(void);
699void tb_domain_exit(void);
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700int tb_xdomain_init(void);
701void tb_xdomain_exit(void);
a25c8b2f 702
7f0a34d7 703struct tb *tb_domain_alloc(struct tb_nhi *nhi, int timeout_msec, size_t privsize);
9d3cce0b
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704int tb_domain_add(struct tb *tb);
705void tb_domain_remove(struct tb *tb);
706int tb_domain_suspend_noirq(struct tb *tb);
707int tb_domain_resume_noirq(struct tb *tb);
f67cf491 708int tb_domain_suspend(struct tb *tb);
884e4d57
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709int tb_domain_freeze_noirq(struct tb *tb);
710int tb_domain_thaw_noirq(struct tb *tb);
f67cf491 711void tb_domain_complete(struct tb *tb);
2d8ff0b5
MW
712int tb_domain_runtime_suspend(struct tb *tb);
713int tb_domain_runtime_resume(struct tb *tb);
3da88be2 714int tb_domain_disapprove_switch(struct tb *tb, struct tb_switch *sw);
f67cf491
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715int tb_domain_approve_switch(struct tb *tb, struct tb_switch *sw);
716int tb_domain_approve_switch_key(struct tb *tb, struct tb_switch *sw);
717int tb_domain_challenge_switch_key(struct tb *tb, struct tb_switch *sw);
e6b245cc 718int tb_domain_disconnect_pcie_paths(struct tb *tb);
180b0689
MW
719int tb_domain_approve_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
720 int transmit_path, int transmit_ring,
721 int receive_path, int receive_ring);
722int tb_domain_disconnect_xdomain_paths(struct tb *tb, struct tb_xdomain *xd,
723 int transmit_path, int transmit_ring,
724 int receive_path, int receive_ring);
d1ff7024 725int tb_domain_disconnect_all_paths(struct tb *tb);
9d3cce0b 726
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727static inline struct tb *tb_domain_get(struct tb *tb)
728{
729 if (tb)
730 get_device(&tb->dev);
731 return tb;
732}
733
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734static inline void tb_domain_put(struct tb *tb)
735{
736 put_device(&tb->dev);
737}
d6cc51cd 738
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MW
739struct tb_nvm *tb_nvm_alloc(struct device *dev);
740int tb_nvm_add_active(struct tb_nvm *nvm, size_t size, nvmem_reg_read_t reg_read);
741int tb_nvm_write_buf(struct tb_nvm *nvm, unsigned int offset, void *val,
742 size_t bytes);
743int tb_nvm_add_non_active(struct tb_nvm *nvm, size_t size,
744 nvmem_reg_write_t reg_write);
745void tb_nvm_free(struct tb_nvm *nvm);
746void tb_nvm_exit(void);
747
9b383037
MW
748typedef int (*read_block_fn)(void *, unsigned int, void *, size_t);
749typedef int (*write_block_fn)(void *, unsigned int, const void *, size_t);
750
751int tb_nvm_read_data(unsigned int address, void *buf, size_t size,
752 unsigned int retries, read_block_fn read_block,
753 void *read_block_data);
754int tb_nvm_write_data(unsigned int address, const void *buf, size_t size,
755 unsigned int retries, write_block_fn write_next_block,
756 void *write_block_data);
757
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758struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent,
759 u64 route);
e6b245cc
MW
760struct tb_switch *tb_switch_alloc_safe_mode(struct tb *tb,
761 struct device *parent, u64 route);
bfe778ac
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762int tb_switch_configure(struct tb_switch *sw);
763int tb_switch_add(struct tb_switch *sw);
764void tb_switch_remove(struct tb_switch *sw);
6ac6faee 765void tb_switch_suspend(struct tb_switch *sw, bool runtime);
23dd5bb4 766int tb_switch_resume(struct tb_switch *sw);
356b6c4e 767int tb_switch_reset(struct tb_switch *sw);
1639664f
GF
768int tb_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
769 u32 value, int timeout_msec);
aae20bb6 770void tb_sw_set_unplugged(struct tb_switch *sw);
386e5e29
MW
771struct tb_port *tb_switch_find_port(struct tb_switch *sw,
772 enum tb_port_type type);
f67cf491
MW
773struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link,
774 u8 depth);
7c39ffe7 775struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid);
8e9267bb 776struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route);
f67cf491 777
b433d010
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778/**
779 * tb_switch_for_each_port() - Iterate over each switch port
780 * @sw: Switch whose ports to iterate
781 * @p: Port used as iterator
782 *
783 * Iterates over each switch port skipping the control port (port %0).
784 */
785#define tb_switch_for_each_port(sw, p) \
786 for ((p) = &(sw)->ports[1]; \
787 (p) <= &(sw)->ports[(sw)->config.max_port_number]; (p)++)
788
b6b0ea70
MW
789static inline struct tb_switch *tb_switch_get(struct tb_switch *sw)
790{
791 if (sw)
792 get_device(&sw->dev);
793 return sw;
794}
795
bfe778ac
MW
796static inline void tb_switch_put(struct tb_switch *sw)
797{
798 put_device(&sw->dev);
799}
800
801static inline bool tb_is_switch(const struct device *dev)
802{
803 return dev->type == &tb_switch_type;
804}
805
806static inline struct tb_switch *tb_to_switch(struct device *dev)
807{
808 if (tb_is_switch(dev))
809 return container_of(dev, struct tb_switch, dev);
810 return NULL;
811}
812
0414bec5
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813static inline struct tb_switch *tb_switch_parent(struct tb_switch *sw)
814{
815 return tb_to_switch(sw->dev.parent);
816}
817
17a8f815 818static inline bool tb_switch_is_light_ridge(const struct tb_switch *sw)
8b0110d9 819{
35ee69e9
MW
820 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
821 sw->config.device_id == PCI_DEVICE_ID_INTEL_LIGHT_RIDGE;
8b0110d9
MW
822}
823
17a8f815 824static inline bool tb_switch_is_eagle_ridge(const struct tb_switch *sw)
8b0110d9 825{
35ee69e9
MW
826 return sw->config.vendor_id == PCI_VENDOR_ID_INTEL &&
827 sw->config.device_id == PCI_DEVICE_ID_INTEL_EAGLE_RIDGE;
8b0110d9
MW
828}
829
17a8f815 830static inline bool tb_switch_is_cactus_ridge(const struct tb_switch *sw)
99cabbb0 831{
35ee69e9
MW
832 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
833 switch (sw->config.device_id) {
834 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
835 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
836 return true;
837 }
99cabbb0 838 }
35ee69e9 839 return false;
99cabbb0
MW
840}
841
17a8f815 842static inline bool tb_switch_is_falcon_ridge(const struct tb_switch *sw)
99cabbb0 843{
35ee69e9
MW
844 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
845 switch (sw->config.device_id) {
846 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
847 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
848 return true;
849 }
99cabbb0 850 }
35ee69e9 851 return false;
99cabbb0
MW
852}
853
7bffd97e
MW
854static inline bool tb_switch_is_alpine_ridge(const struct tb_switch *sw)
855{
35ee69e9
MW
856 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
857 switch (sw->config.device_id) {
858 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
f1d5ec3e 859 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE:
35ee69e9
MW
860 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
861 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
862 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
863 return true;
864 }
7bffd97e 865 }
35ee69e9 866 return false;
7bffd97e
MW
867}
868
869static inline bool tb_switch_is_titan_ridge(const struct tb_switch *sw)
870{
35ee69e9
MW
871 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
872 switch (sw->config.device_id) {
873 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
874 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
875 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
876 return true;
877 }
7bffd97e 878 }
35ee69e9 879 return false;
7bffd97e
MW
880}
881
8a90e4fa
GF
882static inline bool tb_switch_is_tiger_lake(const struct tb_switch *sw)
883{
884 if (sw->config.vendor_id == PCI_VENDOR_ID_INTEL) {
885 switch (sw->config.device_id) {
886 case PCI_DEVICE_ID_INTEL_TGL_NHI0:
887 case PCI_DEVICE_ID_INTEL_TGL_NHI1:
888 case PCI_DEVICE_ID_INTEL_TGL_H_NHI0:
889 case PCI_DEVICE_ID_INTEL_TGL_H_NHI1:
890 return true;
891 }
892 }
893 return false;
894}
895
b0407983
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896/**
897 * tb_switch_is_usb4() - Is the switch USB4 compliant
898 * @sw: Switch to check
899 *
900 * Returns true if the @sw is USB4 compliant router, false otherwise.
901 */
902static inline bool tb_switch_is_usb4(const struct tb_switch *sw)
903{
904 return sw->config.thunderbolt_version == USB4_VERSION_1_0;
905}
906
f07a3608
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907/**
908 * tb_switch_is_icm() - Is the switch handled by ICM firmware
909 * @sw: Switch to check
910 *
911 * In case there is a need to differentiate whether ICM firmware or SW CM
912 * is handling @sw this function can be called. It is valid to call this
913 * after tb_switch_alloc() and tb_switch_configure() has been called
914 * (latter only for SW CM case).
915 */
916static inline bool tb_switch_is_icm(const struct tb_switch *sw)
917{
918 return !sw->config.enabled;
919}
920
91c0c120
MW
921int tb_switch_lane_bonding_enable(struct tb_switch *sw);
922void tb_switch_lane_bonding_disable(struct tb_switch *sw);
de462039
MW
923int tb_switch_configure_link(struct tb_switch *sw);
924void tb_switch_unconfigure_link(struct tb_switch *sw);
91c0c120 925
8afe909b
MW
926bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
927int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
928void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
929
cf29b9af
RM
930int tb_switch_tmu_init(struct tb_switch *sw);
931int tb_switch_tmu_post_time(struct tb_switch *sw);
932int tb_switch_tmu_disable(struct tb_switch *sw);
933int tb_switch_tmu_enable(struct tb_switch *sw);
a28ec0e1
GF
934void tb_switch_tmu_configure(struct tb_switch *sw,
935 enum tb_switch_tmu_rate rate,
936 bool unidirectional);
3084b48f
GF
937void tb_switch_enable_tmu_1st_child(struct tb_switch *sw,
938 enum tb_switch_tmu_rate rate);
a28ec0e1 939/**
b017a46d 940 * tb_switch_tmu_is_enabled() - Checks if the specified TMU mode is enabled
a28ec0e1
GF
941 * @sw: Router whose TMU mode to check
942 * @unidirectional: If uni-directional (bi-directional otherwise)
943 *
944 * Return true if hardware TMU configuration matches the one passed in
b017a46d 945 * as parameter. That is HiFi/Normal and either uni-directional or bi-directional.
a28ec0e1 946 */
b017a46d
GF
947static inline bool tb_switch_tmu_is_enabled(const struct tb_switch *sw,
948 bool unidirectional)
cf29b9af 949{
b017a46d 950 return sw->tmu.rate == sw->tmu.rate_request &&
a28ec0e1 951 sw->tmu.unidirectional == unidirectional;
cf29b9af
RM
952}
953
b017a46d
GF
954static inline const char *tb_switch_clx_name(enum tb_clx clx)
955{
956 switch (clx) {
957 /* CL0s and CL1 are enabled and supported together */
958 case TB_CL1:
959 return "CL0s/CL1";
960 default:
961 return "unknown";
962 }
963}
964
8a90e4fa
GF
965int tb_switch_enable_clx(struct tb_switch *sw, enum tb_clx clx);
966int tb_switch_disable_clx(struct tb_switch *sw, enum tb_clx clx);
967
968/**
969 * tb_switch_is_clx_enabled() - Checks if the CLx is enabled
b017a46d
GF
970 * @sw: Router to check for the CLx
971 * @clx: The CLx state to check for
8a90e4fa 972 *
b017a46d 973 * Checks if the specified CLx is enabled on the router upstream link.
8a90e4fa
GF
974 * Not applicable for a host router.
975 */
b017a46d
GF
976static inline bool tb_switch_is_clx_enabled(const struct tb_switch *sw,
977 enum tb_clx clx)
8a90e4fa 978{
b017a46d 979 return sw->clx == clx;
8a90e4fa
GF
980}
981
43f977bc
GF
982/**
983 * tb_switch_is_clx_supported() - Is CLx supported on this type of router
984 * @sw: The router to check CLx support for
985 */
986static inline bool tb_switch_is_clx_supported(const struct tb_switch *sw)
987{
988 return tb_switch_is_usb4(sw) || tb_switch_is_titan_ridge(sw);
989}
990
991int tb_switch_mask_clx_objections(struct tb_switch *sw);
992
993int tb_switch_pcie_l1_enable(struct tb_switch *sw);
994
30a4eca6
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995int tb_switch_xhci_connect(struct tb_switch *sw);
996void tb_switch_xhci_disconnect(struct tb_switch *sw);
997
94581b25 998int tb_port_state(struct tb_port *port);
9da672a4 999int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged);
520b6702
AN
1000int tb_port_add_nfc_credits(struct tb_port *port, int credits);
1001int tb_port_clear_counter(struct tb_port *port, int counter);
b0407983 1002int tb_port_unlock(struct tb_port *port);
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MW
1003int tb_port_enable(struct tb_port *port);
1004int tb_port_disable(struct tb_port *port);
0b2863ac
MW
1005int tb_port_alloc_in_hopid(struct tb_port *port, int hopid, int max_hopid);
1006void tb_port_release_in_hopid(struct tb_port *port, int hopid);
1007int tb_port_alloc_out_hopid(struct tb_port *port, int hopid, int max_hopid);
1008void tb_port_release_out_hopid(struct tb_port *port, int hopid);
fb19fac1
MW
1009struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end,
1010 struct tb_port *prev);
9da672a4 1011
56ad3aef
MW
1012static inline bool tb_port_use_credit_allocation(const struct tb_port *port)
1013{
1014 return tb_port_is_null(port) && port->sw->credit_allocation;
1015}
1016
c64c3f3a
MW
1017/**
1018 * tb_for_each_port_on_path() - Iterate over each port on path
1019 * @src: Source port
1020 * @dst: Destination port
1021 * @p: Port used as iterator
1022 *
1023 * Walks over each port on path from @src to @dst.
1024 */
1025#define tb_for_each_port_on_path(src, dst, p) \
1026 for ((p) = tb_next_port_on_path((src), (dst), NULL); (p); \
1027 (p) = tb_next_port_on_path((src), (dst), (p)))
1028
5b7b8c0a 1029int tb_port_get_link_speed(struct tb_port *port);
4210d50f 1030int tb_port_get_link_width(struct tb_port *port);
0e14dd5e
MW
1031int tb_port_set_link_width(struct tb_port *port, unsigned int width);
1032int tb_port_set_lane_bonding(struct tb_port *port, bool bonding);
5cc0df9c
IH
1033int tb_port_lane_bonding_enable(struct tb_port *port);
1034void tb_port_lane_bonding_disable(struct tb_port *port);
e7051bea
MW
1035int tb_port_wait_for_link_width(struct tb_port *port, int width,
1036 int timeout_msec);
69fea377 1037int tb_port_update_credits(struct tb_port *port);
5b7b8c0a 1038
da2da04b 1039int tb_switch_find_vse_cap(struct tb_switch *sw, enum tb_switch_vse_cap vsec);
aa43a9dc 1040int tb_switch_find_cap(struct tb_switch *sw, enum tb_switch_cap cap);
6de057ef 1041int tb_switch_next_cap(struct tb_switch *sw, unsigned int offset);
da2da04b 1042int tb_port_find_cap(struct tb_port *port, enum tb_port_cap cap);
3c8b228d 1043int tb_port_next_cap(struct tb_port *port, unsigned int offset);
e78db6f0 1044bool tb_port_is_enabled(struct tb_port *port);
e2b8785e 1045
e6f81858
RM
1046bool tb_usb3_port_is_enabled(struct tb_port *port);
1047int tb_usb3_port_enable(struct tb_port *port, bool enable);
1048
0414bec5 1049bool tb_pci_port_is_enabled(struct tb_port *port);
93f36ade
MW
1050int tb_pci_port_enable(struct tb_port *port, bool enable);
1051
4f807e47
MW
1052int tb_dp_port_hpd_is_active(struct tb_port *port);
1053int tb_dp_port_hpd_clear(struct tb_port *port);
1054int tb_dp_port_set_hops(struct tb_port *port, unsigned int video,
1055 unsigned int aux_tx, unsigned int aux_rx);
1056bool tb_dp_port_is_enabled(struct tb_port *port);
1057int tb_dp_port_enable(struct tb_port *port, bool enable);
1058
0414bec5
MW
1059struct tb_path *tb_path_discover(struct tb_port *src, int src_hopid,
1060 struct tb_port *dst, int dst_hopid,
43bddb26
MW
1061 struct tb_port **last, const char *name,
1062 bool alloc_hopid);
8c7acaaf
MW
1063struct tb_path *tb_path_alloc(struct tb *tb, struct tb_port *src, int src_hopid,
1064 struct tb_port *dst, int dst_hopid, int link_nr,
1065 const char *name);
520b6702
AN
1066void tb_path_free(struct tb_path *path);
1067int tb_path_activate(struct tb_path *path);
1068void tb_path_deactivate(struct tb_path *path);
1069bool tb_path_is_invalid(struct tb_path *path);
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MW
1070bool tb_path_port_on_path(const struct tb_path *path,
1071 const struct tb_port *port);
520b6702 1072
6ed541c5
MW
1073/**
1074 * tb_path_for_each_hop() - Iterate over each hop on path
1075 * @path: Path whose hops to iterate
1076 * @hop: Hop used as iterator
1077 *
1078 * Iterates over each hop on path.
1079 */
1080#define tb_path_for_each_hop(path, hop) \
1081 for ((hop) = &(path)->hops[0]; \
1082 (hop) <= &(path)->hops[(path)->path_length - 1]; (hop)++)
1083
cd22e73b
AN
1084int tb_drom_read(struct tb_switch *sw);
1085int tb_drom_read_uid_only(struct tb_switch *sw, u64 *uid);
c90553b3 1086
a9be5582 1087int tb_lc_read_uuid(struct tb_switch *sw, u32 *uuid);
e28178bf
MW
1088int tb_lc_configure_port(struct tb_port *port);
1089void tb_lc_unconfigure_port(struct tb_port *port);
284652a4
MW
1090int tb_lc_configure_xdomain(struct tb_port *port);
1091void tb_lc_unconfigure_xdomain(struct tb_port *port);
fdb0887c 1092int tb_lc_start_lane_initialization(struct tb_port *port);
43f977bc 1093bool tb_lc_is_clx_supported(struct tb_port *port);
30a4eca6
MW
1094bool tb_lc_is_usb_plugged(struct tb_port *port);
1095bool tb_lc_is_xhci_connected(struct tb_port *port);
1096int tb_lc_xhci_connect(struct tb_port *port);
1097void tb_lc_xhci_disconnect(struct tb_port *port);
b2911a59 1098int tb_lc_set_wake(struct tb_switch *sw, unsigned int flags);
5480dfc2 1099int tb_lc_set_sleep(struct tb_switch *sw);
91c0c120 1100bool tb_lc_lane_bonding_possible(struct tb_switch *sw);
8afe909b
MW
1101bool tb_lc_dp_sink_query(struct tb_switch *sw, struct tb_port *in);
1102int tb_lc_dp_sink_alloc(struct tb_switch *sw, struct tb_port *in);
1103int tb_lc_dp_sink_dealloc(struct tb_switch *sw, struct tb_port *in);
1cb36293 1104int tb_lc_force_power(struct tb_switch *sw);
a25c8b2f
AN
1105
1106static inline int tb_route_length(u64 route)
1107{
1108 return (fls64(route) + TB_ROUTE_SHIFT - 1) / TB_ROUTE_SHIFT;
1109}
1110
9da672a4
AN
1111/**
1112 * tb_downstream_route() - get route to downstream switch
1113 *
1114 * Port must not be the upstream port (otherwise a loop is created).
1115 *
1116 * Return: Returns a route to the switch behind @port.
1117 */
1118static inline u64 tb_downstream_route(struct tb_port *port)
1119{
1120 return tb_route(port->sw)
1121 | ((u64) port->port << (port->sw->config.depth * 8));
1122}
1123
5ca67688 1124bool tb_is_xdomain_enabled(void);
d1ff7024
MW
1125bool tb_xdomain_handle_request(struct tb *tb, enum tb_cfg_pkg_type type,
1126 const void *buf, size_t size);
1127struct tb_xdomain *tb_xdomain_alloc(struct tb *tb, struct device *parent,
1128 u64 route, const uuid_t *local_uuid,
1129 const uuid_t *remote_uuid);
1130void tb_xdomain_add(struct tb_xdomain *xd);
1131void tb_xdomain_remove(struct tb_xdomain *xd);
1132struct tb_xdomain *tb_xdomain_find_by_link_depth(struct tb *tb, u8 link,
1133 u8 depth);
1134
3fb10ea4 1135int tb_retimer_scan(struct tb_port *port, bool add);
dacb1287
KK
1136void tb_retimer_remove_all(struct tb_port *port);
1137
1138static inline bool tb_is_retimer(const struct device *dev)
1139{
1140 return dev->type == &tb_retimer_type;
1141}
1142
1143static inline struct tb_retimer *tb_to_retimer(struct device *dev)
1144{
1145 if (tb_is_retimer(dev))
1146 return container_of(dev, struct tb_retimer, dev);
1147 return NULL;
1148}
1149
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MW
1150int usb4_switch_setup(struct tb_switch *sw);
1151int usb4_switch_read_uid(struct tb_switch *sw, u64 *uid);
1152int usb4_switch_drom_read(struct tb_switch *sw, unsigned int address, void *buf,
1153 size_t size);
b0407983 1154bool usb4_switch_lane_bonding_possible(struct tb_switch *sw);
b2911a59 1155int usb4_switch_set_wake(struct tb_switch *sw, unsigned int flags);
b0407983
MW
1156int usb4_switch_set_sleep(struct tb_switch *sw);
1157int usb4_switch_nvm_sector_size(struct tb_switch *sw);
1158int usb4_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
1159 size_t size);
1cbf680f 1160int usb4_switch_nvm_set_offset(struct tb_switch *sw, unsigned int address);
b0407983
MW
1161int usb4_switch_nvm_write(struct tb_switch *sw, unsigned int address,
1162 const void *buf, size_t size);
1163int usb4_switch_nvm_authenticate(struct tb_switch *sw);
661b1947 1164int usb4_switch_nvm_authenticate_status(struct tb_switch *sw, u32 *status);
56ad3aef 1165int usb4_switch_credits_init(struct tb_switch *sw);
b0407983
MW
1166bool usb4_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in);
1167int usb4_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1168int usb4_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in);
1169struct tb_port *usb4_switch_map_pcie_down(struct tb_switch *sw,
1170 const struct tb_port *port);
e6f81858
RM
1171struct tb_port *usb4_switch_map_usb3_down(struct tb_switch *sw,
1172 const struct tb_port *port);
cae5f515
MW
1173int usb4_switch_add_ports(struct tb_switch *sw);
1174void usb4_switch_remove_ports(struct tb_switch *sw);
b0407983
MW
1175
1176int usb4_port_unlock(struct tb_port *port);
e28178bf
MW
1177int usb4_port_configure(struct tb_port *port);
1178void usb4_port_unconfigure(struct tb_port *port);
284652a4
MW
1179int usb4_port_configure_xdomain(struct tb_port *port);
1180void usb4_port_unconfigure_xdomain(struct tb_port *port);
3406de7c
RM
1181int usb4_port_router_offline(struct tb_port *port);
1182int usb4_port_router_online(struct tb_port *port);
02d12855 1183int usb4_port_enumerate_retimers(struct tb_port *port);
8a90e4fa 1184bool usb4_port_clx_supported(struct tb_port *port);
02d12855 1185
3406de7c 1186int usb4_port_retimer_set_inbound_sbtx(struct tb_port *port, u8 index);
02d12855
RM
1187int usb4_port_retimer_read(struct tb_port *port, u8 index, u8 reg, void *buf,
1188 u8 size);
1189int usb4_port_retimer_write(struct tb_port *port, u8 index, u8 reg,
1190 const void *buf, u8 size);
1191int usb4_port_retimer_is_last(struct tb_port *port, u8 index);
1192int usb4_port_retimer_nvm_sector_size(struct tb_port *port, u8 index);
faa1c615
RM
1193int usb4_port_retimer_nvm_set_offset(struct tb_port *port, u8 index,
1194 unsigned int address);
02d12855
RM
1195int usb4_port_retimer_nvm_write(struct tb_port *port, u8 index,
1196 unsigned int address, const void *buf,
1197 size_t size);
1198int usb4_port_retimer_nvm_authenticate(struct tb_port *port, u8 index);
1199int usb4_port_retimer_nvm_authenticate_status(struct tb_port *port, u8 index,
1200 u32 *status);
1201int usb4_port_retimer_nvm_read(struct tb_port *port, u8 index,
1202 unsigned int address, void *buf, size_t size);
3b1d8d57
MW
1203
1204int usb4_usb3_port_max_link_rate(struct tb_port *port);
1205int usb4_usb3_port_actual_link_rate(struct tb_port *port);
1206int usb4_usb3_port_allocated_bandwidth(struct tb_port *port, int *upstream_bw,
1207 int *downstream_bw);
1208int usb4_usb3_port_allocate_bandwidth(struct tb_port *port, int *upstream_bw,
1209 int *downstream_bw);
1210int usb4_usb3_port_release_bandwidth(struct tb_port *port, int *upstream_bw,
1211 int *downstream_bw);
1cb36293 1212
cae5f515
MW
1213static inline bool tb_is_usb4_port_device(const struct device *dev)
1214{
1215 return dev->type == &usb4_port_device_type;
1216}
1217
1218static inline struct usb4_port *tb_to_usb4_port_device(struct device *dev)
1219{
1220 if (tb_is_usb4_port_device(dev))
1221 return container_of(dev, struct usb4_port, dev);
1222 return NULL;
1223}
1224
1225struct usb4_port *usb4_port_device_add(struct tb_port *port);
1226void usb4_port_device_remove(struct usb4_port *usb4);
3fb10ea4 1227int usb4_port_device_resume(struct usb4_port *usb4);
cae5f515 1228
810278da 1229/* Keep link controller awake during update */
1cb36293
ML
1230#define QUIRK_FORCE_POWER_LINK_CONTROLLER BIT(0)
1231
1232void tb_check_quirks(struct tb_switch *sw);
1233
b2be2b05
MW
1234#ifdef CONFIG_ACPI
1235void tb_acpi_add_links(struct tb_nhi *nhi);
c6da62a2
MW
1236
1237bool tb_acpi_is_native(void);
1238bool tb_acpi_may_tunnel_usb3(void);
1239bool tb_acpi_may_tunnel_dp(void);
1240bool tb_acpi_may_tunnel_pcie(void);
1241bool tb_acpi_is_xdomain_allowed(void);
ccc5cb8a
RM
1242
1243int tb_acpi_init(void);
1244void tb_acpi_exit(void);
1245int tb_acpi_power_on_retimers(struct tb_port *port);
1246int tb_acpi_power_off_retimers(struct tb_port *port);
b2be2b05
MW
1247#else
1248static inline void tb_acpi_add_links(struct tb_nhi *nhi) { }
c6da62a2
MW
1249
1250static inline bool tb_acpi_is_native(void) { return true; }
1251static inline bool tb_acpi_may_tunnel_usb3(void) { return true; }
1252static inline bool tb_acpi_may_tunnel_dp(void) { return true; }
1253static inline bool tb_acpi_may_tunnel_pcie(void) { return true; }
1254static inline bool tb_acpi_is_xdomain_allowed(void) { return true; }
ccc5cb8a
RM
1255
1256static inline int tb_acpi_init(void) { return 0; }
1257static inline void tb_acpi_exit(void) { }
1258static inline int tb_acpi_power_on_retimers(struct tb_port *port) { return 0; }
1259static inline int tb_acpi_power_off_retimers(struct tb_port *port) { return 0; }
b2be2b05
MW
1260#endif
1261
54e41810
GF
1262#ifdef CONFIG_DEBUG_FS
1263void tb_debugfs_init(void);
1264void tb_debugfs_exit(void);
1265void tb_switch_debugfs_init(struct tb_switch *sw);
1266void tb_switch_debugfs_remove(struct tb_switch *sw);
407ac931
MW
1267void tb_service_debugfs_init(struct tb_service *svc);
1268void tb_service_debugfs_remove(struct tb_service *svc);
54e41810
GF
1269#else
1270static inline void tb_debugfs_init(void) { }
1271static inline void tb_debugfs_exit(void) { }
1272static inline void tb_switch_debugfs_init(struct tb_switch *sw) { }
1273static inline void tb_switch_debugfs_remove(struct tb_switch *sw) { }
407ac931
MW
1274static inline void tb_service_debugfs_init(struct tb_service *svc) { }
1275static inline void tb_service_debugfs_remove(struct tb_service *svc) { }
54e41810
GF
1276#endif
1277
d6cc51cd 1278#endif