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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
a25c8b2f | 2 | /* |
15c6784c | 3 | * Thunderbolt driver - switch/port utility functions |
a25c8b2f AN |
4 | * |
5 | * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> | |
15c6784c | 6 | * Copyright (C) 2018, Intel Corporation |
a25c8b2f AN |
7 | */ |
8 | ||
9 | #include <linux/delay.h> | |
e6b245cc MW |
10 | #include <linux/idr.h> |
11 | #include <linux/nvmem-provider.h> | |
2d8ff0b5 | 12 | #include <linux/pm_runtime.h> |
09f11b6c | 13 | #include <linux/sched/signal.h> |
e6b245cc | 14 | #include <linux/sizes.h> |
10fefe56 | 15 | #include <linux/slab.h> |
e6b245cc | 16 | #include <linux/vmalloc.h> |
a25c8b2f AN |
17 | |
18 | #include "tb.h" | |
19 | ||
e6b245cc MW |
20 | /* Switch NVM support */ |
21 | ||
22 | #define NVM_DEVID 0x05 | |
23 | #define NVM_VERSION 0x08 | |
24 | #define NVM_CSS 0x10 | |
25 | #define NVM_FLASH_SIZE 0x45 | |
26 | ||
27 | #define NVM_MIN_SIZE SZ_32K | |
28 | #define NVM_MAX_SIZE SZ_512K | |
29 | ||
30 | static DEFINE_IDA(nvm_ida); | |
31 | ||
32 | struct nvm_auth_status { | |
33 | struct list_head list; | |
7c39ffe7 | 34 | uuid_t uuid; |
e6b245cc MW |
35 | u32 status; |
36 | }; | |
37 | ||
38 | /* | |
39 | * Hold NVM authentication failure status per switch This information | |
40 | * needs to stay around even when the switch gets power cycled so we | |
41 | * keep it separately. | |
42 | */ | |
43 | static LIST_HEAD(nvm_auth_status_cache); | |
44 | static DEFINE_MUTEX(nvm_auth_status_lock); | |
45 | ||
46 | static struct nvm_auth_status *__nvm_get_auth_status(const struct tb_switch *sw) | |
47 | { | |
48 | struct nvm_auth_status *st; | |
49 | ||
50 | list_for_each_entry(st, &nvm_auth_status_cache, list) { | |
7c39ffe7 | 51 | if (uuid_equal(&st->uuid, sw->uuid)) |
e6b245cc MW |
52 | return st; |
53 | } | |
54 | ||
55 | return NULL; | |
56 | } | |
57 | ||
58 | static void nvm_get_auth_status(const struct tb_switch *sw, u32 *status) | |
59 | { | |
60 | struct nvm_auth_status *st; | |
61 | ||
62 | mutex_lock(&nvm_auth_status_lock); | |
63 | st = __nvm_get_auth_status(sw); | |
64 | mutex_unlock(&nvm_auth_status_lock); | |
65 | ||
66 | *status = st ? st->status : 0; | |
67 | } | |
68 | ||
69 | static void nvm_set_auth_status(const struct tb_switch *sw, u32 status) | |
70 | { | |
71 | struct nvm_auth_status *st; | |
72 | ||
73 | if (WARN_ON(!sw->uuid)) | |
74 | return; | |
75 | ||
76 | mutex_lock(&nvm_auth_status_lock); | |
77 | st = __nvm_get_auth_status(sw); | |
78 | ||
79 | if (!st) { | |
80 | st = kzalloc(sizeof(*st), GFP_KERNEL); | |
81 | if (!st) | |
82 | goto unlock; | |
83 | ||
84 | memcpy(&st->uuid, sw->uuid, sizeof(st->uuid)); | |
85 | INIT_LIST_HEAD(&st->list); | |
86 | list_add_tail(&st->list, &nvm_auth_status_cache); | |
87 | } | |
88 | ||
89 | st->status = status; | |
90 | unlock: | |
91 | mutex_unlock(&nvm_auth_status_lock); | |
92 | } | |
93 | ||
94 | static void nvm_clear_auth_status(const struct tb_switch *sw) | |
95 | { | |
96 | struct nvm_auth_status *st; | |
97 | ||
98 | mutex_lock(&nvm_auth_status_lock); | |
99 | st = __nvm_get_auth_status(sw); | |
100 | if (st) { | |
101 | list_del(&st->list); | |
102 | kfree(st); | |
103 | } | |
104 | mutex_unlock(&nvm_auth_status_lock); | |
105 | } | |
106 | ||
107 | static int nvm_validate_and_write(struct tb_switch *sw) | |
108 | { | |
109 | unsigned int image_size, hdr_size; | |
110 | const u8 *buf = sw->nvm->buf; | |
111 | u16 ds_size; | |
112 | int ret; | |
113 | ||
114 | if (!buf) | |
115 | return -EINVAL; | |
116 | ||
117 | image_size = sw->nvm->buf_data_size; | |
118 | if (image_size < NVM_MIN_SIZE || image_size > NVM_MAX_SIZE) | |
119 | return -EINVAL; | |
120 | ||
121 | /* | |
122 | * FARB pointer must point inside the image and must at least | |
123 | * contain parts of the digital section we will be reading here. | |
124 | */ | |
125 | hdr_size = (*(u32 *)buf) & 0xffffff; | |
126 | if (hdr_size + NVM_DEVID + 2 >= image_size) | |
127 | return -EINVAL; | |
128 | ||
129 | /* Digital section start should be aligned to 4k page */ | |
130 | if (!IS_ALIGNED(hdr_size, SZ_4K)) | |
131 | return -EINVAL; | |
132 | ||
133 | /* | |
134 | * Read digital section size and check that it also fits inside | |
135 | * the image. | |
136 | */ | |
137 | ds_size = *(u16 *)(buf + hdr_size); | |
138 | if (ds_size >= image_size) | |
139 | return -EINVAL; | |
140 | ||
141 | if (!sw->safe_mode) { | |
142 | u16 device_id; | |
143 | ||
144 | /* | |
145 | * Make sure the device ID in the image matches the one | |
146 | * we read from the switch config space. | |
147 | */ | |
148 | device_id = *(u16 *)(buf + hdr_size + NVM_DEVID); | |
149 | if (device_id != sw->config.device_id) | |
150 | return -EINVAL; | |
151 | ||
152 | if (sw->generation < 3) { | |
153 | /* Write CSS headers first */ | |
154 | ret = dma_port_flash_write(sw->dma_port, | |
155 | DMA_PORT_CSS_ADDRESS, buf + NVM_CSS, | |
156 | DMA_PORT_CSS_MAX_SIZE); | |
157 | if (ret) | |
158 | return ret; | |
159 | } | |
160 | ||
161 | /* Skip headers in the image */ | |
162 | buf += hdr_size; | |
163 | image_size -= hdr_size; | |
164 | } | |
165 | ||
166 | return dma_port_flash_write(sw->dma_port, 0, buf, image_size); | |
167 | } | |
168 | ||
169 | static int nvm_authenticate_host(struct tb_switch *sw) | |
170 | { | |
171 | int ret; | |
172 | ||
173 | /* | |
174 | * Root switch NVM upgrade requires that we disconnect the | |
d1ff7024 | 175 | * existing paths first (in case it is not in safe mode |
e6b245cc MW |
176 | * already). |
177 | */ | |
178 | if (!sw->safe_mode) { | |
d1ff7024 | 179 | ret = tb_domain_disconnect_all_paths(sw->tb); |
e6b245cc MW |
180 | if (ret) |
181 | return ret; | |
182 | /* | |
183 | * The host controller goes away pretty soon after this if | |
184 | * everything goes well so getting timeout is expected. | |
185 | */ | |
186 | ret = dma_port_flash_update_auth(sw->dma_port); | |
187 | return ret == -ETIMEDOUT ? 0 : ret; | |
188 | } | |
189 | ||
190 | /* | |
191 | * From safe mode we can get out by just power cycling the | |
192 | * switch. | |
193 | */ | |
194 | dma_port_power_cycle(sw->dma_port); | |
195 | return 0; | |
196 | } | |
197 | ||
198 | static int nvm_authenticate_device(struct tb_switch *sw) | |
199 | { | |
200 | int ret, retries = 10; | |
201 | ||
202 | ret = dma_port_flash_update_auth(sw->dma_port); | |
203 | if (ret && ret != -ETIMEDOUT) | |
204 | return ret; | |
205 | ||
206 | /* | |
207 | * Poll here for the authentication status. It takes some time | |
208 | * for the device to respond (we get timeout for a while). Once | |
209 | * we get response the device needs to be power cycled in order | |
210 | * to the new NVM to be taken into use. | |
211 | */ | |
212 | do { | |
213 | u32 status; | |
214 | ||
215 | ret = dma_port_flash_update_auth_status(sw->dma_port, &status); | |
216 | if (ret < 0 && ret != -ETIMEDOUT) | |
217 | return ret; | |
218 | if (ret > 0) { | |
219 | if (status) { | |
220 | tb_sw_warn(sw, "failed to authenticate NVM\n"); | |
221 | nvm_set_auth_status(sw, status); | |
222 | } | |
223 | ||
224 | tb_sw_info(sw, "power cycling the switch now\n"); | |
225 | dma_port_power_cycle(sw->dma_port); | |
226 | return 0; | |
227 | } | |
228 | ||
229 | msleep(500); | |
230 | } while (--retries); | |
231 | ||
232 | return -ETIMEDOUT; | |
233 | } | |
234 | ||
235 | static int tb_switch_nvm_read(void *priv, unsigned int offset, void *val, | |
236 | size_t bytes) | |
237 | { | |
238 | struct tb_switch *sw = priv; | |
2d8ff0b5 MW |
239 | int ret; |
240 | ||
241 | pm_runtime_get_sync(&sw->dev); | |
4f7c2e0d MW |
242 | |
243 | if (!mutex_trylock(&sw->tb->lock)) { | |
244 | ret = restart_syscall(); | |
245 | goto out; | |
246 | } | |
247 | ||
2d8ff0b5 | 248 | ret = dma_port_flash_read(sw->dma_port, offset, val, bytes); |
4f7c2e0d MW |
249 | mutex_unlock(&sw->tb->lock); |
250 | ||
251 | out: | |
2d8ff0b5 MW |
252 | pm_runtime_mark_last_busy(&sw->dev); |
253 | pm_runtime_put_autosuspend(&sw->dev); | |
e6b245cc | 254 | |
2d8ff0b5 | 255 | return ret; |
e6b245cc MW |
256 | } |
257 | ||
258 | static int tb_switch_nvm_write(void *priv, unsigned int offset, void *val, | |
259 | size_t bytes) | |
260 | { | |
261 | struct tb_switch *sw = priv; | |
262 | int ret = 0; | |
263 | ||
09f11b6c MW |
264 | if (!mutex_trylock(&sw->tb->lock)) |
265 | return restart_syscall(); | |
e6b245cc MW |
266 | |
267 | /* | |
268 | * Since writing the NVM image might require some special steps, | |
269 | * for example when CSS headers are written, we cache the image | |
270 | * locally here and handle the special cases when the user asks | |
271 | * us to authenticate the image. | |
272 | */ | |
273 | if (!sw->nvm->buf) { | |
274 | sw->nvm->buf = vmalloc(NVM_MAX_SIZE); | |
275 | if (!sw->nvm->buf) { | |
276 | ret = -ENOMEM; | |
277 | goto unlock; | |
278 | } | |
279 | } | |
280 | ||
281 | sw->nvm->buf_data_size = offset + bytes; | |
282 | memcpy(sw->nvm->buf + offset, val, bytes); | |
283 | ||
284 | unlock: | |
09f11b6c | 285 | mutex_unlock(&sw->tb->lock); |
e6b245cc MW |
286 | |
287 | return ret; | |
288 | } | |
289 | ||
290 | static struct nvmem_device *register_nvmem(struct tb_switch *sw, int id, | |
291 | size_t size, bool active) | |
292 | { | |
293 | struct nvmem_config config; | |
294 | ||
295 | memset(&config, 0, sizeof(config)); | |
296 | ||
297 | if (active) { | |
298 | config.name = "nvm_active"; | |
299 | config.reg_read = tb_switch_nvm_read; | |
800161bd | 300 | config.read_only = true; |
e6b245cc MW |
301 | } else { |
302 | config.name = "nvm_non_active"; | |
303 | config.reg_write = tb_switch_nvm_write; | |
800161bd | 304 | config.root_only = true; |
e6b245cc MW |
305 | } |
306 | ||
307 | config.id = id; | |
308 | config.stride = 4; | |
309 | config.word_size = 4; | |
310 | config.size = size; | |
311 | config.dev = &sw->dev; | |
312 | config.owner = THIS_MODULE; | |
e6b245cc MW |
313 | config.priv = sw; |
314 | ||
315 | return nvmem_register(&config); | |
316 | } | |
317 | ||
318 | static int tb_switch_nvm_add(struct tb_switch *sw) | |
319 | { | |
320 | struct nvmem_device *nvm_dev; | |
321 | struct tb_switch_nvm *nvm; | |
322 | u32 val; | |
323 | int ret; | |
324 | ||
325 | if (!sw->dma_port) | |
326 | return 0; | |
327 | ||
328 | nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); | |
329 | if (!nvm) | |
330 | return -ENOMEM; | |
331 | ||
332 | nvm->id = ida_simple_get(&nvm_ida, 0, 0, GFP_KERNEL); | |
333 | ||
334 | /* | |
335 | * If the switch is in safe-mode the only accessible portion of | |
336 | * the NVM is the non-active one where userspace is expected to | |
337 | * write new functional NVM. | |
338 | */ | |
339 | if (!sw->safe_mode) { | |
340 | u32 nvm_size, hdr_size; | |
341 | ||
342 | ret = dma_port_flash_read(sw->dma_port, NVM_FLASH_SIZE, &val, | |
343 | sizeof(val)); | |
344 | if (ret) | |
345 | goto err_ida; | |
346 | ||
347 | hdr_size = sw->generation < 3 ? SZ_8K : SZ_16K; | |
348 | nvm_size = (SZ_1M << (val & 7)) / 8; | |
349 | nvm_size = (nvm_size - hdr_size) / 2; | |
350 | ||
351 | ret = dma_port_flash_read(sw->dma_port, NVM_VERSION, &val, | |
352 | sizeof(val)); | |
353 | if (ret) | |
354 | goto err_ida; | |
355 | ||
356 | nvm->major = val >> 16; | |
357 | nvm->minor = val >> 8; | |
358 | ||
359 | nvm_dev = register_nvmem(sw, nvm->id, nvm_size, true); | |
360 | if (IS_ERR(nvm_dev)) { | |
361 | ret = PTR_ERR(nvm_dev); | |
362 | goto err_ida; | |
363 | } | |
364 | nvm->active = nvm_dev; | |
365 | } | |
366 | ||
3f415e5e MW |
367 | if (!sw->no_nvm_upgrade) { |
368 | nvm_dev = register_nvmem(sw, nvm->id, NVM_MAX_SIZE, false); | |
369 | if (IS_ERR(nvm_dev)) { | |
370 | ret = PTR_ERR(nvm_dev); | |
371 | goto err_nvm_active; | |
372 | } | |
373 | nvm->non_active = nvm_dev; | |
e6b245cc | 374 | } |
e6b245cc | 375 | |
e6b245cc | 376 | sw->nvm = nvm; |
e6b245cc MW |
377 | return 0; |
378 | ||
379 | err_nvm_active: | |
380 | if (nvm->active) | |
381 | nvmem_unregister(nvm->active); | |
382 | err_ida: | |
383 | ida_simple_remove(&nvm_ida, nvm->id); | |
384 | kfree(nvm); | |
385 | ||
386 | return ret; | |
387 | } | |
388 | ||
389 | static void tb_switch_nvm_remove(struct tb_switch *sw) | |
390 | { | |
391 | struct tb_switch_nvm *nvm; | |
392 | ||
e6b245cc MW |
393 | nvm = sw->nvm; |
394 | sw->nvm = NULL; | |
e6b245cc MW |
395 | |
396 | if (!nvm) | |
397 | return; | |
398 | ||
399 | /* Remove authentication status in case the switch is unplugged */ | |
400 | if (!nvm->authenticating) | |
401 | nvm_clear_auth_status(sw); | |
402 | ||
3f415e5e MW |
403 | if (nvm->non_active) |
404 | nvmem_unregister(nvm->non_active); | |
e6b245cc MW |
405 | if (nvm->active) |
406 | nvmem_unregister(nvm->active); | |
407 | ida_simple_remove(&nvm_ida, nvm->id); | |
408 | vfree(nvm->buf); | |
409 | kfree(nvm); | |
410 | } | |
411 | ||
a25c8b2f AN |
412 | /* port utility functions */ |
413 | ||
414 | static const char *tb_port_type(struct tb_regs_port_header *port) | |
415 | { | |
416 | switch (port->type >> 16) { | |
417 | case 0: | |
418 | switch ((u8) port->type) { | |
419 | case 0: | |
420 | return "Inactive"; | |
421 | case 1: | |
422 | return "Port"; | |
423 | case 2: | |
424 | return "NHI"; | |
425 | default: | |
426 | return "unknown"; | |
427 | } | |
428 | case 0x2: | |
429 | return "Ethernet"; | |
430 | case 0x8: | |
431 | return "SATA"; | |
432 | case 0xe: | |
433 | return "DP/HDMI"; | |
434 | case 0x10: | |
435 | return "PCIe"; | |
436 | case 0x20: | |
437 | return "USB"; | |
438 | default: | |
439 | return "unknown"; | |
440 | } | |
441 | } | |
442 | ||
443 | static void tb_dump_port(struct tb *tb, struct tb_regs_port_header *port) | |
444 | { | |
daa5140f MW |
445 | tb_dbg(tb, |
446 | " Port %d: %x:%x (Revision: %d, TB Version: %d, Type: %s (%#x))\n", | |
447 | port->port_number, port->vendor_id, port->device_id, | |
448 | port->revision, port->thunderbolt_version, tb_port_type(port), | |
449 | port->type); | |
450 | tb_dbg(tb, " Max hop id (in/out): %d/%d\n", | |
451 | port->max_in_hop_id, port->max_out_hop_id); | |
452 | tb_dbg(tb, " Max counters: %d\n", port->max_counters); | |
453 | tb_dbg(tb, " NFC Credits: %#x\n", port->nfc_credits); | |
a25c8b2f AN |
454 | } |
455 | ||
9da672a4 AN |
456 | /** |
457 | * tb_port_state() - get connectedness state of a port | |
458 | * | |
459 | * The port must have a TB_CAP_PHY (i.e. it should be a real port). | |
460 | * | |
461 | * Return: Returns an enum tb_port_state on success or an error code on failure. | |
462 | */ | |
463 | static int tb_port_state(struct tb_port *port) | |
464 | { | |
465 | struct tb_cap_phy phy; | |
466 | int res; | |
467 | if (port->cap_phy == 0) { | |
468 | tb_port_WARN(port, "does not have a PHY\n"); | |
469 | return -EINVAL; | |
470 | } | |
471 | res = tb_port_read(port, &phy, TB_CFG_PORT, port->cap_phy, 2); | |
472 | if (res) | |
473 | return res; | |
474 | return phy.state; | |
475 | } | |
476 | ||
477 | /** | |
478 | * tb_wait_for_port() - wait for a port to become ready | |
479 | * | |
480 | * Wait up to 1 second for a port to reach state TB_PORT_UP. If | |
481 | * wait_if_unplugged is set then we also wait if the port is in state | |
482 | * TB_PORT_UNPLUGGED (it takes a while for the device to be registered after | |
483 | * switch resume). Otherwise we only wait if a device is registered but the link | |
484 | * has not yet been established. | |
485 | * | |
486 | * Return: Returns an error code on failure. Returns 0 if the port is not | |
487 | * connected or failed to reach state TB_PORT_UP within one second. Returns 1 | |
488 | * if the port is connected and in state TB_PORT_UP. | |
489 | */ | |
490 | int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged) | |
491 | { | |
492 | int retries = 10; | |
493 | int state; | |
494 | if (!port->cap_phy) { | |
495 | tb_port_WARN(port, "does not have PHY\n"); | |
496 | return -EINVAL; | |
497 | } | |
498 | if (tb_is_upstream_port(port)) { | |
499 | tb_port_WARN(port, "is the upstream port\n"); | |
500 | return -EINVAL; | |
501 | } | |
502 | ||
503 | while (retries--) { | |
504 | state = tb_port_state(port); | |
505 | if (state < 0) | |
506 | return state; | |
507 | if (state == TB_PORT_DISABLED) { | |
62efe699 | 508 | tb_port_dbg(port, "is disabled (state: 0)\n"); |
9da672a4 AN |
509 | return 0; |
510 | } | |
511 | if (state == TB_PORT_UNPLUGGED) { | |
512 | if (wait_if_unplugged) { | |
513 | /* used during resume */ | |
62efe699 MW |
514 | tb_port_dbg(port, |
515 | "is unplugged (state: 7), retrying...\n"); | |
9da672a4 AN |
516 | msleep(100); |
517 | continue; | |
518 | } | |
62efe699 | 519 | tb_port_dbg(port, "is unplugged (state: 7)\n"); |
9da672a4 AN |
520 | return 0; |
521 | } | |
522 | if (state == TB_PORT_UP) { | |
62efe699 | 523 | tb_port_dbg(port, "is connected, link is up (state: 2)\n"); |
9da672a4 AN |
524 | return 1; |
525 | } | |
526 | ||
527 | /* | |
528 | * After plug-in the state is TB_PORT_CONNECTING. Give it some | |
529 | * time. | |
530 | */ | |
62efe699 MW |
531 | tb_port_dbg(port, |
532 | "is connected, link is not up (state: %d), retrying...\n", | |
533 | state); | |
9da672a4 AN |
534 | msleep(100); |
535 | } | |
536 | tb_port_warn(port, | |
537 | "failed to reach state TB_PORT_UP. Ignoring port...\n"); | |
538 | return 0; | |
539 | } | |
540 | ||
520b6702 AN |
541 | /** |
542 | * tb_port_add_nfc_credits() - add/remove non flow controlled credits to port | |
543 | * | |
544 | * Change the number of NFC credits allocated to @port by @credits. To remove | |
545 | * NFC credits pass a negative amount of credits. | |
546 | * | |
547 | * Return: Returns 0 on success or an error code on failure. | |
548 | */ | |
549 | int tb_port_add_nfc_credits(struct tb_port *port, int credits) | |
550 | { | |
c5ee6feb MW |
551 | u32 nfc_credits; |
552 | ||
553 | if (credits == 0 || port->sw->is_unplugged) | |
520b6702 | 554 | return 0; |
c5ee6feb | 555 | |
8f57d478 | 556 | nfc_credits = port->config.nfc_credits & ADP_CS_4_NFC_BUFFERS_MASK; |
c5ee6feb MW |
557 | nfc_credits += credits; |
558 | ||
8f57d478 MW |
559 | tb_port_dbg(port, "adding %d NFC credits to %lu", credits, |
560 | port->config.nfc_credits & ADP_CS_4_NFC_BUFFERS_MASK); | |
c5ee6feb | 561 | |
8f57d478 | 562 | port->config.nfc_credits &= ~ADP_CS_4_NFC_BUFFERS_MASK; |
c5ee6feb MW |
563 | port->config.nfc_credits |= nfc_credits; |
564 | ||
520b6702 | 565 | return tb_port_write(port, &port->config.nfc_credits, |
8f57d478 | 566 | TB_CFG_PORT, ADP_CS_4, 1); |
520b6702 AN |
567 | } |
568 | ||
44242d6c MW |
569 | /** |
570 | * tb_port_set_initial_credits() - Set initial port link credits allocated | |
571 | * @port: Port to set the initial credits | |
572 | * @credits: Number of credits to to allocate | |
573 | * | |
574 | * Set initial credits value to be used for ingress shared buffering. | |
575 | */ | |
576 | int tb_port_set_initial_credits(struct tb_port *port, u32 credits) | |
577 | { | |
578 | u32 data; | |
579 | int ret; | |
580 | ||
8f57d478 | 581 | ret = tb_port_read(port, &data, TB_CFG_PORT, ADP_CS_5, 1); |
44242d6c MW |
582 | if (ret) |
583 | return ret; | |
584 | ||
8f57d478 MW |
585 | data &= ~ADP_CS_5_LCA_MASK; |
586 | data |= (credits << ADP_CS_5_LCA_SHIFT) & ADP_CS_5_LCA_MASK; | |
44242d6c | 587 | |
8f57d478 | 588 | return tb_port_write(port, &data, TB_CFG_PORT, ADP_CS_5, 1); |
44242d6c MW |
589 | } |
590 | ||
520b6702 AN |
591 | /** |
592 | * tb_port_clear_counter() - clear a counter in TB_CFG_COUNTER | |
593 | * | |
594 | * Return: Returns 0 on success or an error code on failure. | |
595 | */ | |
596 | int tb_port_clear_counter(struct tb_port *port, int counter) | |
597 | { | |
598 | u32 zero[3] = { 0, 0, 0 }; | |
62efe699 | 599 | tb_port_dbg(port, "clearing counter %d\n", counter); |
520b6702 AN |
600 | return tb_port_write(port, zero, TB_CFG_COUNTERS, 3 * counter, 3); |
601 | } | |
602 | ||
a25c8b2f AN |
603 | /** |
604 | * tb_init_port() - initialize a port | |
605 | * | |
606 | * This is a helper method for tb_switch_alloc. Does not check or initialize | |
607 | * any downstream switches. | |
608 | * | |
609 | * Return: Returns 0 on success or an error code on failure. | |
610 | */ | |
343fcb8c | 611 | static int tb_init_port(struct tb_port *port) |
a25c8b2f AN |
612 | { |
613 | int res; | |
9da672a4 | 614 | int cap; |
343fcb8c | 615 | |
a25c8b2f | 616 | res = tb_port_read(port, &port->config, TB_CFG_PORT, 0, 8); |
d94dcbb1 MW |
617 | if (res) { |
618 | if (res == -ENODEV) { | |
619 | tb_dbg(port->sw->tb, " Port %d: not implemented\n", | |
620 | port->port); | |
621 | return 0; | |
622 | } | |
a25c8b2f | 623 | return res; |
d94dcbb1 | 624 | } |
a25c8b2f | 625 | |
9da672a4 | 626 | /* Port 0 is the switch itself and has no PHY. */ |
343fcb8c | 627 | if (port->config.type == TB_TYPE_PORT && port->port != 0) { |
da2da04b | 628 | cap = tb_port_find_cap(port, TB_PORT_CAP_PHY); |
9da672a4 AN |
629 | |
630 | if (cap > 0) | |
631 | port->cap_phy = cap; | |
632 | else | |
633 | tb_port_WARN(port, "non switch port without a PHY\n"); | |
56183c88 MW |
634 | } else if (port->port != 0) { |
635 | cap = tb_port_find_cap(port, TB_PORT_CAP_ADAP); | |
636 | if (cap > 0) | |
637 | port->cap_adap = cap; | |
9da672a4 AN |
638 | } |
639 | ||
343fcb8c | 640 | tb_dump_port(port->sw->tb, &port->config); |
a25c8b2f | 641 | |
0b2863ac MW |
642 | /* Control port does not need HopID allocation */ |
643 | if (port->port) { | |
644 | ida_init(&port->in_hopids); | |
645 | ida_init(&port->out_hopids); | |
646 | } | |
647 | ||
a25c8b2f AN |
648 | return 0; |
649 | ||
650 | } | |
651 | ||
0b2863ac MW |
652 | static int tb_port_alloc_hopid(struct tb_port *port, bool in, int min_hopid, |
653 | int max_hopid) | |
654 | { | |
655 | int port_max_hopid; | |
656 | struct ida *ida; | |
657 | ||
658 | if (in) { | |
659 | port_max_hopid = port->config.max_in_hop_id; | |
660 | ida = &port->in_hopids; | |
661 | } else { | |
662 | port_max_hopid = port->config.max_out_hop_id; | |
663 | ida = &port->out_hopids; | |
664 | } | |
665 | ||
666 | /* HopIDs 0-7 are reserved */ | |
667 | if (min_hopid < TB_PATH_MIN_HOPID) | |
668 | min_hopid = TB_PATH_MIN_HOPID; | |
669 | ||
670 | if (max_hopid < 0 || max_hopid > port_max_hopid) | |
671 | max_hopid = port_max_hopid; | |
672 | ||
673 | return ida_simple_get(ida, min_hopid, max_hopid + 1, GFP_KERNEL); | |
674 | } | |
675 | ||
676 | /** | |
677 | * tb_port_alloc_in_hopid() - Allocate input HopID from port | |
678 | * @port: Port to allocate HopID for | |
679 | * @min_hopid: Minimum acceptable input HopID | |
680 | * @max_hopid: Maximum acceptable input HopID | |
681 | * | |
682 | * Return: HopID between @min_hopid and @max_hopid or negative errno in | |
683 | * case of error. | |
684 | */ | |
685 | int tb_port_alloc_in_hopid(struct tb_port *port, int min_hopid, int max_hopid) | |
686 | { | |
687 | return tb_port_alloc_hopid(port, true, min_hopid, max_hopid); | |
688 | } | |
689 | ||
690 | /** | |
691 | * tb_port_alloc_out_hopid() - Allocate output HopID from port | |
692 | * @port: Port to allocate HopID for | |
693 | * @min_hopid: Minimum acceptable output HopID | |
694 | * @max_hopid: Maximum acceptable output HopID | |
695 | * | |
696 | * Return: HopID between @min_hopid and @max_hopid or negative errno in | |
697 | * case of error. | |
698 | */ | |
699 | int tb_port_alloc_out_hopid(struct tb_port *port, int min_hopid, int max_hopid) | |
700 | { | |
701 | return tb_port_alloc_hopid(port, false, min_hopid, max_hopid); | |
702 | } | |
703 | ||
704 | /** | |
705 | * tb_port_release_in_hopid() - Release allocated input HopID from port | |
706 | * @port: Port whose HopID to release | |
707 | * @hopid: HopID to release | |
708 | */ | |
709 | void tb_port_release_in_hopid(struct tb_port *port, int hopid) | |
710 | { | |
711 | ida_simple_remove(&port->in_hopids, hopid); | |
712 | } | |
713 | ||
714 | /** | |
715 | * tb_port_release_out_hopid() - Release allocated output HopID from port | |
716 | * @port: Port whose HopID to release | |
717 | * @hopid: HopID to release | |
718 | */ | |
719 | void tb_port_release_out_hopid(struct tb_port *port, int hopid) | |
720 | { | |
721 | ida_simple_remove(&port->out_hopids, hopid); | |
722 | } | |
723 | ||
fb19fac1 MW |
724 | /** |
725 | * tb_next_port_on_path() - Return next port for given port on a path | |
726 | * @start: Start port of the walk | |
727 | * @end: End port of the walk | |
728 | * @prev: Previous port (%NULL if this is the first) | |
729 | * | |
730 | * This function can be used to walk from one port to another if they | |
731 | * are connected through zero or more switches. If the @prev is dual | |
732 | * link port, the function follows that link and returns another end on | |
733 | * that same link. | |
734 | * | |
735 | * If the @end port has been reached, return %NULL. | |
736 | * | |
737 | * Domain tb->lock must be held when this function is called. | |
738 | */ | |
739 | struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end, | |
740 | struct tb_port *prev) | |
741 | { | |
742 | struct tb_port *next; | |
743 | ||
744 | if (!prev) | |
745 | return start; | |
746 | ||
747 | if (prev->sw == end->sw) { | |
748 | if (prev == end) | |
749 | return NULL; | |
750 | return end; | |
751 | } | |
752 | ||
753 | if (start->sw->config.depth < end->sw->config.depth) { | |
754 | if (prev->remote && | |
755 | prev->remote->sw->config.depth > prev->sw->config.depth) | |
756 | next = prev->remote; | |
757 | else | |
758 | next = tb_port_at(tb_route(end->sw), prev->sw); | |
759 | } else { | |
760 | if (tb_is_upstream_port(prev)) { | |
761 | next = prev->remote; | |
762 | } else { | |
763 | next = tb_upstream_port(prev->sw); | |
764 | /* | |
765 | * Keep the same link if prev and next are both | |
766 | * dual link ports. | |
767 | */ | |
768 | if (next->dual_link_port && | |
769 | next->link_nr != prev->link_nr) { | |
770 | next = next->dual_link_port; | |
771 | } | |
772 | } | |
773 | } | |
774 | ||
775 | return next; | |
776 | } | |
777 | ||
91c0c120 MW |
778 | static int tb_port_get_link_speed(struct tb_port *port) |
779 | { | |
780 | u32 val, speed; | |
781 | int ret; | |
782 | ||
783 | if (!port->cap_phy) | |
784 | return -EINVAL; | |
785 | ||
786 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
787 | port->cap_phy + LANE_ADP_CS_1, 1); | |
788 | if (ret) | |
789 | return ret; | |
790 | ||
791 | speed = (val & LANE_ADP_CS_1_CURRENT_SPEED_MASK) >> | |
792 | LANE_ADP_CS_1_CURRENT_SPEED_SHIFT; | |
793 | return speed == LANE_ADP_CS_1_CURRENT_SPEED_GEN3 ? 20 : 10; | |
794 | } | |
795 | ||
796 | static int tb_port_get_link_width(struct tb_port *port) | |
797 | { | |
798 | u32 val; | |
799 | int ret; | |
800 | ||
801 | if (!port->cap_phy) | |
802 | return -EINVAL; | |
803 | ||
804 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
805 | port->cap_phy + LANE_ADP_CS_1, 1); | |
806 | if (ret) | |
807 | return ret; | |
808 | ||
809 | return (val & LANE_ADP_CS_1_CURRENT_WIDTH_MASK) >> | |
810 | LANE_ADP_CS_1_CURRENT_WIDTH_SHIFT; | |
811 | } | |
812 | ||
813 | static bool tb_port_is_width_supported(struct tb_port *port, int width) | |
814 | { | |
815 | u32 phy, widths; | |
816 | int ret; | |
817 | ||
818 | if (!port->cap_phy) | |
819 | return false; | |
820 | ||
821 | ret = tb_port_read(port, &phy, TB_CFG_PORT, | |
822 | port->cap_phy + LANE_ADP_CS_0, 1); | |
823 | if (ret) | |
824 | return ret; | |
825 | ||
826 | widths = (phy & LANE_ADP_CS_0_SUPPORTED_WIDTH_MASK) >> | |
827 | LANE_ADP_CS_0_SUPPORTED_WIDTH_SHIFT; | |
828 | ||
829 | return !!(widths & width); | |
830 | } | |
831 | ||
832 | static int tb_port_set_link_width(struct tb_port *port, unsigned int width) | |
833 | { | |
834 | u32 val; | |
835 | int ret; | |
836 | ||
837 | if (!port->cap_phy) | |
838 | return -EINVAL; | |
839 | ||
840 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
841 | port->cap_phy + LANE_ADP_CS_1, 1); | |
842 | if (ret) | |
843 | return ret; | |
844 | ||
845 | val &= ~LANE_ADP_CS_1_TARGET_WIDTH_MASK; | |
846 | switch (width) { | |
847 | case 1: | |
848 | val |= LANE_ADP_CS_1_TARGET_WIDTH_SINGLE << | |
849 | LANE_ADP_CS_1_TARGET_WIDTH_SHIFT; | |
850 | break; | |
851 | case 2: | |
852 | val |= LANE_ADP_CS_1_TARGET_WIDTH_DUAL << | |
853 | LANE_ADP_CS_1_TARGET_WIDTH_SHIFT; | |
854 | break; | |
855 | default: | |
856 | return -EINVAL; | |
857 | } | |
858 | ||
859 | val |= LANE_ADP_CS_1_LB; | |
860 | ||
861 | return tb_port_write(port, &val, TB_CFG_PORT, | |
862 | port->cap_phy + LANE_ADP_CS_1, 1); | |
863 | } | |
864 | ||
865 | static int tb_port_lane_bonding_enable(struct tb_port *port) | |
866 | { | |
867 | int ret; | |
868 | ||
869 | /* | |
870 | * Enable lane bonding for both links if not already enabled by | |
871 | * for example the boot firmware. | |
872 | */ | |
873 | ret = tb_port_get_link_width(port); | |
874 | if (ret == 1) { | |
875 | ret = tb_port_set_link_width(port, 2); | |
876 | if (ret) | |
877 | return ret; | |
878 | } | |
879 | ||
880 | ret = tb_port_get_link_width(port->dual_link_port); | |
881 | if (ret == 1) { | |
882 | ret = tb_port_set_link_width(port->dual_link_port, 2); | |
883 | if (ret) { | |
884 | tb_port_set_link_width(port, 1); | |
885 | return ret; | |
886 | } | |
887 | } | |
888 | ||
889 | port->bonded = true; | |
890 | port->dual_link_port->bonded = true; | |
891 | ||
892 | return 0; | |
893 | } | |
894 | ||
895 | static void tb_port_lane_bonding_disable(struct tb_port *port) | |
896 | { | |
897 | port->dual_link_port->bonded = false; | |
898 | port->bonded = false; | |
899 | ||
900 | tb_port_set_link_width(port->dual_link_port, 1); | |
901 | tb_port_set_link_width(port, 1); | |
902 | } | |
903 | ||
e78db6f0 MW |
904 | /** |
905 | * tb_port_is_enabled() - Is the adapter port enabled | |
906 | * @port: Port to check | |
907 | */ | |
908 | bool tb_port_is_enabled(struct tb_port *port) | |
909 | { | |
910 | switch (port->config.type) { | |
911 | case TB_TYPE_PCIE_UP: | |
912 | case TB_TYPE_PCIE_DOWN: | |
913 | return tb_pci_port_is_enabled(port); | |
914 | ||
4f807e47 MW |
915 | case TB_TYPE_DP_HDMI_IN: |
916 | case TB_TYPE_DP_HDMI_OUT: | |
917 | return tb_dp_port_is_enabled(port); | |
918 | ||
e78db6f0 MW |
919 | default: |
920 | return false; | |
921 | } | |
922 | } | |
923 | ||
0414bec5 MW |
924 | /** |
925 | * tb_pci_port_is_enabled() - Is the PCIe adapter port enabled | |
926 | * @port: PCIe port to check | |
927 | */ | |
928 | bool tb_pci_port_is_enabled(struct tb_port *port) | |
929 | { | |
930 | u32 data; | |
931 | ||
778bfca3 MW |
932 | if (tb_port_read(port, &data, TB_CFG_PORT, |
933 | port->cap_adap + ADP_PCIE_CS_0, 1)) | |
0414bec5 MW |
934 | return false; |
935 | ||
778bfca3 | 936 | return !!(data & ADP_PCIE_CS_0_PE); |
0414bec5 MW |
937 | } |
938 | ||
93f36ade MW |
939 | /** |
940 | * tb_pci_port_enable() - Enable PCIe adapter port | |
941 | * @port: PCIe port to enable | |
942 | * @enable: Enable/disable the PCIe adapter | |
943 | */ | |
944 | int tb_pci_port_enable(struct tb_port *port, bool enable) | |
945 | { | |
778bfca3 | 946 | u32 word = enable ? ADP_PCIE_CS_0_PE : 0x0; |
93f36ade MW |
947 | if (!port->cap_adap) |
948 | return -ENXIO; | |
778bfca3 MW |
949 | return tb_port_write(port, &word, TB_CFG_PORT, |
950 | port->cap_adap + ADP_PCIE_CS_0, 1); | |
93f36ade MW |
951 | } |
952 | ||
4f807e47 MW |
953 | /** |
954 | * tb_dp_port_hpd_is_active() - Is HPD already active | |
955 | * @port: DP out port to check | |
956 | * | |
957 | * Checks if the DP OUT adapter port has HDP bit already set. | |
958 | */ | |
959 | int tb_dp_port_hpd_is_active(struct tb_port *port) | |
960 | { | |
961 | u32 data; | |
962 | int ret; | |
963 | ||
98176380 MW |
964 | ret = tb_port_read(port, &data, TB_CFG_PORT, |
965 | port->cap_adap + ADP_DP_CS_2, 1); | |
4f807e47 MW |
966 | if (ret) |
967 | return ret; | |
968 | ||
98176380 | 969 | return !!(data & ADP_DP_CS_2_HDP); |
4f807e47 MW |
970 | } |
971 | ||
972 | /** | |
973 | * tb_dp_port_hpd_clear() - Clear HPD from DP IN port | |
974 | * @port: Port to clear HPD | |
975 | * | |
976 | * If the DP IN port has HDP set, this function can be used to clear it. | |
977 | */ | |
978 | int tb_dp_port_hpd_clear(struct tb_port *port) | |
979 | { | |
980 | u32 data; | |
981 | int ret; | |
982 | ||
98176380 MW |
983 | ret = tb_port_read(port, &data, TB_CFG_PORT, |
984 | port->cap_adap + ADP_DP_CS_3, 1); | |
4f807e47 MW |
985 | if (ret) |
986 | return ret; | |
987 | ||
98176380 MW |
988 | data |= ADP_DP_CS_3_HDPC; |
989 | return tb_port_write(port, &data, TB_CFG_PORT, | |
990 | port->cap_adap + ADP_DP_CS_3, 1); | |
4f807e47 MW |
991 | } |
992 | ||
993 | /** | |
994 | * tb_dp_port_set_hops() - Set video/aux Hop IDs for DP port | |
995 | * @port: DP IN/OUT port to set hops | |
996 | * @video: Video Hop ID | |
997 | * @aux_tx: AUX TX Hop ID | |
998 | * @aux_rx: AUX RX Hop ID | |
999 | * | |
1000 | * Programs specified Hop IDs for DP IN/OUT port. | |
1001 | */ | |
1002 | int tb_dp_port_set_hops(struct tb_port *port, unsigned int video, | |
1003 | unsigned int aux_tx, unsigned int aux_rx) | |
1004 | { | |
1005 | u32 data[2]; | |
1006 | int ret; | |
1007 | ||
98176380 MW |
1008 | ret = tb_port_read(port, data, TB_CFG_PORT, |
1009 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); | |
4f807e47 MW |
1010 | if (ret) |
1011 | return ret; | |
1012 | ||
98176380 MW |
1013 | data[0] &= ~ADP_DP_CS_0_VIDEO_HOPID_MASK; |
1014 | data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK; | |
1015 | data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK; | |
4f807e47 | 1016 | |
98176380 MW |
1017 | data[0] |= (video << ADP_DP_CS_0_VIDEO_HOPID_SHIFT) & |
1018 | ADP_DP_CS_0_VIDEO_HOPID_MASK; | |
1019 | data[1] |= aux_tx & ADP_DP_CS_1_AUX_TX_HOPID_MASK; | |
1020 | data[1] |= (aux_rx << ADP_DP_CS_1_AUX_RX_HOPID_SHIFT) & | |
1021 | ADP_DP_CS_1_AUX_RX_HOPID_MASK; | |
4f807e47 | 1022 | |
98176380 MW |
1023 | return tb_port_write(port, data, TB_CFG_PORT, |
1024 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); | |
4f807e47 MW |
1025 | } |
1026 | ||
1027 | /** | |
1028 | * tb_dp_port_is_enabled() - Is DP adapter port enabled | |
1029 | * @port: DP adapter port to check | |
1030 | */ | |
1031 | bool tb_dp_port_is_enabled(struct tb_port *port) | |
1032 | { | |
fd5c46b7 | 1033 | u32 data[2]; |
4f807e47 | 1034 | |
98176380 | 1035 | if (tb_port_read(port, data, TB_CFG_PORT, port->cap_adap + ADP_DP_CS_0, |
fd5c46b7 | 1036 | ARRAY_SIZE(data))) |
4f807e47 MW |
1037 | return false; |
1038 | ||
98176380 | 1039 | return !!(data[0] & (ADP_DP_CS_0_VE | ADP_DP_CS_0_AE)); |
4f807e47 MW |
1040 | } |
1041 | ||
1042 | /** | |
1043 | * tb_dp_port_enable() - Enables/disables DP paths of a port | |
1044 | * @port: DP IN/OUT port | |
1045 | * @enable: Enable/disable DP path | |
1046 | * | |
1047 | * Once Hop IDs are programmed DP paths can be enabled or disabled by | |
1048 | * calling this function. | |
1049 | */ | |
1050 | int tb_dp_port_enable(struct tb_port *port, bool enable) | |
1051 | { | |
fd5c46b7 | 1052 | u32 data[2]; |
4f807e47 MW |
1053 | int ret; |
1054 | ||
98176380 MW |
1055 | ret = tb_port_read(port, data, TB_CFG_PORT, |
1056 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); | |
4f807e47 MW |
1057 | if (ret) |
1058 | return ret; | |
1059 | ||
1060 | if (enable) | |
98176380 | 1061 | data[0] |= ADP_DP_CS_0_VE | ADP_DP_CS_0_AE; |
4f807e47 | 1062 | else |
98176380 | 1063 | data[0] &= ~(ADP_DP_CS_0_VE | ADP_DP_CS_0_AE); |
4f807e47 | 1064 | |
98176380 MW |
1065 | return tb_port_write(port, data, TB_CFG_PORT, |
1066 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); | |
4f807e47 MW |
1067 | } |
1068 | ||
a25c8b2f AN |
1069 | /* switch utility functions */ |
1070 | ||
1071 | static void tb_dump_switch(struct tb *tb, struct tb_regs_switch_header *sw) | |
1072 | { | |
daa5140f MW |
1073 | tb_dbg(tb, " Switch: %x:%x (Revision: %d, TB Version: %d)\n", |
1074 | sw->vendor_id, sw->device_id, sw->revision, | |
1075 | sw->thunderbolt_version); | |
1076 | tb_dbg(tb, " Max Port Number: %d\n", sw->max_port_number); | |
1077 | tb_dbg(tb, " Config:\n"); | |
1078 | tb_dbg(tb, | |
a25c8b2f | 1079 | " Upstream Port Number: %d Depth: %d Route String: %#llx Enabled: %d, PlugEventsDelay: %dms\n", |
daa5140f MW |
1080 | sw->upstream_port_number, sw->depth, |
1081 | (((u64) sw->route_hi) << 32) | sw->route_lo, | |
1082 | sw->enabled, sw->plug_events_delay); | |
1083 | tb_dbg(tb, " unknown1: %#x unknown4: %#x\n", | |
1084 | sw->__unknown1, sw->__unknown4); | |
a25c8b2f AN |
1085 | } |
1086 | ||
23dd5bb4 AN |
1087 | /** |
1088 | * reset_switch() - reconfigure route, enable and send TB_CFG_PKG_RESET | |
1089 | * | |
1090 | * Return: Returns 0 on success or an error code on failure. | |
1091 | */ | |
1092 | int tb_switch_reset(struct tb *tb, u64 route) | |
1093 | { | |
1094 | struct tb_cfg_result res; | |
1095 | struct tb_regs_switch_header header = { | |
1096 | header.route_hi = route >> 32, | |
1097 | header.route_lo = route, | |
1098 | header.enabled = true, | |
1099 | }; | |
daa5140f | 1100 | tb_dbg(tb, "resetting switch at %llx\n", route); |
23dd5bb4 AN |
1101 | res.err = tb_cfg_write(tb->ctl, ((u32 *) &header) + 2, route, |
1102 | 0, 2, 2, 2); | |
1103 | if (res.err) | |
1104 | return res.err; | |
1105 | res = tb_cfg_reset(tb->ctl, route, TB_CFG_DEFAULT_TIMEOUT); | |
1106 | if (res.err > 0) | |
1107 | return -EIO; | |
1108 | return res.err; | |
1109 | } | |
1110 | ||
ca389f71 AN |
1111 | /** |
1112 | * tb_plug_events_active() - enable/disable plug events on a switch | |
1113 | * | |
1114 | * Also configures a sane plug_events_delay of 255ms. | |
1115 | * | |
1116 | * Return: Returns 0 on success or an error code on failure. | |
1117 | */ | |
1118 | static int tb_plug_events_active(struct tb_switch *sw, bool active) | |
1119 | { | |
1120 | u32 data; | |
1121 | int res; | |
1122 | ||
f07a3608 | 1123 | if (tb_switch_is_icm(sw)) |
bfe778ac MW |
1124 | return 0; |
1125 | ||
ca389f71 AN |
1126 | sw->config.plug_events_delay = 0xff; |
1127 | res = tb_sw_write(sw, ((u32 *) &sw->config) + 4, TB_CFG_SWITCH, 4, 1); | |
1128 | if (res) | |
1129 | return res; | |
1130 | ||
1131 | res = tb_sw_read(sw, &data, TB_CFG_SWITCH, sw->cap_plug_events + 1, 1); | |
1132 | if (res) | |
1133 | return res; | |
1134 | ||
1135 | if (active) { | |
1136 | data = data & 0xFFFFFF83; | |
1137 | switch (sw->config.device_id) { | |
1d111406 LW |
1138 | case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: |
1139 | case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: | |
1140 | case PCI_DEVICE_ID_INTEL_PORT_RIDGE: | |
ca389f71 AN |
1141 | break; |
1142 | default: | |
1143 | data |= 4; | |
1144 | } | |
1145 | } else { | |
1146 | data = data | 0x7c; | |
1147 | } | |
1148 | return tb_sw_write(sw, &data, TB_CFG_SWITCH, | |
1149 | sw->cap_plug_events + 1, 1); | |
1150 | } | |
1151 | ||
f67cf491 MW |
1152 | static ssize_t authorized_show(struct device *dev, |
1153 | struct device_attribute *attr, | |
1154 | char *buf) | |
1155 | { | |
1156 | struct tb_switch *sw = tb_to_switch(dev); | |
1157 | ||
1158 | return sprintf(buf, "%u\n", sw->authorized); | |
1159 | } | |
1160 | ||
1161 | static int tb_switch_set_authorized(struct tb_switch *sw, unsigned int val) | |
1162 | { | |
1163 | int ret = -EINVAL; | |
1164 | ||
09f11b6c MW |
1165 | if (!mutex_trylock(&sw->tb->lock)) |
1166 | return restart_syscall(); | |
f67cf491 MW |
1167 | |
1168 | if (sw->authorized) | |
1169 | goto unlock; | |
1170 | ||
1171 | switch (val) { | |
1172 | /* Approve switch */ | |
1173 | case 1: | |
1174 | if (sw->key) | |
1175 | ret = tb_domain_approve_switch_key(sw->tb, sw); | |
1176 | else | |
1177 | ret = tb_domain_approve_switch(sw->tb, sw); | |
1178 | break; | |
1179 | ||
1180 | /* Challenge switch */ | |
1181 | case 2: | |
1182 | if (sw->key) | |
1183 | ret = tb_domain_challenge_switch_key(sw->tb, sw); | |
1184 | break; | |
1185 | ||
1186 | default: | |
1187 | break; | |
1188 | } | |
1189 | ||
1190 | if (!ret) { | |
1191 | sw->authorized = val; | |
1192 | /* Notify status change to the userspace */ | |
1193 | kobject_uevent(&sw->dev.kobj, KOBJ_CHANGE); | |
1194 | } | |
1195 | ||
1196 | unlock: | |
09f11b6c | 1197 | mutex_unlock(&sw->tb->lock); |
f67cf491 MW |
1198 | return ret; |
1199 | } | |
1200 | ||
1201 | static ssize_t authorized_store(struct device *dev, | |
1202 | struct device_attribute *attr, | |
1203 | const char *buf, size_t count) | |
1204 | { | |
1205 | struct tb_switch *sw = tb_to_switch(dev); | |
1206 | unsigned int val; | |
1207 | ssize_t ret; | |
1208 | ||
1209 | ret = kstrtouint(buf, 0, &val); | |
1210 | if (ret) | |
1211 | return ret; | |
1212 | if (val > 2) | |
1213 | return -EINVAL; | |
1214 | ||
4f7c2e0d | 1215 | pm_runtime_get_sync(&sw->dev); |
f67cf491 | 1216 | ret = tb_switch_set_authorized(sw, val); |
4f7c2e0d MW |
1217 | pm_runtime_mark_last_busy(&sw->dev); |
1218 | pm_runtime_put_autosuspend(&sw->dev); | |
f67cf491 MW |
1219 | |
1220 | return ret ? ret : count; | |
1221 | } | |
1222 | static DEVICE_ATTR_RW(authorized); | |
1223 | ||
14862ee3 YB |
1224 | static ssize_t boot_show(struct device *dev, struct device_attribute *attr, |
1225 | char *buf) | |
1226 | { | |
1227 | struct tb_switch *sw = tb_to_switch(dev); | |
1228 | ||
1229 | return sprintf(buf, "%u\n", sw->boot); | |
1230 | } | |
1231 | static DEVICE_ATTR_RO(boot); | |
1232 | ||
bfe778ac MW |
1233 | static ssize_t device_show(struct device *dev, struct device_attribute *attr, |
1234 | char *buf) | |
1235 | { | |
1236 | struct tb_switch *sw = tb_to_switch(dev); | |
ca389f71 | 1237 | |
bfe778ac MW |
1238 | return sprintf(buf, "%#x\n", sw->device); |
1239 | } | |
1240 | static DEVICE_ATTR_RO(device); | |
1241 | ||
72ee3390 MW |
1242 | static ssize_t |
1243 | device_name_show(struct device *dev, struct device_attribute *attr, char *buf) | |
1244 | { | |
1245 | struct tb_switch *sw = tb_to_switch(dev); | |
1246 | ||
1247 | return sprintf(buf, "%s\n", sw->device_name ? sw->device_name : ""); | |
1248 | } | |
1249 | static DEVICE_ATTR_RO(device_name); | |
1250 | ||
b406357c CK |
1251 | static ssize_t |
1252 | generation_show(struct device *dev, struct device_attribute *attr, char *buf) | |
1253 | { | |
1254 | struct tb_switch *sw = tb_to_switch(dev); | |
1255 | ||
1256 | return sprintf(buf, "%u\n", sw->generation); | |
1257 | } | |
1258 | static DEVICE_ATTR_RO(generation); | |
1259 | ||
f67cf491 MW |
1260 | static ssize_t key_show(struct device *dev, struct device_attribute *attr, |
1261 | char *buf) | |
1262 | { | |
1263 | struct tb_switch *sw = tb_to_switch(dev); | |
1264 | ssize_t ret; | |
1265 | ||
09f11b6c MW |
1266 | if (!mutex_trylock(&sw->tb->lock)) |
1267 | return restart_syscall(); | |
f67cf491 MW |
1268 | |
1269 | if (sw->key) | |
1270 | ret = sprintf(buf, "%*phN\n", TB_SWITCH_KEY_SIZE, sw->key); | |
1271 | else | |
1272 | ret = sprintf(buf, "\n"); | |
1273 | ||
09f11b6c | 1274 | mutex_unlock(&sw->tb->lock); |
f67cf491 MW |
1275 | return ret; |
1276 | } | |
1277 | ||
1278 | static ssize_t key_store(struct device *dev, struct device_attribute *attr, | |
1279 | const char *buf, size_t count) | |
1280 | { | |
1281 | struct tb_switch *sw = tb_to_switch(dev); | |
1282 | u8 key[TB_SWITCH_KEY_SIZE]; | |
1283 | ssize_t ret = count; | |
e545f0d8 | 1284 | bool clear = false; |
f67cf491 | 1285 | |
e545f0d8 BY |
1286 | if (!strcmp(buf, "\n")) |
1287 | clear = true; | |
1288 | else if (hex2bin(key, buf, sizeof(key))) | |
f67cf491 MW |
1289 | return -EINVAL; |
1290 | ||
09f11b6c MW |
1291 | if (!mutex_trylock(&sw->tb->lock)) |
1292 | return restart_syscall(); | |
f67cf491 MW |
1293 | |
1294 | if (sw->authorized) { | |
1295 | ret = -EBUSY; | |
1296 | } else { | |
1297 | kfree(sw->key); | |
e545f0d8 BY |
1298 | if (clear) { |
1299 | sw->key = NULL; | |
1300 | } else { | |
1301 | sw->key = kmemdup(key, sizeof(key), GFP_KERNEL); | |
1302 | if (!sw->key) | |
1303 | ret = -ENOMEM; | |
1304 | } | |
f67cf491 MW |
1305 | } |
1306 | ||
09f11b6c | 1307 | mutex_unlock(&sw->tb->lock); |
f67cf491 MW |
1308 | return ret; |
1309 | } | |
0956e411 | 1310 | static DEVICE_ATTR(key, 0600, key_show, key_store); |
f67cf491 | 1311 | |
91c0c120 MW |
1312 | static ssize_t speed_show(struct device *dev, struct device_attribute *attr, |
1313 | char *buf) | |
1314 | { | |
1315 | struct tb_switch *sw = tb_to_switch(dev); | |
1316 | ||
1317 | return sprintf(buf, "%u.0 Gb/s\n", sw->link_speed); | |
1318 | } | |
1319 | ||
1320 | /* | |
1321 | * Currently all lanes must run at the same speed but we expose here | |
1322 | * both directions to allow possible asymmetric links in the future. | |
1323 | */ | |
1324 | static DEVICE_ATTR(rx_speed, 0444, speed_show, NULL); | |
1325 | static DEVICE_ATTR(tx_speed, 0444, speed_show, NULL); | |
1326 | ||
1327 | static ssize_t lanes_show(struct device *dev, struct device_attribute *attr, | |
1328 | char *buf) | |
1329 | { | |
1330 | struct tb_switch *sw = tb_to_switch(dev); | |
1331 | ||
1332 | return sprintf(buf, "%u\n", sw->link_width); | |
1333 | } | |
1334 | ||
1335 | /* | |
1336 | * Currently link has same amount of lanes both directions (1 or 2) but | |
1337 | * expose them separately to allow possible asymmetric links in the future. | |
1338 | */ | |
1339 | static DEVICE_ATTR(rx_lanes, 0444, lanes_show, NULL); | |
1340 | static DEVICE_ATTR(tx_lanes, 0444, lanes_show, NULL); | |
1341 | ||
1830b6ee MW |
1342 | static void nvm_authenticate_start(struct tb_switch *sw) |
1343 | { | |
1344 | struct pci_dev *root_port; | |
1345 | ||
1346 | /* | |
1347 | * During host router NVM upgrade we should not allow root port to | |
1348 | * go into D3cold because some root ports cannot trigger PME | |
1349 | * itself. To be on the safe side keep the root port in D0 during | |
1350 | * the whole upgrade process. | |
1351 | */ | |
1352 | root_port = pci_find_pcie_root_port(sw->tb->nhi->pdev); | |
1353 | if (root_port) | |
1354 | pm_runtime_get_noresume(&root_port->dev); | |
1355 | } | |
1356 | ||
1357 | static void nvm_authenticate_complete(struct tb_switch *sw) | |
1358 | { | |
1359 | struct pci_dev *root_port; | |
1360 | ||
1361 | root_port = pci_find_pcie_root_port(sw->tb->nhi->pdev); | |
1362 | if (root_port) | |
1363 | pm_runtime_put(&root_port->dev); | |
1364 | } | |
1365 | ||
e6b245cc MW |
1366 | static ssize_t nvm_authenticate_show(struct device *dev, |
1367 | struct device_attribute *attr, char *buf) | |
1368 | { | |
1369 | struct tb_switch *sw = tb_to_switch(dev); | |
1370 | u32 status; | |
1371 | ||
1372 | nvm_get_auth_status(sw, &status); | |
1373 | return sprintf(buf, "%#x\n", status); | |
1374 | } | |
1375 | ||
1376 | static ssize_t nvm_authenticate_store(struct device *dev, | |
1377 | struct device_attribute *attr, const char *buf, size_t count) | |
1378 | { | |
1379 | struct tb_switch *sw = tb_to_switch(dev); | |
1380 | bool val; | |
1381 | int ret; | |
1382 | ||
4f7c2e0d MW |
1383 | pm_runtime_get_sync(&sw->dev); |
1384 | ||
1385 | if (!mutex_trylock(&sw->tb->lock)) { | |
1386 | ret = restart_syscall(); | |
1387 | goto exit_rpm; | |
1388 | } | |
e6b245cc MW |
1389 | |
1390 | /* If NVMem devices are not yet added */ | |
1391 | if (!sw->nvm) { | |
1392 | ret = -EAGAIN; | |
1393 | goto exit_unlock; | |
1394 | } | |
1395 | ||
1396 | ret = kstrtobool(buf, &val); | |
1397 | if (ret) | |
1398 | goto exit_unlock; | |
1399 | ||
1400 | /* Always clear the authentication status */ | |
1401 | nvm_clear_auth_status(sw); | |
1402 | ||
1403 | if (val) { | |
2d8ff0b5 MW |
1404 | if (!sw->nvm->buf) { |
1405 | ret = -EINVAL; | |
1406 | goto exit_unlock; | |
1407 | } | |
1408 | ||
e6b245cc | 1409 | ret = nvm_validate_and_write(sw); |
4f7c2e0d | 1410 | if (ret) |
e6b245cc MW |
1411 | goto exit_unlock; |
1412 | ||
1413 | sw->nvm->authenticating = true; | |
1414 | ||
1830b6ee MW |
1415 | if (!tb_route(sw)) { |
1416 | /* | |
1417 | * Keep root port from suspending as long as the | |
1418 | * NVM upgrade process is running. | |
1419 | */ | |
1420 | nvm_authenticate_start(sw); | |
e6b245cc | 1421 | ret = nvm_authenticate_host(sw); |
1830b6ee MW |
1422 | if (ret) |
1423 | nvm_authenticate_complete(sw); | |
1424 | } else { | |
e6b245cc | 1425 | ret = nvm_authenticate_device(sw); |
1830b6ee | 1426 | } |
e6b245cc MW |
1427 | } |
1428 | ||
1429 | exit_unlock: | |
09f11b6c | 1430 | mutex_unlock(&sw->tb->lock); |
4f7c2e0d MW |
1431 | exit_rpm: |
1432 | pm_runtime_mark_last_busy(&sw->dev); | |
1433 | pm_runtime_put_autosuspend(&sw->dev); | |
e6b245cc MW |
1434 | |
1435 | if (ret) | |
1436 | return ret; | |
1437 | return count; | |
1438 | } | |
1439 | static DEVICE_ATTR_RW(nvm_authenticate); | |
1440 | ||
1441 | static ssize_t nvm_version_show(struct device *dev, | |
1442 | struct device_attribute *attr, char *buf) | |
1443 | { | |
1444 | struct tb_switch *sw = tb_to_switch(dev); | |
1445 | int ret; | |
1446 | ||
09f11b6c MW |
1447 | if (!mutex_trylock(&sw->tb->lock)) |
1448 | return restart_syscall(); | |
e6b245cc MW |
1449 | |
1450 | if (sw->safe_mode) | |
1451 | ret = -ENODATA; | |
1452 | else if (!sw->nvm) | |
1453 | ret = -EAGAIN; | |
1454 | else | |
1455 | ret = sprintf(buf, "%x.%x\n", sw->nvm->major, sw->nvm->minor); | |
1456 | ||
09f11b6c | 1457 | mutex_unlock(&sw->tb->lock); |
e6b245cc MW |
1458 | |
1459 | return ret; | |
1460 | } | |
1461 | static DEVICE_ATTR_RO(nvm_version); | |
1462 | ||
bfe778ac MW |
1463 | static ssize_t vendor_show(struct device *dev, struct device_attribute *attr, |
1464 | char *buf) | |
a25c8b2f | 1465 | { |
bfe778ac | 1466 | struct tb_switch *sw = tb_to_switch(dev); |
a25c8b2f | 1467 | |
bfe778ac MW |
1468 | return sprintf(buf, "%#x\n", sw->vendor); |
1469 | } | |
1470 | static DEVICE_ATTR_RO(vendor); | |
1471 | ||
72ee3390 MW |
1472 | static ssize_t |
1473 | vendor_name_show(struct device *dev, struct device_attribute *attr, char *buf) | |
1474 | { | |
1475 | struct tb_switch *sw = tb_to_switch(dev); | |
1476 | ||
1477 | return sprintf(buf, "%s\n", sw->vendor_name ? sw->vendor_name : ""); | |
1478 | } | |
1479 | static DEVICE_ATTR_RO(vendor_name); | |
1480 | ||
bfe778ac MW |
1481 | static ssize_t unique_id_show(struct device *dev, struct device_attribute *attr, |
1482 | char *buf) | |
1483 | { | |
1484 | struct tb_switch *sw = tb_to_switch(dev); | |
1485 | ||
1486 | return sprintf(buf, "%pUb\n", sw->uuid); | |
1487 | } | |
1488 | static DEVICE_ATTR_RO(unique_id); | |
1489 | ||
1490 | static struct attribute *switch_attrs[] = { | |
f67cf491 | 1491 | &dev_attr_authorized.attr, |
14862ee3 | 1492 | &dev_attr_boot.attr, |
bfe778ac | 1493 | &dev_attr_device.attr, |
72ee3390 | 1494 | &dev_attr_device_name.attr, |
b406357c | 1495 | &dev_attr_generation.attr, |
f67cf491 | 1496 | &dev_attr_key.attr, |
e6b245cc MW |
1497 | &dev_attr_nvm_authenticate.attr, |
1498 | &dev_attr_nvm_version.attr, | |
91c0c120 MW |
1499 | &dev_attr_rx_speed.attr, |
1500 | &dev_attr_rx_lanes.attr, | |
1501 | &dev_attr_tx_speed.attr, | |
1502 | &dev_attr_tx_lanes.attr, | |
bfe778ac | 1503 | &dev_attr_vendor.attr, |
72ee3390 | 1504 | &dev_attr_vendor_name.attr, |
bfe778ac MW |
1505 | &dev_attr_unique_id.attr, |
1506 | NULL, | |
1507 | }; | |
1508 | ||
f67cf491 MW |
1509 | static umode_t switch_attr_is_visible(struct kobject *kobj, |
1510 | struct attribute *attr, int n) | |
1511 | { | |
1512 | struct device *dev = container_of(kobj, struct device, kobj); | |
1513 | struct tb_switch *sw = tb_to_switch(dev); | |
1514 | ||
58f414fa MW |
1515 | if (attr == &dev_attr_device.attr) { |
1516 | if (!sw->device) | |
1517 | return 0; | |
1518 | } else if (attr == &dev_attr_device_name.attr) { | |
1519 | if (!sw->device_name) | |
1520 | return 0; | |
1521 | } else if (attr == &dev_attr_vendor.attr) { | |
1522 | if (!sw->vendor) | |
1523 | return 0; | |
1524 | } else if (attr == &dev_attr_vendor_name.attr) { | |
1525 | if (!sw->vendor_name) | |
1526 | return 0; | |
1527 | } else if (attr == &dev_attr_key.attr) { | |
f67cf491 MW |
1528 | if (tb_route(sw) && |
1529 | sw->tb->security_level == TB_SECURITY_SECURE && | |
1530 | sw->security_level == TB_SECURITY_SECURE) | |
1531 | return attr->mode; | |
1532 | return 0; | |
91c0c120 MW |
1533 | } else if (attr == &dev_attr_rx_speed.attr || |
1534 | attr == &dev_attr_rx_lanes.attr || | |
1535 | attr == &dev_attr_tx_speed.attr || | |
1536 | attr == &dev_attr_tx_lanes.attr) { | |
1537 | if (tb_route(sw)) | |
1538 | return attr->mode; | |
1539 | return 0; | |
3f415e5e MW |
1540 | } else if (attr == &dev_attr_nvm_authenticate.attr) { |
1541 | if (sw->dma_port && !sw->no_nvm_upgrade) | |
1542 | return attr->mode; | |
1543 | return 0; | |
1544 | } else if (attr == &dev_attr_nvm_version.attr) { | |
e6b245cc MW |
1545 | if (sw->dma_port) |
1546 | return attr->mode; | |
1547 | return 0; | |
14862ee3 YB |
1548 | } else if (attr == &dev_attr_boot.attr) { |
1549 | if (tb_route(sw)) | |
1550 | return attr->mode; | |
1551 | return 0; | |
f67cf491 MW |
1552 | } |
1553 | ||
e6b245cc | 1554 | return sw->safe_mode ? 0 : attr->mode; |
f67cf491 MW |
1555 | } |
1556 | ||
bfe778ac | 1557 | static struct attribute_group switch_group = { |
f67cf491 | 1558 | .is_visible = switch_attr_is_visible, |
bfe778ac MW |
1559 | .attrs = switch_attrs, |
1560 | }; | |
ca389f71 | 1561 | |
bfe778ac MW |
1562 | static const struct attribute_group *switch_groups[] = { |
1563 | &switch_group, | |
1564 | NULL, | |
1565 | }; | |
1566 | ||
1567 | static void tb_switch_release(struct device *dev) | |
1568 | { | |
1569 | struct tb_switch *sw = tb_to_switch(dev); | |
b433d010 | 1570 | struct tb_port *port; |
bfe778ac | 1571 | |
3e136768 MW |
1572 | dma_port_free(sw->dma_port); |
1573 | ||
b433d010 MW |
1574 | tb_switch_for_each_port(sw, port) { |
1575 | if (!port->disabled) { | |
1576 | ida_destroy(&port->in_hopids); | |
1577 | ida_destroy(&port->out_hopids); | |
0b2863ac MW |
1578 | } |
1579 | } | |
1580 | ||
bfe778ac | 1581 | kfree(sw->uuid); |
72ee3390 MW |
1582 | kfree(sw->device_name); |
1583 | kfree(sw->vendor_name); | |
a25c8b2f | 1584 | kfree(sw->ports); |
343fcb8c | 1585 | kfree(sw->drom); |
f67cf491 | 1586 | kfree(sw->key); |
a25c8b2f AN |
1587 | kfree(sw); |
1588 | } | |
1589 | ||
2d8ff0b5 MW |
1590 | /* |
1591 | * Currently only need to provide the callbacks. Everything else is handled | |
1592 | * in the connection manager. | |
1593 | */ | |
1594 | static int __maybe_unused tb_switch_runtime_suspend(struct device *dev) | |
1595 | { | |
4f7c2e0d MW |
1596 | struct tb_switch *sw = tb_to_switch(dev); |
1597 | const struct tb_cm_ops *cm_ops = sw->tb->cm_ops; | |
1598 | ||
1599 | if (cm_ops->runtime_suspend_switch) | |
1600 | return cm_ops->runtime_suspend_switch(sw); | |
1601 | ||
2d8ff0b5 MW |
1602 | return 0; |
1603 | } | |
1604 | ||
1605 | static int __maybe_unused tb_switch_runtime_resume(struct device *dev) | |
1606 | { | |
4f7c2e0d MW |
1607 | struct tb_switch *sw = tb_to_switch(dev); |
1608 | const struct tb_cm_ops *cm_ops = sw->tb->cm_ops; | |
1609 | ||
1610 | if (cm_ops->runtime_resume_switch) | |
1611 | return cm_ops->runtime_resume_switch(sw); | |
2d8ff0b5 MW |
1612 | return 0; |
1613 | } | |
1614 | ||
1615 | static const struct dev_pm_ops tb_switch_pm_ops = { | |
1616 | SET_RUNTIME_PM_OPS(tb_switch_runtime_suspend, tb_switch_runtime_resume, | |
1617 | NULL) | |
1618 | }; | |
1619 | ||
bfe778ac MW |
1620 | struct device_type tb_switch_type = { |
1621 | .name = "thunderbolt_device", | |
1622 | .release = tb_switch_release, | |
2d8ff0b5 | 1623 | .pm = &tb_switch_pm_ops, |
bfe778ac MW |
1624 | }; |
1625 | ||
2c3c4197 MW |
1626 | static int tb_switch_get_generation(struct tb_switch *sw) |
1627 | { | |
1628 | switch (sw->config.device_id) { | |
1629 | case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: | |
1630 | case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: | |
1631 | case PCI_DEVICE_ID_INTEL_LIGHT_PEAK: | |
1632 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C: | |
1633 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C: | |
1634 | case PCI_DEVICE_ID_INTEL_PORT_RIDGE: | |
1635 | case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_BRIDGE: | |
1636 | case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_BRIDGE: | |
1637 | return 1; | |
1638 | ||
1639 | case PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE: | |
1640 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE: | |
1641 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE: | |
1642 | return 2; | |
1643 | ||
1644 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE: | |
1645 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE: | |
1646 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE: | |
1647 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE: | |
1648 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE: | |
4bac471d RM |
1649 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE: |
1650 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE: | |
1651 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE: | |
3cdb9446 MW |
1652 | case PCI_DEVICE_ID_INTEL_ICL_NHI0: |
1653 | case PCI_DEVICE_ID_INTEL_ICL_NHI1: | |
2c3c4197 MW |
1654 | return 3; |
1655 | ||
1656 | default: | |
1657 | /* | |
1658 | * For unknown switches assume generation to be 1 to be | |
1659 | * on the safe side. | |
1660 | */ | |
1661 | tb_sw_warn(sw, "unsupported switch device id %#x\n", | |
1662 | sw->config.device_id); | |
1663 | return 1; | |
1664 | } | |
1665 | } | |
1666 | ||
a25c8b2f | 1667 | /** |
bfe778ac MW |
1668 | * tb_switch_alloc() - allocate a switch |
1669 | * @tb: Pointer to the owning domain | |
1670 | * @parent: Parent device for this switch | |
1671 | * @route: Route string for this switch | |
a25c8b2f | 1672 | * |
bfe778ac MW |
1673 | * Allocates and initializes a switch. Will not upload configuration to |
1674 | * the switch. For that you need to call tb_switch_configure() | |
1675 | * separately. The returned switch should be released by calling | |
1676 | * tb_switch_put(). | |
1677 | * | |
444ac384 MW |
1678 | * Return: Pointer to the allocated switch or ERR_PTR() in case of |
1679 | * failure. | |
a25c8b2f | 1680 | */ |
bfe778ac MW |
1681 | struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent, |
1682 | u64 route) | |
a25c8b2f | 1683 | { |
a25c8b2f | 1684 | struct tb_switch *sw; |
f0342e75 | 1685 | int upstream_port; |
444ac384 | 1686 | int i, ret, depth; |
f0342e75 MW |
1687 | |
1688 | /* Make sure we do not exceed maximum topology limit */ | |
1689 | depth = tb_route_length(route); | |
1690 | if (depth > TB_SWITCH_MAX_DEPTH) | |
444ac384 | 1691 | return ERR_PTR(-EADDRNOTAVAIL); |
f0342e75 MW |
1692 | |
1693 | upstream_port = tb_cfg_get_upstream_port(tb->ctl, route); | |
a25c8b2f | 1694 | if (upstream_port < 0) |
444ac384 | 1695 | return ERR_PTR(upstream_port); |
a25c8b2f AN |
1696 | |
1697 | sw = kzalloc(sizeof(*sw), GFP_KERNEL); | |
1698 | if (!sw) | |
444ac384 | 1699 | return ERR_PTR(-ENOMEM); |
a25c8b2f AN |
1700 | |
1701 | sw->tb = tb; | |
444ac384 MW |
1702 | ret = tb_cfg_read(tb->ctl, &sw->config, route, 0, TB_CFG_SWITCH, 0, 5); |
1703 | if (ret) | |
bfe778ac MW |
1704 | goto err_free_sw_ports; |
1705 | ||
daa5140f | 1706 | tb_dbg(tb, "current switch config:\n"); |
a25c8b2f AN |
1707 | tb_dump_switch(tb, &sw->config); |
1708 | ||
1709 | /* configure switch */ | |
1710 | sw->config.upstream_port_number = upstream_port; | |
f0342e75 MW |
1711 | sw->config.depth = depth; |
1712 | sw->config.route_hi = upper_32_bits(route); | |
1713 | sw->config.route_lo = lower_32_bits(route); | |
bfe778ac | 1714 | sw->config.enabled = 0; |
a25c8b2f AN |
1715 | |
1716 | /* initialize ports */ | |
1717 | sw->ports = kcalloc(sw->config.max_port_number + 1, sizeof(*sw->ports), | |
343fcb8c | 1718 | GFP_KERNEL); |
444ac384 MW |
1719 | if (!sw->ports) { |
1720 | ret = -ENOMEM; | |
bfe778ac | 1721 | goto err_free_sw_ports; |
444ac384 | 1722 | } |
a25c8b2f AN |
1723 | |
1724 | for (i = 0; i <= sw->config.max_port_number; i++) { | |
343fcb8c AN |
1725 | /* minimum setup for tb_find_cap and tb_drom_read to work */ |
1726 | sw->ports[i].sw = sw; | |
1727 | sw->ports[i].port = i; | |
a25c8b2f AN |
1728 | } |
1729 | ||
2c3c4197 MW |
1730 | sw->generation = tb_switch_get_generation(sw); |
1731 | ||
444ac384 MW |
1732 | ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_PLUG_EVENTS); |
1733 | if (ret < 0) { | |
da2da04b | 1734 | tb_sw_warn(sw, "cannot find TB_VSE_CAP_PLUG_EVENTS aborting\n"); |
bfe778ac | 1735 | goto err_free_sw_ports; |
ca389f71 | 1736 | } |
444ac384 | 1737 | sw->cap_plug_events = ret; |
ca389f71 | 1738 | |
444ac384 MW |
1739 | ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_LINK_CONTROLLER); |
1740 | if (ret > 0) | |
1741 | sw->cap_lc = ret; | |
a9be5582 | 1742 | |
f67cf491 MW |
1743 | /* Root switch is always authorized */ |
1744 | if (!route) | |
1745 | sw->authorized = true; | |
1746 | ||
bfe778ac MW |
1747 | device_initialize(&sw->dev); |
1748 | sw->dev.parent = parent; | |
1749 | sw->dev.bus = &tb_bus_type; | |
1750 | sw->dev.type = &tb_switch_type; | |
1751 | sw->dev.groups = switch_groups; | |
1752 | dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw)); | |
1753 | ||
1754 | return sw; | |
1755 | ||
1756 | err_free_sw_ports: | |
1757 | kfree(sw->ports); | |
1758 | kfree(sw); | |
1759 | ||
444ac384 | 1760 | return ERR_PTR(ret); |
bfe778ac MW |
1761 | } |
1762 | ||
e6b245cc MW |
1763 | /** |
1764 | * tb_switch_alloc_safe_mode() - allocate a switch that is in safe mode | |
1765 | * @tb: Pointer to the owning domain | |
1766 | * @parent: Parent device for this switch | |
1767 | * @route: Route string for this switch | |
1768 | * | |
1769 | * This creates a switch in safe mode. This means the switch pretty much | |
1770 | * lacks all capabilities except DMA configuration port before it is | |
1771 | * flashed with a valid NVM firmware. | |
1772 | * | |
1773 | * The returned switch must be released by calling tb_switch_put(). | |
1774 | * | |
444ac384 | 1775 | * Return: Pointer to the allocated switch or ERR_PTR() in case of failure |
e6b245cc MW |
1776 | */ |
1777 | struct tb_switch * | |
1778 | tb_switch_alloc_safe_mode(struct tb *tb, struct device *parent, u64 route) | |
1779 | { | |
1780 | struct tb_switch *sw; | |
1781 | ||
1782 | sw = kzalloc(sizeof(*sw), GFP_KERNEL); | |
1783 | if (!sw) | |
444ac384 | 1784 | return ERR_PTR(-ENOMEM); |
e6b245cc MW |
1785 | |
1786 | sw->tb = tb; | |
1787 | sw->config.depth = tb_route_length(route); | |
1788 | sw->config.route_hi = upper_32_bits(route); | |
1789 | sw->config.route_lo = lower_32_bits(route); | |
1790 | sw->safe_mode = true; | |
1791 | ||
1792 | device_initialize(&sw->dev); | |
1793 | sw->dev.parent = parent; | |
1794 | sw->dev.bus = &tb_bus_type; | |
1795 | sw->dev.type = &tb_switch_type; | |
1796 | sw->dev.groups = switch_groups; | |
1797 | dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw)); | |
1798 | ||
1799 | return sw; | |
1800 | } | |
1801 | ||
bfe778ac MW |
1802 | /** |
1803 | * tb_switch_configure() - Uploads configuration to the switch | |
1804 | * @sw: Switch to configure | |
1805 | * | |
1806 | * Call this function before the switch is added to the system. It will | |
1807 | * upload configuration to the switch and makes it available for the | |
1808 | * connection manager to use. | |
1809 | * | |
1810 | * Return: %0 in case of success and negative errno in case of failure | |
1811 | */ | |
1812 | int tb_switch_configure(struct tb_switch *sw) | |
1813 | { | |
1814 | struct tb *tb = sw->tb; | |
1815 | u64 route; | |
1816 | int ret; | |
1817 | ||
1818 | route = tb_route(sw); | |
daa5140f MW |
1819 | tb_dbg(tb, "initializing Switch at %#llx (depth: %d, up port: %d)\n", |
1820 | route, tb_route_length(route), sw->config.upstream_port_number); | |
bfe778ac MW |
1821 | |
1822 | if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL) | |
1823 | tb_sw_warn(sw, "unknown switch vendor id %#x\n", | |
1824 | sw->config.vendor_id); | |
1825 | ||
bfe778ac MW |
1826 | sw->config.enabled = 1; |
1827 | ||
1828 | /* upload configuration */ | |
1829 | ret = tb_sw_write(sw, 1 + (u32 *)&sw->config, TB_CFG_SWITCH, 1, 3); | |
1830 | if (ret) | |
1831 | return ret; | |
1832 | ||
e879a709 MW |
1833 | ret = tb_lc_configure_link(sw); |
1834 | if (ret) | |
1835 | return ret; | |
1836 | ||
bfe778ac MW |
1837 | return tb_plug_events_active(sw, true); |
1838 | } | |
1839 | ||
2cc12751 | 1840 | static int tb_switch_set_uuid(struct tb_switch *sw) |
bfe778ac MW |
1841 | { |
1842 | u32 uuid[4]; | |
a9be5582 | 1843 | int ret; |
bfe778ac MW |
1844 | |
1845 | if (sw->uuid) | |
a9be5582 | 1846 | return 0; |
bfe778ac MW |
1847 | |
1848 | /* | |
1849 | * The newer controllers include fused UUID as part of link | |
1850 | * controller specific registers | |
1851 | */ | |
a9be5582 MW |
1852 | ret = tb_lc_read_uuid(sw, uuid); |
1853 | if (ret) { | |
bfe778ac MW |
1854 | /* |
1855 | * ICM generates UUID based on UID and fills the upper | |
1856 | * two words with ones. This is not strictly following | |
1857 | * UUID format but we want to be compatible with it so | |
1858 | * we do the same here. | |
1859 | */ | |
1860 | uuid[0] = sw->uid & 0xffffffff; | |
1861 | uuid[1] = (sw->uid >> 32) & 0xffffffff; | |
1862 | uuid[2] = 0xffffffff; | |
1863 | uuid[3] = 0xffffffff; | |
1864 | } | |
1865 | ||
1866 | sw->uuid = kmemdup(uuid, sizeof(uuid), GFP_KERNEL); | |
2cc12751 | 1867 | if (!sw->uuid) |
a9be5582 MW |
1868 | return -ENOMEM; |
1869 | return 0; | |
bfe778ac MW |
1870 | } |
1871 | ||
e6b245cc | 1872 | static int tb_switch_add_dma_port(struct tb_switch *sw) |
3e136768 | 1873 | { |
e6b245cc MW |
1874 | u32 status; |
1875 | int ret; | |
1876 | ||
3e136768 MW |
1877 | switch (sw->generation) { |
1878 | case 3: | |
1879 | break; | |
1880 | ||
1881 | case 2: | |
1882 | /* Only root switch can be upgraded */ | |
1883 | if (tb_route(sw)) | |
e6b245cc | 1884 | return 0; |
3e136768 MW |
1885 | break; |
1886 | ||
1887 | default: | |
e6b245cc MW |
1888 | /* |
1889 | * DMA port is the only thing available when the switch | |
1890 | * is in safe mode. | |
1891 | */ | |
1892 | if (!sw->safe_mode) | |
1893 | return 0; | |
1894 | break; | |
3e136768 MW |
1895 | } |
1896 | ||
3f415e5e | 1897 | /* Root switch DMA port requires running firmware */ |
f07a3608 | 1898 | if (!tb_route(sw) && !tb_switch_is_icm(sw)) |
e6b245cc MW |
1899 | return 0; |
1900 | ||
3e136768 | 1901 | sw->dma_port = dma_port_alloc(sw); |
e6b245cc MW |
1902 | if (!sw->dma_port) |
1903 | return 0; | |
1904 | ||
3f415e5e MW |
1905 | if (sw->no_nvm_upgrade) |
1906 | return 0; | |
1907 | ||
e6b245cc MW |
1908 | /* |
1909 | * Check status of the previous flash authentication. If there | |
1910 | * is one we need to power cycle the switch in any case to make | |
1911 | * it functional again. | |
1912 | */ | |
1913 | ret = dma_port_flash_update_auth_status(sw->dma_port, &status); | |
1914 | if (ret <= 0) | |
1915 | return ret; | |
1916 | ||
1830b6ee MW |
1917 | /* Now we can allow root port to suspend again */ |
1918 | if (!tb_route(sw)) | |
1919 | nvm_authenticate_complete(sw); | |
1920 | ||
e6b245cc MW |
1921 | if (status) { |
1922 | tb_sw_info(sw, "switch flash authentication failed\n"); | |
2cc12751 AP |
1923 | ret = tb_switch_set_uuid(sw); |
1924 | if (ret) | |
1925 | return ret; | |
e6b245cc MW |
1926 | nvm_set_auth_status(sw, status); |
1927 | } | |
1928 | ||
1929 | tb_sw_info(sw, "power cycling the switch now\n"); | |
1930 | dma_port_power_cycle(sw->dma_port); | |
1931 | ||
1932 | /* | |
1933 | * We return error here which causes the switch adding failure. | |
1934 | * It should appear back after power cycle is complete. | |
1935 | */ | |
1936 | return -ESHUTDOWN; | |
3e136768 MW |
1937 | } |
1938 | ||
0d46c08d MW |
1939 | static void tb_switch_default_link_ports(struct tb_switch *sw) |
1940 | { | |
1941 | int i; | |
1942 | ||
1943 | for (i = 1; i <= sw->config.max_port_number; i += 2) { | |
1944 | struct tb_port *port = &sw->ports[i]; | |
1945 | struct tb_port *subordinate; | |
1946 | ||
1947 | if (!tb_port_is_null(port)) | |
1948 | continue; | |
1949 | ||
1950 | /* Check for the subordinate port */ | |
1951 | if (i == sw->config.max_port_number || | |
1952 | !tb_port_is_null(&sw->ports[i + 1])) | |
1953 | continue; | |
1954 | ||
1955 | /* Link them if not already done so (by DROM) */ | |
1956 | subordinate = &sw->ports[i + 1]; | |
1957 | if (!port->dual_link_port && !subordinate->dual_link_port) { | |
1958 | port->link_nr = 0; | |
1959 | port->dual_link_port = subordinate; | |
1960 | subordinate->link_nr = 1; | |
1961 | subordinate->dual_link_port = port; | |
1962 | ||
1963 | tb_sw_dbg(sw, "linked ports %d <-> %d\n", | |
1964 | port->port, subordinate->port); | |
1965 | } | |
1966 | } | |
1967 | } | |
1968 | ||
91c0c120 MW |
1969 | static bool tb_switch_lane_bonding_possible(struct tb_switch *sw) |
1970 | { | |
1971 | const struct tb_port *up = tb_upstream_port(sw); | |
1972 | ||
1973 | if (!up->dual_link_port || !up->dual_link_port->remote) | |
1974 | return false; | |
1975 | ||
1976 | return tb_lc_lane_bonding_possible(sw); | |
1977 | } | |
1978 | ||
1979 | static int tb_switch_update_link_attributes(struct tb_switch *sw) | |
1980 | { | |
1981 | struct tb_port *up; | |
1982 | bool change = false; | |
1983 | int ret; | |
1984 | ||
1985 | if (!tb_route(sw) || tb_switch_is_icm(sw)) | |
1986 | return 0; | |
1987 | ||
1988 | up = tb_upstream_port(sw); | |
1989 | ||
1990 | ret = tb_port_get_link_speed(up); | |
1991 | if (ret < 0) | |
1992 | return ret; | |
1993 | if (sw->link_speed != ret) | |
1994 | change = true; | |
1995 | sw->link_speed = ret; | |
1996 | ||
1997 | ret = tb_port_get_link_width(up); | |
1998 | if (ret < 0) | |
1999 | return ret; | |
2000 | if (sw->link_width != ret) | |
2001 | change = true; | |
2002 | sw->link_width = ret; | |
2003 | ||
2004 | /* Notify userspace that there is possible link attribute change */ | |
2005 | if (device_is_registered(&sw->dev) && change) | |
2006 | kobject_uevent(&sw->dev.kobj, KOBJ_CHANGE); | |
2007 | ||
2008 | return 0; | |
2009 | } | |
2010 | ||
2011 | /** | |
2012 | * tb_switch_lane_bonding_enable() - Enable lane bonding | |
2013 | * @sw: Switch to enable lane bonding | |
2014 | * | |
2015 | * Connection manager can call this function to enable lane bonding of a | |
2016 | * switch. If conditions are correct and both switches support the feature, | |
2017 | * lanes are bonded. It is safe to call this to any switch. | |
2018 | */ | |
2019 | int tb_switch_lane_bonding_enable(struct tb_switch *sw) | |
2020 | { | |
2021 | struct tb_switch *parent = tb_to_switch(sw->dev.parent); | |
2022 | struct tb_port *up, *down; | |
2023 | u64 route = tb_route(sw); | |
2024 | int ret; | |
2025 | ||
2026 | if (!route) | |
2027 | return 0; | |
2028 | ||
2029 | if (!tb_switch_lane_bonding_possible(sw)) | |
2030 | return 0; | |
2031 | ||
2032 | up = tb_upstream_port(sw); | |
2033 | down = tb_port_at(route, parent); | |
2034 | ||
2035 | if (!tb_port_is_width_supported(up, 2) || | |
2036 | !tb_port_is_width_supported(down, 2)) | |
2037 | return 0; | |
2038 | ||
2039 | ret = tb_port_lane_bonding_enable(up); | |
2040 | if (ret) { | |
2041 | tb_port_warn(up, "failed to enable lane bonding\n"); | |
2042 | return ret; | |
2043 | } | |
2044 | ||
2045 | ret = tb_port_lane_bonding_enable(down); | |
2046 | if (ret) { | |
2047 | tb_port_warn(down, "failed to enable lane bonding\n"); | |
2048 | tb_port_lane_bonding_disable(up); | |
2049 | return ret; | |
2050 | } | |
2051 | ||
2052 | tb_switch_update_link_attributes(sw); | |
2053 | ||
2054 | tb_sw_dbg(sw, "lane bonding enabled\n"); | |
2055 | return ret; | |
2056 | } | |
2057 | ||
2058 | /** | |
2059 | * tb_switch_lane_bonding_disable() - Disable lane bonding | |
2060 | * @sw: Switch whose lane bonding to disable | |
2061 | * | |
2062 | * Disables lane bonding between @sw and parent. This can be called even | |
2063 | * if lanes were not bonded originally. | |
2064 | */ | |
2065 | void tb_switch_lane_bonding_disable(struct tb_switch *sw) | |
2066 | { | |
2067 | struct tb_switch *parent = tb_to_switch(sw->dev.parent); | |
2068 | struct tb_port *up, *down; | |
2069 | ||
2070 | if (!tb_route(sw)) | |
2071 | return; | |
2072 | ||
2073 | up = tb_upstream_port(sw); | |
2074 | if (!up->bonded) | |
2075 | return; | |
2076 | ||
2077 | down = tb_port_at(tb_route(sw), parent); | |
2078 | ||
2079 | tb_port_lane_bonding_disable(up); | |
2080 | tb_port_lane_bonding_disable(down); | |
2081 | ||
2082 | tb_switch_update_link_attributes(sw); | |
2083 | tb_sw_dbg(sw, "lane bonding disabled\n"); | |
2084 | } | |
2085 | ||
bfe778ac MW |
2086 | /** |
2087 | * tb_switch_add() - Add a switch to the domain | |
2088 | * @sw: Switch to add | |
2089 | * | |
2090 | * This is the last step in adding switch to the domain. It will read | |
2091 | * identification information from DROM and initializes ports so that | |
2092 | * they can be used to connect other switches. The switch will be | |
2093 | * exposed to the userspace when this function successfully returns. To | |
2094 | * remove and release the switch, call tb_switch_remove(). | |
2095 | * | |
2096 | * Return: %0 in case of success and negative errno in case of failure | |
2097 | */ | |
2098 | int tb_switch_add(struct tb_switch *sw) | |
2099 | { | |
2100 | int i, ret; | |
2101 | ||
3e136768 MW |
2102 | /* |
2103 | * Initialize DMA control port now before we read DROM. Recent | |
2104 | * host controllers have more complete DROM on NVM that includes | |
2105 | * vendor and model identification strings which we then expose | |
2106 | * to the userspace. NVM can be accessed through DMA | |
2107 | * configuration based mailbox. | |
2108 | */ | |
e6b245cc | 2109 | ret = tb_switch_add_dma_port(sw); |
af99f696 MW |
2110 | if (ret) { |
2111 | dev_err(&sw->dev, "failed to add DMA port\n"); | |
f53e7676 | 2112 | return ret; |
af99f696 | 2113 | } |
343fcb8c | 2114 | |
e6b245cc MW |
2115 | if (!sw->safe_mode) { |
2116 | /* read drom */ | |
2117 | ret = tb_drom_read(sw); | |
2118 | if (ret) { | |
af99f696 | 2119 | dev_err(&sw->dev, "reading DROM failed\n"); |
e6b245cc MW |
2120 | return ret; |
2121 | } | |
daa5140f | 2122 | tb_sw_dbg(sw, "uid: %#llx\n", sw->uid); |
bfe778ac | 2123 | |
2cc12751 | 2124 | ret = tb_switch_set_uuid(sw); |
af99f696 MW |
2125 | if (ret) { |
2126 | dev_err(&sw->dev, "failed to set UUID\n"); | |
2cc12751 | 2127 | return ret; |
af99f696 | 2128 | } |
e6b245cc MW |
2129 | |
2130 | for (i = 0; i <= sw->config.max_port_number; i++) { | |
2131 | if (sw->ports[i].disabled) { | |
daa5140f | 2132 | tb_port_dbg(&sw->ports[i], "disabled by eeprom\n"); |
e6b245cc MW |
2133 | continue; |
2134 | } | |
2135 | ret = tb_init_port(&sw->ports[i]); | |
af99f696 MW |
2136 | if (ret) { |
2137 | dev_err(&sw->dev, "failed to initialize port %d\n", i); | |
e6b245cc | 2138 | return ret; |
af99f696 | 2139 | } |
343fcb8c | 2140 | } |
91c0c120 | 2141 | |
0d46c08d MW |
2142 | tb_switch_default_link_ports(sw); |
2143 | ||
91c0c120 MW |
2144 | ret = tb_switch_update_link_attributes(sw); |
2145 | if (ret) | |
2146 | return ret; | |
343fcb8c AN |
2147 | } |
2148 | ||
e6b245cc | 2149 | ret = device_add(&sw->dev); |
af99f696 MW |
2150 | if (ret) { |
2151 | dev_err(&sw->dev, "failed to add device: %d\n", ret); | |
e6b245cc | 2152 | return ret; |
af99f696 | 2153 | } |
e6b245cc | 2154 | |
a83bc4a5 MW |
2155 | if (tb_route(sw)) { |
2156 | dev_info(&sw->dev, "new device found, vendor=%#x device=%#x\n", | |
2157 | sw->vendor, sw->device); | |
2158 | if (sw->vendor_name && sw->device_name) | |
2159 | dev_info(&sw->dev, "%s %s\n", sw->vendor_name, | |
2160 | sw->device_name); | |
2161 | } | |
2162 | ||
e6b245cc | 2163 | ret = tb_switch_nvm_add(sw); |
2d8ff0b5 | 2164 | if (ret) { |
af99f696 | 2165 | dev_err(&sw->dev, "failed to add NVM devices\n"); |
e6b245cc | 2166 | device_del(&sw->dev); |
2d8ff0b5 MW |
2167 | return ret; |
2168 | } | |
e6b245cc | 2169 | |
2d8ff0b5 MW |
2170 | pm_runtime_set_active(&sw->dev); |
2171 | if (sw->rpm) { | |
2172 | pm_runtime_set_autosuspend_delay(&sw->dev, TB_AUTOSUSPEND_DELAY); | |
2173 | pm_runtime_use_autosuspend(&sw->dev); | |
2174 | pm_runtime_mark_last_busy(&sw->dev); | |
2175 | pm_runtime_enable(&sw->dev); | |
2176 | pm_request_autosuspend(&sw->dev); | |
2177 | } | |
2178 | ||
2179 | return 0; | |
bfe778ac | 2180 | } |
c90553b3 | 2181 | |
bfe778ac MW |
2182 | /** |
2183 | * tb_switch_remove() - Remove and release a switch | |
2184 | * @sw: Switch to remove | |
2185 | * | |
2186 | * This will remove the switch from the domain and release it after last | |
2187 | * reference count drops to zero. If there are switches connected below | |
2188 | * this switch, they will be removed as well. | |
2189 | */ | |
2190 | void tb_switch_remove(struct tb_switch *sw) | |
2191 | { | |
b433d010 | 2192 | struct tb_port *port; |
ca389f71 | 2193 | |
2d8ff0b5 MW |
2194 | if (sw->rpm) { |
2195 | pm_runtime_get_sync(&sw->dev); | |
2196 | pm_runtime_disable(&sw->dev); | |
2197 | } | |
2198 | ||
bfe778ac | 2199 | /* port 0 is the switch itself and never has a remote */ |
b433d010 MW |
2200 | tb_switch_for_each_port(sw, port) { |
2201 | if (tb_port_has_remote(port)) { | |
2202 | tb_switch_remove(port->remote->sw); | |
2203 | port->remote = NULL; | |
2204 | } else if (port->xdomain) { | |
2205 | tb_xdomain_remove(port->xdomain); | |
2206 | port->xdomain = NULL; | |
dfe40ca4 | 2207 | } |
bfe778ac MW |
2208 | } |
2209 | ||
2210 | if (!sw->is_unplugged) | |
2211 | tb_plug_events_active(sw, false); | |
e879a709 | 2212 | tb_lc_unconfigure_link(sw); |
bfe778ac | 2213 | |
e6b245cc | 2214 | tb_switch_nvm_remove(sw); |
a83bc4a5 MW |
2215 | |
2216 | if (tb_route(sw)) | |
2217 | dev_info(&sw->dev, "device disconnected\n"); | |
bfe778ac | 2218 | device_unregister(&sw->dev); |
a25c8b2f AN |
2219 | } |
2220 | ||
053596d9 | 2221 | /** |
aae20bb6 | 2222 | * tb_sw_set_unplugged() - set is_unplugged on switch and downstream switches |
053596d9 | 2223 | */ |
aae20bb6 | 2224 | void tb_sw_set_unplugged(struct tb_switch *sw) |
053596d9 | 2225 | { |
b433d010 MW |
2226 | struct tb_port *port; |
2227 | ||
053596d9 AN |
2228 | if (sw == sw->tb->root_switch) { |
2229 | tb_sw_WARN(sw, "cannot unplug root switch\n"); | |
2230 | return; | |
2231 | } | |
2232 | if (sw->is_unplugged) { | |
2233 | tb_sw_WARN(sw, "is_unplugged already set\n"); | |
2234 | return; | |
2235 | } | |
2236 | sw->is_unplugged = true; | |
b433d010 MW |
2237 | tb_switch_for_each_port(sw, port) { |
2238 | if (tb_port_has_remote(port)) | |
2239 | tb_sw_set_unplugged(port->remote->sw); | |
2240 | else if (port->xdomain) | |
2241 | port->xdomain->is_unplugged = true; | |
053596d9 AN |
2242 | } |
2243 | } | |
2244 | ||
23dd5bb4 AN |
2245 | int tb_switch_resume(struct tb_switch *sw) |
2246 | { | |
b433d010 MW |
2247 | struct tb_port *port; |
2248 | int err; | |
2249 | ||
daa5140f | 2250 | tb_sw_dbg(sw, "resuming switch\n"); |
23dd5bb4 | 2251 | |
08a5e4ce MW |
2252 | /* |
2253 | * Check for UID of the connected switches except for root | |
2254 | * switch which we assume cannot be removed. | |
2255 | */ | |
2256 | if (tb_route(sw)) { | |
2257 | u64 uid; | |
2258 | ||
7ea4cd6b MW |
2259 | /* |
2260 | * Check first that we can still read the switch config | |
2261 | * space. It may be that there is now another domain | |
2262 | * connected. | |
2263 | */ | |
2264 | err = tb_cfg_get_upstream_port(sw->tb->ctl, tb_route(sw)); | |
2265 | if (err < 0) { | |
2266 | tb_sw_info(sw, "switch not present anymore\n"); | |
2267 | return err; | |
2268 | } | |
2269 | ||
08a5e4ce MW |
2270 | err = tb_drom_read_uid_only(sw, &uid); |
2271 | if (err) { | |
2272 | tb_sw_warn(sw, "uid read failed\n"); | |
2273 | return err; | |
2274 | } | |
2275 | if (sw->uid != uid) { | |
2276 | tb_sw_info(sw, | |
2277 | "changed while suspended (uid %#llx -> %#llx)\n", | |
2278 | sw->uid, uid); | |
2279 | return -ENODEV; | |
2280 | } | |
23dd5bb4 AN |
2281 | } |
2282 | ||
2283 | /* upload configuration */ | |
2284 | err = tb_sw_write(sw, 1 + (u32 *) &sw->config, TB_CFG_SWITCH, 1, 3); | |
2285 | if (err) | |
2286 | return err; | |
2287 | ||
e879a709 MW |
2288 | err = tb_lc_configure_link(sw); |
2289 | if (err) | |
2290 | return err; | |
2291 | ||
23dd5bb4 AN |
2292 | err = tb_plug_events_active(sw, true); |
2293 | if (err) | |
2294 | return err; | |
2295 | ||
2296 | /* check for surviving downstream switches */ | |
b433d010 | 2297 | tb_switch_for_each_port(sw, port) { |
7ea4cd6b | 2298 | if (!tb_port_has_remote(port) && !port->xdomain) |
23dd5bb4 | 2299 | continue; |
dfe40ca4 | 2300 | |
7ea4cd6b | 2301 | if (tb_wait_for_port(port, true) <= 0) { |
23dd5bb4 AN |
2302 | tb_port_warn(port, |
2303 | "lost during suspend, disconnecting\n"); | |
7ea4cd6b MW |
2304 | if (tb_port_has_remote(port)) |
2305 | tb_sw_set_unplugged(port->remote->sw); | |
2306 | else if (port->xdomain) | |
2307 | port->xdomain->is_unplugged = true; | |
2308 | } else if (tb_port_has_remote(port)) { | |
2309 | if (tb_switch_resume(port->remote->sw)) { | |
2310 | tb_port_warn(port, | |
2311 | "lost during suspend, disconnecting\n"); | |
2312 | tb_sw_set_unplugged(port->remote->sw); | |
2313 | } | |
23dd5bb4 AN |
2314 | } |
2315 | } | |
2316 | return 0; | |
2317 | } | |
2318 | ||
2319 | void tb_switch_suspend(struct tb_switch *sw) | |
2320 | { | |
b433d010 MW |
2321 | struct tb_port *port; |
2322 | int err; | |
2323 | ||
23dd5bb4 AN |
2324 | err = tb_plug_events_active(sw, false); |
2325 | if (err) | |
2326 | return; | |
2327 | ||
b433d010 MW |
2328 | tb_switch_for_each_port(sw, port) { |
2329 | if (tb_port_has_remote(port)) | |
2330 | tb_switch_suspend(port->remote->sw); | |
23dd5bb4 | 2331 | } |
5480dfc2 MW |
2332 | |
2333 | tb_lc_set_sleep(sw); | |
23dd5bb4 | 2334 | } |
f67cf491 MW |
2335 | |
2336 | struct tb_sw_lookup { | |
2337 | struct tb *tb; | |
2338 | u8 link; | |
2339 | u8 depth; | |
7c39ffe7 | 2340 | const uuid_t *uuid; |
8e9267bb | 2341 | u64 route; |
f67cf491 MW |
2342 | }; |
2343 | ||
418e3ea1 | 2344 | static int tb_switch_match(struct device *dev, const void *data) |
f67cf491 MW |
2345 | { |
2346 | struct tb_switch *sw = tb_to_switch(dev); | |
418e3ea1 | 2347 | const struct tb_sw_lookup *lookup = data; |
f67cf491 MW |
2348 | |
2349 | if (!sw) | |
2350 | return 0; | |
2351 | if (sw->tb != lookup->tb) | |
2352 | return 0; | |
2353 | ||
2354 | if (lookup->uuid) | |
2355 | return !memcmp(sw->uuid, lookup->uuid, sizeof(*lookup->uuid)); | |
2356 | ||
8e9267bb RM |
2357 | if (lookup->route) { |
2358 | return sw->config.route_lo == lower_32_bits(lookup->route) && | |
2359 | sw->config.route_hi == upper_32_bits(lookup->route); | |
2360 | } | |
2361 | ||
f67cf491 MW |
2362 | /* Root switch is matched only by depth */ |
2363 | if (!lookup->depth) | |
2364 | return !sw->depth; | |
2365 | ||
2366 | return sw->link == lookup->link && sw->depth == lookup->depth; | |
2367 | } | |
2368 | ||
2369 | /** | |
2370 | * tb_switch_find_by_link_depth() - Find switch by link and depth | |
2371 | * @tb: Domain the switch belongs | |
2372 | * @link: Link number the switch is connected | |
2373 | * @depth: Depth of the switch in link | |
2374 | * | |
2375 | * Returned switch has reference count increased so the caller needs to | |
2376 | * call tb_switch_put() when done with the switch. | |
2377 | */ | |
2378 | struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link, u8 depth) | |
2379 | { | |
2380 | struct tb_sw_lookup lookup; | |
2381 | struct device *dev; | |
2382 | ||
2383 | memset(&lookup, 0, sizeof(lookup)); | |
2384 | lookup.tb = tb; | |
2385 | lookup.link = link; | |
2386 | lookup.depth = depth; | |
2387 | ||
2388 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); | |
2389 | if (dev) | |
2390 | return tb_to_switch(dev); | |
2391 | ||
2392 | return NULL; | |
2393 | } | |
2394 | ||
2395 | /** | |
432019d6 | 2396 | * tb_switch_find_by_uuid() - Find switch by UUID |
f67cf491 MW |
2397 | * @tb: Domain the switch belongs |
2398 | * @uuid: UUID to look for | |
2399 | * | |
2400 | * Returned switch has reference count increased so the caller needs to | |
2401 | * call tb_switch_put() when done with the switch. | |
2402 | */ | |
7c39ffe7 | 2403 | struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid) |
f67cf491 MW |
2404 | { |
2405 | struct tb_sw_lookup lookup; | |
2406 | struct device *dev; | |
2407 | ||
2408 | memset(&lookup, 0, sizeof(lookup)); | |
2409 | lookup.tb = tb; | |
2410 | lookup.uuid = uuid; | |
2411 | ||
2412 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); | |
2413 | if (dev) | |
2414 | return tb_to_switch(dev); | |
2415 | ||
2416 | return NULL; | |
2417 | } | |
e6b245cc | 2418 | |
8e9267bb RM |
2419 | /** |
2420 | * tb_switch_find_by_route() - Find switch by route string | |
2421 | * @tb: Domain the switch belongs | |
2422 | * @route: Route string to look for | |
2423 | * | |
2424 | * Returned switch has reference count increased so the caller needs to | |
2425 | * call tb_switch_put() when done with the switch. | |
2426 | */ | |
2427 | struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route) | |
2428 | { | |
2429 | struct tb_sw_lookup lookup; | |
2430 | struct device *dev; | |
2431 | ||
2432 | if (!route) | |
2433 | return tb_switch_get(tb->root_switch); | |
2434 | ||
2435 | memset(&lookup, 0, sizeof(lookup)); | |
2436 | lookup.tb = tb; | |
2437 | lookup.route = route; | |
2438 | ||
2439 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); | |
2440 | if (dev) | |
2441 | return tb_to_switch(dev); | |
2442 | ||
2443 | return NULL; | |
2444 | } | |
2445 | ||
e6b245cc MW |
2446 | void tb_switch_exit(void) |
2447 | { | |
2448 | ida_destroy(&nvm_ida); | |
2449 | } |