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thunderbolt: Move CLx enabling into tb_enable_clx()
[linux-block.git] / drivers / thunderbolt / switch.c
CommitLineData
b2441318 1// SPDX-License-Identifier: GPL-2.0
a25c8b2f 2/*
15c6784c 3 * Thunderbolt driver - switch/port utility functions
a25c8b2f
AN		 4 *
5 * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com>
15c6784c 6 * Copyright (C) 2018, Intel Corporation
a25c8b2f
AN		 7 */
8
9#include <linux/delay.h>
e6b245cc 10#include <linux/idr.h>
87fa05b6 11#include <linux/module.h>
e6b245cc 12#include <linux/nvmem-provider.h>
2d8ff0b5 13#include <linux/pm_runtime.h>
09f11b6c 14#include <linux/sched/signal.h>
e6b245cc 15#include <linux/sizes.h>
10fefe56 16#include <linux/slab.h>
87fa05b6 17#include <linux/string_helpers.h>
a25c8b2f
AN		 18
19#include "tb.h"
20
e6b245cc
MW		 21/* Switch NVM support */
22
e6b245cc
MW		 23struct nvm_auth_status {
24 struct list_head list;
7c39ffe7 25 uuid_t uuid;
e6b245cc
MW		 26 u32 status;
27};
28
29/*
30 * Hold NVM authentication failure status per switch This information
31 * needs to stay around even when the switch gets power cycled so we
32 * keep it separately.
33 */
34static LIST_HEAD(nvm_auth_status_cache);
35static DEFINE_MUTEX(nvm_auth_status_lock);
36
37static struct nvm_auth_status *__nvm_get_auth_status(const struct tb_switch *sw)
38{
39 struct nvm_auth_status *st;
40
41 list_for_each_entry(st, &nvm_auth_status_cache, list) {
7c39ffe7 42 if (uuid_equal(&st->uuid, sw->uuid))
e6b245cc
MW		 43 return st;
44 }
45
46 return NULL;
47}
48
49static void nvm_get_auth_status(const struct tb_switch *sw, u32 *status)
50{
51 struct nvm_auth_status *st;
52
53 mutex_lock(&nvm_auth_status_lock);
54 st = __nvm_get_auth_status(sw);
55 mutex_unlock(&nvm_auth_status_lock);
56
57 *status = st ? st->status : 0;
58}
59
60static void nvm_set_auth_status(const struct tb_switch *sw, u32 status)
61{
62 struct nvm_auth_status *st;
63
64 if (WARN_ON(!sw->uuid))
65 return;
66
67 mutex_lock(&nvm_auth_status_lock);
68 st = __nvm_get_auth_status(sw);
69
70 if (!st) {
71 st = kzalloc(sizeof(*st), GFP_KERNEL);
72 if (!st)
73 goto unlock;
74
75 memcpy(&st->uuid, sw->uuid, sizeof(st->uuid));
76 INIT_LIST_HEAD(&st->list);
77 list_add_tail(&st->list, &nvm_auth_status_cache);
78 }
79
80 st->status = status;
81unlock:
82 mutex_unlock(&nvm_auth_status_lock);
83}
84
85static void nvm_clear_auth_status(const struct tb_switch *sw)
86{
87 struct nvm_auth_status *st;
88
89 mutex_lock(&nvm_auth_status_lock);
90 st = __nvm_get_auth_status(sw);
91 if (st) {
92 list_del(&st->list);
93 kfree(st);
94 }
95 mutex_unlock(&nvm_auth_status_lock);
96}
97
98static int nvm_validate_and_write(struct tb_switch *sw)
99{
aef9c693
SC		 100 unsigned int image_size;
101 const u8 *buf;
e6b245cc
MW		 102 int ret;
103
aef9c693
SC		 104 ret = tb_nvm_validate(sw->nvm);
105 if (ret)
106 return ret;
e6b245cc 107
aef9c693
SC		 108 ret = tb_nvm_write_headers(sw->nvm);
109 if (ret)
110 return ret;
e6b245cc 111
aef9c693
SC		 112 buf = sw->nvm->buf_data_start;
113 image_size = sw->nvm->buf_data_size;
e6b245cc 114
b0407983 115 if (tb_switch_is_usb4(sw))
4b794f80
ML		 116 ret = usb4_switch_nvm_write(sw, 0, buf, image_size);
117 else
118 ret = dma_port_flash_write(sw->dma_port, 0, buf, image_size);
aef9c693
SC		 119 if (ret)
120 return ret;
121
122 sw->nvm->flushed = true;
123 return 0;
e6b245cc
MW		 124}
125
b0407983 126static int nvm_authenticate_host_dma_port(struct tb_switch *sw)
e6b245cc 127{
7a7ebfa8 128 int ret = 0;
e6b245cc
MW		 129
130 /*
131 * Root switch NVM upgrade requires that we disconnect the
d1ff7024 132 * existing paths first (in case it is not in safe mode
e6b245cc
MW		 133 * already).
134 */
135 if (!sw->safe_mode) {
7a7ebfa8
MW		 136 u32 status;
137
d1ff7024 138 ret = tb_domain_disconnect_all_paths(sw->tb);
e6b245cc
MW		 139 if (ret)
140 return ret;
141 /*
142 * The host controller goes away pretty soon after this if
143 * everything goes well so getting timeout is expected.
144 */
145 ret = dma_port_flash_update_auth(sw->dma_port);
7a7ebfa8
MW		 146 if (!ret || ret == -ETIMEDOUT)
147 return 0;
148
149 /*
150 * Any error from update auth operation requires power
151 * cycling of the host router.
152 */
153 tb_sw_warn(sw, "failed to authenticate NVM, power cycling\n");
154 if (dma_port_flash_update_auth_status(sw->dma_port, &status) > 0)
155 nvm_set_auth_status(sw, status);
e6b245cc
MW		 156 }
157
158 /*
159 * From safe mode we can get out by just power cycling the
160 * switch.
161 */
162 dma_port_power_cycle(sw->dma_port);
7a7ebfa8 163 return ret;
e6b245cc
MW		 164}
165
b0407983 166static int nvm_authenticate_device_dma_port(struct tb_switch *sw)
e6b245cc
MW		 167{
168 int ret, retries = 10;
169
170 ret = dma_port_flash_update_auth(sw->dma_port);
7a7ebfa8
MW		 171 switch (ret) {
172 case 0:
173 case -ETIMEDOUT:
174 case -EACCES:
175 case -EINVAL:
176 /* Power cycle is required */
177 break;
178 default:
e6b245cc 179 return ret;
7a7ebfa8 180 }
e6b245cc
MW		 181
182 /*
183 * Poll here for the authentication status. It takes some time
184 * for the device to respond (we get timeout for a while). Once
185 * we get response the device needs to be power cycled in order
186 * to the new NVM to be taken into use.
187 */
188 do {
189 u32 status;
190
191 ret = dma_port_flash_update_auth_status(sw->dma_port, &status);
192 if (ret < 0 && ret != -ETIMEDOUT)
193 return ret;
194 if (ret > 0) {
195 if (status) {
196 tb_sw_warn(sw, "failed to authenticate NVM\n");
197 nvm_set_auth_status(sw, status);
198 }
199
200 tb_sw_info(sw, "power cycling the switch now\n");
201 dma_port_power_cycle(sw->dma_port);
202 return 0;
203 }
204
205 msleep(500);
206 } while (--retries);
207
208 return -ETIMEDOUT;
209}
210
b0407983
MW		 211static void nvm_authenticate_start_dma_port(struct tb_switch *sw)
212{
213 struct pci_dev *root_port;
214
215 /*
216 * During host router NVM upgrade we should not allow root port to
217 * go into D3cold because some root ports cannot trigger PME
218 * itself. To be on the safe side keep the root port in D0 during
219 * the whole upgrade process.
220 */
6ae72bfa 221 root_port = pcie_find_root_port(sw->tb->nhi->pdev);
b0407983
MW		 222 if (root_port)
223 pm_runtime_get_noresume(&root_port->dev);
224}
225
226static void nvm_authenticate_complete_dma_port(struct tb_switch *sw)
227{
228 struct pci_dev *root_port;
229
6ae72bfa 230 root_port = pcie_find_root_port(sw->tb->nhi->pdev);
b0407983
MW		 231 if (root_port)
232 pm_runtime_put(&root_port->dev);
233}
234
235static inline bool nvm_readable(struct tb_switch *sw)
236{
237 if (tb_switch_is_usb4(sw)) {
238 /*
239 * USB4 devices must support NVM operations but it is
240 * optional for hosts. Therefore we query the NVM sector
241 * size here and if it is supported assume NVM
242 * operations are implemented.
243 */
244 return usb4_switch_nvm_sector_size(sw) > 0;
245 }
246
247 /* Thunderbolt 2 and 3 devices support NVM through DMA port */
248 return !!sw->dma_port;
249}
250
251static inline bool nvm_upgradeable(struct tb_switch *sw)
252{
253 if (sw->no_nvm_upgrade)
254 return false;
255 return nvm_readable(sw);
256}
257
1cbf680f 258static int nvm_authenticate(struct tb_switch *sw, bool auth_only)
b0407983
MW		 259{
260 int ret;
261
1cbf680f
MW		 262 if (tb_switch_is_usb4(sw)) {
263 if (auth_only) {
264 ret = usb4_switch_nvm_set_offset(sw, 0);
265 if (ret)
266 return ret;
267 }
268 sw->nvm->authenticating = true;
b0407983 269 return usb4_switch_nvm_authenticate(sw);
1cbf680f 270 }
4e99c98e
AS		 271 if (auth_only)
272 return -EOPNOTSUPP;
b0407983 273
1cbf680f 274 sw->nvm->authenticating = true;
b0407983
MW		 275 if (!tb_route(sw)) {
276 nvm_authenticate_start_dma_port(sw);
277 ret = nvm_authenticate_host_dma_port(sw);
278 } else {
279 ret = nvm_authenticate_device_dma_port(sw);
280 }
281
282 return ret;
283}
284
7bfafaa5
SC		 285/**
286 * tb_switch_nvm_read() - Read router NVM
287 * @sw: Router whose NVM to read
288 * @address: Start address on the NVM
289 * @buf: Buffer where the read data is copied
290 * @size: Size of the buffer in bytes
291 *
292 * Reads from router NVM and returns the requested data in @buf. Locking
293 * is up to the caller. Returns %0 in success and negative errno in case
294 * of failure.
295 */
296int tb_switch_nvm_read(struct tb_switch *sw, unsigned int address, void *buf,
297 size_t size)
298{
299 if (tb_switch_is_usb4(sw))
300 return usb4_switch_nvm_read(sw, address, buf, size);
301 return dma_port_flash_read(sw->dma_port, address, buf, size);
302}
303
304static int nvm_read(void *priv, unsigned int offset, void *val, size_t bytes)
e6b245cc 305{
719a5fe8
MW		 306 struct tb_nvm *nvm = priv;
307 struct tb_switch *sw = tb_to_switch(nvm->dev);
2d8ff0b5
MW		 308 int ret;
309
310 pm_runtime_get_sync(&sw->dev);
4f7c2e0d
MW		 311
312 if (!mutex_trylock(&sw->tb->lock)) {
313 ret = restart_syscall();
314 goto out;
315 }
316
7bfafaa5 317 ret = tb_switch_nvm_read(sw, offset, val, bytes);
4f7c2e0d
MW		 318 mutex_unlock(&sw->tb->lock);
319
320out:
2d8ff0b5
MW		 321 pm_runtime_mark_last_busy(&sw->dev);
322 pm_runtime_put_autosuspend(&sw->dev);
e6b245cc 323
2d8ff0b5 324 return ret;
e6b245cc
MW		 325}
326
7bfafaa5 327static int nvm_write(void *priv, unsigned int offset, void *val, size_t bytes)
e6b245cc 328{
719a5fe8
MW		 329 struct tb_nvm *nvm = priv;
330 struct tb_switch *sw = tb_to_switch(nvm->dev);
331 int ret;
e6b245cc 332
09f11b6c
MW		 333 if (!mutex_trylock(&sw->tb->lock))
334 return restart_syscall();
e6b245cc
MW		 335
336 /*
337 * Since writing the NVM image might require some special steps,
338 * for example when CSS headers are written, we cache the image
339 * locally here and handle the special cases when the user asks
340 * us to authenticate the image.
341 */
719a5fe8 342 ret = tb_nvm_write_buf(nvm, offset, val, bytes);
09f11b6c 343 mutex_unlock(&sw->tb->lock);
e6b245cc
MW		 344
345 return ret;
346}
347
e6b245cc
MW		 348static int tb_switch_nvm_add(struct tb_switch *sw)
349{
719a5fe8 350 struct tb_nvm *nvm;
e6b245cc
MW		 351 int ret;
352
b0407983 353 if (!nvm_readable(sw))
e6b245cc
MW		 354 return 0;
355
aef9c693
SC		 356 nvm = tb_nvm_alloc(&sw->dev);
357 if (IS_ERR(nvm)) {
358 ret = PTR_ERR(nvm) == -EOPNOTSUPP ? 0 : PTR_ERR(nvm);
359 goto err_nvm;
b0407983
MW		 360 }
361
aef9c693
SC		 362 ret = tb_nvm_read_version(nvm);
363 if (ret)
364 goto err_nvm;
e6b245cc
MW		 365
366 /*
367 * If the switch is in safe-mode the only accessible portion of
368 * the NVM is the non-active one where userspace is expected to
369 * write new functional NVM.
370 */
371 if (!sw->safe_mode) {
aef9c693 372 ret = tb_nvm_add_active(nvm, nvm_read);
719a5fe8
MW		 373 if (ret)
374 goto err_nvm;
e6b245cc
MW		 375 }
376
3f415e5e 377 if (!sw->no_nvm_upgrade) {
aef9c693 378 ret = tb_nvm_add_non_active(nvm, nvm_write);
719a5fe8
MW		 379 if (ret)
380 goto err_nvm;
e6b245cc 381 }
e6b245cc 382
e6b245cc 383 sw->nvm = nvm;
e6b245cc
MW		 384 return 0;
385
719a5fe8 386err_nvm:
aef9c693
SC		 387 tb_sw_dbg(sw, "NVM upgrade disabled\n");
388 sw->no_nvm_upgrade = true;
389 if (!IS_ERR(nvm))
390 tb_nvm_free(nvm);
391
e6b245cc
MW		 392 return ret;
393}
394
395static void tb_switch_nvm_remove(struct tb_switch *sw)
396{
719a5fe8 397 struct tb_nvm *nvm;
e6b245cc 398
e6b245cc
MW		 399 nvm = sw->nvm;
400 sw->nvm = NULL;
e6b245cc
MW		 401
402 if (!nvm)
403 return;
404
405 /* Remove authentication status in case the switch is unplugged */
406 if (!nvm->authenticating)
407 nvm_clear_auth_status(sw);
408
719a5fe8 409 tb_nvm_free(nvm);
e6b245cc
MW		 410}
411
a25c8b2f
AN		 412/* port utility functions */
413
1c561e4e 414static const char *tb_port_type(const struct tb_regs_port_header *port)
a25c8b2f
AN		 415{
416 switch (port->type >> 16) {
417 case 0:
418 switch ((u8) port->type) {
419 case 0:
420 return "Inactive";
421 case 1:
422 return "Port";
423 case 2:
424 return "NHI";
425 default:
426 return "unknown";
427 }
428 case 0x2:
429 return "Ethernet";
430 case 0x8:
431 return "SATA";
432 case 0xe:
433 return "DP/HDMI";
434 case 0x10:
435 return "PCIe";
436 case 0x20:
437 return "USB";
438 default:
439 return "unknown";
440 }
441}
442
56ad3aef 443static void tb_dump_port(struct tb *tb, const struct tb_port *port)
a25c8b2f 444{
56ad3aef
MW		 445 const struct tb_regs_port_header *regs = &port->config;
446
daa5140f
MW		 447 tb_dbg(tb,
448 " Port %d: %x:%x (Revision: %d, TB Version: %d, Type: %s (%#x))\n",
56ad3aef
MW		 449 regs->port_number, regs->vendor_id, regs->device_id,
450 regs->revision, regs->thunderbolt_version, tb_port_type(regs),
451 regs->type);
daa5140f 452 tb_dbg(tb, " Max hop id (in/out): %d/%d\n",
56ad3aef
MW		 453 regs->max_in_hop_id, regs->max_out_hop_id);
454 tb_dbg(tb, " Max counters: %d\n", regs->max_counters);
455 tb_dbg(tb, " NFC Credits: %#x\n", regs->nfc_credits);
456 tb_dbg(tb, " Credits (total/control): %u/%u\n", port->total_credits,
457 port->ctl_credits);
a25c8b2f
AN		 458}
459
9da672a4
AN		 460/**
461 * tb_port_state() - get connectedness state of a port
5cc0df9c 462 * @port: the port to check
9da672a4
AN		 463 *
464 * The port must have a TB_CAP_PHY (i.e. it should be a real port).
465 *
466 * Return: Returns an enum tb_port_state on success or an error code on failure.
467 */
5cc0df9c 468int tb_port_state(struct tb_port *port)
9da672a4
AN		 469{
470 struct tb_cap_phy phy;
471 int res;
472 if (port->cap_phy == 0) {
473 tb_port_WARN(port, "does not have a PHY\n");
474 return -EINVAL;
475 }
476 res = tb_port_read(port, &phy, TB_CFG_PORT, port->cap_phy, 2);
477 if (res)
478 return res;
479 return phy.state;
480}
481
482/**
483 * tb_wait_for_port() - wait for a port to become ready
5c6b471b
MW		 484 * @port: Port to wait
485 * @wait_if_unplugged: Wait also when port is unplugged
9da672a4
AN		 486 *
487 * Wait up to 1 second for a port to reach state TB_PORT_UP. If
488 * wait_if_unplugged is set then we also wait if the port is in state
489 * TB_PORT_UNPLUGGED (it takes a while for the device to be registered after
490 * switch resume). Otherwise we only wait if a device is registered but the link
491 * has not yet been established.
492 *
493 * Return: Returns an error code on failure. Returns 0 if the port is not
494 * connected or failed to reach state TB_PORT_UP within one second. Returns 1
495 * if the port is connected and in state TB_PORT_UP.
496 */
497int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged)
498{
499 int retries = 10;
500 int state;
501 if (!port->cap_phy) {
502 tb_port_WARN(port, "does not have PHY\n");
503 return -EINVAL;
504 }
505 if (tb_is_upstream_port(port)) {
506 tb_port_WARN(port, "is the upstream port\n");
507 return -EINVAL;
508 }
509
510 while (retries--) {
511 state = tb_port_state(port);
e70a8f36
MW		 512 switch (state) {
513 case TB_PORT_DISABLED:
62efe699 514 tb_port_dbg(port, "is disabled (state: 0)\n");
9da672a4 515 return 0;
e70a8f36
MW		 516
517 case TB_PORT_UNPLUGGED:
9da672a4
AN		 518 if (wait_if_unplugged) {
519 /* used during resume */
62efe699
MW		 520 tb_port_dbg(port,
521 "is unplugged (state: 7), retrying...\n");
9da672a4 522 msleep(100);
e70a8f36 523 break;
9da672a4 524 }
62efe699 525 tb_port_dbg(port, "is unplugged (state: 7)\n");
9da672a4 526 return 0;
e70a8f36
MW		 527
528 case TB_PORT_UP:
529 case TB_PORT_TX_CL0S:
530 case TB_PORT_RX_CL0S:
531 case TB_PORT_CL1:
532 case TB_PORT_CL2:
533 tb_port_dbg(port, "is connected, link is up (state: %d)\n", state);
9da672a4 534 return 1;
e70a8f36
MW		 535
536 default:
537 if (state < 0)
538 return state;
539
540 /*
541 * After plug-in the state is TB_PORT_CONNECTING. Give it some
542 * time.
543 */
544 tb_port_dbg(port,
545 "is connected, link is not up (state: %d), retrying...\n",
546 state);
547 msleep(100);
9da672a4
AN		 548 }
549
9da672a4
AN		 550 }
551 tb_port_warn(port,
552 "failed to reach state TB_PORT_UP. Ignoring port...\n");
553 return 0;
554}
555
520b6702
AN		 556/**
557 * tb_port_add_nfc_credits() - add/remove non flow controlled credits to port
5c6b471b
MW		 558 * @port: Port to add/remove NFC credits
559 * @credits: Credits to add/remove
520b6702
AN		 560 *
561 * Change the number of NFC credits allocated to @port by @credits. To remove
562 * NFC credits pass a negative amount of credits.
563 *
564 * Return: Returns 0 on success or an error code on failure.
565 */
566int tb_port_add_nfc_credits(struct tb_port *port, int credits)
567{
c5ee6feb
MW		 568 u32 nfc_credits;
569
570 if (credits == 0 || port->sw->is_unplugged)
520b6702 571 return 0;
c5ee6feb 572
edfbd68b
MW		 573 /*
574 * USB4 restricts programming NFC buffers to lane adapters only
575 * so skip other ports.
576 */
577 if (tb_switch_is_usb4(port->sw) && !tb_port_is_null(port))
578 return 0;
579
8f57d478 580 nfc_credits = port->config.nfc_credits & ADP_CS_4_NFC_BUFFERS_MASK;
6cb27a04
MW		 581 if (credits < 0)
582 credits = max_t(int, -nfc_credits, credits);
583
c5ee6feb
MW		 584 nfc_credits += credits;
585
8f57d478
MW		 586 tb_port_dbg(port, "adding %d NFC credits to %lu", credits,
587 port->config.nfc_credits & ADP_CS_4_NFC_BUFFERS_MASK);
c5ee6feb 588
8f57d478 589 port->config.nfc_credits &= ~ADP_CS_4_NFC_BUFFERS_MASK;
c5ee6feb
MW		 590 port->config.nfc_credits |= nfc_credits;
591
520b6702 592 return tb_port_write(port, &port->config.nfc_credits,
8f57d478 593 TB_CFG_PORT, ADP_CS_4, 1);
520b6702
AN		 594}
595
596/**
597 * tb_port_clear_counter() - clear a counter in TB_CFG_COUNTER
5c6b471b
MW		 598 * @port: Port whose counters to clear
599 * @counter: Counter index to clear
520b6702
AN		 600 *
601 * Return: Returns 0 on success or an error code on failure.
602 */
603int tb_port_clear_counter(struct tb_port *port, int counter)
604{
605 u32 zero[3] = { 0, 0, 0 };
62efe699 606 tb_port_dbg(port, "clearing counter %d\n", counter);
520b6702
AN		 607 return tb_port_write(port, zero, TB_CFG_COUNTERS, 3 * counter, 3);
608}
609
b0407983
MW		 610/**
611 * tb_port_unlock() - Unlock downstream port
612 * @port: Port to unlock
613 *
614 * Needed for USB4 but can be called for any CIO/USB4 ports. Makes the
615 * downstream router accessible for CM.
616 */
617int tb_port_unlock(struct tb_port *port)
618{
619 if (tb_switch_is_icm(port->sw))
620 return 0;
621 if (!tb_port_is_null(port))
622 return -EINVAL;
623 if (tb_switch_is_usb4(port->sw))
624 return usb4_port_unlock(port);
625 return 0;
626}
627
341d4518
MW		 628static int __tb_port_enable(struct tb_port *port, bool enable)
629{
630 int ret;
631 u32 phy;
632
633 if (!tb_port_is_null(port))
634 return -EINVAL;
635
636 ret = tb_port_read(port, &phy, TB_CFG_PORT,
637 port->cap_phy + LANE_ADP_CS_1, 1);
638 if (ret)
639 return ret;
640
641 if (enable)
642 phy &= ~LANE_ADP_CS_1_LD;
643 else
644 phy |= LANE_ADP_CS_1_LD;
645
90f720d2
MW		 646
647 ret = tb_port_write(port, &phy, TB_CFG_PORT,
648 port->cap_phy + LANE_ADP_CS_1, 1);
649 if (ret)
650 return ret;
651
87fa05b6 652 tb_port_dbg(port, "lane %s\n", str_enabled_disabled(enable));
90f720d2 653 return 0;
341d4518
MW		 654}
655
656/**
657 * tb_port_enable() - Enable lane adapter
658 * @port: Port to enable (can be %NULL)
659 *
660 * This is used for lane 0 and 1 adapters to enable it.
661 */
662int tb_port_enable(struct tb_port *port)
663{
664 return __tb_port_enable(port, true);
665}
666
667/**
668 * tb_port_disable() - Disable lane adapter
669 * @port: Port to disable (can be %NULL)
670 *
671 * This is used for lane 0 and 1 adapters to disable it.
672 */
673int tb_port_disable(struct tb_port *port)
674{
675 return __tb_port_enable(port, false);
676}
677
47ba5ae4 678/*
a25c8b2f
AN		 679 * tb_init_port() - initialize a port
680 *
681 * This is a helper method for tb_switch_alloc. Does not check or initialize
682 * any downstream switches.
683 *
684 * Return: Returns 0 on success or an error code on failure.
685 */
343fcb8c 686static int tb_init_port(struct tb_port *port)
a25c8b2f
AN		 687{
688 int res;
9da672a4 689 int cap;
343fcb8c 690
fb7a89ad
SM		 691 INIT_LIST_HEAD(&port->list);
692
693 /* Control adapter does not have configuration space */
694 if (!port->port)
695 return 0;
696
a25c8b2f 697 res = tb_port_read(port, &port->config, TB_CFG_PORT, 0, 8);
d94dcbb1
MW		 698 if (res) {
699 if (res == -ENODEV) {
700 tb_dbg(port->sw->tb, " Port %d: not implemented\n",
701 port->port);
8824d19b 702 port->disabled = true;
d94dcbb1
MW		 703 return 0;
704 }
a25c8b2f 705 return res;
d94dcbb1 706 }
a25c8b2f 707
9da672a4 708 /* Port 0 is the switch itself and has no PHY. */
fb7a89ad 709 if (port->config.type == TB_TYPE_PORT) {
da2da04b 710 cap = tb_port_find_cap(port, TB_PORT_CAP_PHY);
9da672a4
AN		 711
712 if (cap > 0)
713 port->cap_phy = cap;
714 else
715 tb_port_WARN(port, "non switch port without a PHY\n");
b0407983
MW		 716
717 cap = tb_port_find_cap(port, TB_PORT_CAP_USB4);
718 if (cap > 0)
719 port->cap_usb4 = cap;
56ad3aef
MW		 720
721 /*
722 * USB4 ports the buffers allocated for the control path
723 * can be read from the path config space. Legacy
724 * devices we use hard-coded value.
725 */
726 if (tb_switch_is_usb4(port->sw)) {
727 struct tb_regs_hop hop;
728
729 if (!tb_port_read(port, &hop, TB_CFG_HOPS, 0, 2))
730 port->ctl_credits = hop.initial_credits;
731 }
732 if (!port->ctl_credits)
733 port->ctl_credits = 2;
734
fb7a89ad 735 } else {
56183c88
MW		 736 cap = tb_port_find_cap(port, TB_PORT_CAP_ADAP);
737 if (cap > 0)
738 port->cap_adap = cap;
9da672a4
AN		 739 }
740
56ad3aef
MW		 741 port->total_credits =
742 (port->config.nfc_credits & ADP_CS_4_TOTAL_BUFFERS_MASK) >>
743 ADP_CS_4_TOTAL_BUFFERS_SHIFT;
744
745 tb_dump_port(port->sw->tb, port);
a25c8b2f 746 return 0;
a25c8b2f
AN		 747}
748
0b2863ac
MW		 749static int tb_port_alloc_hopid(struct tb_port *port, bool in, int min_hopid,
750 int max_hopid)
751{
752 int port_max_hopid;
753 struct ida *ida;
754
755 if (in) {
756 port_max_hopid = port->config.max_in_hop_id;
757 ida = &port->in_hopids;
758 } else {
759 port_max_hopid = port->config.max_out_hop_id;
760 ida = &port->out_hopids;
761 }
762
12676423
MW		 763 /*
764 * NHI can use HopIDs 1-max for other adapters HopIDs 0-7 are
765 * reserved.
766 */
a3cfebdc 767 if (!tb_port_is_nhi(port) && min_hopid < TB_PATH_MIN_HOPID)
0b2863ac
MW		 768 min_hopid = TB_PATH_MIN_HOPID;
769
770 if (max_hopid < 0 || max_hopid > port_max_hopid)
771 max_hopid = port_max_hopid;
772
773 return ida_simple_get(ida, min_hopid, max_hopid + 1, GFP_KERNEL);
774}
775
776/**
777 * tb_port_alloc_in_hopid() - Allocate input HopID from port
778 * @port: Port to allocate HopID for
779 * @min_hopid: Minimum acceptable input HopID
780 * @max_hopid: Maximum acceptable input HopID
781 *
782 * Return: HopID between @min_hopid and @max_hopid or negative errno in
783 * case of error.
784 */
785int tb_port_alloc_in_hopid(struct tb_port *port, int min_hopid, int max_hopid)
786{
787 return tb_port_alloc_hopid(port, true, min_hopid, max_hopid);
788}
789
790/**
791 * tb_port_alloc_out_hopid() - Allocate output HopID from port
792 * @port: Port to allocate HopID for
793 * @min_hopid: Minimum acceptable output HopID
794 * @max_hopid: Maximum acceptable output HopID
795 *
796 * Return: HopID between @min_hopid and @max_hopid or negative errno in
797 * case of error.
798 */
799int tb_port_alloc_out_hopid(struct tb_port *port, int min_hopid, int max_hopid)
800{
801 return tb_port_alloc_hopid(port, false, min_hopid, max_hopid);
802}
803
804/**
805 * tb_port_release_in_hopid() - Release allocated input HopID from port
806 * @port: Port whose HopID to release
807 * @hopid: HopID to release
808 */
809void tb_port_release_in_hopid(struct tb_port *port, int hopid)
810{
811 ida_simple_remove(&port->in_hopids, hopid);
812}
813
814/**
815 * tb_port_release_out_hopid() - Release allocated output HopID from port
816 * @port: Port whose HopID to release
817 * @hopid: HopID to release
818 */
819void tb_port_release_out_hopid(struct tb_port *port, int hopid)
820{
821 ida_simple_remove(&port->out_hopids, hopid);
822}
823
69eb79f7
MW		 824static inline bool tb_switch_is_reachable(const struct tb_switch *parent,
825 const struct tb_switch *sw)
826{
827 u64 mask = (1ULL << parent->config.depth * 8) - 1;
828 return (tb_route(parent) & mask) == (tb_route(sw) & mask);
829}
830
fb19fac1
MW		 831/**
832 * tb_next_port_on_path() - Return next port for given port on a path
833 * @start: Start port of the walk
834 * @end: End port of the walk
835 * @prev: Previous port (%NULL if this is the first)
836 *
837 * This function can be used to walk from one port to another if they
838 * are connected through zero or more switches. If the @prev is dual
839 * link port, the function follows that link and returns another end on
840 * that same link.
841 *
842 * If the @end port has been reached, return %NULL.
843 *
844 * Domain tb->lock must be held when this function is called.
845 */
846struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end,
847 struct tb_port *prev)
848{
849 struct tb_port *next;
850
851 if (!prev)
852 return start;
853
854 if (prev->sw == end->sw) {
855 if (prev == end)
856 return NULL;
857 return end;
858 }
859
69eb79f7
MW		 860 if (tb_switch_is_reachable(prev->sw, end->sw)) {
861 next = tb_port_at(tb_route(end->sw), prev->sw);
862 /* Walk down the topology if next == prev */
fb19fac1 863 if (prev->remote &&
69eb79f7 864 (next == prev || next->dual_link_port == prev))
fb19fac1 865 next = prev->remote;
fb19fac1
MW		 866 } else {
867 if (tb_is_upstream_port(prev)) {
868 next = prev->remote;
869 } else {
870 next = tb_upstream_port(prev->sw);
871 /*
872 * Keep the same link if prev and next are both
873 * dual link ports.
874 */
875 if (next->dual_link_port &&
876 next->link_nr != prev->link_nr) {
877 next = next->dual_link_port;
878 }
879 }
880 }
881
69eb79f7 882 return next != prev ? next : NULL;
fb19fac1
MW		 883}
884
5b7b8c0a
MW		 885/**
886 * tb_port_get_link_speed() - Get current link speed
887 * @port: Port to check (USB4 or CIO)
888 *
889 * Returns link speed in Gb/s or negative errno in case of failure.
890 */
891int tb_port_get_link_speed(struct tb_port *port)
91c0c120
MW		 892{
893 u32 val, speed;
894 int ret;
895
896 if (!port->cap_phy)
897 return -EINVAL;
898
899 ret = tb_port_read(port, &val, TB_CFG_PORT,
900 port->cap_phy + LANE_ADP_CS_1, 1);
901 if (ret)
902 return ret;
903
904 speed = (val & LANE_ADP_CS_1_CURRENT_SPEED_MASK) >>
905 LANE_ADP_CS_1_CURRENT_SPEED_SHIFT;
906 return speed == LANE_ADP_CS_1_CURRENT_SPEED_GEN3 ? 20 : 10;
907}
908
4210d50f
IH		 909/**
910 * tb_port_get_link_width() - Get current link width
911 * @port: Port to check (USB4 or CIO)
912 *
913 * Returns link width. Return values can be 1 (Single-Lane), 2 (Dual-Lane)
914 * or negative errno in case of failure.
915 */
916int tb_port_get_link_width(struct tb_port *port)
91c0c120
MW		 917{
918 u32 val;
919 int ret;
920
921 if (!port->cap_phy)
922 return -EINVAL;
923
924 ret = tb_port_read(port, &val, TB_CFG_PORT,
925 port->cap_phy + LANE_ADP_CS_1, 1);
926 if (ret)
927 return ret;
928
929 return (val & LANE_ADP_CS_1_CURRENT_WIDTH_MASK) >>
930 LANE_ADP_CS_1_CURRENT_WIDTH_SHIFT;
931}
932
933static bool tb_port_is_width_supported(struct tb_port *port, int width)
934{
935 u32 phy, widths;
936 int ret;
937
938 if (!port->cap_phy)
939 return false;
940
941 ret = tb_port_read(port, &phy, TB_CFG_PORT,
942 port->cap_phy + LANE_ADP_CS_0, 1);
943 if (ret)
e9d0e751 944 return false;
91c0c120
MW		 945
946 widths = (phy & LANE_ADP_CS_0_SUPPORTED_WIDTH_MASK) >>
947 LANE_ADP_CS_0_SUPPORTED_WIDTH_SHIFT;
948
949 return !!(widths & width);
950}
951
0e14dd5e
MW		 952/**
953 * tb_port_set_link_width() - Set target link width of the lane adapter
954 * @port: Lane adapter
955 * @width: Target link width (%1 or %2)
956 *
957 * Sets the target link width of the lane adapter to @width. Does not
958 * enable/disable lane bonding. For that call tb_port_set_lane_bonding().
959 *
960 * Return: %0 in case of success and negative errno in case of error
961 */
962int tb_port_set_link_width(struct tb_port *port, unsigned int width)
91c0c120
MW		 963{
964 u32 val;
965 int ret;
966
967 if (!port->cap_phy)
968 return -EINVAL;
969
970 ret = tb_port_read(port, &val, TB_CFG_PORT,
971 port->cap_phy + LANE_ADP_CS_1, 1);
972 if (ret)
973 return ret;
974
975 val &= ~LANE_ADP_CS_1_TARGET_WIDTH_MASK;
976 switch (width) {
977 case 1:
978 val |= LANE_ADP_CS_1_TARGET_WIDTH_SINGLE <<
979 LANE_ADP_CS_1_TARGET_WIDTH_SHIFT;
980 break;
981 case 2:
982 val |= LANE_ADP_CS_1_TARGET_WIDTH_DUAL <<
983 LANE_ADP_CS_1_TARGET_WIDTH_SHIFT;
984 break;
985 default:
986 return -EINVAL;
987 }
988
91c0c120
MW		 989 return tb_port_write(port, &val, TB_CFG_PORT,
990 port->cap_phy + LANE_ADP_CS_1, 1);
991}
992
0e14dd5e
MW		 993/**
994 * tb_port_set_lane_bonding() - Enable/disable lane bonding
995 * @port: Lane adapter
996 * @bonding: enable/disable bonding
997 *
998 * Enables or disables lane bonding. This should be called after target
999 * link width has been set (tb_port_set_link_width()). Note in most
1000 * cases one should use tb_port_lane_bonding_enable() instead to enable
1001 * lane bonding.
1002 *
1003 * As a side effect sets @port->bonding accordingly (and does the same
1004 * for lane 1 too).
1005 *
1006 * Return: %0 in case of success and negative errno in case of error
1007 */
1008int tb_port_set_lane_bonding(struct tb_port *port, bool bonding)
1009{
1010 u32 val;
1011 int ret;
1012
1013 if (!port->cap_phy)
1014 return -EINVAL;
1015
1016 ret = tb_port_read(port, &val, TB_CFG_PORT,
1017 port->cap_phy + LANE_ADP_CS_1, 1);
1018 if (ret)
1019 return ret;
1020
1021 if (bonding)
1022 val |= LANE_ADP_CS_1_LB;
1023 else
1024 val &= ~LANE_ADP_CS_1_LB;
1025
1026 ret = tb_port_write(port, &val, TB_CFG_PORT,
1027 port->cap_phy + LANE_ADP_CS_1, 1);
1028 if (ret)
1029 return ret;
1030
1031 /*
1032 * When lane 0 bonding is set it will affect lane 1 too so
1033 * update both.
1034 */
1035 port->bonded = bonding;
1036 port->dual_link_port->bonded = bonding;
1037
1038 return 0;
1039}
1040
5cc0df9c
IH		 1041/**
1042 * tb_port_lane_bonding_enable() - Enable bonding on port
1043 * @port: port to enable
1044 *
e7051bea
MW		 1045 * Enable bonding by setting the link width of the port and the other
1046 * port in case of dual link port. Does not wait for the link to
1047 * actually reach the bonded state so caller needs to call
1048 * tb_port_wait_for_link_width() before enabling any paths through the
1049 * link to make sure the link is in expected state.
5cc0df9c
IH		 1050 *
1051 * Return: %0 in case of success and negative errno in case of error
1052 */
1053int tb_port_lane_bonding_enable(struct tb_port *port)
91c0c120
MW		 1054{
1055 int ret;
1056
1057 /*
1058 * Enable lane bonding for both links if not already enabled by
1059 * for example the boot firmware.
1060 */
1061 ret = tb_port_get_link_width(port);
1062 if (ret == 1) {
1063 ret = tb_port_set_link_width(port, 2);
1064 if (ret)
0e14dd5e 1065 goto err_lane0;
91c0c120
MW		 1066 }
1067
1068 ret = tb_port_get_link_width(port->dual_link_port);
1069 if (ret == 1) {
1070 ret = tb_port_set_link_width(port->dual_link_port, 2);
0e14dd5e
MW		 1071 if (ret)
1072 goto err_lane0;
91c0c120
MW		 1073 }
1074
0e14dd5e
MW		 1075 ret = tb_port_set_lane_bonding(port, true);
1076 if (ret)
1077 goto err_lane1;
91c0c120
MW		 1078
1079 return 0;
0e14dd5e
MW		 1080
1081err_lane1:
1082 tb_port_set_link_width(port->dual_link_port, 1);
1083err_lane0:
1084 tb_port_set_link_width(port, 1);
1085 return ret;
91c0c120
MW		 1086}
1087
5cc0df9c
IH		 1088/**
1089 * tb_port_lane_bonding_disable() - Disable bonding on port
1090 * @port: port to disable
1091 *
1092 * Disable bonding by setting the link width of the port and the
1093 * other port in case of dual link port.
5cc0df9c
IH		 1094 */
1095void tb_port_lane_bonding_disable(struct tb_port *port)
91c0c120 1096{
0e14dd5e 1097 tb_port_set_lane_bonding(port, false);
91c0c120
MW		 1098 tb_port_set_link_width(port->dual_link_port, 1);
1099 tb_port_set_link_width(port, 1);
1100}
1101
e7051bea
MW		 1102/**
1103 * tb_port_wait_for_link_width() - Wait until link reaches specific width
1104 * @port: Port to wait for
1105 * @width: Expected link width (%1 or %2)
1106 * @timeout_msec: Timeout in ms how long to wait
1107 *
1108 * Should be used after both ends of the link have been bonded (or
1109 * bonding has been disabled) to wait until the link actually reaches
1110 * the expected state. Returns %-ETIMEDOUT if the @width was not reached
1111 * within the given timeout, %0 if it did.
1112 */
1113int tb_port_wait_for_link_width(struct tb_port *port, int width,
1114 int timeout_msec)
1115{
1116 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
1117 int ret;
1118
1119 do {
1120 ret = tb_port_get_link_width(port);
0a2e1667
MW		 1121 if (ret < 0) {
1122 /*
1123 * Sometimes we get port locked error when
1124 * polling the lanes so we can ignore it and
1125 * retry.
1126 */
1127 if (ret != -EACCES)
1128 return ret;
1129 } else if (ret == width) {
e7051bea 1130 return 0;
0a2e1667 1131 }
e7051bea
MW		 1132
1133 usleep_range(1000, 2000);
1134 } while (ktime_before(ktime_get(), timeout));
1135
1136 return -ETIMEDOUT;
1137}
1138
69fea377
MW		 1139static int tb_port_do_update_credits(struct tb_port *port)
1140{
1141 u32 nfc_credits;
1142 int ret;
1143
1144 ret = tb_port_read(port, &nfc_credits, TB_CFG_PORT, ADP_CS_4, 1);
1145 if (ret)
1146 return ret;
1147
1148 if (nfc_credits != port->config.nfc_credits) {
1149 u32 total;
1150
1151 total = (nfc_credits & ADP_CS_4_TOTAL_BUFFERS_MASK) >>
1152 ADP_CS_4_TOTAL_BUFFERS_SHIFT;
1153
1154 tb_port_dbg(port, "total credits changed %u -> %u\n",
1155 port->total_credits, total);
1156
1157 port->config.nfc_credits = nfc_credits;
1158 port->total_credits = total;
1159 }
1160
1161 return 0;
1162}
1163
1164/**
1165 * tb_port_update_credits() - Re-read port total credits
1166 * @port: Port to update
1167 *
1168 * After the link is bonded (or bonding was disabled) the port total
1169 * credits may change, so this function needs to be called to re-read
1170 * the credits. Updates also the second lane adapter.
1171 */
1172int tb_port_update_credits(struct tb_port *port)
1173{
1174 int ret;
1175
1176 ret = tb_port_do_update_credits(port);
1177 if (ret)
1178 return ret;
1179 return tb_port_do_update_credits(port->dual_link_port);
1180}
1181
fdb0887c
MW		 1182static int tb_port_start_lane_initialization(struct tb_port *port)
1183{
1184 int ret;
1185
1186 if (tb_switch_is_usb4(port->sw))
1187 return 0;
1188
1189 ret = tb_lc_start_lane_initialization(port);
1190 return ret == -EINVAL ? 0 : ret;
1191}
1192
3fb10ea4
RM		 1193/*
1194 * Returns true if the port had something (router, XDomain) connected
1195 * before suspend.
1196 */
1197static bool tb_port_resume(struct tb_port *port)
1198{
1199 bool has_remote = tb_port_has_remote(port);
1200
1201 if (port->usb4) {
1202 usb4_port_device_resume(port->usb4);
1203 } else if (!has_remote) {
1204 /*
1205 * For disconnected downstream lane adapters start lane
1206 * initialization now so we detect future connects.
1207 *
1208 * For XDomain start the lane initialzation now so the
1209 * link gets re-established.
1210 *
1211 * This is only needed for non-USB4 ports.
1212 */
1213 if (!tb_is_upstream_port(port) || port->xdomain)
1214 tb_port_start_lane_initialization(port);
1215 }
1216
1217 return has_remote || port->xdomain;
1218}
1219
e78db6f0
MW		 1220/**
1221 * tb_port_is_enabled() - Is the adapter port enabled
1222 * @port: Port to check
1223 */
1224bool tb_port_is_enabled(struct tb_port *port)
1225{
1226 switch (port->config.type) {
1227 case TB_TYPE_PCIE_UP:
1228 case TB_TYPE_PCIE_DOWN:
1229 return tb_pci_port_is_enabled(port);
1230
4f807e47
MW		 1231 case TB_TYPE_DP_HDMI_IN:
1232 case TB_TYPE_DP_HDMI_OUT:
1233 return tb_dp_port_is_enabled(port);
1234
e6f81858
RM		 1235 case TB_TYPE_USB3_UP:
1236 case TB_TYPE_USB3_DOWN:
1237 return tb_usb3_port_is_enabled(port);
1238
e78db6f0
MW		 1239 default:
1240 return false;
1241 }
1242}
1243
e6f81858
RM		 1244/**
1245 * tb_usb3_port_is_enabled() - Is the USB3 adapter port enabled
1246 * @port: USB3 adapter port to check
1247 */
1248bool tb_usb3_port_is_enabled(struct tb_port *port)
1249{
1250 u32 data;
1251
1252 if (tb_port_read(port, &data, TB_CFG_PORT,
1253 port->cap_adap + ADP_USB3_CS_0, 1))
1254 return false;
1255
1256 return !!(data & ADP_USB3_CS_0_PE);
1257}
1258
1259/**
1260 * tb_usb3_port_enable() - Enable USB3 adapter port
1261 * @port: USB3 adapter port to enable
1262 * @enable: Enable/disable the USB3 adapter
1263 */
1264int tb_usb3_port_enable(struct tb_port *port, bool enable)
1265{
1266 u32 word = enable ? (ADP_USB3_CS_0_PE | ADP_USB3_CS_0_V)
1267 : ADP_USB3_CS_0_V;
1268
1269 if (!port->cap_adap)
1270 return -ENXIO;
1271 return tb_port_write(port, &word, TB_CFG_PORT,
1272 port->cap_adap + ADP_USB3_CS_0, 1);
1273}
1274
0414bec5
MW		 1275/**
1276 * tb_pci_port_is_enabled() - Is the PCIe adapter port enabled
1277 * @port: PCIe port to check
1278 */
1279bool tb_pci_port_is_enabled(struct tb_port *port)
1280{
1281 u32 data;
1282
778bfca3
MW		 1283 if (tb_port_read(port, &data, TB_CFG_PORT,
1284 port->cap_adap + ADP_PCIE_CS_0, 1))
0414bec5
MW		 1285 return false;
1286
778bfca3 1287 return !!(data & ADP_PCIE_CS_0_PE);
0414bec5
MW		 1288}
1289
93f36ade
MW		 1290/**
1291 * tb_pci_port_enable() - Enable PCIe adapter port
1292 * @port: PCIe port to enable
1293 * @enable: Enable/disable the PCIe adapter
1294 */
1295int tb_pci_port_enable(struct tb_port *port, bool enable)
1296{
778bfca3 1297 u32 word = enable ? ADP_PCIE_CS_0_PE : 0x0;
93f36ade
MW		 1298 if (!port->cap_adap)
1299 return -ENXIO;
778bfca3
MW		 1300 return tb_port_write(port, &word, TB_CFG_PORT,
1301 port->cap_adap + ADP_PCIE_CS_0, 1);
93f36ade
MW		 1302}
1303
4f807e47
MW		 1304/**
1305 * tb_dp_port_hpd_is_active() - Is HPD already active
1306 * @port: DP out port to check
1307 *
1308 * Checks if the DP OUT adapter port has HDP bit already set.
1309 */
1310int tb_dp_port_hpd_is_active(struct tb_port *port)
1311{
1312 u32 data;
1313 int ret;
1314
98176380
MW		 1315 ret = tb_port_read(port, &data, TB_CFG_PORT,
1316 port->cap_adap + ADP_DP_CS_2, 1);
4f807e47
MW		 1317 if (ret)
1318 return ret;
1319
98176380 1320 return !!(data & ADP_DP_CS_2_HDP);
4f807e47
MW		 1321}
1322
1323/**
1324 * tb_dp_port_hpd_clear() - Clear HPD from DP IN port
1325 * @port: Port to clear HPD
1326 *
1327 * If the DP IN port has HDP set, this function can be used to clear it.
1328 */
1329int tb_dp_port_hpd_clear(struct tb_port *port)
1330{
1331 u32 data;
1332 int ret;
1333
98176380
MW		 1334 ret = tb_port_read(port, &data, TB_CFG_PORT,
1335 port->cap_adap + ADP_DP_CS_3, 1);
4f807e47
MW		 1336 if (ret)
1337 return ret;
1338
98176380
MW		 1339 data |= ADP_DP_CS_3_HDPC;
1340 return tb_port_write(port, &data, TB_CFG_PORT,
1341 port->cap_adap + ADP_DP_CS_3, 1);
4f807e47
MW		 1342}
1343
1344/**
1345 * tb_dp_port_set_hops() - Set video/aux Hop IDs for DP port
1346 * @port: DP IN/OUT port to set hops
1347 * @video: Video Hop ID
1348 * @aux_tx: AUX TX Hop ID
1349 * @aux_rx: AUX RX Hop ID
1350 *
e5bb88e9
MW		 1351 * Programs specified Hop IDs for DP IN/OUT port. Can be called for USB4
1352 * router DP adapters too but does not program the values as the fields
1353 * are read-only.
4f807e47
MW		 1354 */
1355int tb_dp_port_set_hops(struct tb_port *port, unsigned int video,
1356 unsigned int aux_tx, unsigned int aux_rx)
1357{
1358 u32 data[2];
1359 int ret;
1360
e5bb88e9
MW		 1361 if (tb_switch_is_usb4(port->sw))
1362 return 0;
1363
98176380
MW		 1364 ret = tb_port_read(port, data, TB_CFG_PORT,
1365 port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data));
4f807e47
MW		 1366 if (ret)
1367 return ret;
1368
98176380
MW		 1369 data[0] &= ~ADP_DP_CS_0_VIDEO_HOPID_MASK;
1370 data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK;
1371 data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK;
4f807e47 1372
98176380
MW		 1373 data[0] |= (video << ADP_DP_CS_0_VIDEO_HOPID_SHIFT) &
1374 ADP_DP_CS_0_VIDEO_HOPID_MASK;
1375 data[1] |= aux_tx & ADP_DP_CS_1_AUX_TX_HOPID_MASK;
1376 data[1] |= (aux_rx << ADP_DP_CS_1_AUX_RX_HOPID_SHIFT) &
1377 ADP_DP_CS_1_AUX_RX_HOPID_MASK;
4f807e47 1378
98176380
MW		 1379 return tb_port_write(port, data, TB_CFG_PORT,
1380 port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data));
4f807e47
MW		 1381}
1382
1383/**
1384 * tb_dp_port_is_enabled() - Is DP adapter port enabled
1385 * @port: DP adapter port to check
1386 */
1387bool tb_dp_port_is_enabled(struct tb_port *port)
1388{
fd5c46b7 1389 u32 data[2];
4f807e47 1390
98176380 1391 if (tb_port_read(port, data, TB_CFG_PORT, port->cap_adap + ADP_DP_CS_0,
fd5c46b7 1392 ARRAY_SIZE(data)))
4f807e47
MW		 1393 return false;
1394
98176380 1395 return !!(data[0] & (ADP_DP_CS_0_VE | ADP_DP_CS_0_AE));
4f807e47
MW		 1396}
1397
1398/**
1399 * tb_dp_port_enable() - Enables/disables DP paths of a port
1400 * @port: DP IN/OUT port
1401 * @enable: Enable/disable DP path
1402 *
1403 * Once Hop IDs are programmed DP paths can be enabled or disabled by
1404 * calling this function.
1405 */
1406int tb_dp_port_enable(struct tb_port *port, bool enable)
1407{
fd5c46b7 1408 u32 data[2];
4f807e47
MW		 1409 int ret;
1410
98176380
MW		 1411 ret = tb_port_read(port, data, TB_CFG_PORT,
1412 port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data));
4f807e47
MW		 1413 if (ret)
1414 return ret;
1415
1416 if (enable)
98176380 1417 data[0] |= ADP_DP_CS_0_VE | ADP_DP_CS_0_AE;
4f807e47 1418 else
98176380 1419 data[0] &= ~(ADP_DP_CS_0_VE | ADP_DP_CS_0_AE);
4f807e47 1420
98176380
MW		 1421 return tb_port_write(port, data, TB_CFG_PORT,
1422 port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data));
4f807e47
MW		 1423}
1424
a25c8b2f
AN		 1425/* switch utility functions */
1426
b0407983
MW		 1427static const char *tb_switch_generation_name(const struct tb_switch *sw)
1428{
1429 switch (sw->generation) {
1430 case 1:
1431 return "Thunderbolt 1";
1432 case 2:
1433 return "Thunderbolt 2";
1434 case 3:
1435 return "Thunderbolt 3";
1436 case 4:
1437 return "USB4";
1438 default:
1439 return "Unknown";
1440 }
1441}
1442
1443static void tb_dump_switch(const struct tb *tb, const struct tb_switch *sw)
a25c8b2f 1444{
b0407983
MW		 1445 const struct tb_regs_switch_header *regs = &sw->config;
1446
1447 tb_dbg(tb, " %s Switch: %x:%x (Revision: %d, TB Version: %d)\n",
1448 tb_switch_generation_name(sw), regs->vendor_id, regs->device_id,
1449 regs->revision, regs->thunderbolt_version);
1450 tb_dbg(tb, " Max Port Number: %d\n", regs->max_port_number);
daa5140f
MW		 1451 tb_dbg(tb, " Config:\n");
1452 tb_dbg(tb,
a25c8b2f 1453 " Upstream Port Number: %d Depth: %d Route String: %#llx Enabled: %d, PlugEventsDelay: %dms\n",
b0407983
MW		 1454 regs->upstream_port_number, regs->depth,
1455 (((u64) regs->route_hi) << 32) | regs->route_lo,
1456 regs->enabled, regs->plug_events_delay);
daa5140f 1457 tb_dbg(tb, " unknown1: %#x unknown4: %#x\n",
b0407983 1458 regs->__unknown1, regs->__unknown4);
a25c8b2f
AN		 1459}
1460
23dd5bb4 1461/**
2c2a2327 1462 * tb_switch_reset() - reconfigure route, enable and send TB_CFG_PKG_RESET
356b6c4e 1463 * @sw: Switch to reset
23dd5bb4
AN		 1464 *
1465 * Return: Returns 0 on success or an error code on failure.
1466 */
356b6c4e 1467int tb_switch_reset(struct tb_switch *sw)
23dd5bb4
AN		 1468{
1469 struct tb_cfg_result res;
356b6c4e
MW		 1470
1471 if (sw->generation > 1)
1472 return 0;
1473
1474 tb_sw_dbg(sw, "resetting switch\n");
1475
1476 res.err = tb_sw_write(sw, ((u32 *) &sw->config) + 2,
1477 TB_CFG_SWITCH, 2, 2);
23dd5bb4
AN		 1478 if (res.err)
1479 return res.err;
bda83aec 1480 res = tb_cfg_reset(sw->tb->ctl, tb_route(sw));
23dd5bb4
AN		 1481 if (res.err > 0)
1482 return -EIO;
1483 return res.err;
1484}
1485
1639664f
GF		 1486/**
1487 * tb_switch_wait_for_bit() - Wait for specified value of bits in offset
1488 * @sw: Router to read the offset value from
1489 * @offset: Offset in the router config space to read from
1490 * @bit: Bit mask in the offset to wait for
1491 * @value: Value of the bits to wait for
1492 * @timeout_msec: Timeout in ms how long to wait
1493 *
1494 * Wait till the specified bits in specified offset reach specified value.
1495 * Returns %0 in case of success, %-ETIMEDOUT if the @value was not reached
1496 * within the given timeout or a negative errno in case of failure.
1497 */
1498int tb_switch_wait_for_bit(struct tb_switch *sw, u32 offset, u32 bit,
1499 u32 value, int timeout_msec)
1500{
1501 ktime_t timeout = ktime_add_ms(ktime_get(), timeout_msec);
1502
1503 do {
1504 u32 val;
1505 int ret;
1506
1507 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1);
1508 if (ret)
1509 return ret;
1510
1511 if ((val & bit) == value)
1512 return 0;
1513
1514 usleep_range(50, 100);
1515 } while (ktime_before(ktime_get(), timeout));
1516
1517 return -ETIMEDOUT;
1518}
1519
47ba5ae4 1520/*
ca389f71
AN		 1521 * tb_plug_events_active() - enable/disable plug events on a switch
1522 *
1523 * Also configures a sane plug_events_delay of 255ms.
1524 *
1525 * Return: Returns 0 on success or an error code on failure.
1526 */
1527static int tb_plug_events_active(struct tb_switch *sw, bool active)
1528{
1529 u32 data;
1530 int res;
1531
5cb6ed31 1532 if (tb_switch_is_icm(sw) || tb_switch_is_usb4(sw))
bfe778ac
MW		 1533 return 0;
1534
ca389f71
AN		 1535 sw->config.plug_events_delay = 0xff;
1536 res = tb_sw_write(sw, ((u32 *) &sw->config) + 4, TB_CFG_SWITCH, 4, 1);
1537 if (res)
1538 return res;
1539
1540 res = tb_sw_read(sw, &data, TB_CFG_SWITCH, sw->cap_plug_events + 1, 1);
1541 if (res)
1542 return res;
1543
1544 if (active) {
1545 data = data & 0xFFFFFF83;
1546 switch (sw->config.device_id) {
1d111406
LW		 1547 case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE:
1548 case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE:
1549 case PCI_DEVICE_ID_INTEL_PORT_RIDGE:
ca389f71
AN		 1550 break;
1551 default:
30a4eca6
MW		 1552 /*
1553 * Skip Alpine Ridge, it needs to have vendor
1554 * specific USB hotplug event enabled for the
1555 * internal xHCI to work.
1556 */
1557 if (!tb_switch_is_alpine_ridge(sw))
1558 data |= TB_PLUG_EVENTS_USB_DISABLE;
ca389f71
AN		 1559 }
1560 } else {
1561 data = data | 0x7c;
1562 }
1563 return tb_sw_write(sw, &data, TB_CFG_SWITCH,
1564 sw->cap_plug_events + 1, 1);
1565}
1566
f67cf491
MW		 1567static ssize_t authorized_show(struct device *dev,
1568 struct device_attribute *attr,
1569 char *buf)
1570{
1571 struct tb_switch *sw = tb_to_switch(dev);
1572
8283fb57 1573 return sysfs_emit(buf, "%u\n", sw->authorized);
f67cf491
MW		 1574}
1575
3da88be2
MW		 1576static int disapprove_switch(struct device *dev, void *not_used)
1577{
1651d9e7 1578 char *envp[] = { "AUTHORIZED=0", NULL };
3da88be2
MW		 1579 struct tb_switch *sw;
1580
1581 sw = tb_to_switch(dev);
1582 if (sw && sw->authorized) {
1583 int ret;
1584
1585 /* First children */
1586 ret = device_for_each_child_reverse(&sw->dev, NULL, disapprove_switch);
1587 if (ret)
1588 return ret;
1589
1590 ret = tb_domain_disapprove_switch(sw->tb, sw);
1591 if (ret)
1592 return ret;
1593
1594 sw->authorized = 0;
1651d9e7 1595 kobject_uevent_env(&sw->dev.kobj, KOBJ_CHANGE, envp);
3da88be2
MW		 1596 }
1597
1598 return 0;
1599}
1600
f67cf491
MW		 1601static int tb_switch_set_authorized(struct tb_switch *sw, unsigned int val)
1602{
1651d9e7 1603 char envp_string[13];
f67cf491 1604 int ret = -EINVAL;
1651d9e7 1605 char *envp[] = { envp_string, NULL };
f67cf491 1606
09f11b6c
MW		 1607 if (!mutex_trylock(&sw->tb->lock))
1608 return restart_syscall();
f67cf491 1609
3da88be2 1610 if (!!sw->authorized == !!val)
f67cf491
MW		 1611 goto unlock;
1612
1613 switch (val) {
3da88be2
MW		 1614 /* Disapprove switch */
1615 case 0:
1616 if (tb_route(sw)) {
1617 ret = disapprove_switch(&sw->dev, NULL);
1618 goto unlock;
1619 }
1620 break;
1621
f67cf491
MW		 1622 /* Approve switch */
1623 case 1:
1624 if (sw->key)
1625 ret = tb_domain_approve_switch_key(sw->tb, sw);
1626 else
1627 ret = tb_domain_approve_switch(sw->tb, sw);
1628 break;
1629
1630 /* Challenge switch */
1631 case 2:
1632 if (sw->key)
1633 ret = tb_domain_challenge_switch_key(sw->tb, sw);
1634 break;
1635
1636 default:
1637 break;
1638 }
1639
1640 if (!ret) {
1641 sw->authorized = val;
1651d9e7
RJ		 1642 /*
1643 * Notify status change to the userspace, informing the new
1644 * value of /sys/bus/thunderbolt/devices/.../authorized.
1645 */
1646 sprintf(envp_string, "AUTHORIZED=%u", sw->authorized);
1647 kobject_uevent_env(&sw->dev.kobj, KOBJ_CHANGE, envp);
f67cf491
MW		 1648 }
1649
1650unlock:
09f11b6c 1651 mutex_unlock(&sw->tb->lock);
f67cf491
MW		 1652 return ret;
1653}
1654
1655static ssize_t authorized_store(struct device *dev,
1656 struct device_attribute *attr,
1657 const char *buf, size_t count)
1658{
1659 struct tb_switch *sw = tb_to_switch(dev);
1660 unsigned int val;
1661 ssize_t ret;
1662
1663 ret = kstrtouint(buf, 0, &val);
1664 if (ret)
1665 return ret;
1666 if (val > 2)
1667 return -EINVAL;
1668
4f7c2e0d 1669 pm_runtime_get_sync(&sw->dev);
f67cf491 1670 ret = tb_switch_set_authorized(sw, val);
4f7c2e0d
MW		 1671 pm_runtime_mark_last_busy(&sw->dev);
1672 pm_runtime_put_autosuspend(&sw->dev);
f67cf491
MW		 1673
1674 return ret ? ret : count;
1675}
1676static DEVICE_ATTR_RW(authorized);
1677
14862ee3
YB		 1678static ssize_t boot_show(struct device *dev, struct device_attribute *attr,
1679 char *buf)
1680{
1681 struct tb_switch *sw = tb_to_switch(dev);
1682
8283fb57 1683 return sysfs_emit(buf, "%u\n", sw->boot);
14862ee3
YB		 1684}
1685static DEVICE_ATTR_RO(boot);
1686
bfe778ac
MW		 1687static ssize_t device_show(struct device *dev, struct device_attribute *attr,
1688 char *buf)
1689{
1690 struct tb_switch *sw = tb_to_switch(dev);
ca389f71 1691
8283fb57 1692 return sysfs_emit(buf, "%#x\n", sw->device);
bfe778ac
MW		 1693}
1694static DEVICE_ATTR_RO(device);
1695
72ee3390
MW		 1696static ssize_t
1697device_name_show(struct device *dev, struct device_attribute *attr, char *buf)
1698{
1699 struct tb_switch *sw = tb_to_switch(dev);
1700
8283fb57 1701 return sysfs_emit(buf, "%s\n", sw->device_name ?: "");
72ee3390
MW		 1702}
1703static DEVICE_ATTR_RO(device_name);
1704
b406357c
CK		 1705static ssize_t
1706generation_show(struct device *dev, struct device_attribute *attr, char *buf)
1707{
1708 struct tb_switch *sw = tb_to_switch(dev);
1709
8283fb57 1710 return sysfs_emit(buf, "%u\n", sw->generation);
b406357c
CK		 1711}
1712static DEVICE_ATTR_RO(generation);
1713
f67cf491
MW		 1714static ssize_t key_show(struct device *dev, struct device_attribute *attr,
1715 char *buf)
1716{
1717 struct tb_switch *sw = tb_to_switch(dev);
1718 ssize_t ret;
1719
09f11b6c
MW		 1720 if (!mutex_trylock(&sw->tb->lock))
1721 return restart_syscall();
f67cf491
MW		 1722
1723 if (sw->key)
8283fb57 1724 ret = sysfs_emit(buf, "%*phN\n", TB_SWITCH_KEY_SIZE, sw->key);
f67cf491 1725 else
8283fb57 1726 ret = sysfs_emit(buf, "\n");
f67cf491 1727
09f11b6c 1728 mutex_unlock(&sw->tb->lock);
f67cf491
MW		 1729 return ret;
1730}
1731
1732static ssize_t key_store(struct device *dev, struct device_attribute *attr,
1733 const char *buf, size_t count)
1734{
1735 struct tb_switch *sw = tb_to_switch(dev);
1736 u8 key[TB_SWITCH_KEY_SIZE];
1737 ssize_t ret = count;
e545f0d8 1738 bool clear = false;
f67cf491 1739
e545f0d8
BY		 1740 if (!strcmp(buf, "\n"))
1741 clear = true;
1742 else if (hex2bin(key, buf, sizeof(key)))
f67cf491
MW		 1743 return -EINVAL;
1744
09f11b6c
MW		 1745 if (!mutex_trylock(&sw->tb->lock))
1746 return restart_syscall();
f67cf491
MW		 1747
1748 if (sw->authorized) {
1749 ret = -EBUSY;
1750 } else {
1751 kfree(sw->key);
e545f0d8
BY		 1752 if (clear) {
1753 sw->key = NULL;
1754 } else {
1755 sw->key = kmemdup(key, sizeof(key), GFP_KERNEL);
1756 if (!sw->key)
1757 ret = -ENOMEM;
1758 }
f67cf491
MW		 1759 }
1760
09f11b6c 1761 mutex_unlock(&sw->tb->lock);
f67cf491
MW		 1762 return ret;
1763}
0956e411 1764static DEVICE_ATTR(key, 0600, key_show, key_store);
f67cf491 1765
91c0c120
MW		 1766static ssize_t speed_show(struct device *dev, struct device_attribute *attr,
1767 char *buf)
1768{
1769 struct tb_switch *sw = tb_to_switch(dev);
1770
8283fb57 1771 return sysfs_emit(buf, "%u.0 Gb/s\n", sw->link_speed);
91c0c120
MW		 1772}
1773
1774/*
1775 * Currently all lanes must run at the same speed but we expose here
1776 * both directions to allow possible asymmetric links in the future.
1777 */
1778static DEVICE_ATTR(rx_speed, 0444, speed_show, NULL);
1779static DEVICE_ATTR(tx_speed, 0444, speed_show, NULL);
1780
1781static ssize_t lanes_show(struct device *dev, struct device_attribute *attr,
1782 char *buf)
1783{
1784 struct tb_switch *sw = tb_to_switch(dev);
1785
8283fb57 1786 return sysfs_emit(buf, "%u\n", sw->link_width);
91c0c120
MW		 1787}
1788
1789/*
1790 * Currently link has same amount of lanes both directions (1 or 2) but
1791 * expose them separately to allow possible asymmetric links in the future.
1792 */
1793static DEVICE_ATTR(rx_lanes, 0444, lanes_show, NULL);
1794static DEVICE_ATTR(tx_lanes, 0444, lanes_show, NULL);
1795
e6b245cc
MW		 1796static ssize_t nvm_authenticate_show(struct device *dev,
1797 struct device_attribute *attr, char *buf)
1798{
1799 struct tb_switch *sw = tb_to_switch(dev);
1800 u32 status;
1801
1802 nvm_get_auth_status(sw, &status);
8283fb57 1803 return sysfs_emit(buf, "%#x\n", status);
e6b245cc
MW		 1804}
1805
1cb36293
ML		 1806static ssize_t nvm_authenticate_sysfs(struct device *dev, const char *buf,
1807 bool disconnect)
e6b245cc
MW		 1808{
1809 struct tb_switch *sw = tb_to_switch(dev);
1cbf680f 1810 int val, ret;
e6b245cc 1811
4f7c2e0d
MW		 1812 pm_runtime_get_sync(&sw->dev);
1813
1814 if (!mutex_trylock(&sw->tb->lock)) {
1815 ret = restart_syscall();
1816 goto exit_rpm;
1817 }
e6b245cc 1818
aef9c693
SC		 1819 if (sw->no_nvm_upgrade) {
1820 ret = -EOPNOTSUPP;
1821 goto exit_unlock;
1822 }
1823
e6b245cc
MW		 1824 /* If NVMem devices are not yet added */
1825 if (!sw->nvm) {
1826 ret = -EAGAIN;
1827 goto exit_unlock;
1828 }
1829
4b794f80 1830 ret = kstrtoint(buf, 10, &val);
e6b245cc
MW		 1831 if (ret)
1832 goto exit_unlock;
1833
1834 /* Always clear the authentication status */
1835 nvm_clear_auth_status(sw);
1836
4b794f80 1837 if (val > 0) {
1cbf680f
MW		 1838 if (val == AUTHENTICATE_ONLY) {
1839 if (disconnect)
4b794f80 1840 ret = -EINVAL;
1cbf680f
MW		 1841 else
1842 ret = nvm_authenticate(sw, true);
1843 } else {
1844 if (!sw->nvm->flushed) {
1845 if (!sw->nvm->buf) {
1846 ret = -EINVAL;
1847 goto exit_unlock;
1848 }
1849
1850 ret = nvm_validate_and_write(sw);
1851 if (ret || val == WRITE_ONLY)
1852 goto exit_unlock;
4b794f80 1853 }
1cbf680f
MW		 1854 if (val == WRITE_AND_AUTHENTICATE) {
1855 if (disconnect)
1856 ret = tb_lc_force_power(sw);
1857 else
1858 ret = nvm_authenticate(sw, false);
1cb36293 1859 }
4b794f80 1860 }
e6b245cc
MW		 1861 }
1862
1863exit_unlock:
09f11b6c 1864 mutex_unlock(&sw->tb->lock);
4f7c2e0d
MW		 1865exit_rpm:
1866 pm_runtime_mark_last_busy(&sw->dev);
1867 pm_runtime_put_autosuspend(&sw->dev);
e6b245cc 1868
1cb36293
ML		 1869 return ret;
1870}
1871
1872static ssize_t nvm_authenticate_store(struct device *dev,
1873 struct device_attribute *attr, const char *buf, size_t count)
1874{
1875 int ret = nvm_authenticate_sysfs(dev, buf, false);
e6b245cc
MW		 1876 if (ret)
1877 return ret;
1878 return count;
1879}
1880static DEVICE_ATTR_RW(nvm_authenticate);
1881
1cb36293
ML		 1882static ssize_t nvm_authenticate_on_disconnect_show(struct device *dev,
1883 struct device_attribute *attr, char *buf)
1884{
1885 return nvm_authenticate_show(dev, attr, buf);
1886}
1887
1888static ssize_t nvm_authenticate_on_disconnect_store(struct device *dev,
1889 struct device_attribute *attr, const char *buf, size_t count)
1890{
1891 int ret;
1892
1893 ret = nvm_authenticate_sysfs(dev, buf, true);
1894 return ret ? ret : count;
1895}
1896static DEVICE_ATTR_RW(nvm_authenticate_on_disconnect);
1897
e6b245cc
MW		 1898static ssize_t nvm_version_show(struct device *dev,
1899 struct device_attribute *attr, char *buf)
1900{
1901 struct tb_switch *sw = tb_to_switch(dev);
1902 int ret;
1903
09f11b6c
MW		 1904 if (!mutex_trylock(&sw->tb->lock))
1905 return restart_syscall();
e6b245cc
MW		 1906
1907 if (sw->safe_mode)
1908 ret = -ENODATA;
1909 else if (!sw->nvm)
1910 ret = -EAGAIN;
1911 else
8283fb57 1912 ret = sysfs_emit(buf, "%x.%x\n", sw->nvm->major, sw->nvm->minor);
e6b245cc 1913
09f11b6c 1914 mutex_unlock(&sw->tb->lock);
e6b245cc
MW		 1915
1916 return ret;
1917}
1918static DEVICE_ATTR_RO(nvm_version);
1919
bfe778ac
MW		 1920static ssize_t vendor_show(struct device *dev, struct device_attribute *attr,
1921 char *buf)
a25c8b2f 1922{
bfe778ac 1923 struct tb_switch *sw = tb_to_switch(dev);
a25c8b2f 1924
8283fb57 1925 return sysfs_emit(buf, "%#x\n", sw->vendor);
bfe778ac
MW		 1926}
1927static DEVICE_ATTR_RO(vendor);
1928
72ee3390
MW		 1929static ssize_t
1930vendor_name_show(struct device *dev, struct device_attribute *attr, char *buf)
1931{
1932 struct tb_switch *sw = tb_to_switch(dev);
1933
8283fb57 1934 return sysfs_emit(buf, "%s\n", sw->vendor_name ?: "");
72ee3390
MW		 1935}
1936static DEVICE_ATTR_RO(vendor_name);
1937
bfe778ac
MW		 1938static ssize_t unique_id_show(struct device *dev, struct device_attribute *attr,
1939 char *buf)
1940{
1941 struct tb_switch *sw = tb_to_switch(dev);
1942
8283fb57 1943 return sysfs_emit(buf, "%pUb\n", sw->uuid);
bfe778ac
MW		 1944}
1945static DEVICE_ATTR_RO(unique_id);
1946
1947static struct attribute *switch_attrs[] = {
f67cf491 1948 &dev_attr_authorized.attr,
14862ee3 1949 &dev_attr_boot.attr,
bfe778ac 1950 &dev_attr_device.attr,
72ee3390 1951 &dev_attr_device_name.attr,
b406357c 1952 &dev_attr_generation.attr,
f67cf491 1953 &dev_attr_key.attr,
e6b245cc 1954 &dev_attr_nvm_authenticate.attr,
1cb36293 1955 &dev_attr_nvm_authenticate_on_disconnect.attr,
e6b245cc 1956 &dev_attr_nvm_version.attr,
91c0c120
MW		 1957 &dev_attr_rx_speed.attr,
1958 &dev_attr_rx_lanes.attr,
1959 &dev_attr_tx_speed.attr,
1960 &dev_attr_tx_lanes.attr,
bfe778ac 1961 &dev_attr_vendor.attr,
72ee3390 1962 &dev_attr_vendor_name.attr,
bfe778ac
MW		 1963 &dev_attr_unique_id.attr,
1964 NULL,
1965};
1966
f67cf491
MW		 1967static umode_t switch_attr_is_visible(struct kobject *kobj,
1968 struct attribute *attr, int n)
1969{
fff15f23 1970 struct device *dev = kobj_to_dev(kobj);
f67cf491
MW		 1971 struct tb_switch *sw = tb_to_switch(dev);
1972
3cd542e6
MW		 1973 if (attr == &dev_attr_authorized.attr) {
1974 if (sw->tb->security_level == TB_SECURITY_NOPCIE ||
8e334125 1975 sw->tb->security_level == TB_SECURITY_DPONLY)
3cd542e6
MW		 1976 return 0;
1977 } else if (attr == &dev_attr_device.attr) {
58f414fa
MW		 1978 if (!sw->device)
1979 return 0;
1980 } else if (attr == &dev_attr_device_name.attr) {
1981 if (!sw->device_name)
1982 return 0;
1983 } else if (attr == &dev_attr_vendor.attr) {
1984 if (!sw->vendor)
1985 return 0;
1986 } else if (attr == &dev_attr_vendor_name.attr) {
1987 if (!sw->vendor_name)
1988 return 0;
1989 } else if (attr == &dev_attr_key.attr) {
f67cf491
MW		 1990 if (tb_route(sw) &&
1991 sw->tb->security_level == TB_SECURITY_SECURE &&
1992 sw->security_level == TB_SECURITY_SECURE)
1993 return attr->mode;
1994 return 0;
91c0c120
MW		 1995 } else if (attr == &dev_attr_rx_speed.attr ||
1996 attr == &dev_attr_rx_lanes.attr ||
1997 attr == &dev_attr_tx_speed.attr ||
1998 attr == &dev_attr_tx_lanes.attr) {
1999 if (tb_route(sw))
2000 return attr->mode;
2001 return 0;
3f415e5e 2002 } else if (attr == &dev_attr_nvm_authenticate.attr) {
b0407983 2003 if (nvm_upgradeable(sw))
3f415e5e
MW		 2004 return attr->mode;
2005 return 0;
2006 } else if (attr == &dev_attr_nvm_version.attr) {
b0407983 2007 if (nvm_readable(sw))
e6b245cc
MW		 2008 return attr->mode;
2009 return 0;
14862ee3
YB		 2010 } else if (attr == &dev_attr_boot.attr) {
2011 if (tb_route(sw))
2012 return attr->mode;
2013 return 0;
1cb36293
ML		 2014 } else if (attr == &dev_attr_nvm_authenticate_on_disconnect.attr) {
2015 if (sw->quirks & QUIRK_FORCE_POWER_LINK_CONTROLLER)
2016 return attr->mode;
2017 return 0;
f67cf491
MW		 2018 }
2019
e6b245cc 2020 return sw->safe_mode ? 0 : attr->mode;
f67cf491
MW		 2021}
2022
6889e00f 2023static const struct attribute_group switch_group = {
f67cf491 2024 .is_visible = switch_attr_is_visible,
bfe778ac
MW		 2025 .attrs = switch_attrs,
2026};
ca389f71 2027
bfe778ac
MW		 2028static const struct attribute_group *switch_groups[] = {
2029 &switch_group,
2030 NULL,
2031};
2032
2033static void tb_switch_release(struct device *dev)
2034{
2035 struct tb_switch *sw = tb_to_switch(dev);
b433d010 2036 struct tb_port *port;
bfe778ac 2037
3e136768
MW		 2038 dma_port_free(sw->dma_port);
2039
b433d010 2040 tb_switch_for_each_port(sw, port) {
781e14ea
MW		 2041 ida_destroy(&port->in_hopids);
2042 ida_destroy(&port->out_hopids);
0b2863ac
MW		 2043 }
2044
bfe778ac 2045 kfree(sw->uuid);
72ee3390
MW		 2046 kfree(sw->device_name);
2047 kfree(sw->vendor_name);
a25c8b2f 2048 kfree(sw->ports);
343fcb8c 2049 kfree(sw->drom);
f67cf491 2050 kfree(sw->key);
a25c8b2f
AN		 2051 kfree(sw);
2052}
2053
162736b0 2054static int tb_switch_uevent(const struct device *dev, struct kobj_uevent_env *env)
2f608ba1 2055{
162736b0 2056 const struct tb_switch *sw = tb_to_switch(dev);
2f608ba1
MW		 2057 const char *type;
2058
2059 if (sw->config.thunderbolt_version == USB4_VERSION_1_0) {
2060 if (add_uevent_var(env, "USB4_VERSION=1.0"))
2061 return -ENOMEM;
2062 }
2063
2064 if (!tb_route(sw)) {
2065 type = "host";
2066 } else {
2067 const struct tb_port *port;
2068 bool hub = false;
2069
2070 /* Device is hub if it has any downstream ports */
2071 tb_switch_for_each_port(sw, port) {
2072 if (!port->disabled && !tb_is_upstream_port(port) &&
2073 tb_port_is_null(port)) {
2074 hub = true;
2075 break;
2076 }
2077 }
2078
2079 type = hub ? "hub" : "device";
2080 }
2081
2082 if (add_uevent_var(env, "USB4_TYPE=%s", type))
2083 return -ENOMEM;
2084 return 0;
2085}
2086
2d8ff0b5
MW		 2087/*
2088 * Currently only need to provide the callbacks. Everything else is handled
2089 * in the connection manager.
2090 */
2091static int __maybe_unused tb_switch_runtime_suspend(struct device *dev)
2092{
4f7c2e0d
MW		 2093 struct tb_switch *sw = tb_to_switch(dev);
2094 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
2095
2096 if (cm_ops->runtime_suspend_switch)
2097 return cm_ops->runtime_suspend_switch(sw);
2098
2d8ff0b5
MW		 2099 return 0;
2100}
2101
2102static int __maybe_unused tb_switch_runtime_resume(struct device *dev)
2103{
4f7c2e0d
MW		 2104 struct tb_switch *sw = tb_to_switch(dev);
2105 const struct tb_cm_ops *cm_ops = sw->tb->cm_ops;
2106
2107 if (cm_ops->runtime_resume_switch)
2108 return cm_ops->runtime_resume_switch(sw);
2d8ff0b5
MW		 2109 return 0;
2110}
2111
2112static const struct dev_pm_ops tb_switch_pm_ops = {
2113 SET_RUNTIME_PM_OPS(tb_switch_runtime_suspend, tb_switch_runtime_resume,
2114 NULL)
2115};
2116
bfe778ac
MW		 2117struct device_type tb_switch_type = {
2118 .name = "thunderbolt_device",
2119 .release = tb_switch_release,
2f608ba1 2120 .uevent = tb_switch_uevent,
2d8ff0b5 2121 .pm = &tb_switch_pm_ops,
bfe778ac
MW		 2122};
2123
2c3c4197
MW		 2124static int tb_switch_get_generation(struct tb_switch *sw)
2125{
2126 switch (sw->config.device_id) {
2127 case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE:
2128 case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE:
2129 case PCI_DEVICE_ID_INTEL_LIGHT_PEAK:
2130 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C:
2131 case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C:
2132 case PCI_DEVICE_ID_INTEL_PORT_RIDGE:
2133 case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_BRIDGE:
2134 case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_BRIDGE:
2135 return 1;
2136
2137 case PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE:
2138 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE:
2139 case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE:
2140 return 2;
2141
2142 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE:
2143 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE:
2144 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE:
2145 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE:
2146 case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE:
4bac471d
RM		 2147 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE:
2148 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE:
2149 case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE:
3cdb9446
MW		 2150 case PCI_DEVICE_ID_INTEL_ICL_NHI0:
2151 case PCI_DEVICE_ID_INTEL_ICL_NHI1:
2c3c4197
MW		 2152 return 3;
2153
2154 default:
b0407983
MW		 2155 if (tb_switch_is_usb4(sw))
2156 return 4;
2157
2c3c4197
MW		 2158 /*
2159 * For unknown switches assume generation to be 1 to be
2160 * on the safe side.
2161 */
2162 tb_sw_warn(sw, "unsupported switch device id %#x\n",
2163 sw->config.device_id);
2164 return 1;
2165 }
2166}
2167
b0407983
MW		 2168static bool tb_switch_exceeds_max_depth(const struct tb_switch *sw, int depth)
2169{
2170 int max_depth;
2171
2172 if (tb_switch_is_usb4(sw) ||
2173 (sw->tb->root_switch && tb_switch_is_usb4(sw->tb->root_switch)))
2174 max_depth = USB4_SWITCH_MAX_DEPTH;
2175 else
2176 max_depth = TB_SWITCH_MAX_DEPTH;
2177
2178 return depth > max_depth;
2179}
2180
a25c8b2f 2181/**
bfe778ac
MW		 2182 * tb_switch_alloc() - allocate a switch
2183 * @tb: Pointer to the owning domain
2184 * @parent: Parent device for this switch
2185 * @route: Route string for this switch
a25c8b2f 2186 *
bfe778ac
MW		 2187 * Allocates and initializes a switch. Will not upload configuration to
2188 * the switch. For that you need to call tb_switch_configure()
2189 * separately. The returned switch should be released by calling
2190 * tb_switch_put().
2191 *
444ac384
MW		 2192 * Return: Pointer to the allocated switch or ERR_PTR() in case of
2193 * failure.
a25c8b2f 2194 */
bfe778ac
MW		 2195struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent,
2196 u64 route)
a25c8b2f 2197{
a25c8b2f 2198 struct tb_switch *sw;
f0342e75 2199 int upstream_port;
444ac384 2200 int i, ret, depth;
f0342e75 2201
b0407983
MW		 2202 /* Unlock the downstream port so we can access the switch below */
2203 if (route) {
2204 struct tb_switch *parent_sw = tb_to_switch(parent);
2205 struct tb_port *down;
2206
2207 down = tb_port_at(route, parent_sw);
2208 tb_port_unlock(down);
2209 }
2210
f0342e75 2211 depth = tb_route_length(route);
f0342e75
MW		 2212
2213 upstream_port = tb_cfg_get_upstream_port(tb->ctl, route);
a25c8b2f 2214 if (upstream_port < 0)
444ac384 2215 return ERR_PTR(upstream_port);
a25c8b2f
AN		 2216
2217 sw = kzalloc(sizeof(*sw), GFP_KERNEL);
2218 if (!sw)
444ac384 2219 return ERR_PTR(-ENOMEM);
a25c8b2f
AN		 2220
2221 sw->tb = tb;
444ac384
MW		 2222 ret = tb_cfg_read(tb->ctl, &sw->config, route, 0, TB_CFG_SWITCH, 0, 5);
2223 if (ret)
bfe778ac
MW		 2224 goto err_free_sw_ports;
2225
b0407983
MW		 2226 sw->generation = tb_switch_get_generation(sw);
2227
daa5140f 2228 tb_dbg(tb, "current switch config:\n");
b0407983 2229 tb_dump_switch(tb, sw);
a25c8b2f
AN		 2230
2231 /* configure switch */
2232 sw->config.upstream_port_number = upstream_port;
f0342e75
MW		 2233 sw->config.depth = depth;
2234 sw->config.route_hi = upper_32_bits(route);
2235 sw->config.route_lo = lower_32_bits(route);
bfe778ac 2236 sw->config.enabled = 0;
a25c8b2f 2237
b0407983 2238 /* Make sure we do not exceed maximum topology limit */
704a940d
CIK		 2239 if (tb_switch_exceeds_max_depth(sw, depth)) {
2240 ret = -EADDRNOTAVAIL;
2241 goto err_free_sw_ports;
2242 }
b0407983 2243
a25c8b2f
AN		 2244 /* initialize ports */
2245 sw->ports = kcalloc(sw->config.max_port_number + 1, sizeof(*sw->ports),
343fcb8c 2246 GFP_KERNEL);
444ac384
MW		 2247 if (!sw->ports) {
2248 ret = -ENOMEM;
bfe778ac 2249 goto err_free_sw_ports;
444ac384 2250 }
a25c8b2f
AN		 2251
2252 for (i = 0; i <= sw->config.max_port_number; i++) {
343fcb8c
AN		 2253 /* minimum setup for tb_find_cap and tb_drom_read to work */
2254 sw->ports[i].sw = sw;
2255 sw->ports[i].port = i;
781e14ea
MW		 2256
2257 /* Control port does not need HopID allocation */
2258 if (i) {
2259 ida_init(&sw->ports[i].in_hopids);
2260 ida_init(&sw->ports[i].out_hopids);
2261 }
a25c8b2f
AN		 2262 }
2263
444ac384 2264 ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_PLUG_EVENTS);
b0407983
MW		 2265 if (ret > 0)
2266 sw->cap_plug_events = ret;
ca389f71 2267
23ccd21c
GF		 2268 ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_TIME2);
2269 if (ret > 0)
2270 sw->cap_vsec_tmu = ret;
2271
444ac384
MW		 2272 ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_LINK_CONTROLLER);
2273 if (ret > 0)
2274 sw->cap_lc = ret;
a9be5582 2275
43f977bc
GF		 2276 ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_CP_LP);
2277 if (ret > 0)
2278 sw->cap_lp = ret;
2279
f67cf491
MW		 2280 /* Root switch is always authorized */
2281 if (!route)
2282 sw->authorized = true;
2283
bfe778ac
MW		 2284 device_initialize(&sw->dev);
2285 sw->dev.parent = parent;
2286 sw->dev.bus = &tb_bus_type;
2287 sw->dev.type = &tb_switch_type;
2288 sw->dev.groups = switch_groups;
2289 dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw));
2290
2291 return sw;
2292
2293err_free_sw_ports:
2294 kfree(sw->ports);
2295 kfree(sw);
2296
444ac384 2297 return ERR_PTR(ret);
bfe778ac
MW		 2298}
2299
e6b245cc
MW		 2300/**
2301 * tb_switch_alloc_safe_mode() - allocate a switch that is in safe mode
2302 * @tb: Pointer to the owning domain
2303 * @parent: Parent device for this switch
2304 * @route: Route string for this switch
2305 *
2306 * This creates a switch in safe mode. This means the switch pretty much
2307 * lacks all capabilities except DMA configuration port before it is
2308 * flashed with a valid NVM firmware.
2309 *
2310 * The returned switch must be released by calling tb_switch_put().
2311 *
444ac384 2312 * Return: Pointer to the allocated switch or ERR_PTR() in case of failure
e6b245cc
MW		 2313 */
2314struct tb_switch *
2315tb_switch_alloc_safe_mode(struct tb *tb, struct device *parent, u64 route)
2316{
2317 struct tb_switch *sw;
2318
2319 sw = kzalloc(sizeof(*sw), GFP_KERNEL);
2320 if (!sw)
444ac384 2321 return ERR_PTR(-ENOMEM);
e6b245cc
MW		 2322
2323 sw->tb = tb;
2324 sw->config.depth = tb_route_length(route);
2325 sw->config.route_hi = upper_32_bits(route);
2326 sw->config.route_lo = lower_32_bits(route);
2327 sw->safe_mode = true;
2328
2329 device_initialize(&sw->dev);
2330 sw->dev.parent = parent;
2331 sw->dev.bus = &tb_bus_type;
2332 sw->dev.type = &tb_switch_type;
2333 sw->dev.groups = switch_groups;
2334 dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw));
2335
2336 return sw;
2337}
2338
bfe778ac
MW		 2339/**
2340 * tb_switch_configure() - Uploads configuration to the switch
2341 * @sw: Switch to configure
2342 *
2343 * Call this function before the switch is added to the system. It will
2344 * upload configuration to the switch and makes it available for the
b0407983
MW		 2345 * connection manager to use. Can be called to the switch again after
2346 * resume from low power states to re-initialize it.
bfe778ac
MW		 2347 *
2348 * Return: %0 in case of success and negative errno in case of failure
2349 */
2350int tb_switch_configure(struct tb_switch *sw)
2351{
2352 struct tb *tb = sw->tb;
2353 u64 route;
2354 int ret;
2355
2356 route = tb_route(sw);
bfe778ac 2357
b0407983 2358 tb_dbg(tb, "%s Switch at %#llx (depth: %d, up port: %d)\n",
b2911a59 2359 sw->config.enabled ? "restoring" : "initializing", route,
b0407983 2360 tb_route_length(route), sw->config.upstream_port_number);
bfe778ac 2361
bfe778ac
MW		 2362 sw->config.enabled = 1;
2363
b0407983
MW		 2364 if (tb_switch_is_usb4(sw)) {
2365 /*
2366 * For USB4 devices, we need to program the CM version
2367 * accordingly so that it knows to expose all the
2368 * additional capabilities.
2369 */
2370 sw->config.cmuv = USB4_VERSION_1_0;
31f87f70 2371 sw->config.plug_events_delay = 0xa;
b0407983
MW		 2372
2373 /* Enumerate the switch */
2374 ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH,
2375 ROUTER_CS_1, 4);
2376 if (ret)
2377 return ret;
bfe778ac 2378
b0407983 2379 ret = usb4_switch_setup(sw);
b0407983
MW		 2380 } else {
2381 if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL)
2382 tb_sw_warn(sw, "unknown switch vendor id %#x\n",
2383 sw->config.vendor_id);
2384
2385 if (!sw->cap_plug_events) {
2386 tb_sw_warn(sw, "cannot find TB_VSE_CAP_PLUG_EVENTS aborting\n");
2387 return -ENODEV;
2388 }
2389
2390 /* Enumerate the switch */
2391 ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH,
2392 ROUTER_CS_1, 3);
b0407983 2393 }
e879a709
MW		 2394 if (ret)
2395 return ret;
2396
bfe778ac
MW		 2397 return tb_plug_events_active(sw, true);
2398}
2399
2cc12751 2400static int tb_switch_set_uuid(struct tb_switch *sw)
bfe778ac 2401{
b0407983 2402 bool uid = false;
bfe778ac 2403 u32 uuid[4];
a9be5582 2404 int ret;
bfe778ac
MW		 2405
2406 if (sw->uuid)
a9be5582 2407 return 0;
bfe778ac 2408
b0407983
MW		 2409 if (tb_switch_is_usb4(sw)) {
2410 ret = usb4_switch_read_uid(sw, &sw->uid);
2411 if (ret)
2412 return ret;
2413 uid = true;
2414 } else {
2415 /*
2416 * The newer controllers include fused UUID as part of
2417 * link controller specific registers
2418 */
2419 ret = tb_lc_read_uuid(sw, uuid);
2420 if (ret) {
2421 if (ret != -EINVAL)
2422 return ret;
2423 uid = true;
2424 }
2425 }
2426
2427 if (uid) {
bfe778ac
MW		 2428 /*
2429 * ICM generates UUID based on UID and fills the upper
2430 * two words with ones. This is not strictly following
2431 * UUID format but we want to be compatible with it so
2432 * we do the same here.
2433 */
2434 uuid[0] = sw->uid & 0xffffffff;
2435 uuid[1] = (sw->uid >> 32) & 0xffffffff;
2436 uuid[2] = 0xffffffff;
2437 uuid[3] = 0xffffffff;
2438 }
2439
2440 sw->uuid = kmemdup(uuid, sizeof(uuid), GFP_KERNEL);
2cc12751 2441 if (!sw->uuid)
a9be5582
MW		 2442 return -ENOMEM;
2443 return 0;
bfe778ac
MW		 2444}
2445
e6b245cc 2446static int tb_switch_add_dma_port(struct tb_switch *sw)
3e136768 2447{
e6b245cc
MW		 2448 u32 status;
2449 int ret;
2450
3e136768 2451 switch (sw->generation) {
3e136768
MW		 2452 case 2:
2453 /* Only root switch can be upgraded */
2454 if (tb_route(sw))
e6b245cc 2455 return 0;
7a7ebfa8 2456
df561f66 2457 fallthrough;
7a7ebfa8 2458 case 3:
661b1947 2459 case 4:
7a7ebfa8
MW		 2460 ret = tb_switch_set_uuid(sw);
2461 if (ret)
2462 return ret;
3e136768
MW		 2463 break;
2464
2465 default:
e6b245cc
MW		 2466 /*
2467 * DMA port is the only thing available when the switch
2468 * is in safe mode.
2469 */
2470 if (!sw->safe_mode)
2471 return 0;
2472 break;
3e136768
MW		 2473 }
2474
661b1947
MW		 2475 if (sw->no_nvm_upgrade)
2476 return 0;
2477
2478 if (tb_switch_is_usb4(sw)) {
2479 ret = usb4_switch_nvm_authenticate_status(sw, &status);
2480 if (ret)
2481 return ret;
2482
2483 if (status) {
2484 tb_sw_info(sw, "switch flash authentication failed\n");
2485 nvm_set_auth_status(sw, status);
2486 }
2487
2488 return 0;
2489 }
2490
3f415e5e 2491 /* Root switch DMA port requires running firmware */
f07a3608 2492 if (!tb_route(sw) && !tb_switch_is_icm(sw))
e6b245cc
MW		 2493 return 0;
2494
3e136768 2495 sw->dma_port = dma_port_alloc(sw);
e6b245cc
MW		 2496 if (!sw->dma_port)
2497 return 0;
2498
7a7ebfa8
MW		 2499 /*
2500 * If there is status already set then authentication failed
2501 * when the dma_port_flash_update_auth() returned. Power cycling
2502 * is not needed (it was done already) so only thing we do here
2503 * is to unblock runtime PM of the root port.
2504 */
2505 nvm_get_auth_status(sw, &status);
2506 if (status) {
2507 if (!tb_route(sw))
b0407983 2508 nvm_authenticate_complete_dma_port(sw);
7a7ebfa8
MW		 2509 return 0;
2510 }
2511
e6b245cc
MW		 2512 /*
2513 * Check status of the previous flash authentication. If there
2514 * is one we need to power cycle the switch in any case to make
2515 * it functional again.
2516 */
2517 ret = dma_port_flash_update_auth_status(sw->dma_port, &status);
2518 if (ret <= 0)
2519 return ret;
2520
1830b6ee
MW		 2521 /* Now we can allow root port to suspend again */
2522 if (!tb_route(sw))
b0407983 2523 nvm_authenticate_complete_dma_port(sw);
1830b6ee 2524
e6b245cc
MW		 2525 if (status) {
2526 tb_sw_info(sw, "switch flash authentication failed\n");
e6b245cc
MW		 2527 nvm_set_auth_status(sw, status);
2528 }
2529
2530 tb_sw_info(sw, "power cycling the switch now\n");
2531 dma_port_power_cycle(sw->dma_port);
2532
2533 /*
2534 * We return error here which causes the switch adding failure.
2535 * It should appear back after power cycle is complete.
2536 */
2537 return -ESHUTDOWN;
3e136768
MW		 2538}
2539
0d46c08d
MW		 2540static void tb_switch_default_link_ports(struct tb_switch *sw)
2541{
2542 int i;
2543
42716425 2544 for (i = 1; i <= sw->config.max_port_number; i++) {
0d46c08d
MW		 2545 struct tb_port *port = &sw->ports[i];
2546 struct tb_port *subordinate;
2547
2548 if (!tb_port_is_null(port))
2549 continue;
2550
2551 /* Check for the subordinate port */
2552 if (i == sw->config.max_port_number ||
2553 !tb_port_is_null(&sw->ports[i + 1]))
2554 continue;
2555
2556 /* Link them if not already done so (by DROM) */
2557 subordinate = &sw->ports[i + 1];
2558 if (!port->dual_link_port && !subordinate->dual_link_port) {
2559 port->link_nr = 0;
2560 port->dual_link_port = subordinate;
2561 subordinate->link_nr = 1;
2562 subordinate->dual_link_port = port;
2563
2564 tb_sw_dbg(sw, "linked ports %d <-> %d\n",
2565 port->port, subordinate->port);
2566 }
2567 }
2568}
2569
91c0c120
MW		 2570static bool tb_switch_lane_bonding_possible(struct tb_switch *sw)
2571{
2572 const struct tb_port *up = tb_upstream_port(sw);
2573
2574 if (!up->dual_link_port || !up->dual_link_port->remote)
2575 return false;
2576
b0407983
MW		 2577 if (tb_switch_is_usb4(sw))
2578 return usb4_switch_lane_bonding_possible(sw);
91c0c120
MW		 2579 return tb_lc_lane_bonding_possible(sw);
2580}
2581
2582static int tb_switch_update_link_attributes(struct tb_switch *sw)
2583{
2584 struct tb_port *up;
2585 bool change = false;
2586 int ret;
2587
2588 if (!tb_route(sw) || tb_switch_is_icm(sw))
2589 return 0;
2590
2591 up = tb_upstream_port(sw);
2592
2593 ret = tb_port_get_link_speed(up);
2594 if (ret < 0)
2595 return ret;
2596 if (sw->link_speed != ret)
2597 change = true;
2598 sw->link_speed = ret;
2599
2600 ret = tb_port_get_link_width(up);
2601 if (ret < 0)
2602 return ret;
2603 if (sw->link_width != ret)
2604 change = true;
2605 sw->link_width = ret;
2606
2607 /* Notify userspace that there is possible link attribute change */
2608 if (device_is_registered(&sw->dev) && change)
2609 kobject_uevent(&sw->dev.kobj, KOBJ_CHANGE);
2610
2611 return 0;
2612}
2613
2614/**
2615 * tb_switch_lane_bonding_enable() - Enable lane bonding
2616 * @sw: Switch to enable lane bonding
2617 *
2618 * Connection manager can call this function to enable lane bonding of a
2619 * switch. If conditions are correct and both switches support the feature,
2620 * lanes are bonded. It is safe to call this to any switch.
2621 */
2622int tb_switch_lane_bonding_enable(struct tb_switch *sw)
2623{
91c0c120
MW		 2624 struct tb_port *up, *down;
2625 u64 route = tb_route(sw);
2626 int ret;
2627
2628 if (!route)
2629 return 0;
2630
2631 if (!tb_switch_lane_bonding_possible(sw))
2632 return 0;
2633
2634 up = tb_upstream_port(sw);
7ce54221 2635 down = tb_switch_downstream_port(sw);
91c0c120
MW		 2636
2637 if (!tb_port_is_width_supported(up, 2) ||
2638 !tb_port_is_width_supported(down, 2))
2639 return 0;
2640
2641 ret = tb_port_lane_bonding_enable(up);
2642 if (ret) {
2643 tb_port_warn(up, "failed to enable lane bonding\n");
2644 return ret;
2645 }
2646
2647 ret = tb_port_lane_bonding_enable(down);
2648 if (ret) {
2649 tb_port_warn(down, "failed to enable lane bonding\n");
2650 tb_port_lane_bonding_disable(up);
2651 return ret;
2652 }
2653
e7051bea
MW		 2654 ret = tb_port_wait_for_link_width(down, 2, 100);
2655 if (ret) {
2656 tb_port_warn(down, "timeout enabling lane bonding\n");
2657 return ret;
2658 }
2659
69fea377
MW		 2660 tb_port_update_credits(down);
2661 tb_port_update_credits(up);
91c0c120
MW		 2662 tb_switch_update_link_attributes(sw);
2663
2664 tb_sw_dbg(sw, "lane bonding enabled\n");
2665 return ret;
2666}
2667
2668/**
2669 * tb_switch_lane_bonding_disable() - Disable lane bonding
2670 * @sw: Switch whose lane bonding to disable
2671 *
2672 * Disables lane bonding between @sw and parent. This can be called even
2673 * if lanes were not bonded originally.
2674 */
2675void tb_switch_lane_bonding_disable(struct tb_switch *sw)
2676{
91c0c120
MW		 2677 struct tb_port *up, *down;
2678
2679 if (!tb_route(sw))
2680 return;
2681
2682 up = tb_upstream_port(sw);
2683 if (!up->bonded)
2684 return;
2685
7ce54221 2686 down = tb_switch_downstream_port(sw);
91c0c120
MW		 2687
2688 tb_port_lane_bonding_disable(up);
2689 tb_port_lane_bonding_disable(down);
2690
e7051bea
MW		 2691 /*
2692 * It is fine if we get other errors as the router might have
2693 * been unplugged.
2694 */
2695 if (tb_port_wait_for_link_width(down, 1, 100) == -ETIMEDOUT)
2696 tb_sw_warn(sw, "timeout disabling lane bonding\n");
2697
69fea377
MW		 2698 tb_port_update_credits(down);
2699 tb_port_update_credits(up);
91c0c120 2700 tb_switch_update_link_attributes(sw);
69fea377 2701
91c0c120
MW		 2702 tb_sw_dbg(sw, "lane bonding disabled\n");
2703}
2704
de462039
MW		 2705/**
2706 * tb_switch_configure_link() - Set link configured
2707 * @sw: Switch whose link is configured
2708 *
2709 * Sets the link upstream from @sw configured (from both ends) so that
2710 * it will not be disconnected when the domain exits sleep. Can be
2711 * called for any switch.
2712 *
2713 * It is recommended that this is called after lane bonding is enabled.
2714 *
2715 * Returns %0 on success and negative errno in case of error.
2716 */
2717int tb_switch_configure_link(struct tb_switch *sw)
2718{
e28178bf
MW		 2719 struct tb_port *up, *down;
2720 int ret;
2721
de462039
MW		 2722 if (!tb_route(sw) || tb_switch_is_icm(sw))
2723 return 0;
2724
e28178bf
MW		 2725 up = tb_upstream_port(sw);
2726 if (tb_switch_is_usb4(up->sw))
2727 ret = usb4_port_configure(up);
2728 else
2729 ret = tb_lc_configure_port(up);
2730 if (ret)
2731 return ret;
2732
2733 down = up->remote;
2734 if (tb_switch_is_usb4(down->sw))
2735 return usb4_port_configure(down);
2736 return tb_lc_configure_port(down);
de462039
MW		 2737}
2738
2739/**
2740 * tb_switch_unconfigure_link() - Unconfigure link
2741 * @sw: Switch whose link is unconfigured
2742 *
2743 * Sets the link unconfigured so the @sw will be disconnected if the
2744 * domain exists sleep.
2745 */
2746void tb_switch_unconfigure_link(struct tb_switch *sw)
2747{
e28178bf
MW		 2748 struct tb_port *up, *down;
2749
de462039
MW		 2750 if (sw->is_unplugged)
2751 return;
2752 if (!tb_route(sw) || tb_switch_is_icm(sw))
2753 return;
2754
e28178bf
MW		 2755 up = tb_upstream_port(sw);
2756 if (tb_switch_is_usb4(up->sw))
2757 usb4_port_unconfigure(up);
2758 else
2759 tb_lc_unconfigure_port(up);
2760
2761 down = up->remote;
2762 if (tb_switch_is_usb4(down->sw))
2763 usb4_port_unconfigure(down);
de462039 2764 else
e28178bf 2765 tb_lc_unconfigure_port(down);
de462039
MW		 2766}
2767
56ad3aef
MW		 2768static void tb_switch_credits_init(struct tb_switch *sw)
2769{
2770 if (tb_switch_is_icm(sw))
2771 return;
2772 if (!tb_switch_is_usb4(sw))
2773 return;
2774 if (usb4_switch_credits_init(sw))
2775 tb_sw_info(sw, "failed to determine preferred buffer allocation, using defaults\n");
2776}
2777
5d2569cb
ML		 2778static int tb_switch_port_hotplug_enable(struct tb_switch *sw)
2779{
2780 struct tb_port *port;
2781
2782 if (tb_switch_is_icm(sw))
2783 return 0;
2784
2785 tb_switch_for_each_port(sw, port) {
2786 int res;
2787
2788 if (!port->cap_usb4)
2789 continue;
2790
2791 res = usb4_port_hotplug_enable(port);
2792 if (res)
2793 return res;
2794 }
2795 return 0;
2796}
2797
bfe778ac
MW		 2798/**
2799 * tb_switch_add() - Add a switch to the domain
2800 * @sw: Switch to add
2801 *
2802 * This is the last step in adding switch to the domain. It will read
2803 * identification information from DROM and initializes ports so that
2804 * they can be used to connect other switches. The switch will be
2805 * exposed to the userspace when this function successfully returns. To
2806 * remove and release the switch, call tb_switch_remove().
2807 *
2808 * Return: %0 in case of success and negative errno in case of failure
2809 */
2810int tb_switch_add(struct tb_switch *sw)
2811{
2812 int i, ret;
2813
3e136768
MW		 2814 /*
2815 * Initialize DMA control port now before we read DROM. Recent
2816 * host controllers have more complete DROM on NVM that includes
2817 * vendor and model identification strings which we then expose
2818 * to the userspace. NVM can be accessed through DMA
2819 * configuration based mailbox.
2820 */
e6b245cc 2821 ret = tb_switch_add_dma_port(sw);
af99f696
MW		 2822 if (ret) {
2823 dev_err(&sw->dev, "failed to add DMA port\n");
f53e7676 2824 return ret;
af99f696 2825 }
343fcb8c 2826
e6b245cc 2827 if (!sw->safe_mode) {
56ad3aef
MW		 2828 tb_switch_credits_init(sw);
2829
e6b245cc
MW		 2830 /* read drom */
2831 ret = tb_drom_read(sw);
6915812b
ML		 2832 if (ret)
2833 dev_warn(&sw->dev, "reading DROM failed: %d\n", ret);
daa5140f 2834 tb_sw_dbg(sw, "uid: %#llx\n", sw->uid);
bfe778ac 2835
2cc12751 2836 ret = tb_switch_set_uuid(sw);
af99f696
MW		 2837 if (ret) {
2838 dev_err(&sw->dev, "failed to set UUID\n");
2cc12751 2839 return ret;
af99f696 2840 }
e6b245cc
MW		 2841
2842 for (i = 0; i <= sw->config.max_port_number; i++) {
2843 if (sw->ports[i].disabled) {
daa5140f 2844 tb_port_dbg(&sw->ports[i], "disabled by eeprom\n");
e6b245cc
MW		 2845 continue;
2846 }
2847 ret = tb_init_port(&sw->ports[i]);
af99f696
MW		 2848 if (ret) {
2849 dev_err(&sw->dev, "failed to initialize port %d\n", i);
e6b245cc 2850 return ret;
af99f696 2851 }
343fcb8c 2852 }
91c0c120 2853
d2d6ddf1
MW		 2854 tb_check_quirks(sw);
2855
0d46c08d
MW		 2856 tb_switch_default_link_ports(sw);
2857
91c0c120
MW		 2858 ret = tb_switch_update_link_attributes(sw);
2859 if (ret)
2860 return ret;
cf29b9af
RM		 2861
2862 ret = tb_switch_tmu_init(sw);
2863 if (ret)
2864 return ret;
343fcb8c
AN		 2865 }
2866
5d2569cb
ML		 2867 ret = tb_switch_port_hotplug_enable(sw);
2868 if (ret)
2869 return ret;
2870
e6b245cc 2871 ret = device_add(&sw->dev);
af99f696
MW		 2872 if (ret) {
2873 dev_err(&sw->dev, "failed to add device: %d\n", ret);
e6b245cc 2874 return ret;
af99f696 2875 }
e6b245cc 2876
a83bc4a5
MW		 2877 if (tb_route(sw)) {
2878 dev_info(&sw->dev, "new device found, vendor=%#x device=%#x\n",
2879 sw->vendor, sw->device);
2880 if (sw->vendor_name && sw->device_name)
2881 dev_info(&sw->dev, "%s %s\n", sw->vendor_name,
2882 sw->device_name);
2883 }
2884
cae5f515
MW		 2885 ret = usb4_switch_add_ports(sw);
2886 if (ret) {
2887 dev_err(&sw->dev, "failed to add USB4 ports\n");
2888 goto err_del;
2889 }
2890
e6b245cc 2891 ret = tb_switch_nvm_add(sw);
2d8ff0b5 2892 if (ret) {
af99f696 2893 dev_err(&sw->dev, "failed to add NVM devices\n");
cae5f515 2894 goto err_ports;
2d8ff0b5 2895 }
e6b245cc 2896
b2911a59
MW		 2897 /*
2898 * Thunderbolt routers do not generate wakeups themselves but
2899 * they forward wakeups from tunneled protocols, so enable it
2900 * here.
2901 */
2902 device_init_wakeup(&sw->dev, true);
2903
2d8ff0b5
MW		 2904 pm_runtime_set_active(&sw->dev);
2905 if (sw->rpm) {
2906 pm_runtime_set_autosuspend_delay(&sw->dev, TB_AUTOSUSPEND_DELAY);
2907 pm_runtime_use_autosuspend(&sw->dev);
2908 pm_runtime_mark_last_busy(&sw->dev);
2909 pm_runtime_enable(&sw->dev);
2910 pm_request_autosuspend(&sw->dev);
2911 }
2912
54e41810 2913 tb_switch_debugfs_init(sw);
2d8ff0b5 2914 return 0;
cae5f515
MW		 2915
2916err_ports:
2917 usb4_switch_remove_ports(sw);
2918err_del:
2919 device_del(&sw->dev);
2920
2921 return ret;
bfe778ac 2922}
c90553b3 2923
bfe778ac
MW		 2924/**
2925 * tb_switch_remove() - Remove and release a switch
2926 * @sw: Switch to remove
2927 *
2928 * This will remove the switch from the domain and release it after last
2929 * reference count drops to zero. If there are switches connected below
2930 * this switch, they will be removed as well.
2931 */
2932void tb_switch_remove(struct tb_switch *sw)
2933{
b433d010 2934 struct tb_port *port;
ca389f71 2935
54e41810
GF		 2936 tb_switch_debugfs_remove(sw);
2937
2d8ff0b5
MW		 2938 if (sw->rpm) {
2939 pm_runtime_get_sync(&sw->dev);
2940 pm_runtime_disable(&sw->dev);
2941 }
2942
bfe778ac 2943 /* port 0 is the switch itself and never has a remote */
b433d010
MW		 2944 tb_switch_for_each_port(sw, port) {
2945 if (tb_port_has_remote(port)) {
2946 tb_switch_remove(port->remote->sw);
2947 port->remote = NULL;
2948 } else if (port->xdomain) {
2949 tb_xdomain_remove(port->xdomain);
2950 port->xdomain = NULL;
dfe40ca4 2951 }
dacb1287
KK		 2952
2953 /* Remove any downstream retimers */
2954 tb_retimer_remove_all(port);
bfe778ac
MW		 2955 }
2956
2957 if (!sw->is_unplugged)
2958 tb_plug_events_active(sw, false);
b0407983 2959
e6b245cc 2960 tb_switch_nvm_remove(sw);
cae5f515 2961 usb4_switch_remove_ports(sw);
a83bc4a5
MW		 2962
2963 if (tb_route(sw))
2964 dev_info(&sw->dev, "device disconnected\n");
bfe778ac 2965 device_unregister(&sw->dev);
a25c8b2f
AN		 2966}
2967
053596d9 2968/**
aae20bb6 2969 * tb_sw_set_unplugged() - set is_unplugged on switch and downstream switches
5c6b471b 2970 * @sw: Router to mark unplugged
053596d9 2971 */
aae20bb6 2972void tb_sw_set_unplugged(struct tb_switch *sw)
053596d9 2973{
b433d010
MW		 2974 struct tb_port *port;
2975
053596d9
AN		 2976 if (sw == sw->tb->root_switch) {
2977 tb_sw_WARN(sw, "cannot unplug root switch\n");
2978 return;
2979 }
2980 if (sw->is_unplugged) {
2981 tb_sw_WARN(sw, "is_unplugged already set\n");
2982 return;
2983 }
2984 sw->is_unplugged = true;
b433d010
MW		 2985 tb_switch_for_each_port(sw, port) {
2986 if (tb_port_has_remote(port))
2987 tb_sw_set_unplugged(port->remote->sw);
2988 else if (port->xdomain)
2989 port->xdomain->is_unplugged = true;
053596d9
AN		 2990 }
2991}
2992
b2911a59
MW		 2993static int tb_switch_set_wake(struct tb_switch *sw, unsigned int flags)
2994{
2995 if (flags)
2996 tb_sw_dbg(sw, "enabling wakeup: %#x\n", flags);
2997 else
2998 tb_sw_dbg(sw, "disabling wakeup\n");
2999
3000 if (tb_switch_is_usb4(sw))
3001 return usb4_switch_set_wake(sw, flags);
3002 return tb_lc_set_wake(sw, flags);
3003}
3004
23dd5bb4
AN		 3005int tb_switch_resume(struct tb_switch *sw)
3006{
b433d010
MW		 3007 struct tb_port *port;
3008 int err;
3009
daa5140f 3010 tb_sw_dbg(sw, "resuming switch\n");
23dd5bb4 3011
08a5e4ce
MW		 3012 /*
3013 * Check for UID of the connected switches except for root
3014 * switch which we assume cannot be removed.
3015 */
3016 if (tb_route(sw)) {
3017 u64 uid;
3018
7ea4cd6b
MW		 3019 /*
3020 * Check first that we can still read the switch config
3021 * space. It may be that there is now another domain
3022 * connected.
3023 */
3024 err = tb_cfg_get_upstream_port(sw->tb->ctl, tb_route(sw));
3025 if (err < 0) {
3026 tb_sw_info(sw, "switch not present anymore\n");
3027 return err;
3028 }
3029
a283de3e
ML		 3030 /* We don't have any way to confirm this was the same device */
3031 if (!sw->uid)
3032 return -ENODEV;
3033
b0407983
MW		 3034 if (tb_switch_is_usb4(sw))
3035 err = usb4_switch_read_uid(sw, &uid);
3036 else
3037 err = tb_drom_read_uid_only(sw, &uid);
08a5e4ce
MW		 3038 if (err) {
3039 tb_sw_warn(sw, "uid read failed\n");
3040 return err;
3041 }
3042 if (sw->uid != uid) {
3043 tb_sw_info(sw,
3044 "changed while suspended (uid %#llx -> %#llx)\n",
3045 sw->uid, uid);
3046 return -ENODEV;
3047 }
23dd5bb4
AN		 3048 }
3049
b0407983 3050 err = tb_switch_configure(sw);
23dd5bb4
AN		 3051 if (err)
3052 return err;
3053
b2911a59
MW		 3054 /* Disable wakes */
3055 tb_switch_set_wake(sw, 0);
3056
8145c435
MW		 3057 err = tb_switch_tmu_init(sw);
3058 if (err)
3059 return err;
3060
23dd5bb4 3061 /* check for surviving downstream switches */
b433d010 3062 tb_switch_for_each_port(sw, port) {
3fb10ea4
RM		 3063 if (!tb_port_is_null(port))
3064 continue;
3065
3066 if (!tb_port_resume(port))
23dd5bb4 3067 continue;
dfe40ca4 3068
7ea4cd6b 3069 if (tb_wait_for_port(port, true) <= 0) {
23dd5bb4
AN		 3070 tb_port_warn(port,
3071 "lost during suspend, disconnecting\n");
7ea4cd6b
MW		 3072 if (tb_port_has_remote(port))
3073 tb_sw_set_unplugged(port->remote->sw);
3074 else if (port->xdomain)
3075 port->xdomain->is_unplugged = true;
3fb10ea4 3076 } else {
b0407983
MW		 3077 /*
3078 * Always unlock the port so the downstream
3079 * switch/domain is accessible.
3080 */
3081 if (tb_port_unlock(port))
3082 tb_port_warn(port, "failed to unlock port\n");
3083 if (port->remote && tb_switch_resume(port->remote->sw)) {
7ea4cd6b
MW		 3084 tb_port_warn(port,
3085 "lost during suspend, disconnecting\n");
3086 tb_sw_set_unplugged(port->remote->sw);
3087 }
23dd5bb4
AN		 3088 }
3089 }
3090 return 0;
3091}
3092
6ac6faee
MW		 3093/**
3094 * tb_switch_suspend() - Put a switch to sleep
3095 * @sw: Switch to suspend
3096 * @runtime: Is this runtime suspend or system sleep
3097 *
3098 * Suspends router and all its children. Enables wakes according to
3099 * value of @runtime and then sets sleep bit for the router. If @sw is
3100 * host router the domain is ready to go to sleep once this function
3101 * returns.
3102 */
3103void tb_switch_suspend(struct tb_switch *sw, bool runtime)
23dd5bb4 3104{
b2911a59 3105 unsigned int flags = 0;
b433d010
MW		 3106 struct tb_port *port;
3107 int err;
3108
6ac6faee
MW		 3109 tb_sw_dbg(sw, "suspending switch\n");
3110
43f977bc
GF		 3111 /*
3112 * Actually only needed for Titan Ridge but for simplicity can be
3113 * done for USB4 device too as CLx is re-enabled at resume.
b017a46d 3114 * CL0s and CL1 are enabled and supported together.
43f977bc 3115 */
12a14f2f
MW		 3116 if (tb_switch_clx_is_enabled(sw, TB_CL1)) {
3117 if (tb_switch_clx_disable(sw, TB_CL1))
b017a46d
GF		 3118 tb_sw_warn(sw, "failed to disable %s on upstream port\n",
3119 tb_switch_clx_name(TB_CL1));
418a5a3d 3120 }
43f977bc 3121
23dd5bb4
AN		 3122 err = tb_plug_events_active(sw, false);
3123 if (err)
3124 return;
3125
b433d010
MW		 3126 tb_switch_for_each_port(sw, port) {
3127 if (tb_port_has_remote(port))
6ac6faee 3128 tb_switch_suspend(port->remote->sw, runtime);
23dd5bb4 3129 }
5480dfc2 3130
6ac6faee
MW		 3131 if (runtime) {
3132 /* Trigger wake when something is plugged in/out */
3133 flags |= TB_WAKE_ON_CONNECT | TB_WAKE_ON_DISCONNECT;
6026b703
MW		 3134 flags |= TB_WAKE_ON_USB4;
3135 flags |= TB_WAKE_ON_USB3 | TB_WAKE_ON_PCIE | TB_WAKE_ON_DP;
6ac6faee
MW		 3136 } else if (device_may_wakeup(&sw->dev)) {
3137 flags |= TB_WAKE_ON_USB4 | TB_WAKE_ON_USB3 | TB_WAKE_ON_PCIE;
3138 }
b2911a59
MW		 3139
3140 tb_switch_set_wake(sw, flags);
3141
b0407983
MW		 3142 if (tb_switch_is_usb4(sw))
3143 usb4_switch_set_sleep(sw);
3144 else
3145 tb_lc_set_sleep(sw);
23dd5bb4 3146}
f67cf491 3147
8afe909b
MW		 3148/**
3149 * tb_switch_query_dp_resource() - Query availability of DP resource
3150 * @sw: Switch whose DP resource is queried
3151 * @in: DP IN port
3152 *
3153 * Queries availability of DP resource for DP tunneling using switch
3154 * specific means. Returns %true if resource is available.
3155 */
3156bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in)
3157{
b0407983
MW		 3158 if (tb_switch_is_usb4(sw))
3159 return usb4_switch_query_dp_resource(sw, in);
8afe909b
MW		 3160 return tb_lc_dp_sink_query(sw, in);
3161}
3162
3163/**
3164 * tb_switch_alloc_dp_resource() - Allocate available DP resource
3165 * @sw: Switch whose DP resource is allocated
3166 * @in: DP IN port
3167 *
3168 * Allocates DP resource for DP tunneling. The resource must be
3169 * available for this to succeed (see tb_switch_query_dp_resource()).
3170 * Returns %0 in success and negative errno otherwise.
3171 */
3172int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
3173{
ce05b997
MW		 3174 int ret;
3175
b0407983 3176 if (tb_switch_is_usb4(sw))
ce05b997
MW		 3177 ret = usb4_switch_alloc_dp_resource(sw, in);
3178 else
3179 ret = tb_lc_dp_sink_alloc(sw, in);
3180
3181 if (ret)
3182 tb_sw_warn(sw, "failed to allocate DP resource for port %d\n",
3183 in->port);
3184 else
3185 tb_sw_dbg(sw, "allocated DP resource for port %d\n", in->port);
3186
3187 return ret;
8afe909b
MW		 3188}
3189
3190/**
3191 * tb_switch_dealloc_dp_resource() - De-allocate DP resource
3192 * @sw: Switch whose DP resource is de-allocated
3193 * @in: DP IN port
3194 *
3195 * De-allocates DP resource that was previously allocated for DP
3196 * tunneling.
3197 */
3198void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in)
3199{
b0407983
MW		 3200 int ret;
3201
3202 if (tb_switch_is_usb4(sw))
3203 ret = usb4_switch_dealloc_dp_resource(sw, in);
3204 else
3205 ret = tb_lc_dp_sink_dealloc(sw, in);
3206
3207 if (ret)
8afe909b
MW		 3208 tb_sw_warn(sw, "failed to de-allocate DP resource for port %d\n",
3209 in->port);
ce05b997
MW		 3210 else
3211 tb_sw_dbg(sw, "released DP resource for port %d\n", in->port);
8afe909b
MW		 3212}
3213
f67cf491
MW		 3214struct tb_sw_lookup {
3215 struct tb *tb;
3216 u8 link;
3217 u8 depth;
7c39ffe7 3218 const uuid_t *uuid;
8e9267bb 3219 u64 route;
f67cf491
MW		 3220};
3221
418e3ea1 3222static int tb_switch_match(struct device *dev, const void *data)
f67cf491
MW		 3223{
3224 struct tb_switch *sw = tb_to_switch(dev);
418e3ea1 3225 const struct tb_sw_lookup *lookup = data;
f67cf491
MW		 3226
3227 if (!sw)
3228 return 0;
3229 if (sw->tb != lookup->tb)
3230 return 0;
3231
3232 if (lookup->uuid)
3233 return !memcmp(sw->uuid, lookup->uuid, sizeof(*lookup->uuid));
3234
8e9267bb
RM		 3235 if (lookup->route) {
3236 return sw->config.route_lo == lower_32_bits(lookup->route) &&
3237 sw->config.route_hi == upper_32_bits(lookup->route);
3238 }
3239
f67cf491
MW		 3240 /* Root switch is matched only by depth */
3241 if (!lookup->depth)
3242 return !sw->depth;
3243
3244 return sw->link == lookup->link && sw->depth == lookup->depth;
3245}
3246
3247/**
3248 * tb_switch_find_by_link_depth() - Find switch by link and depth
3249 * @tb: Domain the switch belongs
3250 * @link: Link number the switch is connected
3251 * @depth: Depth of the switch in link
3252 *
3253 * Returned switch has reference count increased so the caller needs to
3254 * call tb_switch_put() when done with the switch.
3255 */
3256struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link, u8 depth)
3257{
3258 struct tb_sw_lookup lookup;
3259 struct device *dev;
3260
3261 memset(&lookup, 0, sizeof(lookup));
3262 lookup.tb = tb;
3263 lookup.link = link;
3264 lookup.depth = depth;
3265
3266 dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match);
3267 if (dev)
3268 return tb_to_switch(dev);
3269
3270 return NULL;
3271}
3272
3273/**
432019d6 3274 * tb_switch_find_by_uuid() - Find switch by UUID
f67cf491
MW		 3275 * @tb: Domain the switch belongs
3276 * @uuid: UUID to look for
3277 *
3278 * Returned switch has reference count increased so the caller needs to
3279 * call tb_switch_put() when done with the switch.
3280 */
7c39ffe7 3281struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid)
f67cf491
MW		 3282{
3283 struct tb_sw_lookup lookup;
3284 struct device *dev;
3285
3286 memset(&lookup, 0, sizeof(lookup));
3287 lookup.tb = tb;
3288 lookup.uuid = uuid;
3289
3290 dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match);
3291 if (dev)
3292 return tb_to_switch(dev);
3293
3294 return NULL;
3295}
e6b245cc 3296
8e9267bb
RM		 3297/**
3298 * tb_switch_find_by_route() - Find switch by route string
3299 * @tb: Domain the switch belongs
3300 * @route: Route string to look for
3301 *
3302 * Returned switch has reference count increased so the caller needs to
3303 * call tb_switch_put() when done with the switch.
3304 */
3305struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route)
3306{
3307 struct tb_sw_lookup lookup;
3308 struct device *dev;
3309
3310 if (!route)
3311 return tb_switch_get(tb->root_switch);
3312
3313 memset(&lookup, 0, sizeof(lookup));
3314 lookup.tb = tb;
3315 lookup.route = route;
3316
3317 dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match);
3318 if (dev)
3319 return tb_to_switch(dev);
3320
3321 return NULL;
3322}
3323
386e5e29
MW		 3324/**
3325 * tb_switch_find_port() - return the first port of @type on @sw or NULL
3326 * @sw: Switch to find the port from
3327 * @type: Port type to look for
3328 */
3329struct tb_port *tb_switch_find_port(struct tb_switch *sw,
3330 enum tb_port_type type)
3331{
3332 struct tb_port *port;
3333
3334 tb_switch_for_each_port(sw, port) {
3335 if (port->config.type == type)
3336 return port;
3337 }
3338
3339 return NULL;
3340}
8a90e4fa 3341
43f977bc
GF		 3342/*
3343 * Can be used for read/write a specified PCIe bridge for any Thunderbolt 3
3344 * device. For now used only for Titan Ridge.
3345 */
3346static int tb_switch_pcie_bridge_write(struct tb_switch *sw, unsigned int bridge,
3347 unsigned int pcie_offset, u32 value)
3348{
3349 u32 offset, command, val;
3350 int ret;
3351
3352 if (sw->generation != 3)
3353 return -EOPNOTSUPP;
3354
3355 offset = sw->cap_plug_events + TB_PLUG_EVENTS_PCIE_WR_DATA;
3356 ret = tb_sw_write(sw, &value, TB_CFG_SWITCH, offset, 1);
3357 if (ret)
3358 return ret;
3359
3360 command = pcie_offset & TB_PLUG_EVENTS_PCIE_CMD_DW_OFFSET_MASK;
3361 command |= BIT(bridge + TB_PLUG_EVENTS_PCIE_CMD_BR_SHIFT);
3362 command |= TB_PLUG_EVENTS_PCIE_CMD_RD_WR_MASK;
3363 command |= TB_PLUG_EVENTS_PCIE_CMD_COMMAND_VAL
3364 << TB_PLUG_EVENTS_PCIE_CMD_COMMAND_SHIFT;
3365 command |= TB_PLUG_EVENTS_PCIE_CMD_REQ_ACK_MASK;
3366
3367 offset = sw->cap_plug_events + TB_PLUG_EVENTS_PCIE_CMD;
3368
3369 ret = tb_sw_write(sw, &command, TB_CFG_SWITCH, offset, 1);
3370 if (ret)
3371 return ret;
3372
3373 ret = tb_switch_wait_for_bit(sw, offset,
3374 TB_PLUG_EVENTS_PCIE_CMD_REQ_ACK_MASK, 0, 100);
3375 if (ret)
3376 return ret;
3377
3378 ret = tb_sw_read(sw, &val, TB_CFG_SWITCH, offset, 1);
3379 if (ret)
3380 return ret;
3381
3382 if (val & TB_PLUG_EVENTS_PCIE_CMD_TIMEOUT_MASK)
3383 return -ETIMEDOUT;
3384
3385 return 0;
3386}
3387
3388/**
3389 * tb_switch_pcie_l1_enable() - Enable PCIe link to enter L1 state
3390 * @sw: Router to enable PCIe L1
3391 *
3392 * For Titan Ridge switch to enter CLx state, its PCIe bridges shall enable
3393 * entry to PCIe L1 state. Shall be called after the upstream PCIe tunnel
3394 * was configured. Due to Intel platforms limitation, shall be called only
3395 * for first hop switch.
3396 */
3397int tb_switch_pcie_l1_enable(struct tb_switch *sw)
3398{
3399 struct tb_switch *parent = tb_switch_parent(sw);
3400 int ret;
3401
3402 if (!tb_route(sw))
3403 return 0;
3404
3405 if (!tb_switch_is_titan_ridge(sw))
3406 return 0;
3407
3408 /* Enable PCIe L1 enable only for first hop router (depth = 1) */
3409 if (tb_route(parent))
3410 return 0;
3411
3412 /* Write to downstream PCIe bridge #5 aka Dn4 */
3413 ret = tb_switch_pcie_bridge_write(sw, 5, 0x143, 0x0c7806b1);
3414 if (ret)
3415 return ret;
3416
3417 /* Write to Upstream PCIe bridge #0 aka Up0 */
3418 return tb_switch_pcie_bridge_write(sw, 0, 0x143, 0x0c5806b1);
3419}
30a4eca6
MW		 3420
3421/**
3422 * tb_switch_xhci_connect() - Connect internal xHCI
3423 * @sw: Router whose xHCI to connect
3424 *
3425 * Can be called to any router. For Alpine Ridge and Titan Ridge
3426 * performs special flows that bring the xHCI functional for any device
3427 * connected to the type-C port. Call only after PCIe tunnel has been
3428 * established. The function only does the connect if not done already
3429 * so can be called several times for the same router.
3430 */
3431int tb_switch_xhci_connect(struct tb_switch *sw)
3432{
30a4eca6
MW		 3433 struct tb_port *port1, *port3;
3434 int ret;
3435
93a3c0d4
MW		 3436 if (sw->generation != 3)
3437 return 0;
3438
30a4eca6
MW		 3439 port1 = &sw->ports[1];
3440 port3 = &sw->ports[3];
3441
3442 if (tb_switch_is_alpine_ridge(sw)) {
93a3c0d4
MW		 3443 bool usb_port1, usb_port3, xhci_port1, xhci_port3;
3444
30a4eca6
MW		 3445 usb_port1 = tb_lc_is_usb_plugged(port1);
3446 usb_port3 = tb_lc_is_usb_plugged(port3);
3447 xhci_port1 = tb_lc_is_xhci_connected(port1);
3448 xhci_port3 = tb_lc_is_xhci_connected(port3);
3449
3450 /* Figure out correct USB port to connect */
3451 if (usb_port1 && !xhci_port1) {
3452 ret = tb_lc_xhci_connect(port1);
3453 if (ret)
3454 return ret;
3455 }
3456 if (usb_port3 && !xhci_port3)
3457 return tb_lc_xhci_connect(port3);
3458 } else if (tb_switch_is_titan_ridge(sw)) {
3459 ret = tb_lc_xhci_connect(port1);
3460 if (ret)
3461 return ret;
3462 return tb_lc_xhci_connect(port3);
3463 }
3464
3465 return 0;
3466}
3467
3468/**
3469 * tb_switch_xhci_disconnect() - Disconnect internal xHCI
3470 * @sw: Router whose xHCI to disconnect
3471 *
3472 * The opposite of tb_switch_xhci_connect(). Disconnects xHCI on both
3473 * ports.
3474 */
3475void tb_switch_xhci_disconnect(struct tb_switch *sw)
3476{
3477 if (sw->generation == 3) {
3478 struct tb_port *port1 = &sw->ports[1];
3479 struct tb_port *port3 = &sw->ports[3];
3480
3481 tb_lc_xhci_disconnect(port1);
3482 tb_port_dbg(port1, "disconnected xHCI\n");
3483 tb_lc_xhci_disconnect(port3);
3484 tb_port_dbg(port3, "disconnected xHCI\n");
3485 }
3486}
Linux 6.x block layer and io_uring tree(s)