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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
a25c8b2f | 2 | /* |
15c6784c | 3 | * Thunderbolt driver - switch/port utility functions |
a25c8b2f AN |
4 | * |
5 | * Copyright (c) 2014 Andreas Noever <andreas.noever@gmail.com> | |
15c6784c | 6 | * Copyright (C) 2018, Intel Corporation |
a25c8b2f AN |
7 | */ |
8 | ||
9 | #include <linux/delay.h> | |
e6b245cc MW |
10 | #include <linux/idr.h> |
11 | #include <linux/nvmem-provider.h> | |
2d8ff0b5 | 12 | #include <linux/pm_runtime.h> |
09f11b6c | 13 | #include <linux/sched/signal.h> |
e6b245cc | 14 | #include <linux/sizes.h> |
10fefe56 | 15 | #include <linux/slab.h> |
e6b245cc | 16 | #include <linux/vmalloc.h> |
a25c8b2f AN |
17 | |
18 | #include "tb.h" | |
19 | ||
e6b245cc MW |
20 | /* Switch NVM support */ |
21 | ||
22 | #define NVM_DEVID 0x05 | |
23 | #define NVM_VERSION 0x08 | |
24 | #define NVM_CSS 0x10 | |
25 | #define NVM_FLASH_SIZE 0x45 | |
26 | ||
27 | #define NVM_MIN_SIZE SZ_32K | |
28 | #define NVM_MAX_SIZE SZ_512K | |
29 | ||
30 | static DEFINE_IDA(nvm_ida); | |
31 | ||
32 | struct nvm_auth_status { | |
33 | struct list_head list; | |
7c39ffe7 | 34 | uuid_t uuid; |
e6b245cc MW |
35 | u32 status; |
36 | }; | |
37 | ||
38 | /* | |
39 | * Hold NVM authentication failure status per switch This information | |
40 | * needs to stay around even when the switch gets power cycled so we | |
41 | * keep it separately. | |
42 | */ | |
43 | static LIST_HEAD(nvm_auth_status_cache); | |
44 | static DEFINE_MUTEX(nvm_auth_status_lock); | |
45 | ||
46 | static struct nvm_auth_status *__nvm_get_auth_status(const struct tb_switch *sw) | |
47 | { | |
48 | struct nvm_auth_status *st; | |
49 | ||
50 | list_for_each_entry(st, &nvm_auth_status_cache, list) { | |
7c39ffe7 | 51 | if (uuid_equal(&st->uuid, sw->uuid)) |
e6b245cc MW |
52 | return st; |
53 | } | |
54 | ||
55 | return NULL; | |
56 | } | |
57 | ||
58 | static void nvm_get_auth_status(const struct tb_switch *sw, u32 *status) | |
59 | { | |
60 | struct nvm_auth_status *st; | |
61 | ||
62 | mutex_lock(&nvm_auth_status_lock); | |
63 | st = __nvm_get_auth_status(sw); | |
64 | mutex_unlock(&nvm_auth_status_lock); | |
65 | ||
66 | *status = st ? st->status : 0; | |
67 | } | |
68 | ||
69 | static void nvm_set_auth_status(const struct tb_switch *sw, u32 status) | |
70 | { | |
71 | struct nvm_auth_status *st; | |
72 | ||
73 | if (WARN_ON(!sw->uuid)) | |
74 | return; | |
75 | ||
76 | mutex_lock(&nvm_auth_status_lock); | |
77 | st = __nvm_get_auth_status(sw); | |
78 | ||
79 | if (!st) { | |
80 | st = kzalloc(sizeof(*st), GFP_KERNEL); | |
81 | if (!st) | |
82 | goto unlock; | |
83 | ||
84 | memcpy(&st->uuid, sw->uuid, sizeof(st->uuid)); | |
85 | INIT_LIST_HEAD(&st->list); | |
86 | list_add_tail(&st->list, &nvm_auth_status_cache); | |
87 | } | |
88 | ||
89 | st->status = status; | |
90 | unlock: | |
91 | mutex_unlock(&nvm_auth_status_lock); | |
92 | } | |
93 | ||
94 | static void nvm_clear_auth_status(const struct tb_switch *sw) | |
95 | { | |
96 | struct nvm_auth_status *st; | |
97 | ||
98 | mutex_lock(&nvm_auth_status_lock); | |
99 | st = __nvm_get_auth_status(sw); | |
100 | if (st) { | |
101 | list_del(&st->list); | |
102 | kfree(st); | |
103 | } | |
104 | mutex_unlock(&nvm_auth_status_lock); | |
105 | } | |
106 | ||
107 | static int nvm_validate_and_write(struct tb_switch *sw) | |
108 | { | |
109 | unsigned int image_size, hdr_size; | |
110 | const u8 *buf = sw->nvm->buf; | |
111 | u16 ds_size; | |
112 | int ret; | |
113 | ||
114 | if (!buf) | |
115 | return -EINVAL; | |
116 | ||
117 | image_size = sw->nvm->buf_data_size; | |
118 | if (image_size < NVM_MIN_SIZE || image_size > NVM_MAX_SIZE) | |
119 | return -EINVAL; | |
120 | ||
121 | /* | |
122 | * FARB pointer must point inside the image and must at least | |
123 | * contain parts of the digital section we will be reading here. | |
124 | */ | |
125 | hdr_size = (*(u32 *)buf) & 0xffffff; | |
126 | if (hdr_size + NVM_DEVID + 2 >= image_size) | |
127 | return -EINVAL; | |
128 | ||
129 | /* Digital section start should be aligned to 4k page */ | |
130 | if (!IS_ALIGNED(hdr_size, SZ_4K)) | |
131 | return -EINVAL; | |
132 | ||
133 | /* | |
134 | * Read digital section size and check that it also fits inside | |
135 | * the image. | |
136 | */ | |
137 | ds_size = *(u16 *)(buf + hdr_size); | |
138 | if (ds_size >= image_size) | |
139 | return -EINVAL; | |
140 | ||
141 | if (!sw->safe_mode) { | |
142 | u16 device_id; | |
143 | ||
144 | /* | |
145 | * Make sure the device ID in the image matches the one | |
146 | * we read from the switch config space. | |
147 | */ | |
148 | device_id = *(u16 *)(buf + hdr_size + NVM_DEVID); | |
149 | if (device_id != sw->config.device_id) | |
150 | return -EINVAL; | |
151 | ||
152 | if (sw->generation < 3) { | |
153 | /* Write CSS headers first */ | |
154 | ret = dma_port_flash_write(sw->dma_port, | |
155 | DMA_PORT_CSS_ADDRESS, buf + NVM_CSS, | |
156 | DMA_PORT_CSS_MAX_SIZE); | |
157 | if (ret) | |
158 | return ret; | |
159 | } | |
160 | ||
161 | /* Skip headers in the image */ | |
162 | buf += hdr_size; | |
163 | image_size -= hdr_size; | |
164 | } | |
165 | ||
b0407983 MW |
166 | if (tb_switch_is_usb4(sw)) |
167 | return usb4_switch_nvm_write(sw, 0, buf, image_size); | |
e6b245cc MW |
168 | return dma_port_flash_write(sw->dma_port, 0, buf, image_size); |
169 | } | |
170 | ||
b0407983 | 171 | static int nvm_authenticate_host_dma_port(struct tb_switch *sw) |
e6b245cc | 172 | { |
7a7ebfa8 | 173 | int ret = 0; |
e6b245cc MW |
174 | |
175 | /* | |
176 | * Root switch NVM upgrade requires that we disconnect the | |
d1ff7024 | 177 | * existing paths first (in case it is not in safe mode |
e6b245cc MW |
178 | * already). |
179 | */ | |
180 | if (!sw->safe_mode) { | |
7a7ebfa8 MW |
181 | u32 status; |
182 | ||
d1ff7024 | 183 | ret = tb_domain_disconnect_all_paths(sw->tb); |
e6b245cc MW |
184 | if (ret) |
185 | return ret; | |
186 | /* | |
187 | * The host controller goes away pretty soon after this if | |
188 | * everything goes well so getting timeout is expected. | |
189 | */ | |
190 | ret = dma_port_flash_update_auth(sw->dma_port); | |
7a7ebfa8 MW |
191 | if (!ret || ret == -ETIMEDOUT) |
192 | return 0; | |
193 | ||
194 | /* | |
195 | * Any error from update auth operation requires power | |
196 | * cycling of the host router. | |
197 | */ | |
198 | tb_sw_warn(sw, "failed to authenticate NVM, power cycling\n"); | |
199 | if (dma_port_flash_update_auth_status(sw->dma_port, &status) > 0) | |
200 | nvm_set_auth_status(sw, status); | |
e6b245cc MW |
201 | } |
202 | ||
203 | /* | |
204 | * From safe mode we can get out by just power cycling the | |
205 | * switch. | |
206 | */ | |
207 | dma_port_power_cycle(sw->dma_port); | |
7a7ebfa8 | 208 | return ret; |
e6b245cc MW |
209 | } |
210 | ||
b0407983 | 211 | static int nvm_authenticate_device_dma_port(struct tb_switch *sw) |
e6b245cc MW |
212 | { |
213 | int ret, retries = 10; | |
214 | ||
215 | ret = dma_port_flash_update_auth(sw->dma_port); | |
7a7ebfa8 MW |
216 | switch (ret) { |
217 | case 0: | |
218 | case -ETIMEDOUT: | |
219 | case -EACCES: | |
220 | case -EINVAL: | |
221 | /* Power cycle is required */ | |
222 | break; | |
223 | default: | |
e6b245cc | 224 | return ret; |
7a7ebfa8 | 225 | } |
e6b245cc MW |
226 | |
227 | /* | |
228 | * Poll here for the authentication status. It takes some time | |
229 | * for the device to respond (we get timeout for a while). Once | |
230 | * we get response the device needs to be power cycled in order | |
231 | * to the new NVM to be taken into use. | |
232 | */ | |
233 | do { | |
234 | u32 status; | |
235 | ||
236 | ret = dma_port_flash_update_auth_status(sw->dma_port, &status); | |
237 | if (ret < 0 && ret != -ETIMEDOUT) | |
238 | return ret; | |
239 | if (ret > 0) { | |
240 | if (status) { | |
241 | tb_sw_warn(sw, "failed to authenticate NVM\n"); | |
242 | nvm_set_auth_status(sw, status); | |
243 | } | |
244 | ||
245 | tb_sw_info(sw, "power cycling the switch now\n"); | |
246 | dma_port_power_cycle(sw->dma_port); | |
247 | return 0; | |
248 | } | |
249 | ||
250 | msleep(500); | |
251 | } while (--retries); | |
252 | ||
253 | return -ETIMEDOUT; | |
254 | } | |
255 | ||
b0407983 MW |
256 | static void nvm_authenticate_start_dma_port(struct tb_switch *sw) |
257 | { | |
258 | struct pci_dev *root_port; | |
259 | ||
260 | /* | |
261 | * During host router NVM upgrade we should not allow root port to | |
262 | * go into D3cold because some root ports cannot trigger PME | |
263 | * itself. To be on the safe side keep the root port in D0 during | |
264 | * the whole upgrade process. | |
265 | */ | |
6ae72bfa | 266 | root_port = pcie_find_root_port(sw->tb->nhi->pdev); |
b0407983 MW |
267 | if (root_port) |
268 | pm_runtime_get_noresume(&root_port->dev); | |
269 | } | |
270 | ||
271 | static void nvm_authenticate_complete_dma_port(struct tb_switch *sw) | |
272 | { | |
273 | struct pci_dev *root_port; | |
274 | ||
6ae72bfa | 275 | root_port = pcie_find_root_port(sw->tb->nhi->pdev); |
b0407983 MW |
276 | if (root_port) |
277 | pm_runtime_put(&root_port->dev); | |
278 | } | |
279 | ||
280 | static inline bool nvm_readable(struct tb_switch *sw) | |
281 | { | |
282 | if (tb_switch_is_usb4(sw)) { | |
283 | /* | |
284 | * USB4 devices must support NVM operations but it is | |
285 | * optional for hosts. Therefore we query the NVM sector | |
286 | * size here and if it is supported assume NVM | |
287 | * operations are implemented. | |
288 | */ | |
289 | return usb4_switch_nvm_sector_size(sw) > 0; | |
290 | } | |
291 | ||
292 | /* Thunderbolt 2 and 3 devices support NVM through DMA port */ | |
293 | return !!sw->dma_port; | |
294 | } | |
295 | ||
296 | static inline bool nvm_upgradeable(struct tb_switch *sw) | |
297 | { | |
298 | if (sw->no_nvm_upgrade) | |
299 | return false; | |
300 | return nvm_readable(sw); | |
301 | } | |
302 | ||
303 | static inline int nvm_read(struct tb_switch *sw, unsigned int address, | |
304 | void *buf, size_t size) | |
305 | { | |
306 | if (tb_switch_is_usb4(sw)) | |
307 | return usb4_switch_nvm_read(sw, address, buf, size); | |
308 | return dma_port_flash_read(sw->dma_port, address, buf, size); | |
309 | } | |
310 | ||
311 | static int nvm_authenticate(struct tb_switch *sw) | |
312 | { | |
313 | int ret; | |
314 | ||
315 | if (tb_switch_is_usb4(sw)) | |
316 | return usb4_switch_nvm_authenticate(sw); | |
317 | ||
318 | if (!tb_route(sw)) { | |
319 | nvm_authenticate_start_dma_port(sw); | |
320 | ret = nvm_authenticate_host_dma_port(sw); | |
321 | } else { | |
322 | ret = nvm_authenticate_device_dma_port(sw); | |
323 | } | |
324 | ||
325 | return ret; | |
326 | } | |
327 | ||
e6b245cc MW |
328 | static int tb_switch_nvm_read(void *priv, unsigned int offset, void *val, |
329 | size_t bytes) | |
330 | { | |
331 | struct tb_switch *sw = priv; | |
2d8ff0b5 MW |
332 | int ret; |
333 | ||
334 | pm_runtime_get_sync(&sw->dev); | |
4f7c2e0d MW |
335 | |
336 | if (!mutex_trylock(&sw->tb->lock)) { | |
337 | ret = restart_syscall(); | |
338 | goto out; | |
339 | } | |
340 | ||
b0407983 | 341 | ret = nvm_read(sw, offset, val, bytes); |
4f7c2e0d MW |
342 | mutex_unlock(&sw->tb->lock); |
343 | ||
344 | out: | |
2d8ff0b5 MW |
345 | pm_runtime_mark_last_busy(&sw->dev); |
346 | pm_runtime_put_autosuspend(&sw->dev); | |
e6b245cc | 347 | |
2d8ff0b5 | 348 | return ret; |
e6b245cc MW |
349 | } |
350 | ||
351 | static int tb_switch_nvm_write(void *priv, unsigned int offset, void *val, | |
352 | size_t bytes) | |
353 | { | |
354 | struct tb_switch *sw = priv; | |
355 | int ret = 0; | |
356 | ||
09f11b6c MW |
357 | if (!mutex_trylock(&sw->tb->lock)) |
358 | return restart_syscall(); | |
e6b245cc MW |
359 | |
360 | /* | |
361 | * Since writing the NVM image might require some special steps, | |
362 | * for example when CSS headers are written, we cache the image | |
363 | * locally here and handle the special cases when the user asks | |
364 | * us to authenticate the image. | |
365 | */ | |
366 | if (!sw->nvm->buf) { | |
367 | sw->nvm->buf = vmalloc(NVM_MAX_SIZE); | |
368 | if (!sw->nvm->buf) { | |
369 | ret = -ENOMEM; | |
370 | goto unlock; | |
371 | } | |
372 | } | |
373 | ||
374 | sw->nvm->buf_data_size = offset + bytes; | |
375 | memcpy(sw->nvm->buf + offset, val, bytes); | |
376 | ||
377 | unlock: | |
09f11b6c | 378 | mutex_unlock(&sw->tb->lock); |
e6b245cc MW |
379 | |
380 | return ret; | |
381 | } | |
382 | ||
383 | static struct nvmem_device *register_nvmem(struct tb_switch *sw, int id, | |
384 | size_t size, bool active) | |
385 | { | |
386 | struct nvmem_config config; | |
387 | ||
388 | memset(&config, 0, sizeof(config)); | |
389 | ||
390 | if (active) { | |
391 | config.name = "nvm_active"; | |
392 | config.reg_read = tb_switch_nvm_read; | |
800161bd | 393 | config.read_only = true; |
e6b245cc MW |
394 | } else { |
395 | config.name = "nvm_non_active"; | |
396 | config.reg_write = tb_switch_nvm_write; | |
800161bd | 397 | config.root_only = true; |
e6b245cc MW |
398 | } |
399 | ||
400 | config.id = id; | |
401 | config.stride = 4; | |
402 | config.word_size = 4; | |
403 | config.size = size; | |
404 | config.dev = &sw->dev; | |
405 | config.owner = THIS_MODULE; | |
e6b245cc MW |
406 | config.priv = sw; |
407 | ||
408 | return nvmem_register(&config); | |
409 | } | |
410 | ||
411 | static int tb_switch_nvm_add(struct tb_switch *sw) | |
412 | { | |
413 | struct nvmem_device *nvm_dev; | |
414 | struct tb_switch_nvm *nvm; | |
415 | u32 val; | |
416 | int ret; | |
417 | ||
b0407983 | 418 | if (!nvm_readable(sw)) |
e6b245cc MW |
419 | return 0; |
420 | ||
b0407983 MW |
421 | /* |
422 | * The NVM format of non-Intel hardware is not known so | |
423 | * currently restrict NVM upgrade for Intel hardware. We may | |
424 | * relax this in the future when we learn other NVM formats. | |
425 | */ | |
426 | if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL) { | |
427 | dev_info(&sw->dev, | |
428 | "NVM format of vendor %#x is not known, disabling NVM upgrade\n", | |
429 | sw->config.vendor_id); | |
430 | return 0; | |
431 | } | |
432 | ||
e6b245cc MW |
433 | nvm = kzalloc(sizeof(*nvm), GFP_KERNEL); |
434 | if (!nvm) | |
435 | return -ENOMEM; | |
436 | ||
437 | nvm->id = ida_simple_get(&nvm_ida, 0, 0, GFP_KERNEL); | |
438 | ||
439 | /* | |
440 | * If the switch is in safe-mode the only accessible portion of | |
441 | * the NVM is the non-active one where userspace is expected to | |
442 | * write new functional NVM. | |
443 | */ | |
444 | if (!sw->safe_mode) { | |
445 | u32 nvm_size, hdr_size; | |
446 | ||
b0407983 | 447 | ret = nvm_read(sw, NVM_FLASH_SIZE, &val, sizeof(val)); |
e6b245cc MW |
448 | if (ret) |
449 | goto err_ida; | |
450 | ||
451 | hdr_size = sw->generation < 3 ? SZ_8K : SZ_16K; | |
452 | nvm_size = (SZ_1M << (val & 7)) / 8; | |
453 | nvm_size = (nvm_size - hdr_size) / 2; | |
454 | ||
b0407983 | 455 | ret = nvm_read(sw, NVM_VERSION, &val, sizeof(val)); |
e6b245cc MW |
456 | if (ret) |
457 | goto err_ida; | |
458 | ||
459 | nvm->major = val >> 16; | |
460 | nvm->minor = val >> 8; | |
461 | ||
462 | nvm_dev = register_nvmem(sw, nvm->id, nvm_size, true); | |
463 | if (IS_ERR(nvm_dev)) { | |
464 | ret = PTR_ERR(nvm_dev); | |
465 | goto err_ida; | |
466 | } | |
467 | nvm->active = nvm_dev; | |
468 | } | |
469 | ||
3f415e5e MW |
470 | if (!sw->no_nvm_upgrade) { |
471 | nvm_dev = register_nvmem(sw, nvm->id, NVM_MAX_SIZE, false); | |
472 | if (IS_ERR(nvm_dev)) { | |
473 | ret = PTR_ERR(nvm_dev); | |
474 | goto err_nvm_active; | |
475 | } | |
476 | nvm->non_active = nvm_dev; | |
e6b245cc | 477 | } |
e6b245cc | 478 | |
e6b245cc | 479 | sw->nvm = nvm; |
e6b245cc MW |
480 | return 0; |
481 | ||
482 | err_nvm_active: | |
483 | if (nvm->active) | |
484 | nvmem_unregister(nvm->active); | |
485 | err_ida: | |
486 | ida_simple_remove(&nvm_ida, nvm->id); | |
487 | kfree(nvm); | |
488 | ||
489 | return ret; | |
490 | } | |
491 | ||
492 | static void tb_switch_nvm_remove(struct tb_switch *sw) | |
493 | { | |
494 | struct tb_switch_nvm *nvm; | |
495 | ||
e6b245cc MW |
496 | nvm = sw->nvm; |
497 | sw->nvm = NULL; | |
e6b245cc MW |
498 | |
499 | if (!nvm) | |
500 | return; | |
501 | ||
502 | /* Remove authentication status in case the switch is unplugged */ | |
503 | if (!nvm->authenticating) | |
504 | nvm_clear_auth_status(sw); | |
505 | ||
3f415e5e MW |
506 | if (nvm->non_active) |
507 | nvmem_unregister(nvm->non_active); | |
e6b245cc MW |
508 | if (nvm->active) |
509 | nvmem_unregister(nvm->active); | |
510 | ida_simple_remove(&nvm_ida, nvm->id); | |
511 | vfree(nvm->buf); | |
512 | kfree(nvm); | |
513 | } | |
514 | ||
a25c8b2f AN |
515 | /* port utility functions */ |
516 | ||
517 | static const char *tb_port_type(struct tb_regs_port_header *port) | |
518 | { | |
519 | switch (port->type >> 16) { | |
520 | case 0: | |
521 | switch ((u8) port->type) { | |
522 | case 0: | |
523 | return "Inactive"; | |
524 | case 1: | |
525 | return "Port"; | |
526 | case 2: | |
527 | return "NHI"; | |
528 | default: | |
529 | return "unknown"; | |
530 | } | |
531 | case 0x2: | |
532 | return "Ethernet"; | |
533 | case 0x8: | |
534 | return "SATA"; | |
535 | case 0xe: | |
536 | return "DP/HDMI"; | |
537 | case 0x10: | |
538 | return "PCIe"; | |
539 | case 0x20: | |
540 | return "USB"; | |
541 | default: | |
542 | return "unknown"; | |
543 | } | |
544 | } | |
545 | ||
546 | static void tb_dump_port(struct tb *tb, struct tb_regs_port_header *port) | |
547 | { | |
daa5140f MW |
548 | tb_dbg(tb, |
549 | " Port %d: %x:%x (Revision: %d, TB Version: %d, Type: %s (%#x))\n", | |
550 | port->port_number, port->vendor_id, port->device_id, | |
551 | port->revision, port->thunderbolt_version, tb_port_type(port), | |
552 | port->type); | |
553 | tb_dbg(tb, " Max hop id (in/out): %d/%d\n", | |
554 | port->max_in_hop_id, port->max_out_hop_id); | |
555 | tb_dbg(tb, " Max counters: %d\n", port->max_counters); | |
556 | tb_dbg(tb, " NFC Credits: %#x\n", port->nfc_credits); | |
a25c8b2f AN |
557 | } |
558 | ||
9da672a4 AN |
559 | /** |
560 | * tb_port_state() - get connectedness state of a port | |
561 | * | |
562 | * The port must have a TB_CAP_PHY (i.e. it should be a real port). | |
563 | * | |
564 | * Return: Returns an enum tb_port_state on success or an error code on failure. | |
565 | */ | |
566 | static int tb_port_state(struct tb_port *port) | |
567 | { | |
568 | struct tb_cap_phy phy; | |
569 | int res; | |
570 | if (port->cap_phy == 0) { | |
571 | tb_port_WARN(port, "does not have a PHY\n"); | |
572 | return -EINVAL; | |
573 | } | |
574 | res = tb_port_read(port, &phy, TB_CFG_PORT, port->cap_phy, 2); | |
575 | if (res) | |
576 | return res; | |
577 | return phy.state; | |
578 | } | |
579 | ||
580 | /** | |
581 | * tb_wait_for_port() - wait for a port to become ready | |
582 | * | |
583 | * Wait up to 1 second for a port to reach state TB_PORT_UP. If | |
584 | * wait_if_unplugged is set then we also wait if the port is in state | |
585 | * TB_PORT_UNPLUGGED (it takes a while for the device to be registered after | |
586 | * switch resume). Otherwise we only wait if a device is registered but the link | |
587 | * has not yet been established. | |
588 | * | |
589 | * Return: Returns an error code on failure. Returns 0 if the port is not | |
590 | * connected or failed to reach state TB_PORT_UP within one second. Returns 1 | |
591 | * if the port is connected and in state TB_PORT_UP. | |
592 | */ | |
593 | int tb_wait_for_port(struct tb_port *port, bool wait_if_unplugged) | |
594 | { | |
595 | int retries = 10; | |
596 | int state; | |
597 | if (!port->cap_phy) { | |
598 | tb_port_WARN(port, "does not have PHY\n"); | |
599 | return -EINVAL; | |
600 | } | |
601 | if (tb_is_upstream_port(port)) { | |
602 | tb_port_WARN(port, "is the upstream port\n"); | |
603 | return -EINVAL; | |
604 | } | |
605 | ||
606 | while (retries--) { | |
607 | state = tb_port_state(port); | |
608 | if (state < 0) | |
609 | return state; | |
610 | if (state == TB_PORT_DISABLED) { | |
62efe699 | 611 | tb_port_dbg(port, "is disabled (state: 0)\n"); |
9da672a4 AN |
612 | return 0; |
613 | } | |
614 | if (state == TB_PORT_UNPLUGGED) { | |
615 | if (wait_if_unplugged) { | |
616 | /* used during resume */ | |
62efe699 MW |
617 | tb_port_dbg(port, |
618 | "is unplugged (state: 7), retrying...\n"); | |
9da672a4 AN |
619 | msleep(100); |
620 | continue; | |
621 | } | |
62efe699 | 622 | tb_port_dbg(port, "is unplugged (state: 7)\n"); |
9da672a4 AN |
623 | return 0; |
624 | } | |
625 | if (state == TB_PORT_UP) { | |
62efe699 | 626 | tb_port_dbg(port, "is connected, link is up (state: 2)\n"); |
9da672a4 AN |
627 | return 1; |
628 | } | |
629 | ||
630 | /* | |
631 | * After plug-in the state is TB_PORT_CONNECTING. Give it some | |
632 | * time. | |
633 | */ | |
62efe699 MW |
634 | tb_port_dbg(port, |
635 | "is connected, link is not up (state: %d), retrying...\n", | |
636 | state); | |
9da672a4 AN |
637 | msleep(100); |
638 | } | |
639 | tb_port_warn(port, | |
640 | "failed to reach state TB_PORT_UP. Ignoring port...\n"); | |
641 | return 0; | |
642 | } | |
643 | ||
520b6702 AN |
644 | /** |
645 | * tb_port_add_nfc_credits() - add/remove non flow controlled credits to port | |
646 | * | |
647 | * Change the number of NFC credits allocated to @port by @credits. To remove | |
648 | * NFC credits pass a negative amount of credits. | |
649 | * | |
650 | * Return: Returns 0 on success or an error code on failure. | |
651 | */ | |
652 | int tb_port_add_nfc_credits(struct tb_port *port, int credits) | |
653 | { | |
c5ee6feb MW |
654 | u32 nfc_credits; |
655 | ||
656 | if (credits == 0 || port->sw->is_unplugged) | |
520b6702 | 657 | return 0; |
c5ee6feb | 658 | |
8f57d478 | 659 | nfc_credits = port->config.nfc_credits & ADP_CS_4_NFC_BUFFERS_MASK; |
c5ee6feb MW |
660 | nfc_credits += credits; |
661 | ||
8f57d478 MW |
662 | tb_port_dbg(port, "adding %d NFC credits to %lu", credits, |
663 | port->config.nfc_credits & ADP_CS_4_NFC_BUFFERS_MASK); | |
c5ee6feb | 664 | |
8f57d478 | 665 | port->config.nfc_credits &= ~ADP_CS_4_NFC_BUFFERS_MASK; |
c5ee6feb MW |
666 | port->config.nfc_credits |= nfc_credits; |
667 | ||
520b6702 | 668 | return tb_port_write(port, &port->config.nfc_credits, |
8f57d478 | 669 | TB_CFG_PORT, ADP_CS_4, 1); |
520b6702 AN |
670 | } |
671 | ||
44242d6c MW |
672 | /** |
673 | * tb_port_set_initial_credits() - Set initial port link credits allocated | |
674 | * @port: Port to set the initial credits | |
675 | * @credits: Number of credits to to allocate | |
676 | * | |
677 | * Set initial credits value to be used for ingress shared buffering. | |
678 | */ | |
679 | int tb_port_set_initial_credits(struct tb_port *port, u32 credits) | |
680 | { | |
681 | u32 data; | |
682 | int ret; | |
683 | ||
8f57d478 | 684 | ret = tb_port_read(port, &data, TB_CFG_PORT, ADP_CS_5, 1); |
44242d6c MW |
685 | if (ret) |
686 | return ret; | |
687 | ||
8f57d478 MW |
688 | data &= ~ADP_CS_5_LCA_MASK; |
689 | data |= (credits << ADP_CS_5_LCA_SHIFT) & ADP_CS_5_LCA_MASK; | |
44242d6c | 690 | |
8f57d478 | 691 | return tb_port_write(port, &data, TB_CFG_PORT, ADP_CS_5, 1); |
44242d6c MW |
692 | } |
693 | ||
520b6702 AN |
694 | /** |
695 | * tb_port_clear_counter() - clear a counter in TB_CFG_COUNTER | |
696 | * | |
697 | * Return: Returns 0 on success or an error code on failure. | |
698 | */ | |
699 | int tb_port_clear_counter(struct tb_port *port, int counter) | |
700 | { | |
701 | u32 zero[3] = { 0, 0, 0 }; | |
62efe699 | 702 | tb_port_dbg(port, "clearing counter %d\n", counter); |
520b6702 AN |
703 | return tb_port_write(port, zero, TB_CFG_COUNTERS, 3 * counter, 3); |
704 | } | |
705 | ||
b0407983 MW |
706 | /** |
707 | * tb_port_unlock() - Unlock downstream port | |
708 | * @port: Port to unlock | |
709 | * | |
710 | * Needed for USB4 but can be called for any CIO/USB4 ports. Makes the | |
711 | * downstream router accessible for CM. | |
712 | */ | |
713 | int tb_port_unlock(struct tb_port *port) | |
714 | { | |
715 | if (tb_switch_is_icm(port->sw)) | |
716 | return 0; | |
717 | if (!tb_port_is_null(port)) | |
718 | return -EINVAL; | |
719 | if (tb_switch_is_usb4(port->sw)) | |
720 | return usb4_port_unlock(port); | |
721 | return 0; | |
722 | } | |
723 | ||
a25c8b2f AN |
724 | /** |
725 | * tb_init_port() - initialize a port | |
726 | * | |
727 | * This is a helper method for tb_switch_alloc. Does not check or initialize | |
728 | * any downstream switches. | |
729 | * | |
730 | * Return: Returns 0 on success or an error code on failure. | |
731 | */ | |
343fcb8c | 732 | static int tb_init_port(struct tb_port *port) |
a25c8b2f AN |
733 | { |
734 | int res; | |
9da672a4 | 735 | int cap; |
343fcb8c | 736 | |
a25c8b2f | 737 | res = tb_port_read(port, &port->config, TB_CFG_PORT, 0, 8); |
d94dcbb1 MW |
738 | if (res) { |
739 | if (res == -ENODEV) { | |
740 | tb_dbg(port->sw->tb, " Port %d: not implemented\n", | |
741 | port->port); | |
742 | return 0; | |
743 | } | |
a25c8b2f | 744 | return res; |
d94dcbb1 | 745 | } |
a25c8b2f | 746 | |
9da672a4 | 747 | /* Port 0 is the switch itself and has no PHY. */ |
343fcb8c | 748 | if (port->config.type == TB_TYPE_PORT && port->port != 0) { |
da2da04b | 749 | cap = tb_port_find_cap(port, TB_PORT_CAP_PHY); |
9da672a4 AN |
750 | |
751 | if (cap > 0) | |
752 | port->cap_phy = cap; | |
753 | else | |
754 | tb_port_WARN(port, "non switch port without a PHY\n"); | |
b0407983 MW |
755 | |
756 | cap = tb_port_find_cap(port, TB_PORT_CAP_USB4); | |
757 | if (cap > 0) | |
758 | port->cap_usb4 = cap; | |
56183c88 MW |
759 | } else if (port->port != 0) { |
760 | cap = tb_port_find_cap(port, TB_PORT_CAP_ADAP); | |
761 | if (cap > 0) | |
762 | port->cap_adap = cap; | |
9da672a4 AN |
763 | } |
764 | ||
343fcb8c | 765 | tb_dump_port(port->sw->tb, &port->config); |
a25c8b2f | 766 | |
0b2863ac MW |
767 | /* Control port does not need HopID allocation */ |
768 | if (port->port) { | |
769 | ida_init(&port->in_hopids); | |
770 | ida_init(&port->out_hopids); | |
771 | } | |
772 | ||
8afe909b | 773 | INIT_LIST_HEAD(&port->list); |
a25c8b2f AN |
774 | return 0; |
775 | ||
776 | } | |
777 | ||
0b2863ac MW |
778 | static int tb_port_alloc_hopid(struct tb_port *port, bool in, int min_hopid, |
779 | int max_hopid) | |
780 | { | |
781 | int port_max_hopid; | |
782 | struct ida *ida; | |
783 | ||
784 | if (in) { | |
785 | port_max_hopid = port->config.max_in_hop_id; | |
786 | ida = &port->in_hopids; | |
787 | } else { | |
788 | port_max_hopid = port->config.max_out_hop_id; | |
789 | ida = &port->out_hopids; | |
790 | } | |
791 | ||
792 | /* HopIDs 0-7 are reserved */ | |
793 | if (min_hopid < TB_PATH_MIN_HOPID) | |
794 | min_hopid = TB_PATH_MIN_HOPID; | |
795 | ||
796 | if (max_hopid < 0 || max_hopid > port_max_hopid) | |
797 | max_hopid = port_max_hopid; | |
798 | ||
799 | return ida_simple_get(ida, min_hopid, max_hopid + 1, GFP_KERNEL); | |
800 | } | |
801 | ||
802 | /** | |
803 | * tb_port_alloc_in_hopid() - Allocate input HopID from port | |
804 | * @port: Port to allocate HopID for | |
805 | * @min_hopid: Minimum acceptable input HopID | |
806 | * @max_hopid: Maximum acceptable input HopID | |
807 | * | |
808 | * Return: HopID between @min_hopid and @max_hopid or negative errno in | |
809 | * case of error. | |
810 | */ | |
811 | int tb_port_alloc_in_hopid(struct tb_port *port, int min_hopid, int max_hopid) | |
812 | { | |
813 | return tb_port_alloc_hopid(port, true, min_hopid, max_hopid); | |
814 | } | |
815 | ||
816 | /** | |
817 | * tb_port_alloc_out_hopid() - Allocate output HopID from port | |
818 | * @port: Port to allocate HopID for | |
819 | * @min_hopid: Minimum acceptable output HopID | |
820 | * @max_hopid: Maximum acceptable output HopID | |
821 | * | |
822 | * Return: HopID between @min_hopid and @max_hopid or negative errno in | |
823 | * case of error. | |
824 | */ | |
825 | int tb_port_alloc_out_hopid(struct tb_port *port, int min_hopid, int max_hopid) | |
826 | { | |
827 | return tb_port_alloc_hopid(port, false, min_hopid, max_hopid); | |
828 | } | |
829 | ||
830 | /** | |
831 | * tb_port_release_in_hopid() - Release allocated input HopID from port | |
832 | * @port: Port whose HopID to release | |
833 | * @hopid: HopID to release | |
834 | */ | |
835 | void tb_port_release_in_hopid(struct tb_port *port, int hopid) | |
836 | { | |
837 | ida_simple_remove(&port->in_hopids, hopid); | |
838 | } | |
839 | ||
840 | /** | |
841 | * tb_port_release_out_hopid() - Release allocated output HopID from port | |
842 | * @port: Port whose HopID to release | |
843 | * @hopid: HopID to release | |
844 | */ | |
845 | void tb_port_release_out_hopid(struct tb_port *port, int hopid) | |
846 | { | |
847 | ida_simple_remove(&port->out_hopids, hopid); | |
848 | } | |
849 | ||
fb19fac1 MW |
850 | /** |
851 | * tb_next_port_on_path() - Return next port for given port on a path | |
852 | * @start: Start port of the walk | |
853 | * @end: End port of the walk | |
854 | * @prev: Previous port (%NULL if this is the first) | |
855 | * | |
856 | * This function can be used to walk from one port to another if they | |
857 | * are connected through zero or more switches. If the @prev is dual | |
858 | * link port, the function follows that link and returns another end on | |
859 | * that same link. | |
860 | * | |
861 | * If the @end port has been reached, return %NULL. | |
862 | * | |
863 | * Domain tb->lock must be held when this function is called. | |
864 | */ | |
865 | struct tb_port *tb_next_port_on_path(struct tb_port *start, struct tb_port *end, | |
866 | struct tb_port *prev) | |
867 | { | |
868 | struct tb_port *next; | |
869 | ||
870 | if (!prev) | |
871 | return start; | |
872 | ||
873 | if (prev->sw == end->sw) { | |
874 | if (prev == end) | |
875 | return NULL; | |
876 | return end; | |
877 | } | |
878 | ||
879 | if (start->sw->config.depth < end->sw->config.depth) { | |
880 | if (prev->remote && | |
881 | prev->remote->sw->config.depth > prev->sw->config.depth) | |
882 | next = prev->remote; | |
883 | else | |
884 | next = tb_port_at(tb_route(end->sw), prev->sw); | |
885 | } else { | |
886 | if (tb_is_upstream_port(prev)) { | |
887 | next = prev->remote; | |
888 | } else { | |
889 | next = tb_upstream_port(prev->sw); | |
890 | /* | |
891 | * Keep the same link if prev and next are both | |
892 | * dual link ports. | |
893 | */ | |
894 | if (next->dual_link_port && | |
895 | next->link_nr != prev->link_nr) { | |
896 | next = next->dual_link_port; | |
897 | } | |
898 | } | |
899 | } | |
900 | ||
901 | return next; | |
902 | } | |
903 | ||
91c0c120 MW |
904 | static int tb_port_get_link_speed(struct tb_port *port) |
905 | { | |
906 | u32 val, speed; | |
907 | int ret; | |
908 | ||
909 | if (!port->cap_phy) | |
910 | return -EINVAL; | |
911 | ||
912 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
913 | port->cap_phy + LANE_ADP_CS_1, 1); | |
914 | if (ret) | |
915 | return ret; | |
916 | ||
917 | speed = (val & LANE_ADP_CS_1_CURRENT_SPEED_MASK) >> | |
918 | LANE_ADP_CS_1_CURRENT_SPEED_SHIFT; | |
919 | return speed == LANE_ADP_CS_1_CURRENT_SPEED_GEN3 ? 20 : 10; | |
920 | } | |
921 | ||
922 | static int tb_port_get_link_width(struct tb_port *port) | |
923 | { | |
924 | u32 val; | |
925 | int ret; | |
926 | ||
927 | if (!port->cap_phy) | |
928 | return -EINVAL; | |
929 | ||
930 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
931 | port->cap_phy + LANE_ADP_CS_1, 1); | |
932 | if (ret) | |
933 | return ret; | |
934 | ||
935 | return (val & LANE_ADP_CS_1_CURRENT_WIDTH_MASK) >> | |
936 | LANE_ADP_CS_1_CURRENT_WIDTH_SHIFT; | |
937 | } | |
938 | ||
939 | static bool tb_port_is_width_supported(struct tb_port *port, int width) | |
940 | { | |
941 | u32 phy, widths; | |
942 | int ret; | |
943 | ||
944 | if (!port->cap_phy) | |
945 | return false; | |
946 | ||
947 | ret = tb_port_read(port, &phy, TB_CFG_PORT, | |
948 | port->cap_phy + LANE_ADP_CS_0, 1); | |
949 | if (ret) | |
e9d0e751 | 950 | return false; |
91c0c120 MW |
951 | |
952 | widths = (phy & LANE_ADP_CS_0_SUPPORTED_WIDTH_MASK) >> | |
953 | LANE_ADP_CS_0_SUPPORTED_WIDTH_SHIFT; | |
954 | ||
955 | return !!(widths & width); | |
956 | } | |
957 | ||
958 | static int tb_port_set_link_width(struct tb_port *port, unsigned int width) | |
959 | { | |
960 | u32 val; | |
961 | int ret; | |
962 | ||
963 | if (!port->cap_phy) | |
964 | return -EINVAL; | |
965 | ||
966 | ret = tb_port_read(port, &val, TB_CFG_PORT, | |
967 | port->cap_phy + LANE_ADP_CS_1, 1); | |
968 | if (ret) | |
969 | return ret; | |
970 | ||
971 | val &= ~LANE_ADP_CS_1_TARGET_WIDTH_MASK; | |
972 | switch (width) { | |
973 | case 1: | |
974 | val |= LANE_ADP_CS_1_TARGET_WIDTH_SINGLE << | |
975 | LANE_ADP_CS_1_TARGET_WIDTH_SHIFT; | |
976 | break; | |
977 | case 2: | |
978 | val |= LANE_ADP_CS_1_TARGET_WIDTH_DUAL << | |
979 | LANE_ADP_CS_1_TARGET_WIDTH_SHIFT; | |
980 | break; | |
981 | default: | |
982 | return -EINVAL; | |
983 | } | |
984 | ||
985 | val |= LANE_ADP_CS_1_LB; | |
986 | ||
987 | return tb_port_write(port, &val, TB_CFG_PORT, | |
988 | port->cap_phy + LANE_ADP_CS_1, 1); | |
989 | } | |
990 | ||
991 | static int tb_port_lane_bonding_enable(struct tb_port *port) | |
992 | { | |
993 | int ret; | |
994 | ||
995 | /* | |
996 | * Enable lane bonding for both links if not already enabled by | |
997 | * for example the boot firmware. | |
998 | */ | |
999 | ret = tb_port_get_link_width(port); | |
1000 | if (ret == 1) { | |
1001 | ret = tb_port_set_link_width(port, 2); | |
1002 | if (ret) | |
1003 | return ret; | |
1004 | } | |
1005 | ||
1006 | ret = tb_port_get_link_width(port->dual_link_port); | |
1007 | if (ret == 1) { | |
1008 | ret = tb_port_set_link_width(port->dual_link_port, 2); | |
1009 | if (ret) { | |
1010 | tb_port_set_link_width(port, 1); | |
1011 | return ret; | |
1012 | } | |
1013 | } | |
1014 | ||
1015 | port->bonded = true; | |
1016 | port->dual_link_port->bonded = true; | |
1017 | ||
1018 | return 0; | |
1019 | } | |
1020 | ||
1021 | static void tb_port_lane_bonding_disable(struct tb_port *port) | |
1022 | { | |
1023 | port->dual_link_port->bonded = false; | |
1024 | port->bonded = false; | |
1025 | ||
1026 | tb_port_set_link_width(port->dual_link_port, 1); | |
1027 | tb_port_set_link_width(port, 1); | |
1028 | } | |
1029 | ||
e78db6f0 MW |
1030 | /** |
1031 | * tb_port_is_enabled() - Is the adapter port enabled | |
1032 | * @port: Port to check | |
1033 | */ | |
1034 | bool tb_port_is_enabled(struct tb_port *port) | |
1035 | { | |
1036 | switch (port->config.type) { | |
1037 | case TB_TYPE_PCIE_UP: | |
1038 | case TB_TYPE_PCIE_DOWN: | |
1039 | return tb_pci_port_is_enabled(port); | |
1040 | ||
4f807e47 MW |
1041 | case TB_TYPE_DP_HDMI_IN: |
1042 | case TB_TYPE_DP_HDMI_OUT: | |
1043 | return tb_dp_port_is_enabled(port); | |
1044 | ||
e6f81858 RM |
1045 | case TB_TYPE_USB3_UP: |
1046 | case TB_TYPE_USB3_DOWN: | |
1047 | return tb_usb3_port_is_enabled(port); | |
1048 | ||
e78db6f0 MW |
1049 | default: |
1050 | return false; | |
1051 | } | |
1052 | } | |
1053 | ||
e6f81858 RM |
1054 | /** |
1055 | * tb_usb3_port_is_enabled() - Is the USB3 adapter port enabled | |
1056 | * @port: USB3 adapter port to check | |
1057 | */ | |
1058 | bool tb_usb3_port_is_enabled(struct tb_port *port) | |
1059 | { | |
1060 | u32 data; | |
1061 | ||
1062 | if (tb_port_read(port, &data, TB_CFG_PORT, | |
1063 | port->cap_adap + ADP_USB3_CS_0, 1)) | |
1064 | return false; | |
1065 | ||
1066 | return !!(data & ADP_USB3_CS_0_PE); | |
1067 | } | |
1068 | ||
1069 | /** | |
1070 | * tb_usb3_port_enable() - Enable USB3 adapter port | |
1071 | * @port: USB3 adapter port to enable | |
1072 | * @enable: Enable/disable the USB3 adapter | |
1073 | */ | |
1074 | int tb_usb3_port_enable(struct tb_port *port, bool enable) | |
1075 | { | |
1076 | u32 word = enable ? (ADP_USB3_CS_0_PE | ADP_USB3_CS_0_V) | |
1077 | : ADP_USB3_CS_0_V; | |
1078 | ||
1079 | if (!port->cap_adap) | |
1080 | return -ENXIO; | |
1081 | return tb_port_write(port, &word, TB_CFG_PORT, | |
1082 | port->cap_adap + ADP_USB3_CS_0, 1); | |
1083 | } | |
1084 | ||
0414bec5 MW |
1085 | /** |
1086 | * tb_pci_port_is_enabled() - Is the PCIe adapter port enabled | |
1087 | * @port: PCIe port to check | |
1088 | */ | |
1089 | bool tb_pci_port_is_enabled(struct tb_port *port) | |
1090 | { | |
1091 | u32 data; | |
1092 | ||
778bfca3 MW |
1093 | if (tb_port_read(port, &data, TB_CFG_PORT, |
1094 | port->cap_adap + ADP_PCIE_CS_0, 1)) | |
0414bec5 MW |
1095 | return false; |
1096 | ||
778bfca3 | 1097 | return !!(data & ADP_PCIE_CS_0_PE); |
0414bec5 MW |
1098 | } |
1099 | ||
93f36ade MW |
1100 | /** |
1101 | * tb_pci_port_enable() - Enable PCIe adapter port | |
1102 | * @port: PCIe port to enable | |
1103 | * @enable: Enable/disable the PCIe adapter | |
1104 | */ | |
1105 | int tb_pci_port_enable(struct tb_port *port, bool enable) | |
1106 | { | |
778bfca3 | 1107 | u32 word = enable ? ADP_PCIE_CS_0_PE : 0x0; |
93f36ade MW |
1108 | if (!port->cap_adap) |
1109 | return -ENXIO; | |
778bfca3 MW |
1110 | return tb_port_write(port, &word, TB_CFG_PORT, |
1111 | port->cap_adap + ADP_PCIE_CS_0, 1); | |
93f36ade MW |
1112 | } |
1113 | ||
4f807e47 MW |
1114 | /** |
1115 | * tb_dp_port_hpd_is_active() - Is HPD already active | |
1116 | * @port: DP out port to check | |
1117 | * | |
1118 | * Checks if the DP OUT adapter port has HDP bit already set. | |
1119 | */ | |
1120 | int tb_dp_port_hpd_is_active(struct tb_port *port) | |
1121 | { | |
1122 | u32 data; | |
1123 | int ret; | |
1124 | ||
98176380 MW |
1125 | ret = tb_port_read(port, &data, TB_CFG_PORT, |
1126 | port->cap_adap + ADP_DP_CS_2, 1); | |
4f807e47 MW |
1127 | if (ret) |
1128 | return ret; | |
1129 | ||
98176380 | 1130 | return !!(data & ADP_DP_CS_2_HDP); |
4f807e47 MW |
1131 | } |
1132 | ||
1133 | /** | |
1134 | * tb_dp_port_hpd_clear() - Clear HPD from DP IN port | |
1135 | * @port: Port to clear HPD | |
1136 | * | |
1137 | * If the DP IN port has HDP set, this function can be used to clear it. | |
1138 | */ | |
1139 | int tb_dp_port_hpd_clear(struct tb_port *port) | |
1140 | { | |
1141 | u32 data; | |
1142 | int ret; | |
1143 | ||
98176380 MW |
1144 | ret = tb_port_read(port, &data, TB_CFG_PORT, |
1145 | port->cap_adap + ADP_DP_CS_3, 1); | |
4f807e47 MW |
1146 | if (ret) |
1147 | return ret; | |
1148 | ||
98176380 MW |
1149 | data |= ADP_DP_CS_3_HDPC; |
1150 | return tb_port_write(port, &data, TB_CFG_PORT, | |
1151 | port->cap_adap + ADP_DP_CS_3, 1); | |
4f807e47 MW |
1152 | } |
1153 | ||
1154 | /** | |
1155 | * tb_dp_port_set_hops() - Set video/aux Hop IDs for DP port | |
1156 | * @port: DP IN/OUT port to set hops | |
1157 | * @video: Video Hop ID | |
1158 | * @aux_tx: AUX TX Hop ID | |
1159 | * @aux_rx: AUX RX Hop ID | |
1160 | * | |
1161 | * Programs specified Hop IDs for DP IN/OUT port. | |
1162 | */ | |
1163 | int tb_dp_port_set_hops(struct tb_port *port, unsigned int video, | |
1164 | unsigned int aux_tx, unsigned int aux_rx) | |
1165 | { | |
1166 | u32 data[2]; | |
1167 | int ret; | |
1168 | ||
98176380 MW |
1169 | ret = tb_port_read(port, data, TB_CFG_PORT, |
1170 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); | |
4f807e47 MW |
1171 | if (ret) |
1172 | return ret; | |
1173 | ||
98176380 MW |
1174 | data[0] &= ~ADP_DP_CS_0_VIDEO_HOPID_MASK; |
1175 | data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK; | |
1176 | data[1] &= ~ADP_DP_CS_1_AUX_RX_HOPID_MASK; | |
4f807e47 | 1177 | |
98176380 MW |
1178 | data[0] |= (video << ADP_DP_CS_0_VIDEO_HOPID_SHIFT) & |
1179 | ADP_DP_CS_0_VIDEO_HOPID_MASK; | |
1180 | data[1] |= aux_tx & ADP_DP_CS_1_AUX_TX_HOPID_MASK; | |
1181 | data[1] |= (aux_rx << ADP_DP_CS_1_AUX_RX_HOPID_SHIFT) & | |
1182 | ADP_DP_CS_1_AUX_RX_HOPID_MASK; | |
4f807e47 | 1183 | |
98176380 MW |
1184 | return tb_port_write(port, data, TB_CFG_PORT, |
1185 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); | |
4f807e47 MW |
1186 | } |
1187 | ||
1188 | /** | |
1189 | * tb_dp_port_is_enabled() - Is DP adapter port enabled | |
1190 | * @port: DP adapter port to check | |
1191 | */ | |
1192 | bool tb_dp_port_is_enabled(struct tb_port *port) | |
1193 | { | |
fd5c46b7 | 1194 | u32 data[2]; |
4f807e47 | 1195 | |
98176380 | 1196 | if (tb_port_read(port, data, TB_CFG_PORT, port->cap_adap + ADP_DP_CS_0, |
fd5c46b7 | 1197 | ARRAY_SIZE(data))) |
4f807e47 MW |
1198 | return false; |
1199 | ||
98176380 | 1200 | return !!(data[0] & (ADP_DP_CS_0_VE | ADP_DP_CS_0_AE)); |
4f807e47 MW |
1201 | } |
1202 | ||
1203 | /** | |
1204 | * tb_dp_port_enable() - Enables/disables DP paths of a port | |
1205 | * @port: DP IN/OUT port | |
1206 | * @enable: Enable/disable DP path | |
1207 | * | |
1208 | * Once Hop IDs are programmed DP paths can be enabled or disabled by | |
1209 | * calling this function. | |
1210 | */ | |
1211 | int tb_dp_port_enable(struct tb_port *port, bool enable) | |
1212 | { | |
fd5c46b7 | 1213 | u32 data[2]; |
4f807e47 MW |
1214 | int ret; |
1215 | ||
98176380 MW |
1216 | ret = tb_port_read(port, data, TB_CFG_PORT, |
1217 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); | |
4f807e47 MW |
1218 | if (ret) |
1219 | return ret; | |
1220 | ||
1221 | if (enable) | |
98176380 | 1222 | data[0] |= ADP_DP_CS_0_VE | ADP_DP_CS_0_AE; |
4f807e47 | 1223 | else |
98176380 | 1224 | data[0] &= ~(ADP_DP_CS_0_VE | ADP_DP_CS_0_AE); |
4f807e47 | 1225 | |
98176380 MW |
1226 | return tb_port_write(port, data, TB_CFG_PORT, |
1227 | port->cap_adap + ADP_DP_CS_0, ARRAY_SIZE(data)); | |
4f807e47 MW |
1228 | } |
1229 | ||
a25c8b2f AN |
1230 | /* switch utility functions */ |
1231 | ||
b0407983 MW |
1232 | static const char *tb_switch_generation_name(const struct tb_switch *sw) |
1233 | { | |
1234 | switch (sw->generation) { | |
1235 | case 1: | |
1236 | return "Thunderbolt 1"; | |
1237 | case 2: | |
1238 | return "Thunderbolt 2"; | |
1239 | case 3: | |
1240 | return "Thunderbolt 3"; | |
1241 | case 4: | |
1242 | return "USB4"; | |
1243 | default: | |
1244 | return "Unknown"; | |
1245 | } | |
1246 | } | |
1247 | ||
1248 | static void tb_dump_switch(const struct tb *tb, const struct tb_switch *sw) | |
a25c8b2f | 1249 | { |
b0407983 MW |
1250 | const struct tb_regs_switch_header *regs = &sw->config; |
1251 | ||
1252 | tb_dbg(tb, " %s Switch: %x:%x (Revision: %d, TB Version: %d)\n", | |
1253 | tb_switch_generation_name(sw), regs->vendor_id, regs->device_id, | |
1254 | regs->revision, regs->thunderbolt_version); | |
1255 | tb_dbg(tb, " Max Port Number: %d\n", regs->max_port_number); | |
daa5140f MW |
1256 | tb_dbg(tb, " Config:\n"); |
1257 | tb_dbg(tb, | |
a25c8b2f | 1258 | " Upstream Port Number: %d Depth: %d Route String: %#llx Enabled: %d, PlugEventsDelay: %dms\n", |
b0407983 MW |
1259 | regs->upstream_port_number, regs->depth, |
1260 | (((u64) regs->route_hi) << 32) | regs->route_lo, | |
1261 | regs->enabled, regs->plug_events_delay); | |
daa5140f | 1262 | tb_dbg(tb, " unknown1: %#x unknown4: %#x\n", |
b0407983 | 1263 | regs->__unknown1, regs->__unknown4); |
a25c8b2f AN |
1264 | } |
1265 | ||
23dd5bb4 AN |
1266 | /** |
1267 | * reset_switch() - reconfigure route, enable and send TB_CFG_PKG_RESET | |
1268 | * | |
1269 | * Return: Returns 0 on success or an error code on failure. | |
1270 | */ | |
1271 | int tb_switch_reset(struct tb *tb, u64 route) | |
1272 | { | |
1273 | struct tb_cfg_result res; | |
1274 | struct tb_regs_switch_header header = { | |
1275 | header.route_hi = route >> 32, | |
1276 | header.route_lo = route, | |
1277 | header.enabled = true, | |
1278 | }; | |
daa5140f | 1279 | tb_dbg(tb, "resetting switch at %llx\n", route); |
23dd5bb4 AN |
1280 | res.err = tb_cfg_write(tb->ctl, ((u32 *) &header) + 2, route, |
1281 | 0, 2, 2, 2); | |
1282 | if (res.err) | |
1283 | return res.err; | |
1284 | res = tb_cfg_reset(tb->ctl, route, TB_CFG_DEFAULT_TIMEOUT); | |
1285 | if (res.err > 0) | |
1286 | return -EIO; | |
1287 | return res.err; | |
1288 | } | |
1289 | ||
ca389f71 AN |
1290 | /** |
1291 | * tb_plug_events_active() - enable/disable plug events on a switch | |
1292 | * | |
1293 | * Also configures a sane plug_events_delay of 255ms. | |
1294 | * | |
1295 | * Return: Returns 0 on success or an error code on failure. | |
1296 | */ | |
1297 | static int tb_plug_events_active(struct tb_switch *sw, bool active) | |
1298 | { | |
1299 | u32 data; | |
1300 | int res; | |
1301 | ||
f07a3608 | 1302 | if (tb_switch_is_icm(sw)) |
bfe778ac MW |
1303 | return 0; |
1304 | ||
ca389f71 AN |
1305 | sw->config.plug_events_delay = 0xff; |
1306 | res = tb_sw_write(sw, ((u32 *) &sw->config) + 4, TB_CFG_SWITCH, 4, 1); | |
1307 | if (res) | |
1308 | return res; | |
1309 | ||
b0407983 MW |
1310 | /* Plug events are always enabled in USB4 */ |
1311 | if (tb_switch_is_usb4(sw)) | |
1312 | return 0; | |
1313 | ||
ca389f71 AN |
1314 | res = tb_sw_read(sw, &data, TB_CFG_SWITCH, sw->cap_plug_events + 1, 1); |
1315 | if (res) | |
1316 | return res; | |
1317 | ||
1318 | if (active) { | |
1319 | data = data & 0xFFFFFF83; | |
1320 | switch (sw->config.device_id) { | |
1d111406 LW |
1321 | case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: |
1322 | case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: | |
1323 | case PCI_DEVICE_ID_INTEL_PORT_RIDGE: | |
ca389f71 AN |
1324 | break; |
1325 | default: | |
1326 | data |= 4; | |
1327 | } | |
1328 | } else { | |
1329 | data = data | 0x7c; | |
1330 | } | |
1331 | return tb_sw_write(sw, &data, TB_CFG_SWITCH, | |
1332 | sw->cap_plug_events + 1, 1); | |
1333 | } | |
1334 | ||
f67cf491 MW |
1335 | static ssize_t authorized_show(struct device *dev, |
1336 | struct device_attribute *attr, | |
1337 | char *buf) | |
1338 | { | |
1339 | struct tb_switch *sw = tb_to_switch(dev); | |
1340 | ||
1341 | return sprintf(buf, "%u\n", sw->authorized); | |
1342 | } | |
1343 | ||
1344 | static int tb_switch_set_authorized(struct tb_switch *sw, unsigned int val) | |
1345 | { | |
1346 | int ret = -EINVAL; | |
1347 | ||
09f11b6c MW |
1348 | if (!mutex_trylock(&sw->tb->lock)) |
1349 | return restart_syscall(); | |
f67cf491 MW |
1350 | |
1351 | if (sw->authorized) | |
1352 | goto unlock; | |
1353 | ||
1354 | switch (val) { | |
1355 | /* Approve switch */ | |
1356 | case 1: | |
1357 | if (sw->key) | |
1358 | ret = tb_domain_approve_switch_key(sw->tb, sw); | |
1359 | else | |
1360 | ret = tb_domain_approve_switch(sw->tb, sw); | |
1361 | break; | |
1362 | ||
1363 | /* Challenge switch */ | |
1364 | case 2: | |
1365 | if (sw->key) | |
1366 | ret = tb_domain_challenge_switch_key(sw->tb, sw); | |
1367 | break; | |
1368 | ||
1369 | default: | |
1370 | break; | |
1371 | } | |
1372 | ||
1373 | if (!ret) { | |
1374 | sw->authorized = val; | |
1375 | /* Notify status change to the userspace */ | |
1376 | kobject_uevent(&sw->dev.kobj, KOBJ_CHANGE); | |
1377 | } | |
1378 | ||
1379 | unlock: | |
09f11b6c | 1380 | mutex_unlock(&sw->tb->lock); |
f67cf491 MW |
1381 | return ret; |
1382 | } | |
1383 | ||
1384 | static ssize_t authorized_store(struct device *dev, | |
1385 | struct device_attribute *attr, | |
1386 | const char *buf, size_t count) | |
1387 | { | |
1388 | struct tb_switch *sw = tb_to_switch(dev); | |
1389 | unsigned int val; | |
1390 | ssize_t ret; | |
1391 | ||
1392 | ret = kstrtouint(buf, 0, &val); | |
1393 | if (ret) | |
1394 | return ret; | |
1395 | if (val > 2) | |
1396 | return -EINVAL; | |
1397 | ||
4f7c2e0d | 1398 | pm_runtime_get_sync(&sw->dev); |
f67cf491 | 1399 | ret = tb_switch_set_authorized(sw, val); |
4f7c2e0d MW |
1400 | pm_runtime_mark_last_busy(&sw->dev); |
1401 | pm_runtime_put_autosuspend(&sw->dev); | |
f67cf491 MW |
1402 | |
1403 | return ret ? ret : count; | |
1404 | } | |
1405 | static DEVICE_ATTR_RW(authorized); | |
1406 | ||
14862ee3 YB |
1407 | static ssize_t boot_show(struct device *dev, struct device_attribute *attr, |
1408 | char *buf) | |
1409 | { | |
1410 | struct tb_switch *sw = tb_to_switch(dev); | |
1411 | ||
1412 | return sprintf(buf, "%u\n", sw->boot); | |
1413 | } | |
1414 | static DEVICE_ATTR_RO(boot); | |
1415 | ||
bfe778ac MW |
1416 | static ssize_t device_show(struct device *dev, struct device_attribute *attr, |
1417 | char *buf) | |
1418 | { | |
1419 | struct tb_switch *sw = tb_to_switch(dev); | |
ca389f71 | 1420 | |
bfe778ac MW |
1421 | return sprintf(buf, "%#x\n", sw->device); |
1422 | } | |
1423 | static DEVICE_ATTR_RO(device); | |
1424 | ||
72ee3390 MW |
1425 | static ssize_t |
1426 | device_name_show(struct device *dev, struct device_attribute *attr, char *buf) | |
1427 | { | |
1428 | struct tb_switch *sw = tb_to_switch(dev); | |
1429 | ||
1430 | return sprintf(buf, "%s\n", sw->device_name ? sw->device_name : ""); | |
1431 | } | |
1432 | static DEVICE_ATTR_RO(device_name); | |
1433 | ||
b406357c CK |
1434 | static ssize_t |
1435 | generation_show(struct device *dev, struct device_attribute *attr, char *buf) | |
1436 | { | |
1437 | struct tb_switch *sw = tb_to_switch(dev); | |
1438 | ||
1439 | return sprintf(buf, "%u\n", sw->generation); | |
1440 | } | |
1441 | static DEVICE_ATTR_RO(generation); | |
1442 | ||
f67cf491 MW |
1443 | static ssize_t key_show(struct device *dev, struct device_attribute *attr, |
1444 | char *buf) | |
1445 | { | |
1446 | struct tb_switch *sw = tb_to_switch(dev); | |
1447 | ssize_t ret; | |
1448 | ||
09f11b6c MW |
1449 | if (!mutex_trylock(&sw->tb->lock)) |
1450 | return restart_syscall(); | |
f67cf491 MW |
1451 | |
1452 | if (sw->key) | |
1453 | ret = sprintf(buf, "%*phN\n", TB_SWITCH_KEY_SIZE, sw->key); | |
1454 | else | |
1455 | ret = sprintf(buf, "\n"); | |
1456 | ||
09f11b6c | 1457 | mutex_unlock(&sw->tb->lock); |
f67cf491 MW |
1458 | return ret; |
1459 | } | |
1460 | ||
1461 | static ssize_t key_store(struct device *dev, struct device_attribute *attr, | |
1462 | const char *buf, size_t count) | |
1463 | { | |
1464 | struct tb_switch *sw = tb_to_switch(dev); | |
1465 | u8 key[TB_SWITCH_KEY_SIZE]; | |
1466 | ssize_t ret = count; | |
e545f0d8 | 1467 | bool clear = false; |
f67cf491 | 1468 | |
e545f0d8 BY |
1469 | if (!strcmp(buf, "\n")) |
1470 | clear = true; | |
1471 | else if (hex2bin(key, buf, sizeof(key))) | |
f67cf491 MW |
1472 | return -EINVAL; |
1473 | ||
09f11b6c MW |
1474 | if (!mutex_trylock(&sw->tb->lock)) |
1475 | return restart_syscall(); | |
f67cf491 MW |
1476 | |
1477 | if (sw->authorized) { | |
1478 | ret = -EBUSY; | |
1479 | } else { | |
1480 | kfree(sw->key); | |
e545f0d8 BY |
1481 | if (clear) { |
1482 | sw->key = NULL; | |
1483 | } else { | |
1484 | sw->key = kmemdup(key, sizeof(key), GFP_KERNEL); | |
1485 | if (!sw->key) | |
1486 | ret = -ENOMEM; | |
1487 | } | |
f67cf491 MW |
1488 | } |
1489 | ||
09f11b6c | 1490 | mutex_unlock(&sw->tb->lock); |
f67cf491 MW |
1491 | return ret; |
1492 | } | |
0956e411 | 1493 | static DEVICE_ATTR(key, 0600, key_show, key_store); |
f67cf491 | 1494 | |
91c0c120 MW |
1495 | static ssize_t speed_show(struct device *dev, struct device_attribute *attr, |
1496 | char *buf) | |
1497 | { | |
1498 | struct tb_switch *sw = tb_to_switch(dev); | |
1499 | ||
1500 | return sprintf(buf, "%u.0 Gb/s\n", sw->link_speed); | |
1501 | } | |
1502 | ||
1503 | /* | |
1504 | * Currently all lanes must run at the same speed but we expose here | |
1505 | * both directions to allow possible asymmetric links in the future. | |
1506 | */ | |
1507 | static DEVICE_ATTR(rx_speed, 0444, speed_show, NULL); | |
1508 | static DEVICE_ATTR(tx_speed, 0444, speed_show, NULL); | |
1509 | ||
1510 | static ssize_t lanes_show(struct device *dev, struct device_attribute *attr, | |
1511 | char *buf) | |
1512 | { | |
1513 | struct tb_switch *sw = tb_to_switch(dev); | |
1514 | ||
1515 | return sprintf(buf, "%u\n", sw->link_width); | |
1516 | } | |
1517 | ||
1518 | /* | |
1519 | * Currently link has same amount of lanes both directions (1 or 2) but | |
1520 | * expose them separately to allow possible asymmetric links in the future. | |
1521 | */ | |
1522 | static DEVICE_ATTR(rx_lanes, 0444, lanes_show, NULL); | |
1523 | static DEVICE_ATTR(tx_lanes, 0444, lanes_show, NULL); | |
1524 | ||
e6b245cc MW |
1525 | static ssize_t nvm_authenticate_show(struct device *dev, |
1526 | struct device_attribute *attr, char *buf) | |
1527 | { | |
1528 | struct tb_switch *sw = tb_to_switch(dev); | |
1529 | u32 status; | |
1530 | ||
1531 | nvm_get_auth_status(sw, &status); | |
1532 | return sprintf(buf, "%#x\n", status); | |
1533 | } | |
1534 | ||
1535 | static ssize_t nvm_authenticate_store(struct device *dev, | |
1536 | struct device_attribute *attr, const char *buf, size_t count) | |
1537 | { | |
1538 | struct tb_switch *sw = tb_to_switch(dev); | |
1539 | bool val; | |
1540 | int ret; | |
1541 | ||
4f7c2e0d MW |
1542 | pm_runtime_get_sync(&sw->dev); |
1543 | ||
1544 | if (!mutex_trylock(&sw->tb->lock)) { | |
1545 | ret = restart_syscall(); | |
1546 | goto exit_rpm; | |
1547 | } | |
e6b245cc MW |
1548 | |
1549 | /* If NVMem devices are not yet added */ | |
1550 | if (!sw->nvm) { | |
1551 | ret = -EAGAIN; | |
1552 | goto exit_unlock; | |
1553 | } | |
1554 | ||
1555 | ret = kstrtobool(buf, &val); | |
1556 | if (ret) | |
1557 | goto exit_unlock; | |
1558 | ||
1559 | /* Always clear the authentication status */ | |
1560 | nvm_clear_auth_status(sw); | |
1561 | ||
1562 | if (val) { | |
2d8ff0b5 MW |
1563 | if (!sw->nvm->buf) { |
1564 | ret = -EINVAL; | |
1565 | goto exit_unlock; | |
1566 | } | |
1567 | ||
e6b245cc | 1568 | ret = nvm_validate_and_write(sw); |
4f7c2e0d | 1569 | if (ret) |
e6b245cc MW |
1570 | goto exit_unlock; |
1571 | ||
1572 | sw->nvm->authenticating = true; | |
b0407983 | 1573 | ret = nvm_authenticate(sw); |
e6b245cc MW |
1574 | } |
1575 | ||
1576 | exit_unlock: | |
09f11b6c | 1577 | mutex_unlock(&sw->tb->lock); |
4f7c2e0d MW |
1578 | exit_rpm: |
1579 | pm_runtime_mark_last_busy(&sw->dev); | |
1580 | pm_runtime_put_autosuspend(&sw->dev); | |
e6b245cc MW |
1581 | |
1582 | if (ret) | |
1583 | return ret; | |
1584 | return count; | |
1585 | } | |
1586 | static DEVICE_ATTR_RW(nvm_authenticate); | |
1587 | ||
1588 | static ssize_t nvm_version_show(struct device *dev, | |
1589 | struct device_attribute *attr, char *buf) | |
1590 | { | |
1591 | struct tb_switch *sw = tb_to_switch(dev); | |
1592 | int ret; | |
1593 | ||
09f11b6c MW |
1594 | if (!mutex_trylock(&sw->tb->lock)) |
1595 | return restart_syscall(); | |
e6b245cc MW |
1596 | |
1597 | if (sw->safe_mode) | |
1598 | ret = -ENODATA; | |
1599 | else if (!sw->nvm) | |
1600 | ret = -EAGAIN; | |
1601 | else | |
1602 | ret = sprintf(buf, "%x.%x\n", sw->nvm->major, sw->nvm->minor); | |
1603 | ||
09f11b6c | 1604 | mutex_unlock(&sw->tb->lock); |
e6b245cc MW |
1605 | |
1606 | return ret; | |
1607 | } | |
1608 | static DEVICE_ATTR_RO(nvm_version); | |
1609 | ||
bfe778ac MW |
1610 | static ssize_t vendor_show(struct device *dev, struct device_attribute *attr, |
1611 | char *buf) | |
a25c8b2f | 1612 | { |
bfe778ac | 1613 | struct tb_switch *sw = tb_to_switch(dev); |
a25c8b2f | 1614 | |
bfe778ac MW |
1615 | return sprintf(buf, "%#x\n", sw->vendor); |
1616 | } | |
1617 | static DEVICE_ATTR_RO(vendor); | |
1618 | ||
72ee3390 MW |
1619 | static ssize_t |
1620 | vendor_name_show(struct device *dev, struct device_attribute *attr, char *buf) | |
1621 | { | |
1622 | struct tb_switch *sw = tb_to_switch(dev); | |
1623 | ||
1624 | return sprintf(buf, "%s\n", sw->vendor_name ? sw->vendor_name : ""); | |
1625 | } | |
1626 | static DEVICE_ATTR_RO(vendor_name); | |
1627 | ||
bfe778ac MW |
1628 | static ssize_t unique_id_show(struct device *dev, struct device_attribute *attr, |
1629 | char *buf) | |
1630 | { | |
1631 | struct tb_switch *sw = tb_to_switch(dev); | |
1632 | ||
1633 | return sprintf(buf, "%pUb\n", sw->uuid); | |
1634 | } | |
1635 | static DEVICE_ATTR_RO(unique_id); | |
1636 | ||
1637 | static struct attribute *switch_attrs[] = { | |
f67cf491 | 1638 | &dev_attr_authorized.attr, |
14862ee3 | 1639 | &dev_attr_boot.attr, |
bfe778ac | 1640 | &dev_attr_device.attr, |
72ee3390 | 1641 | &dev_attr_device_name.attr, |
b406357c | 1642 | &dev_attr_generation.attr, |
f67cf491 | 1643 | &dev_attr_key.attr, |
e6b245cc MW |
1644 | &dev_attr_nvm_authenticate.attr, |
1645 | &dev_attr_nvm_version.attr, | |
91c0c120 MW |
1646 | &dev_attr_rx_speed.attr, |
1647 | &dev_attr_rx_lanes.attr, | |
1648 | &dev_attr_tx_speed.attr, | |
1649 | &dev_attr_tx_lanes.attr, | |
bfe778ac | 1650 | &dev_attr_vendor.attr, |
72ee3390 | 1651 | &dev_attr_vendor_name.attr, |
bfe778ac MW |
1652 | &dev_attr_unique_id.attr, |
1653 | NULL, | |
1654 | }; | |
1655 | ||
f67cf491 MW |
1656 | static umode_t switch_attr_is_visible(struct kobject *kobj, |
1657 | struct attribute *attr, int n) | |
1658 | { | |
1659 | struct device *dev = container_of(kobj, struct device, kobj); | |
1660 | struct tb_switch *sw = tb_to_switch(dev); | |
1661 | ||
58f414fa MW |
1662 | if (attr == &dev_attr_device.attr) { |
1663 | if (!sw->device) | |
1664 | return 0; | |
1665 | } else if (attr == &dev_attr_device_name.attr) { | |
1666 | if (!sw->device_name) | |
1667 | return 0; | |
1668 | } else if (attr == &dev_attr_vendor.attr) { | |
1669 | if (!sw->vendor) | |
1670 | return 0; | |
1671 | } else if (attr == &dev_attr_vendor_name.attr) { | |
1672 | if (!sw->vendor_name) | |
1673 | return 0; | |
1674 | } else if (attr == &dev_attr_key.attr) { | |
f67cf491 MW |
1675 | if (tb_route(sw) && |
1676 | sw->tb->security_level == TB_SECURITY_SECURE && | |
1677 | sw->security_level == TB_SECURITY_SECURE) | |
1678 | return attr->mode; | |
1679 | return 0; | |
91c0c120 MW |
1680 | } else if (attr == &dev_attr_rx_speed.attr || |
1681 | attr == &dev_attr_rx_lanes.attr || | |
1682 | attr == &dev_attr_tx_speed.attr || | |
1683 | attr == &dev_attr_tx_lanes.attr) { | |
1684 | if (tb_route(sw)) | |
1685 | return attr->mode; | |
1686 | return 0; | |
3f415e5e | 1687 | } else if (attr == &dev_attr_nvm_authenticate.attr) { |
b0407983 | 1688 | if (nvm_upgradeable(sw)) |
3f415e5e MW |
1689 | return attr->mode; |
1690 | return 0; | |
1691 | } else if (attr == &dev_attr_nvm_version.attr) { | |
b0407983 | 1692 | if (nvm_readable(sw)) |
e6b245cc MW |
1693 | return attr->mode; |
1694 | return 0; | |
14862ee3 YB |
1695 | } else if (attr == &dev_attr_boot.attr) { |
1696 | if (tb_route(sw)) | |
1697 | return attr->mode; | |
1698 | return 0; | |
f67cf491 MW |
1699 | } |
1700 | ||
e6b245cc | 1701 | return sw->safe_mode ? 0 : attr->mode; |
f67cf491 MW |
1702 | } |
1703 | ||
bfe778ac | 1704 | static struct attribute_group switch_group = { |
f67cf491 | 1705 | .is_visible = switch_attr_is_visible, |
bfe778ac MW |
1706 | .attrs = switch_attrs, |
1707 | }; | |
ca389f71 | 1708 | |
bfe778ac MW |
1709 | static const struct attribute_group *switch_groups[] = { |
1710 | &switch_group, | |
1711 | NULL, | |
1712 | }; | |
1713 | ||
1714 | static void tb_switch_release(struct device *dev) | |
1715 | { | |
1716 | struct tb_switch *sw = tb_to_switch(dev); | |
b433d010 | 1717 | struct tb_port *port; |
bfe778ac | 1718 | |
3e136768 MW |
1719 | dma_port_free(sw->dma_port); |
1720 | ||
b433d010 MW |
1721 | tb_switch_for_each_port(sw, port) { |
1722 | if (!port->disabled) { | |
1723 | ida_destroy(&port->in_hopids); | |
1724 | ida_destroy(&port->out_hopids); | |
0b2863ac MW |
1725 | } |
1726 | } | |
1727 | ||
bfe778ac | 1728 | kfree(sw->uuid); |
72ee3390 MW |
1729 | kfree(sw->device_name); |
1730 | kfree(sw->vendor_name); | |
a25c8b2f | 1731 | kfree(sw->ports); |
343fcb8c | 1732 | kfree(sw->drom); |
f67cf491 | 1733 | kfree(sw->key); |
a25c8b2f AN |
1734 | kfree(sw); |
1735 | } | |
1736 | ||
2d8ff0b5 MW |
1737 | /* |
1738 | * Currently only need to provide the callbacks. Everything else is handled | |
1739 | * in the connection manager. | |
1740 | */ | |
1741 | static int __maybe_unused tb_switch_runtime_suspend(struct device *dev) | |
1742 | { | |
4f7c2e0d MW |
1743 | struct tb_switch *sw = tb_to_switch(dev); |
1744 | const struct tb_cm_ops *cm_ops = sw->tb->cm_ops; | |
1745 | ||
1746 | if (cm_ops->runtime_suspend_switch) | |
1747 | return cm_ops->runtime_suspend_switch(sw); | |
1748 | ||
2d8ff0b5 MW |
1749 | return 0; |
1750 | } | |
1751 | ||
1752 | static int __maybe_unused tb_switch_runtime_resume(struct device *dev) | |
1753 | { | |
4f7c2e0d MW |
1754 | struct tb_switch *sw = tb_to_switch(dev); |
1755 | const struct tb_cm_ops *cm_ops = sw->tb->cm_ops; | |
1756 | ||
1757 | if (cm_ops->runtime_resume_switch) | |
1758 | return cm_ops->runtime_resume_switch(sw); | |
2d8ff0b5 MW |
1759 | return 0; |
1760 | } | |
1761 | ||
1762 | static const struct dev_pm_ops tb_switch_pm_ops = { | |
1763 | SET_RUNTIME_PM_OPS(tb_switch_runtime_suspend, tb_switch_runtime_resume, | |
1764 | NULL) | |
1765 | }; | |
1766 | ||
bfe778ac MW |
1767 | struct device_type tb_switch_type = { |
1768 | .name = "thunderbolt_device", | |
1769 | .release = tb_switch_release, | |
2d8ff0b5 | 1770 | .pm = &tb_switch_pm_ops, |
bfe778ac MW |
1771 | }; |
1772 | ||
2c3c4197 MW |
1773 | static int tb_switch_get_generation(struct tb_switch *sw) |
1774 | { | |
1775 | switch (sw->config.device_id) { | |
1776 | case PCI_DEVICE_ID_INTEL_LIGHT_RIDGE: | |
1777 | case PCI_DEVICE_ID_INTEL_EAGLE_RIDGE: | |
1778 | case PCI_DEVICE_ID_INTEL_LIGHT_PEAK: | |
1779 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_2C: | |
1780 | case PCI_DEVICE_ID_INTEL_CACTUS_RIDGE_4C: | |
1781 | case PCI_DEVICE_ID_INTEL_PORT_RIDGE: | |
1782 | case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_2C_BRIDGE: | |
1783 | case PCI_DEVICE_ID_INTEL_REDWOOD_RIDGE_4C_BRIDGE: | |
1784 | return 1; | |
1785 | ||
1786 | case PCI_DEVICE_ID_INTEL_WIN_RIDGE_2C_BRIDGE: | |
1787 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_2C_BRIDGE: | |
1788 | case PCI_DEVICE_ID_INTEL_FALCON_RIDGE_4C_BRIDGE: | |
1789 | return 2; | |
1790 | ||
1791 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_LP_BRIDGE: | |
1792 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_2C_BRIDGE: | |
1793 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_4C_BRIDGE: | |
1794 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_2C_BRIDGE: | |
1795 | case PCI_DEVICE_ID_INTEL_ALPINE_RIDGE_C_4C_BRIDGE: | |
4bac471d RM |
1796 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_2C_BRIDGE: |
1797 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_4C_BRIDGE: | |
1798 | case PCI_DEVICE_ID_INTEL_TITAN_RIDGE_DD_BRIDGE: | |
3cdb9446 MW |
1799 | case PCI_DEVICE_ID_INTEL_ICL_NHI0: |
1800 | case PCI_DEVICE_ID_INTEL_ICL_NHI1: | |
2c3c4197 MW |
1801 | return 3; |
1802 | ||
1803 | default: | |
b0407983 MW |
1804 | if (tb_switch_is_usb4(sw)) |
1805 | return 4; | |
1806 | ||
2c3c4197 MW |
1807 | /* |
1808 | * For unknown switches assume generation to be 1 to be | |
1809 | * on the safe side. | |
1810 | */ | |
1811 | tb_sw_warn(sw, "unsupported switch device id %#x\n", | |
1812 | sw->config.device_id); | |
1813 | return 1; | |
1814 | } | |
1815 | } | |
1816 | ||
b0407983 MW |
1817 | static bool tb_switch_exceeds_max_depth(const struct tb_switch *sw, int depth) |
1818 | { | |
1819 | int max_depth; | |
1820 | ||
1821 | if (tb_switch_is_usb4(sw) || | |
1822 | (sw->tb->root_switch && tb_switch_is_usb4(sw->tb->root_switch))) | |
1823 | max_depth = USB4_SWITCH_MAX_DEPTH; | |
1824 | else | |
1825 | max_depth = TB_SWITCH_MAX_DEPTH; | |
1826 | ||
1827 | return depth > max_depth; | |
1828 | } | |
1829 | ||
a25c8b2f | 1830 | /** |
bfe778ac MW |
1831 | * tb_switch_alloc() - allocate a switch |
1832 | * @tb: Pointer to the owning domain | |
1833 | * @parent: Parent device for this switch | |
1834 | * @route: Route string for this switch | |
a25c8b2f | 1835 | * |
bfe778ac MW |
1836 | * Allocates and initializes a switch. Will not upload configuration to |
1837 | * the switch. For that you need to call tb_switch_configure() | |
1838 | * separately. The returned switch should be released by calling | |
1839 | * tb_switch_put(). | |
1840 | * | |
444ac384 MW |
1841 | * Return: Pointer to the allocated switch or ERR_PTR() in case of |
1842 | * failure. | |
a25c8b2f | 1843 | */ |
bfe778ac MW |
1844 | struct tb_switch *tb_switch_alloc(struct tb *tb, struct device *parent, |
1845 | u64 route) | |
a25c8b2f | 1846 | { |
a25c8b2f | 1847 | struct tb_switch *sw; |
f0342e75 | 1848 | int upstream_port; |
444ac384 | 1849 | int i, ret, depth; |
f0342e75 | 1850 | |
b0407983 MW |
1851 | /* Unlock the downstream port so we can access the switch below */ |
1852 | if (route) { | |
1853 | struct tb_switch *parent_sw = tb_to_switch(parent); | |
1854 | struct tb_port *down; | |
1855 | ||
1856 | down = tb_port_at(route, parent_sw); | |
1857 | tb_port_unlock(down); | |
1858 | } | |
1859 | ||
f0342e75 | 1860 | depth = tb_route_length(route); |
f0342e75 MW |
1861 | |
1862 | upstream_port = tb_cfg_get_upstream_port(tb->ctl, route); | |
a25c8b2f | 1863 | if (upstream_port < 0) |
444ac384 | 1864 | return ERR_PTR(upstream_port); |
a25c8b2f AN |
1865 | |
1866 | sw = kzalloc(sizeof(*sw), GFP_KERNEL); | |
1867 | if (!sw) | |
444ac384 | 1868 | return ERR_PTR(-ENOMEM); |
a25c8b2f AN |
1869 | |
1870 | sw->tb = tb; | |
444ac384 MW |
1871 | ret = tb_cfg_read(tb->ctl, &sw->config, route, 0, TB_CFG_SWITCH, 0, 5); |
1872 | if (ret) | |
bfe778ac MW |
1873 | goto err_free_sw_ports; |
1874 | ||
b0407983 MW |
1875 | sw->generation = tb_switch_get_generation(sw); |
1876 | ||
daa5140f | 1877 | tb_dbg(tb, "current switch config:\n"); |
b0407983 | 1878 | tb_dump_switch(tb, sw); |
a25c8b2f AN |
1879 | |
1880 | /* configure switch */ | |
1881 | sw->config.upstream_port_number = upstream_port; | |
f0342e75 MW |
1882 | sw->config.depth = depth; |
1883 | sw->config.route_hi = upper_32_bits(route); | |
1884 | sw->config.route_lo = lower_32_bits(route); | |
bfe778ac | 1885 | sw->config.enabled = 0; |
a25c8b2f | 1886 | |
b0407983 | 1887 | /* Make sure we do not exceed maximum topology limit */ |
704a940d CIK |
1888 | if (tb_switch_exceeds_max_depth(sw, depth)) { |
1889 | ret = -EADDRNOTAVAIL; | |
1890 | goto err_free_sw_ports; | |
1891 | } | |
b0407983 | 1892 | |
a25c8b2f AN |
1893 | /* initialize ports */ |
1894 | sw->ports = kcalloc(sw->config.max_port_number + 1, sizeof(*sw->ports), | |
343fcb8c | 1895 | GFP_KERNEL); |
444ac384 MW |
1896 | if (!sw->ports) { |
1897 | ret = -ENOMEM; | |
bfe778ac | 1898 | goto err_free_sw_ports; |
444ac384 | 1899 | } |
a25c8b2f AN |
1900 | |
1901 | for (i = 0; i <= sw->config.max_port_number; i++) { | |
343fcb8c AN |
1902 | /* minimum setup for tb_find_cap and tb_drom_read to work */ |
1903 | sw->ports[i].sw = sw; | |
1904 | sw->ports[i].port = i; | |
a25c8b2f AN |
1905 | } |
1906 | ||
444ac384 | 1907 | ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_PLUG_EVENTS); |
b0407983 MW |
1908 | if (ret > 0) |
1909 | sw->cap_plug_events = ret; | |
ca389f71 | 1910 | |
444ac384 MW |
1911 | ret = tb_switch_find_vse_cap(sw, TB_VSE_CAP_LINK_CONTROLLER); |
1912 | if (ret > 0) | |
1913 | sw->cap_lc = ret; | |
a9be5582 | 1914 | |
f67cf491 MW |
1915 | /* Root switch is always authorized */ |
1916 | if (!route) | |
1917 | sw->authorized = true; | |
1918 | ||
bfe778ac MW |
1919 | device_initialize(&sw->dev); |
1920 | sw->dev.parent = parent; | |
1921 | sw->dev.bus = &tb_bus_type; | |
1922 | sw->dev.type = &tb_switch_type; | |
1923 | sw->dev.groups = switch_groups; | |
1924 | dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw)); | |
1925 | ||
1926 | return sw; | |
1927 | ||
1928 | err_free_sw_ports: | |
1929 | kfree(sw->ports); | |
1930 | kfree(sw); | |
1931 | ||
444ac384 | 1932 | return ERR_PTR(ret); |
bfe778ac MW |
1933 | } |
1934 | ||
e6b245cc MW |
1935 | /** |
1936 | * tb_switch_alloc_safe_mode() - allocate a switch that is in safe mode | |
1937 | * @tb: Pointer to the owning domain | |
1938 | * @parent: Parent device for this switch | |
1939 | * @route: Route string for this switch | |
1940 | * | |
1941 | * This creates a switch in safe mode. This means the switch pretty much | |
1942 | * lacks all capabilities except DMA configuration port before it is | |
1943 | * flashed with a valid NVM firmware. | |
1944 | * | |
1945 | * The returned switch must be released by calling tb_switch_put(). | |
1946 | * | |
444ac384 | 1947 | * Return: Pointer to the allocated switch or ERR_PTR() in case of failure |
e6b245cc MW |
1948 | */ |
1949 | struct tb_switch * | |
1950 | tb_switch_alloc_safe_mode(struct tb *tb, struct device *parent, u64 route) | |
1951 | { | |
1952 | struct tb_switch *sw; | |
1953 | ||
1954 | sw = kzalloc(sizeof(*sw), GFP_KERNEL); | |
1955 | if (!sw) | |
444ac384 | 1956 | return ERR_PTR(-ENOMEM); |
e6b245cc MW |
1957 | |
1958 | sw->tb = tb; | |
1959 | sw->config.depth = tb_route_length(route); | |
1960 | sw->config.route_hi = upper_32_bits(route); | |
1961 | sw->config.route_lo = lower_32_bits(route); | |
1962 | sw->safe_mode = true; | |
1963 | ||
1964 | device_initialize(&sw->dev); | |
1965 | sw->dev.parent = parent; | |
1966 | sw->dev.bus = &tb_bus_type; | |
1967 | sw->dev.type = &tb_switch_type; | |
1968 | sw->dev.groups = switch_groups; | |
1969 | dev_set_name(&sw->dev, "%u-%llx", tb->index, tb_route(sw)); | |
1970 | ||
1971 | return sw; | |
1972 | } | |
1973 | ||
bfe778ac MW |
1974 | /** |
1975 | * tb_switch_configure() - Uploads configuration to the switch | |
1976 | * @sw: Switch to configure | |
1977 | * | |
1978 | * Call this function before the switch is added to the system. It will | |
1979 | * upload configuration to the switch and makes it available for the | |
b0407983 MW |
1980 | * connection manager to use. Can be called to the switch again after |
1981 | * resume from low power states to re-initialize it. | |
bfe778ac MW |
1982 | * |
1983 | * Return: %0 in case of success and negative errno in case of failure | |
1984 | */ | |
1985 | int tb_switch_configure(struct tb_switch *sw) | |
1986 | { | |
1987 | struct tb *tb = sw->tb; | |
1988 | u64 route; | |
1989 | int ret; | |
1990 | ||
1991 | route = tb_route(sw); | |
bfe778ac | 1992 | |
b0407983 MW |
1993 | tb_dbg(tb, "%s Switch at %#llx (depth: %d, up port: %d)\n", |
1994 | sw->config.enabled ? "restoring " : "initializing", route, | |
1995 | tb_route_length(route), sw->config.upstream_port_number); | |
bfe778ac | 1996 | |
bfe778ac MW |
1997 | sw->config.enabled = 1; |
1998 | ||
b0407983 MW |
1999 | if (tb_switch_is_usb4(sw)) { |
2000 | /* | |
2001 | * For USB4 devices, we need to program the CM version | |
2002 | * accordingly so that it knows to expose all the | |
2003 | * additional capabilities. | |
2004 | */ | |
2005 | sw->config.cmuv = USB4_VERSION_1_0; | |
2006 | ||
2007 | /* Enumerate the switch */ | |
2008 | ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH, | |
2009 | ROUTER_CS_1, 4); | |
2010 | if (ret) | |
2011 | return ret; | |
bfe778ac | 2012 | |
b0407983 MW |
2013 | ret = usb4_switch_setup(sw); |
2014 | if (ret) | |
2015 | return ret; | |
2016 | ||
2017 | ret = usb4_switch_configure_link(sw); | |
2018 | } else { | |
2019 | if (sw->config.vendor_id != PCI_VENDOR_ID_INTEL) | |
2020 | tb_sw_warn(sw, "unknown switch vendor id %#x\n", | |
2021 | sw->config.vendor_id); | |
2022 | ||
2023 | if (!sw->cap_plug_events) { | |
2024 | tb_sw_warn(sw, "cannot find TB_VSE_CAP_PLUG_EVENTS aborting\n"); | |
2025 | return -ENODEV; | |
2026 | } | |
2027 | ||
2028 | /* Enumerate the switch */ | |
2029 | ret = tb_sw_write(sw, (u32 *)&sw->config + 1, TB_CFG_SWITCH, | |
2030 | ROUTER_CS_1, 3); | |
2031 | if (ret) | |
2032 | return ret; | |
2033 | ||
2034 | ret = tb_lc_configure_link(sw); | |
2035 | } | |
e879a709 MW |
2036 | if (ret) |
2037 | return ret; | |
2038 | ||
bfe778ac MW |
2039 | return tb_plug_events_active(sw, true); |
2040 | } | |
2041 | ||
2cc12751 | 2042 | static int tb_switch_set_uuid(struct tb_switch *sw) |
bfe778ac | 2043 | { |
b0407983 | 2044 | bool uid = false; |
bfe778ac | 2045 | u32 uuid[4]; |
a9be5582 | 2046 | int ret; |
bfe778ac MW |
2047 | |
2048 | if (sw->uuid) | |
a9be5582 | 2049 | return 0; |
bfe778ac | 2050 | |
b0407983 MW |
2051 | if (tb_switch_is_usb4(sw)) { |
2052 | ret = usb4_switch_read_uid(sw, &sw->uid); | |
2053 | if (ret) | |
2054 | return ret; | |
2055 | uid = true; | |
2056 | } else { | |
2057 | /* | |
2058 | * The newer controllers include fused UUID as part of | |
2059 | * link controller specific registers | |
2060 | */ | |
2061 | ret = tb_lc_read_uuid(sw, uuid); | |
2062 | if (ret) { | |
2063 | if (ret != -EINVAL) | |
2064 | return ret; | |
2065 | uid = true; | |
2066 | } | |
2067 | } | |
2068 | ||
2069 | if (uid) { | |
bfe778ac MW |
2070 | /* |
2071 | * ICM generates UUID based on UID and fills the upper | |
2072 | * two words with ones. This is not strictly following | |
2073 | * UUID format but we want to be compatible with it so | |
2074 | * we do the same here. | |
2075 | */ | |
2076 | uuid[0] = sw->uid & 0xffffffff; | |
2077 | uuid[1] = (sw->uid >> 32) & 0xffffffff; | |
2078 | uuid[2] = 0xffffffff; | |
2079 | uuid[3] = 0xffffffff; | |
2080 | } | |
2081 | ||
2082 | sw->uuid = kmemdup(uuid, sizeof(uuid), GFP_KERNEL); | |
2cc12751 | 2083 | if (!sw->uuid) |
a9be5582 MW |
2084 | return -ENOMEM; |
2085 | return 0; | |
bfe778ac MW |
2086 | } |
2087 | ||
e6b245cc | 2088 | static int tb_switch_add_dma_port(struct tb_switch *sw) |
3e136768 | 2089 | { |
e6b245cc MW |
2090 | u32 status; |
2091 | int ret; | |
2092 | ||
3e136768 | 2093 | switch (sw->generation) { |
3e136768 MW |
2094 | case 2: |
2095 | /* Only root switch can be upgraded */ | |
2096 | if (tb_route(sw)) | |
e6b245cc | 2097 | return 0; |
7a7ebfa8 MW |
2098 | |
2099 | /* fallthrough */ | |
2100 | case 3: | |
2101 | ret = tb_switch_set_uuid(sw); | |
2102 | if (ret) | |
2103 | return ret; | |
3e136768 MW |
2104 | break; |
2105 | ||
2106 | default: | |
e6b245cc MW |
2107 | /* |
2108 | * DMA port is the only thing available when the switch | |
2109 | * is in safe mode. | |
2110 | */ | |
2111 | if (!sw->safe_mode) | |
2112 | return 0; | |
2113 | break; | |
3e136768 MW |
2114 | } |
2115 | ||
3f415e5e | 2116 | /* Root switch DMA port requires running firmware */ |
f07a3608 | 2117 | if (!tb_route(sw) && !tb_switch_is_icm(sw)) |
e6b245cc MW |
2118 | return 0; |
2119 | ||
3e136768 | 2120 | sw->dma_port = dma_port_alloc(sw); |
e6b245cc MW |
2121 | if (!sw->dma_port) |
2122 | return 0; | |
2123 | ||
3f415e5e MW |
2124 | if (sw->no_nvm_upgrade) |
2125 | return 0; | |
2126 | ||
7a7ebfa8 MW |
2127 | /* |
2128 | * If there is status already set then authentication failed | |
2129 | * when the dma_port_flash_update_auth() returned. Power cycling | |
2130 | * is not needed (it was done already) so only thing we do here | |
2131 | * is to unblock runtime PM of the root port. | |
2132 | */ | |
2133 | nvm_get_auth_status(sw, &status); | |
2134 | if (status) { | |
2135 | if (!tb_route(sw)) | |
b0407983 | 2136 | nvm_authenticate_complete_dma_port(sw); |
7a7ebfa8 MW |
2137 | return 0; |
2138 | } | |
2139 | ||
e6b245cc MW |
2140 | /* |
2141 | * Check status of the previous flash authentication. If there | |
2142 | * is one we need to power cycle the switch in any case to make | |
2143 | * it functional again. | |
2144 | */ | |
2145 | ret = dma_port_flash_update_auth_status(sw->dma_port, &status); | |
2146 | if (ret <= 0) | |
2147 | return ret; | |
2148 | ||
1830b6ee MW |
2149 | /* Now we can allow root port to suspend again */ |
2150 | if (!tb_route(sw)) | |
b0407983 | 2151 | nvm_authenticate_complete_dma_port(sw); |
1830b6ee | 2152 | |
e6b245cc MW |
2153 | if (status) { |
2154 | tb_sw_info(sw, "switch flash authentication failed\n"); | |
e6b245cc MW |
2155 | nvm_set_auth_status(sw, status); |
2156 | } | |
2157 | ||
2158 | tb_sw_info(sw, "power cycling the switch now\n"); | |
2159 | dma_port_power_cycle(sw->dma_port); | |
2160 | ||
2161 | /* | |
2162 | * We return error here which causes the switch adding failure. | |
2163 | * It should appear back after power cycle is complete. | |
2164 | */ | |
2165 | return -ESHUTDOWN; | |
3e136768 MW |
2166 | } |
2167 | ||
0d46c08d MW |
2168 | static void tb_switch_default_link_ports(struct tb_switch *sw) |
2169 | { | |
2170 | int i; | |
2171 | ||
2172 | for (i = 1; i <= sw->config.max_port_number; i += 2) { | |
2173 | struct tb_port *port = &sw->ports[i]; | |
2174 | struct tb_port *subordinate; | |
2175 | ||
2176 | if (!tb_port_is_null(port)) | |
2177 | continue; | |
2178 | ||
2179 | /* Check for the subordinate port */ | |
2180 | if (i == sw->config.max_port_number || | |
2181 | !tb_port_is_null(&sw->ports[i + 1])) | |
2182 | continue; | |
2183 | ||
2184 | /* Link them if not already done so (by DROM) */ | |
2185 | subordinate = &sw->ports[i + 1]; | |
2186 | if (!port->dual_link_port && !subordinate->dual_link_port) { | |
2187 | port->link_nr = 0; | |
2188 | port->dual_link_port = subordinate; | |
2189 | subordinate->link_nr = 1; | |
2190 | subordinate->dual_link_port = port; | |
2191 | ||
2192 | tb_sw_dbg(sw, "linked ports %d <-> %d\n", | |
2193 | port->port, subordinate->port); | |
2194 | } | |
2195 | } | |
2196 | } | |
2197 | ||
91c0c120 MW |
2198 | static bool tb_switch_lane_bonding_possible(struct tb_switch *sw) |
2199 | { | |
2200 | const struct tb_port *up = tb_upstream_port(sw); | |
2201 | ||
2202 | if (!up->dual_link_port || !up->dual_link_port->remote) | |
2203 | return false; | |
2204 | ||
b0407983 MW |
2205 | if (tb_switch_is_usb4(sw)) |
2206 | return usb4_switch_lane_bonding_possible(sw); | |
91c0c120 MW |
2207 | return tb_lc_lane_bonding_possible(sw); |
2208 | } | |
2209 | ||
2210 | static int tb_switch_update_link_attributes(struct tb_switch *sw) | |
2211 | { | |
2212 | struct tb_port *up; | |
2213 | bool change = false; | |
2214 | int ret; | |
2215 | ||
2216 | if (!tb_route(sw) || tb_switch_is_icm(sw)) | |
2217 | return 0; | |
2218 | ||
2219 | up = tb_upstream_port(sw); | |
2220 | ||
2221 | ret = tb_port_get_link_speed(up); | |
2222 | if (ret < 0) | |
2223 | return ret; | |
2224 | if (sw->link_speed != ret) | |
2225 | change = true; | |
2226 | sw->link_speed = ret; | |
2227 | ||
2228 | ret = tb_port_get_link_width(up); | |
2229 | if (ret < 0) | |
2230 | return ret; | |
2231 | if (sw->link_width != ret) | |
2232 | change = true; | |
2233 | sw->link_width = ret; | |
2234 | ||
2235 | /* Notify userspace that there is possible link attribute change */ | |
2236 | if (device_is_registered(&sw->dev) && change) | |
2237 | kobject_uevent(&sw->dev.kobj, KOBJ_CHANGE); | |
2238 | ||
2239 | return 0; | |
2240 | } | |
2241 | ||
2242 | /** | |
2243 | * tb_switch_lane_bonding_enable() - Enable lane bonding | |
2244 | * @sw: Switch to enable lane bonding | |
2245 | * | |
2246 | * Connection manager can call this function to enable lane bonding of a | |
2247 | * switch. If conditions are correct and both switches support the feature, | |
2248 | * lanes are bonded. It is safe to call this to any switch. | |
2249 | */ | |
2250 | int tb_switch_lane_bonding_enable(struct tb_switch *sw) | |
2251 | { | |
2252 | struct tb_switch *parent = tb_to_switch(sw->dev.parent); | |
2253 | struct tb_port *up, *down; | |
2254 | u64 route = tb_route(sw); | |
2255 | int ret; | |
2256 | ||
2257 | if (!route) | |
2258 | return 0; | |
2259 | ||
2260 | if (!tb_switch_lane_bonding_possible(sw)) | |
2261 | return 0; | |
2262 | ||
2263 | up = tb_upstream_port(sw); | |
2264 | down = tb_port_at(route, parent); | |
2265 | ||
2266 | if (!tb_port_is_width_supported(up, 2) || | |
2267 | !tb_port_is_width_supported(down, 2)) | |
2268 | return 0; | |
2269 | ||
2270 | ret = tb_port_lane_bonding_enable(up); | |
2271 | if (ret) { | |
2272 | tb_port_warn(up, "failed to enable lane bonding\n"); | |
2273 | return ret; | |
2274 | } | |
2275 | ||
2276 | ret = tb_port_lane_bonding_enable(down); | |
2277 | if (ret) { | |
2278 | tb_port_warn(down, "failed to enable lane bonding\n"); | |
2279 | tb_port_lane_bonding_disable(up); | |
2280 | return ret; | |
2281 | } | |
2282 | ||
2283 | tb_switch_update_link_attributes(sw); | |
2284 | ||
2285 | tb_sw_dbg(sw, "lane bonding enabled\n"); | |
2286 | return ret; | |
2287 | } | |
2288 | ||
2289 | /** | |
2290 | * tb_switch_lane_bonding_disable() - Disable lane bonding | |
2291 | * @sw: Switch whose lane bonding to disable | |
2292 | * | |
2293 | * Disables lane bonding between @sw and parent. This can be called even | |
2294 | * if lanes were not bonded originally. | |
2295 | */ | |
2296 | void tb_switch_lane_bonding_disable(struct tb_switch *sw) | |
2297 | { | |
2298 | struct tb_switch *parent = tb_to_switch(sw->dev.parent); | |
2299 | struct tb_port *up, *down; | |
2300 | ||
2301 | if (!tb_route(sw)) | |
2302 | return; | |
2303 | ||
2304 | up = tb_upstream_port(sw); | |
2305 | if (!up->bonded) | |
2306 | return; | |
2307 | ||
2308 | down = tb_port_at(tb_route(sw), parent); | |
2309 | ||
2310 | tb_port_lane_bonding_disable(up); | |
2311 | tb_port_lane_bonding_disable(down); | |
2312 | ||
2313 | tb_switch_update_link_attributes(sw); | |
2314 | tb_sw_dbg(sw, "lane bonding disabled\n"); | |
2315 | } | |
2316 | ||
bfe778ac MW |
2317 | /** |
2318 | * tb_switch_add() - Add a switch to the domain | |
2319 | * @sw: Switch to add | |
2320 | * | |
2321 | * This is the last step in adding switch to the domain. It will read | |
2322 | * identification information from DROM and initializes ports so that | |
2323 | * they can be used to connect other switches. The switch will be | |
2324 | * exposed to the userspace when this function successfully returns. To | |
2325 | * remove and release the switch, call tb_switch_remove(). | |
2326 | * | |
2327 | * Return: %0 in case of success and negative errno in case of failure | |
2328 | */ | |
2329 | int tb_switch_add(struct tb_switch *sw) | |
2330 | { | |
2331 | int i, ret; | |
2332 | ||
3e136768 MW |
2333 | /* |
2334 | * Initialize DMA control port now before we read DROM. Recent | |
2335 | * host controllers have more complete DROM on NVM that includes | |
2336 | * vendor and model identification strings which we then expose | |
2337 | * to the userspace. NVM can be accessed through DMA | |
2338 | * configuration based mailbox. | |
2339 | */ | |
e6b245cc | 2340 | ret = tb_switch_add_dma_port(sw); |
af99f696 MW |
2341 | if (ret) { |
2342 | dev_err(&sw->dev, "failed to add DMA port\n"); | |
f53e7676 | 2343 | return ret; |
af99f696 | 2344 | } |
343fcb8c | 2345 | |
e6b245cc MW |
2346 | if (!sw->safe_mode) { |
2347 | /* read drom */ | |
2348 | ret = tb_drom_read(sw); | |
2349 | if (ret) { | |
af99f696 | 2350 | dev_err(&sw->dev, "reading DROM failed\n"); |
e6b245cc MW |
2351 | return ret; |
2352 | } | |
daa5140f | 2353 | tb_sw_dbg(sw, "uid: %#llx\n", sw->uid); |
bfe778ac | 2354 | |
2cc12751 | 2355 | ret = tb_switch_set_uuid(sw); |
af99f696 MW |
2356 | if (ret) { |
2357 | dev_err(&sw->dev, "failed to set UUID\n"); | |
2cc12751 | 2358 | return ret; |
af99f696 | 2359 | } |
e6b245cc MW |
2360 | |
2361 | for (i = 0; i <= sw->config.max_port_number; i++) { | |
2362 | if (sw->ports[i].disabled) { | |
daa5140f | 2363 | tb_port_dbg(&sw->ports[i], "disabled by eeprom\n"); |
e6b245cc MW |
2364 | continue; |
2365 | } | |
2366 | ret = tb_init_port(&sw->ports[i]); | |
af99f696 MW |
2367 | if (ret) { |
2368 | dev_err(&sw->dev, "failed to initialize port %d\n", i); | |
e6b245cc | 2369 | return ret; |
af99f696 | 2370 | } |
343fcb8c | 2371 | } |
91c0c120 | 2372 | |
0d46c08d MW |
2373 | tb_switch_default_link_ports(sw); |
2374 | ||
91c0c120 MW |
2375 | ret = tb_switch_update_link_attributes(sw); |
2376 | if (ret) | |
2377 | return ret; | |
cf29b9af RM |
2378 | |
2379 | ret = tb_switch_tmu_init(sw); | |
2380 | if (ret) | |
2381 | return ret; | |
343fcb8c AN |
2382 | } |
2383 | ||
e6b245cc | 2384 | ret = device_add(&sw->dev); |
af99f696 MW |
2385 | if (ret) { |
2386 | dev_err(&sw->dev, "failed to add device: %d\n", ret); | |
e6b245cc | 2387 | return ret; |
af99f696 | 2388 | } |
e6b245cc | 2389 | |
a83bc4a5 MW |
2390 | if (tb_route(sw)) { |
2391 | dev_info(&sw->dev, "new device found, vendor=%#x device=%#x\n", | |
2392 | sw->vendor, sw->device); | |
2393 | if (sw->vendor_name && sw->device_name) | |
2394 | dev_info(&sw->dev, "%s %s\n", sw->vendor_name, | |
2395 | sw->device_name); | |
2396 | } | |
2397 | ||
e6b245cc | 2398 | ret = tb_switch_nvm_add(sw); |
2d8ff0b5 | 2399 | if (ret) { |
af99f696 | 2400 | dev_err(&sw->dev, "failed to add NVM devices\n"); |
e6b245cc | 2401 | device_del(&sw->dev); |
2d8ff0b5 MW |
2402 | return ret; |
2403 | } | |
e6b245cc | 2404 | |
2d8ff0b5 MW |
2405 | pm_runtime_set_active(&sw->dev); |
2406 | if (sw->rpm) { | |
2407 | pm_runtime_set_autosuspend_delay(&sw->dev, TB_AUTOSUSPEND_DELAY); | |
2408 | pm_runtime_use_autosuspend(&sw->dev); | |
2409 | pm_runtime_mark_last_busy(&sw->dev); | |
2410 | pm_runtime_enable(&sw->dev); | |
2411 | pm_request_autosuspend(&sw->dev); | |
2412 | } | |
2413 | ||
2414 | return 0; | |
bfe778ac | 2415 | } |
c90553b3 | 2416 | |
bfe778ac MW |
2417 | /** |
2418 | * tb_switch_remove() - Remove and release a switch | |
2419 | * @sw: Switch to remove | |
2420 | * | |
2421 | * This will remove the switch from the domain and release it after last | |
2422 | * reference count drops to zero. If there are switches connected below | |
2423 | * this switch, they will be removed as well. | |
2424 | */ | |
2425 | void tb_switch_remove(struct tb_switch *sw) | |
2426 | { | |
b433d010 | 2427 | struct tb_port *port; |
ca389f71 | 2428 | |
2d8ff0b5 MW |
2429 | if (sw->rpm) { |
2430 | pm_runtime_get_sync(&sw->dev); | |
2431 | pm_runtime_disable(&sw->dev); | |
2432 | } | |
2433 | ||
bfe778ac | 2434 | /* port 0 is the switch itself and never has a remote */ |
b433d010 MW |
2435 | tb_switch_for_each_port(sw, port) { |
2436 | if (tb_port_has_remote(port)) { | |
2437 | tb_switch_remove(port->remote->sw); | |
2438 | port->remote = NULL; | |
2439 | } else if (port->xdomain) { | |
2440 | tb_xdomain_remove(port->xdomain); | |
2441 | port->xdomain = NULL; | |
dfe40ca4 | 2442 | } |
bfe778ac MW |
2443 | } |
2444 | ||
2445 | if (!sw->is_unplugged) | |
2446 | tb_plug_events_active(sw, false); | |
b0407983 MW |
2447 | |
2448 | if (tb_switch_is_usb4(sw)) | |
2449 | usb4_switch_unconfigure_link(sw); | |
2450 | else | |
2451 | tb_lc_unconfigure_link(sw); | |
bfe778ac | 2452 | |
e6b245cc | 2453 | tb_switch_nvm_remove(sw); |
a83bc4a5 MW |
2454 | |
2455 | if (tb_route(sw)) | |
2456 | dev_info(&sw->dev, "device disconnected\n"); | |
bfe778ac | 2457 | device_unregister(&sw->dev); |
a25c8b2f AN |
2458 | } |
2459 | ||
053596d9 | 2460 | /** |
aae20bb6 | 2461 | * tb_sw_set_unplugged() - set is_unplugged on switch and downstream switches |
053596d9 | 2462 | */ |
aae20bb6 | 2463 | void tb_sw_set_unplugged(struct tb_switch *sw) |
053596d9 | 2464 | { |
b433d010 MW |
2465 | struct tb_port *port; |
2466 | ||
053596d9 AN |
2467 | if (sw == sw->tb->root_switch) { |
2468 | tb_sw_WARN(sw, "cannot unplug root switch\n"); | |
2469 | return; | |
2470 | } | |
2471 | if (sw->is_unplugged) { | |
2472 | tb_sw_WARN(sw, "is_unplugged already set\n"); | |
2473 | return; | |
2474 | } | |
2475 | sw->is_unplugged = true; | |
b433d010 MW |
2476 | tb_switch_for_each_port(sw, port) { |
2477 | if (tb_port_has_remote(port)) | |
2478 | tb_sw_set_unplugged(port->remote->sw); | |
2479 | else if (port->xdomain) | |
2480 | port->xdomain->is_unplugged = true; | |
053596d9 AN |
2481 | } |
2482 | } | |
2483 | ||
23dd5bb4 AN |
2484 | int tb_switch_resume(struct tb_switch *sw) |
2485 | { | |
b433d010 MW |
2486 | struct tb_port *port; |
2487 | int err; | |
2488 | ||
daa5140f | 2489 | tb_sw_dbg(sw, "resuming switch\n"); |
23dd5bb4 | 2490 | |
08a5e4ce MW |
2491 | /* |
2492 | * Check for UID of the connected switches except for root | |
2493 | * switch which we assume cannot be removed. | |
2494 | */ | |
2495 | if (tb_route(sw)) { | |
2496 | u64 uid; | |
2497 | ||
7ea4cd6b MW |
2498 | /* |
2499 | * Check first that we can still read the switch config | |
2500 | * space. It may be that there is now another domain | |
2501 | * connected. | |
2502 | */ | |
2503 | err = tb_cfg_get_upstream_port(sw->tb->ctl, tb_route(sw)); | |
2504 | if (err < 0) { | |
2505 | tb_sw_info(sw, "switch not present anymore\n"); | |
2506 | return err; | |
2507 | } | |
2508 | ||
b0407983 MW |
2509 | if (tb_switch_is_usb4(sw)) |
2510 | err = usb4_switch_read_uid(sw, &uid); | |
2511 | else | |
2512 | err = tb_drom_read_uid_only(sw, &uid); | |
08a5e4ce MW |
2513 | if (err) { |
2514 | tb_sw_warn(sw, "uid read failed\n"); | |
2515 | return err; | |
2516 | } | |
2517 | if (sw->uid != uid) { | |
2518 | tb_sw_info(sw, | |
2519 | "changed while suspended (uid %#llx -> %#llx)\n", | |
2520 | sw->uid, uid); | |
2521 | return -ENODEV; | |
2522 | } | |
23dd5bb4 AN |
2523 | } |
2524 | ||
b0407983 | 2525 | err = tb_switch_configure(sw); |
23dd5bb4 AN |
2526 | if (err) |
2527 | return err; | |
2528 | ||
2529 | /* check for surviving downstream switches */ | |
b433d010 | 2530 | tb_switch_for_each_port(sw, port) { |
7ea4cd6b | 2531 | if (!tb_port_has_remote(port) && !port->xdomain) |
23dd5bb4 | 2532 | continue; |
dfe40ca4 | 2533 | |
7ea4cd6b | 2534 | if (tb_wait_for_port(port, true) <= 0) { |
23dd5bb4 AN |
2535 | tb_port_warn(port, |
2536 | "lost during suspend, disconnecting\n"); | |
7ea4cd6b MW |
2537 | if (tb_port_has_remote(port)) |
2538 | tb_sw_set_unplugged(port->remote->sw); | |
2539 | else if (port->xdomain) | |
2540 | port->xdomain->is_unplugged = true; | |
b0407983 MW |
2541 | } else if (tb_port_has_remote(port) || port->xdomain) { |
2542 | /* | |
2543 | * Always unlock the port so the downstream | |
2544 | * switch/domain is accessible. | |
2545 | */ | |
2546 | if (tb_port_unlock(port)) | |
2547 | tb_port_warn(port, "failed to unlock port\n"); | |
2548 | if (port->remote && tb_switch_resume(port->remote->sw)) { | |
7ea4cd6b MW |
2549 | tb_port_warn(port, |
2550 | "lost during suspend, disconnecting\n"); | |
2551 | tb_sw_set_unplugged(port->remote->sw); | |
2552 | } | |
23dd5bb4 AN |
2553 | } |
2554 | } | |
2555 | return 0; | |
2556 | } | |
2557 | ||
2558 | void tb_switch_suspend(struct tb_switch *sw) | |
2559 | { | |
b433d010 MW |
2560 | struct tb_port *port; |
2561 | int err; | |
2562 | ||
23dd5bb4 AN |
2563 | err = tb_plug_events_active(sw, false); |
2564 | if (err) | |
2565 | return; | |
2566 | ||
b433d010 MW |
2567 | tb_switch_for_each_port(sw, port) { |
2568 | if (tb_port_has_remote(port)) | |
2569 | tb_switch_suspend(port->remote->sw); | |
23dd5bb4 | 2570 | } |
5480dfc2 | 2571 | |
b0407983 MW |
2572 | if (tb_switch_is_usb4(sw)) |
2573 | usb4_switch_set_sleep(sw); | |
2574 | else | |
2575 | tb_lc_set_sleep(sw); | |
23dd5bb4 | 2576 | } |
f67cf491 | 2577 | |
8afe909b MW |
2578 | /** |
2579 | * tb_switch_query_dp_resource() - Query availability of DP resource | |
2580 | * @sw: Switch whose DP resource is queried | |
2581 | * @in: DP IN port | |
2582 | * | |
2583 | * Queries availability of DP resource for DP tunneling using switch | |
2584 | * specific means. Returns %true if resource is available. | |
2585 | */ | |
2586 | bool tb_switch_query_dp_resource(struct tb_switch *sw, struct tb_port *in) | |
2587 | { | |
b0407983 MW |
2588 | if (tb_switch_is_usb4(sw)) |
2589 | return usb4_switch_query_dp_resource(sw, in); | |
8afe909b MW |
2590 | return tb_lc_dp_sink_query(sw, in); |
2591 | } | |
2592 | ||
2593 | /** | |
2594 | * tb_switch_alloc_dp_resource() - Allocate available DP resource | |
2595 | * @sw: Switch whose DP resource is allocated | |
2596 | * @in: DP IN port | |
2597 | * | |
2598 | * Allocates DP resource for DP tunneling. The resource must be | |
2599 | * available for this to succeed (see tb_switch_query_dp_resource()). | |
2600 | * Returns %0 in success and negative errno otherwise. | |
2601 | */ | |
2602 | int tb_switch_alloc_dp_resource(struct tb_switch *sw, struct tb_port *in) | |
2603 | { | |
b0407983 MW |
2604 | if (tb_switch_is_usb4(sw)) |
2605 | return usb4_switch_alloc_dp_resource(sw, in); | |
8afe909b MW |
2606 | return tb_lc_dp_sink_alloc(sw, in); |
2607 | } | |
2608 | ||
2609 | /** | |
2610 | * tb_switch_dealloc_dp_resource() - De-allocate DP resource | |
2611 | * @sw: Switch whose DP resource is de-allocated | |
2612 | * @in: DP IN port | |
2613 | * | |
2614 | * De-allocates DP resource that was previously allocated for DP | |
2615 | * tunneling. | |
2616 | */ | |
2617 | void tb_switch_dealloc_dp_resource(struct tb_switch *sw, struct tb_port *in) | |
2618 | { | |
b0407983 MW |
2619 | int ret; |
2620 | ||
2621 | if (tb_switch_is_usb4(sw)) | |
2622 | ret = usb4_switch_dealloc_dp_resource(sw, in); | |
2623 | else | |
2624 | ret = tb_lc_dp_sink_dealloc(sw, in); | |
2625 | ||
2626 | if (ret) | |
8afe909b MW |
2627 | tb_sw_warn(sw, "failed to de-allocate DP resource for port %d\n", |
2628 | in->port); | |
8afe909b MW |
2629 | } |
2630 | ||
f67cf491 MW |
2631 | struct tb_sw_lookup { |
2632 | struct tb *tb; | |
2633 | u8 link; | |
2634 | u8 depth; | |
7c39ffe7 | 2635 | const uuid_t *uuid; |
8e9267bb | 2636 | u64 route; |
f67cf491 MW |
2637 | }; |
2638 | ||
418e3ea1 | 2639 | static int tb_switch_match(struct device *dev, const void *data) |
f67cf491 MW |
2640 | { |
2641 | struct tb_switch *sw = tb_to_switch(dev); | |
418e3ea1 | 2642 | const struct tb_sw_lookup *lookup = data; |
f67cf491 MW |
2643 | |
2644 | if (!sw) | |
2645 | return 0; | |
2646 | if (sw->tb != lookup->tb) | |
2647 | return 0; | |
2648 | ||
2649 | if (lookup->uuid) | |
2650 | return !memcmp(sw->uuid, lookup->uuid, sizeof(*lookup->uuid)); | |
2651 | ||
8e9267bb RM |
2652 | if (lookup->route) { |
2653 | return sw->config.route_lo == lower_32_bits(lookup->route) && | |
2654 | sw->config.route_hi == upper_32_bits(lookup->route); | |
2655 | } | |
2656 | ||
f67cf491 MW |
2657 | /* Root switch is matched only by depth */ |
2658 | if (!lookup->depth) | |
2659 | return !sw->depth; | |
2660 | ||
2661 | return sw->link == lookup->link && sw->depth == lookup->depth; | |
2662 | } | |
2663 | ||
2664 | /** | |
2665 | * tb_switch_find_by_link_depth() - Find switch by link and depth | |
2666 | * @tb: Domain the switch belongs | |
2667 | * @link: Link number the switch is connected | |
2668 | * @depth: Depth of the switch in link | |
2669 | * | |
2670 | * Returned switch has reference count increased so the caller needs to | |
2671 | * call tb_switch_put() when done with the switch. | |
2672 | */ | |
2673 | struct tb_switch *tb_switch_find_by_link_depth(struct tb *tb, u8 link, u8 depth) | |
2674 | { | |
2675 | struct tb_sw_lookup lookup; | |
2676 | struct device *dev; | |
2677 | ||
2678 | memset(&lookup, 0, sizeof(lookup)); | |
2679 | lookup.tb = tb; | |
2680 | lookup.link = link; | |
2681 | lookup.depth = depth; | |
2682 | ||
2683 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); | |
2684 | if (dev) | |
2685 | return tb_to_switch(dev); | |
2686 | ||
2687 | return NULL; | |
2688 | } | |
2689 | ||
2690 | /** | |
432019d6 | 2691 | * tb_switch_find_by_uuid() - Find switch by UUID |
f67cf491 MW |
2692 | * @tb: Domain the switch belongs |
2693 | * @uuid: UUID to look for | |
2694 | * | |
2695 | * Returned switch has reference count increased so the caller needs to | |
2696 | * call tb_switch_put() when done with the switch. | |
2697 | */ | |
7c39ffe7 | 2698 | struct tb_switch *tb_switch_find_by_uuid(struct tb *tb, const uuid_t *uuid) |
f67cf491 MW |
2699 | { |
2700 | struct tb_sw_lookup lookup; | |
2701 | struct device *dev; | |
2702 | ||
2703 | memset(&lookup, 0, sizeof(lookup)); | |
2704 | lookup.tb = tb; | |
2705 | lookup.uuid = uuid; | |
2706 | ||
2707 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); | |
2708 | if (dev) | |
2709 | return tb_to_switch(dev); | |
2710 | ||
2711 | return NULL; | |
2712 | } | |
e6b245cc | 2713 | |
8e9267bb RM |
2714 | /** |
2715 | * tb_switch_find_by_route() - Find switch by route string | |
2716 | * @tb: Domain the switch belongs | |
2717 | * @route: Route string to look for | |
2718 | * | |
2719 | * Returned switch has reference count increased so the caller needs to | |
2720 | * call tb_switch_put() when done with the switch. | |
2721 | */ | |
2722 | struct tb_switch *tb_switch_find_by_route(struct tb *tb, u64 route) | |
2723 | { | |
2724 | struct tb_sw_lookup lookup; | |
2725 | struct device *dev; | |
2726 | ||
2727 | if (!route) | |
2728 | return tb_switch_get(tb->root_switch); | |
2729 | ||
2730 | memset(&lookup, 0, sizeof(lookup)); | |
2731 | lookup.tb = tb; | |
2732 | lookup.route = route; | |
2733 | ||
2734 | dev = bus_find_device(&tb_bus_type, NULL, &lookup, tb_switch_match); | |
2735 | if (dev) | |
2736 | return tb_to_switch(dev); | |
2737 | ||
2738 | return NULL; | |
2739 | } | |
2740 | ||
386e5e29 MW |
2741 | /** |
2742 | * tb_switch_find_port() - return the first port of @type on @sw or NULL | |
2743 | * @sw: Switch to find the port from | |
2744 | * @type: Port type to look for | |
2745 | */ | |
2746 | struct tb_port *tb_switch_find_port(struct tb_switch *sw, | |
2747 | enum tb_port_type type) | |
2748 | { | |
2749 | struct tb_port *port; | |
2750 | ||
2751 | tb_switch_for_each_port(sw, port) { | |
2752 | if (port->config.type == type) | |
2753 | return port; | |
2754 | } | |
2755 | ||
2756 | return NULL; | |
2757 | } | |
2758 | ||
e6b245cc MW |
2759 | void tb_switch_exit(void) |
2760 | { | |
2761 | ida_destroy(&nvm_ida); | |
2762 | } |