[linux-block.git] / drivers / thermal / rcar_gen3_thermal.c

// SPDX-License-Identifier: GPL-2.0
/*
 *  R-Car Gen3 THS thermal sensor driver
 *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
 *
 * Copyright (C) 2016 Renesas Electronics Corporation.
 * Copyright (C) 2016 Sang Engineering
 */
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/spinlock.h>
#include <linux/sys_soc.h>
#include <linux/thermal.h>

#include "thermal_core.h"

/* Register offsets */
#define REG_GEN3_IRQSTR		0x04
#define REG_GEN3_IRQMSK		0x08
#define REG_GEN3_IRQCTL		0x0C
#define REG_GEN3_IRQEN		0x10
#define REG_GEN3_IRQTEMP1	0x14
#define REG_GEN3_IRQTEMP2	0x18
#define REG_GEN3_IRQTEMP3	0x1C
#define REG_GEN3_CTSR		0x20
#define REG_GEN3_THCTR		0x20
#define REG_GEN3_TEMP		0x28
#define REG_GEN3_THCODE1	0x50
#define REG_GEN3_THCODE2	0x54
#define REG_GEN3_THCODE3	0x58

/* IRQ{STR,MSK,EN} bits */
#define IRQ_TEMP1		BIT(0)
#define IRQ_TEMP2		BIT(1)
#define IRQ_TEMP3		BIT(2)
#define IRQ_TEMPD1		BIT(3)
#define IRQ_TEMPD2		BIT(4)
#define IRQ_TEMPD3		BIT(5)

/* CTSR bits */
#define CTSR_PONM	BIT(8)
#define CTSR_AOUT	BIT(7)
#define CTSR_THBGR	BIT(5)
#define CTSR_VMEN	BIT(4)
#define CTSR_VMST	BIT(1)
#define CTSR_THSST	BIT(0)

/* THCTR bits */
#define THCTR_PONM	BIT(6)
#define THCTR_THSST	BIT(0)

#define CTEMP_MASK	0xFFF

#define MCELSIUS(temp)	((temp) * 1000)
#define GEN3_FUSE_MASK	0xFFF

#define TSC_MAX_NUM	3

/* Structure for thermal temperature calculation */
struct equation_coefs {
	int a1;
	int b1;
	int a2;
	int b2;
};

struct rcar_gen3_thermal_tsc {
	void __iomem *base;
	struct thermal_zone_device *zone;
	struct equation_coefs coef;
	int low;
	int high;
};

struct rcar_gen3_thermal_priv {
	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
	unsigned int num_tscs;
	spinlock_t lock; /* Protect interrupts on and off */
	void (*thermal_init)(struct rcar_gen3_thermal_tsc *tsc);
};

static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
					 u32 reg)
{
	return ioread32(tsc->base + reg);
}

static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
					   u32 reg, u32 data)
{
	iowrite32(data, tsc->base + reg);
}

/*
 * Linear approximation for temperature
 *
 * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
 *
 * The constants a and b are calculated using two triplets of int values PTAT
 * and THCODE. PTAT and THCODE can either be read from hardware or use hard
 * coded values from driver. The formula to calculate a and b are taken from
 * BSP and sparsely documented and understood.
 *
 * Examining the linear formula and the formula used to calculate constants a
 * and b while knowing that the span for PTAT and THCODE values are between
 * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
 * Integer also needs to be signed so that leaves 7 bits for binary
 * fixed point scaling.
 */

#define FIXPT_SHIFT 7
#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)

#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */

/* no idea where these constants come from */
#define TJ_1 116
#define TJ_3 -41

static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
					 int *ptat, int *thcode)
{
	int tj_2;

	/* TODO: Find documentation and document constant calculation formula */

	/*
	 * Division is not scaled in BSP and if scaled it might overflow
	 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
	 */
	tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
		/ (ptat[0] - ptat[2])) - FIXPT_INT(41);

	coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
			     tj_2 - FIXPT_INT(TJ_3));
	coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;

	coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
			     tj_2 - FIXPT_INT(TJ_1));
	coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
}

static int rcar_gen3_thermal_round(int temp)
{
	int result, round_offs;

	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
		-RCAR3_THERMAL_GRAN / 2;
	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
	return result * RCAR3_THERMAL_GRAN;
}

static int rcar_gen3_thermal_get_temp(void *devdata, int *temp)
{
	struct rcar_gen3_thermal_tsc *tsc = devdata;
	int mcelsius, val1, val2;
	u32 reg;

	/* Read register and convert to mili Celsius */
	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;

	val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
	val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
	mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);

	/* Make sure we are inside specifications */
	if ((mcelsius < MCELSIUS(-40)) || (mcelsius > MCELSIUS(125)))
		return -EIO;

	/* Round value to device granularity setting */
	*temp = rcar_gen3_thermal_round(mcelsius);

	return 0;
}

static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
					      int mcelsius)
{
	int celsius, val1, val2;

	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
	val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
	val2 = celsius * tsc->coef.a2 + tsc->coef.b2;

	return INT_FIXPT((val1 + val2) / 2);
}

static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
{
	struct rcar_gen3_thermal_tsc *tsc = devdata;

	low = clamp_val(low, -40000, 120000);
	high = clamp_val(high, -40000, 120000);

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
				rcar_gen3_thermal_mcelsius_to_temp(tsc, low));

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
				rcar_gen3_thermal_mcelsius_to_temp(tsc, high));

	tsc->low = low;
	tsc->high = high;

	return 0;
}

static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
	.get_temp	= rcar_gen3_thermal_get_temp,
	.set_trips	= rcar_gen3_thermal_set_trips,
};

static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
{
	unsigned int i;
	u32 val = on ? IRQ_TEMPD1 | IRQ_TEMP2 : 0;

	for (i = 0; i < priv->num_tscs; i++)
		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
}

static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
{
	struct rcar_gen3_thermal_priv *priv = data;
	u32 status;
	int i, ret = IRQ_HANDLED;

	spin_lock(&priv->lock);
	for (i = 0; i < priv->num_tscs; i++) {
		status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
		if (status)
			ret = IRQ_WAKE_THREAD;
	}

	if (ret == IRQ_WAKE_THREAD)
		rcar_thermal_irq_set(priv, false);

	spin_unlock(&priv->lock);

	return ret;
}

static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data)
{
	struct rcar_gen3_thermal_priv *priv = data;
	unsigned long flags;
	int i;

	for (i = 0; i < priv->num_tscs; i++)
		thermal_zone_device_update(priv->tscs[i]->zone,
					   THERMAL_EVENT_UNSPECIFIED);

	spin_lock_irqsave(&priv->lock, flags);
	rcar_thermal_irq_set(priv, true);
	spin_unlock_irqrestore(&priv->lock, flags);

	return IRQ_HANDLED;
}

static const struct soc_device_attribute r8a7795es1[] = {
	{ .soc_id = "r8a7795", .revision = "ES1.*" },
	{ /* sentinel */ }
};

static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
{
	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  CTSR_THBGR);
	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,  0x0);

	usleep_range(1000, 2000);

	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);

	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN);

	usleep_range(100, 200);

	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
				CTSR_PONM | CTSR_AOUT | CTSR_THBGR | CTSR_VMEN |
				CTSR_VMST | CTSR_THSST);

	usleep_range(1000, 2000);
}

static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
{
	u32 reg_val;

	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	reg_val &= ~THCTR_PONM;
	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);

	usleep_range(1000, 2000);

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 | IRQ_TEMP2);

	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	reg_val |= THCTR_THSST;
	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);

	usleep_range(1000, 2000);
}

static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
	{ .compatible = "renesas,r8a7795-thermal", },
	{ .compatible = "renesas,r8a7796-thermal", },
	{ .compatible = "renesas,r8a77965-thermal", },
	{},
};
MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);

static int rcar_gen3_thermal_remove(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;

	pm_runtime_put(dev);
	pm_runtime_disable(dev);

	return 0;
}

static int rcar_gen3_thermal_probe(struct platform_device *pdev)
{
	struct rcar_gen3_thermal_priv *priv;
	struct device *dev = &pdev->dev;
	struct resource *res;
	struct thermal_zone_device *zone;
	int ret, irq, i;
	char *irqname;

	/* default values if FUSEs are missing */
	/* TODO: Read values from hardware on supported platforms */
	int ptat[3] = { 2631, 1509, 435 };
	int thcode[TSC_MAX_NUM][3] = {
		{ 3397, 2800, 2221 },
		{ 3393, 2795, 2216 },
		{ 3389, 2805, 2237 },
	};

	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	priv->thermal_init = rcar_gen3_thermal_init;
	if (soc_device_match(r8a7795es1))
		priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;

	spin_lock_init(&priv->lock);

	platform_set_drvdata(pdev, priv);

	/*
	 * Request 2 (of the 3 possible) IRQs, the driver only needs to
	 * to trigger on the low and high trip points of the current
	 * temp window at this point.
	 */
	for (i = 0; i < 2; i++) {
		irq = platform_get_irq(pdev, i);
		if (irq < 0)
			return irq;

		irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
					 dev_name(dev), i);
		if (!irqname)
			return -ENOMEM;

		ret = devm_request_threaded_irq(dev, irq, rcar_gen3_thermal_irq,
						rcar_gen3_thermal_irq_thread,
						IRQF_SHARED, irqname, priv);
		if (ret)
			return ret;
	}

	pm_runtime_enable(dev);
	pm_runtime_get_sync(dev);

	for (i = 0; i < TSC_MAX_NUM; i++) {
		struct rcar_gen3_thermal_tsc *tsc;

		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
		if (!res)
			break;

		tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
		if (!tsc) {
			ret = -ENOMEM;
			goto error_unregister;
		}

		tsc->base = devm_ioremap_resource(dev, res);
		if (IS_ERR(tsc->base)) {
			ret = PTR_ERR(tsc->base);
			goto error_unregister;
		}

		priv->tscs[i] = tsc;

		priv->thermal_init(tsc);
		rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);

		zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
							    &rcar_gen3_tz_of_ops);
		if (IS_ERR(zone)) {
			dev_err(dev, "Can't register thermal zone\n");
			ret = PTR_ERR(zone);
			goto error_unregister;
		}
		tsc->zone = zone;

		ret = of_thermal_get_ntrips(tsc->zone);
		if (ret < 0)
			goto error_unregister;

		dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
	}

	priv->num_tscs = i;

	if (!priv->num_tscs) {
		ret = -ENODEV;
		goto error_unregister;
	}

	rcar_thermal_irq_set(priv, true);

	return 0;

error_unregister:
	rcar_gen3_thermal_remove(pdev);

	return ret;
}

static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
{
	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);

	rcar_thermal_irq_set(priv, false);

	return 0;
}

static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
{
	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	unsigned int i;

	for (i = 0; i < priv->num_tscs; i++) {
		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

		priv->thermal_init(tsc);
		rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
	}

	rcar_thermal_irq_set(priv, true);

	return 0;
}

static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
			 rcar_gen3_thermal_resume);

static struct platform_driver rcar_gen3_thermal_driver = {
	.driver	= {
		.name	= "rcar_gen3_thermal",
		.pm = &rcar_gen3_thermal_pm_ops,
		.of_match_table = rcar_gen3_thermal_dt_ids,
	},
	.probe		= rcar_gen3_thermal_probe,
	.remove		= rcar_gen3_thermal_remove,
};
module_platform_driver(rcar_gen3_thermal_driver);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
Commit	Line	Data
d316522d	1	// SPDX-License-Identifier: GPL-2.0
564e73d2 WS	2	/*
	3	* R-Car Gen3 THS thermal sensor driver
	4	* Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
	5	*
	6	* Copyright (C) 2016 Renesas Electronics Corporation.
	7	* Copyright (C) 2016 Sang Engineering
564e73d2 WS	8	*/
	9	#include <linux/delay.h>
	10	#include <linux/err.h>
	11	#include <linux/interrupt.h>
	12	#include <linux/io.h>
	13	#include <linux/module.h>
564e73d2 WS	14	#include <linux/of_device.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/pm_runtime.h>
7d4b2697	17	#include <linux/spinlock.h>
d668c807	18	#include <linux/sys_soc.h>
564e73d2 WS	19	#include <linux/thermal.h>
564e73d2 WS	20
7d4b2697 NS	21	#include "thermal_core.h"
7d4b2697 NS	22
564e73d2 WS	23	/* Register offsets */
	24	#define REG_GEN3_IRQSTR 0x04
	25	#define REG_GEN3_IRQMSK 0x08
	26	#define REG_GEN3_IRQCTL 0x0C
	27	#define REG_GEN3_IRQEN 0x10
	28	#define REG_GEN3_IRQTEMP1 0x14
	29	#define REG_GEN3_IRQTEMP2 0x18
	30	#define REG_GEN3_IRQTEMP3 0x1C
	31	#define REG_GEN3_CTSR 0x20
	32	#define REG_GEN3_THCTR 0x20
	33	#define REG_GEN3_TEMP 0x28
	34	#define REG_GEN3_THCODE1 0x50
	35	#define REG_GEN3_THCODE2 0x54
	36	#define REG_GEN3_THCODE3 0x58
	37
7d4b2697 NS	38	/* IRQ{STR,MSK,EN} bits */
	39	#define IRQ_TEMP1 BIT(0)
	40	#define IRQ_TEMP2 BIT(1)
	41	#define IRQ_TEMP3 BIT(2)
	42	#define IRQ_TEMPD1 BIT(3)
	43	#define IRQ_TEMPD2 BIT(4)
	44	#define IRQ_TEMPD3 BIT(5)
	45
564e73d2 WS	46	/* CTSR bits */
	47	#define CTSR_PONM BIT(8)
	48	#define CTSR_AOUT BIT(7)
	49	#define CTSR_THBGR BIT(5)
	50	#define CTSR_VMEN BIT(4)
	51	#define CTSR_VMST BIT(1)
	52	#define CTSR_THSST BIT(0)
	53
	54	/* THCTR bits */
	55	#define THCTR_PONM BIT(6)
	56	#define THCTR_THSST BIT(0)
	57
	58	#define CTEMP_MASK 0xFFF
	59
	60	#define MCELSIUS(temp) ((temp) * 1000)
	61	#define GEN3_FUSE_MASK 0xFFF
	62
	63	#define TSC_MAX_NUM 3
	64
	65	/* Structure for thermal temperature calculation */
	66	struct equation_coefs {
	67	int a1;
	68	int b1;
	69	int a2;
	70	int b2;
	71	};
	72
	73	struct rcar_gen3_thermal_tsc {
	74	void __iomem *base;
	75	struct thermal_zone_device *zone;
	76	struct equation_coefs coef;
75f78d6d NS	77	int low;
75f78d6d NS	78	int high;
564e73d2 WS	79	};
	80
	81	struct rcar_gen3_thermal_priv {
	82	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
97dad1f1	83	unsigned int num_tscs;
7d4b2697	84	spinlock_t lock; /* Protect interrupts on and off */
564e73d2 WS	85	void (thermal_init)(struct rcar_gen3_thermal_tsc tsc);
	86	};
	87
	88	static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
	89	u32 reg)
	90	{
	91	return ioread32(tsc->base + reg);
	92	}
	93
	94	static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
	95	u32 reg, u32 data)
	96	{
	97	iowrite32(data, tsc->base + reg);
	98	}
	99
	100	/*
	101	* Linear approximation for temperature
	102	*
	103	* [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
	104	*
	105	* The constants a and b are calculated using two triplets of int values PTAT
	106	* and THCODE. PTAT and THCODE can either be read from hardware or use hard
	107	* coded values from driver. The formula to calculate a and b are taken from
	108	* BSP and sparsely documented and understood.
	109	*
	110	* Examining the linear formula and the formula used to calculate constants a
	111	* and b while knowing that the span for PTAT and THCODE values are between
	112	* 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
	113	* Integer also needs to be signed so that leaves 7 bits for binary
	114	* fixed point scaling.
	115	*/
	116
	117	#define FIXPT_SHIFT 7
	118	#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
7d4b2697	119	#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
564e73d2 WS	120	#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
	121	#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
	122
	123	#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
	124
	125	/* no idea where these constants come from */
fc66ddff	126	#define TJ_1 116
564e73d2 WS	127	#define TJ_3 -41
	128
	129	static void rcar_gen3_thermal_calc_coefs(struct equation_coefs *coef,
	130	int ptat, int thcode)
	131	{
	132	int tj_2;
	133
	134	/* TODO: Find documentation and document constant calculation formula */
	135
	136	/*
	137	* Division is not scaled in BSP and if scaled it might overflow
	138	* the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
	139	*/
fc66ddff	140	tj_2 = (FIXPT_INT((ptat[1] - ptat[2]) * 157)
564e73d2 WS	141	/ (ptat[0] - ptat[2])) - FIXPT_INT(41);
	142
	143	coef->a1 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[2]),
	144	tj_2 - FIXPT_INT(TJ_3));
	145	coef->b1 = FIXPT_INT(thcode[2]) - coef->a1 * TJ_3;
	146
	147	coef->a2 = FIXPT_DIV(FIXPT_INT(thcode[1] - thcode[0]),
	148	tj_2 - FIXPT_INT(TJ_1));
	149	coef->b2 = FIXPT_INT(thcode[0]) - coef->a2 * TJ_1;
	150	}
	151
	152	static int rcar_gen3_thermal_round(int temp)
	153	{
	154	int result, round_offs;
	155
	156	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
	157	-RCAR3_THERMAL_GRAN / 2;
	158	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
	159	return result * RCAR3_THERMAL_GRAN;
	160	}
	161
	162	static int rcar_gen3_thermal_get_temp(void devdata, int temp)
	163	{
	164	struct rcar_gen3_thermal_tsc *tsc = devdata;
	165	int mcelsius, val1, val2;
	166	u32 reg;
	167
	168	/* Read register and convert to mili Celsius */
564e73d2 WS	169	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
	170
	171	val1 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1, tsc->coef.a1);
	172	val2 = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2, tsc->coef.a2);
	173	mcelsius = FIXPT_TO_MCELSIUS((val1 + val2) / 2);
	174
564e73d2 WS	175	/* Make sure we are inside specifications */
	176	if ((mcelsius < MCELSIUS(-40)) \|\| (mcelsius > MCELSIUS(125)))
	177	return -EIO;
	178
	179	/* Round value to device granularity setting */
	180	*temp = rcar_gen3_thermal_round(mcelsius);
	181
	182	return 0;
	183	}
	184
7d4b2697 NS	185	static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
	186	int mcelsius)
	187	{
	188	int celsius, val1, val2;
	189
	190	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
	191	val1 = celsius * tsc->coef.a1 + tsc->coef.b1;
	192	val2 = celsius * tsc->coef.a2 + tsc->coef.b2;
	193
	194	return INT_FIXPT((val1 + val2) / 2);
	195	}
	196
	197	static int rcar_gen3_thermal_set_trips(void *devdata, int low, int high)
	198	{
	199	struct rcar_gen3_thermal_tsc *tsc = devdata;
	200
270ba432 NS	201	low = clamp_val(low, -40000, 120000);
270ba432 NS	202	high = clamp_val(high, -40000, 120000);
7d4b2697 NS	203
	204	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
	205	rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
	206
	207	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
	208	rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
	209
75f78d6d NS	210	tsc->low = low;
	211	tsc->high = high;
	212
7d4b2697 NS	213	return 0;
	214	}
	215
a0def10b	216	static const struct thermal_zone_of_device_ops rcar_gen3_tz_of_ops = {
564e73d2	217	.get_temp = rcar_gen3_thermal_get_temp,
7d4b2697	218	.set_trips = rcar_gen3_thermal_set_trips,
564e73d2 WS	219	};
564e73d2 WS	220
7d4b2697 NS	221	static void rcar_thermal_irq_set(struct rcar_gen3_thermal_priv *priv, bool on)
	222	{
	223	unsigned int i;
	224	u32 val = on ? IRQ_TEMPD1 \| IRQ_TEMP2 : 0;
	225
	226	for (i = 0; i < priv->num_tscs; i++)
	227	rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQMSK, val);
	228	}
	229
	230	static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
	231	{
	232	struct rcar_gen3_thermal_priv *priv = data;
	233	u32 status;
	234	int i, ret = IRQ_HANDLED;
	235
	236	spin_lock(&priv->lock);
	237	for (i = 0; i < priv->num_tscs; i++) {
	238	status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
	239	rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
	240	if (status)
	241	ret = IRQ_WAKE_THREAD;
	242	}
	243
	244	if (ret == IRQ_WAKE_THREAD)
	245	rcar_thermal_irq_set(priv, false);
	246
	247	spin_unlock(&priv->lock);
	248
	249	return ret;
	250	}
	251
	252	static irqreturn_t rcar_gen3_thermal_irq_thread(int irq, void *data)
	253	{
	254	struct rcar_gen3_thermal_priv *priv = data;
	255	unsigned long flags;
	256	int i;
	257
	258	for (i = 0; i < priv->num_tscs; i++)
	259	thermal_zone_device_update(priv->tscs[i]->zone,
	260	THERMAL_EVENT_UNSPECIFIED);
	261
	262	spin_lock_irqsave(&priv->lock, flags);
	263	rcar_thermal_irq_set(priv, true);
	264	spin_unlock_irqrestore(&priv->lock, flags);
	265
	266	return IRQ_HANDLED;
	267	}
	268
d668c807 NS	269	static const struct soc_device_attribute r8a7795es1[] = {
	270	{ .soc_id = "r8a7795", .revision = "ES1.*" },
	271	{ /* sentinel */ }
	272	};
	273
	274	static void rcar_gen3_thermal_init_r8a7795es1(struct rcar_gen3_thermal_tsc *tsc)
564e73d2 WS	275	{
	276	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_THBGR);
	277	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, 0x0);
	278
	279	usleep_range(1000, 2000);
	280
	281	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR, CTSR_PONM);
7d4b2697	282
564e73d2	283	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
7d4b2697 NS	284	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	285	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 \| IRQ_TEMP2);
	286
564e73d2 WS	287	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
	288	CTSR_PONM \| CTSR_AOUT \| CTSR_THBGR \| CTSR_VMEN);
	289
	290	usleep_range(100, 200);
	291
	292	rcar_gen3_thermal_write(tsc, REG_GEN3_CTSR,
	293	CTSR_PONM \| CTSR_AOUT \| CTSR_THBGR \| CTSR_VMEN \|
	294	CTSR_VMST \| CTSR_THSST);
	295
	296	usleep_range(1000, 2000);
	297	}
	298
d668c807	299	static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_tsc *tsc)
564e73d2 WS	300	{
	301	u32 reg_val;
	302
	303	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	304	reg_val &= ~THCTR_PONM;
	305	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
	306
	307	usleep_range(1000, 2000);
	308
	309	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0x3F);
7d4b2697 NS	310	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	311	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN, IRQ_TEMPD1 \| IRQ_TEMP2);
	312
564e73d2 WS	313	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	314	reg_val \|= THCTR_THSST;
	315	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
78aefd2d NS	316
78aefd2d NS	317	usleep_range(1000, 2000);
564e73d2 WS	318	}
564e73d2 WS	319
564e73d2	320	static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
d668c807 NS	321	{ .compatible = "renesas,r8a7795-thermal", },
d668c807 NS	322	{ .compatible = "renesas,r8a7796-thermal", },
2e7db3ec	323	{ .compatible = "renesas,r8a77965-thermal", },
564e73d2 WS	324	{},
	325	};
	326	MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
	327
	328	static int rcar_gen3_thermal_remove(struct platform_device *pdev)
	329	{
	330	struct device *dev = &pdev->dev;
	331
	332	pm_runtime_put(dev);
	333	pm_runtime_disable(dev);
	334
	335	return 0;
	336	}
	337
	338	static int rcar_gen3_thermal_probe(struct platform_device *pdev)
	339	{
	340	struct rcar_gen3_thermal_priv *priv;
	341	struct device *dev = &pdev->dev;
	342	struct resource *res;
	343	struct thermal_zone_device *zone;
7d4b2697 NS	344	int ret, irq, i;
7d4b2697 NS	345	char *irqname;
564e73d2 WS	346
	347	/* default values if FUSEs are missing */
	348	/* TODO: Read values from hardware on supported platforms */
fc66ddff	349	int ptat[3] = { 2631, 1509, 435 };
564e73d2	350	int thcode[TSC_MAX_NUM][3] = {
fc66ddff HD	351	{ 3397, 2800, 2221 },
	352	{ 3393, 2795, 2216 },
	353	{ 3389, 2805, 2237 },
564e73d2 WS	354	};
	355
	356	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	357	if (!priv)
	358	return -ENOMEM;
	359
d668c807 NS	360	priv->thermal_init = rcar_gen3_thermal_init;
	361	if (soc_device_match(r8a7795es1))
	362	priv->thermal_init = rcar_gen3_thermal_init_r8a7795es1;
cc4d072b	363
7d4b2697 NS	364	spin_lock_init(&priv->lock);
7d4b2697 NS	365
564e73d2 WS	366	platform_set_drvdata(pdev, priv);
564e73d2 WS	367
7d4b2697 NS	368	/*
	369	* Request 2 (of the 3 possible) IRQs, the driver only needs to
	370	* to trigger on the low and high trip points of the current
	371	* temp window at this point.
	372	*/
	373	for (i = 0; i < 2; i++) {
	374	irq = platform_get_irq(pdev, i);
	375	if (irq < 0)
	376	return irq;
	377
	378	irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
	379	dev_name(dev), i);
	380	if (!irqname)
	381	return -ENOMEM;
	382
	383	ret = devm_request_threaded_irq(dev, irq, rcar_gen3_thermal_irq,
	384	rcar_gen3_thermal_irq_thread,
	385	IRQF_SHARED, irqname, priv);
	386	if (ret)
	387	return ret;
	388	}
	389
564e73d2 WS	390	pm_runtime_enable(dev);
	391	pm_runtime_get_sync(dev);
	392
	393	for (i = 0; i < TSC_MAX_NUM; i++) {
	394	struct rcar_gen3_thermal_tsc *tsc;
	395
d51546c0 NS	396	res = platform_get_resource(pdev, IORESOURCE_MEM, i);
	397	if (!res)
	398	break;
	399
564e73d2 WS	400	tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
	401	if (!tsc) {
	402	ret = -ENOMEM;
	403	goto error_unregister;
	404	}
	405
564e73d2 WS	406	tsc->base = devm_ioremap_resource(dev, res);
	407	if (IS_ERR(tsc->base)) {
	408	ret = PTR_ERR(tsc->base);
	409	goto error_unregister;
	410	}
	411
	412	priv->tscs[i] = tsc;
564e73d2	413
d668c807	414	priv->thermal_init(tsc);
564e73d2 WS	415	rcar_gen3_thermal_calc_coefs(&tsc->coef, ptat, thcode[i]);
	416
	417	zone = devm_thermal_zone_of_sensor_register(dev, i, tsc,
	418	&rcar_gen3_tz_of_ops);
	419	if (IS_ERR(zone)) {
	420	dev_err(dev, "Can't register thermal zone\n");
	421	ret = PTR_ERR(zone);
	422	goto error_unregister;
	423	}
	424	tsc->zone = zone;
7d4b2697 NS	425
	426	ret = of_thermal_get_ntrips(tsc->zone);
	427	if (ret < 0)
	428	goto error_unregister;
	429
	430	dev_info(dev, "TSC%d: Loaded %d trip points\n", i, ret);
564e73d2 WS	431	}
564e73d2 WS	432
97dad1f1 NS	433	priv->num_tscs = i;
	434
	435	if (!priv->num_tscs) {
	436	ret = -ENODEV;
	437	goto error_unregister;
	438	}
	439
7d4b2697 NS	440	rcar_thermal_irq_set(priv, true);
7d4b2697 NS	441
564e73d2 WS	442	return 0;
	443
	444	error_unregister:
	445	rcar_gen3_thermal_remove(pdev);
	446
	447	return ret;
	448	}
	449
75f78d6d NS	450	static int __maybe_unused rcar_gen3_thermal_suspend(struct device *dev)
	451	{
	452	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	453
	454	rcar_thermal_irq_set(priv, false);
	455
	456	return 0;
	457	}
	458
	459	static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
	460	{
	461	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	462	unsigned int i;
	463
	464	for (i = 0; i < priv->num_tscs; i++) {
	465	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
	466
d668c807	467	priv->thermal_init(tsc);
75f78d6d NS	468	rcar_gen3_thermal_set_trips(tsc, tsc->low, tsc->high);
	469	}
	470
	471	rcar_thermal_irq_set(priv, true);
	472
	473	return 0;
	474	}
	475
	476	static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, rcar_gen3_thermal_suspend,
	477	rcar_gen3_thermal_resume);
	478
564e73d2 WS	479	static struct platform_driver rcar_gen3_thermal_driver = {
	480	.driver = {
	481	.name = "rcar_gen3_thermal",
75f78d6d	482	.pm = &rcar_gen3_thermal_pm_ops,
564e73d2 WS	483	.of_match_table = rcar_gen3_thermal_dt_ids,
	484	},
	485	.probe = rcar_gen3_thermal_probe,
	486	.remove = rcar_gen3_thermal_remove,
	487	};
	488	module_platform_driver(rcar_gen3_thermal_driver);
	489
	490	MODULE_LICENSE("GPL v2");
	491	MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
	492	MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");