[linux-block.git] / drivers / thermal / rcar_gen3_thermal.c

// SPDX-License-Identifier: GPL-2.0
/*
 *  R-Car Gen3 THS thermal sensor driver
 *  Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
 *
 * Copyright (C) 2016 Renesas Electronics Corporation.
 * Copyright (C) 2016 Sang Engineering
 */
#include <linux/delay.h>
#include <linux/err.h>
#include <linux/interrupt.h>
#include <linux/io.h>
#include <linux/module.h>
#include <linux/of_device.h>
#include <linux/platform_device.h>
#include <linux/pm_runtime.h>
#include <linux/thermal.h>

#include "thermal_hwmon.h"

/* Register offsets */
#define REG_GEN3_IRQSTR		0x04
#define REG_GEN3_IRQMSK		0x08
#define REG_GEN3_IRQCTL		0x0C
#define REG_GEN3_IRQEN		0x10
#define REG_GEN3_IRQTEMP1	0x14
#define REG_GEN3_IRQTEMP2	0x18
#define REG_GEN3_IRQTEMP3	0x1C
#define REG_GEN3_THCTR		0x20
#define REG_GEN3_TEMP		0x28
#define REG_GEN3_THCODE1	0x50
#define REG_GEN3_THCODE2	0x54
#define REG_GEN3_THCODE3	0x58
#define REG_GEN3_PTAT1		0x5c
#define REG_GEN3_PTAT2		0x60
#define REG_GEN3_PTAT3		0x64
#define REG_GEN3_THSCP		0x68

/* IRQ{STR,MSK,EN} bits */
#define IRQ_TEMP1		BIT(0)
#define IRQ_TEMP2		BIT(1)
#define IRQ_TEMP3		BIT(2)
#define IRQ_TEMPD1		BIT(3)
#define IRQ_TEMPD2		BIT(4)
#define IRQ_TEMPD3		BIT(5)

/* THCTR bits */
#define THCTR_PONM	BIT(6)
#define THCTR_THSST	BIT(0)

/* THSCP bits */
#define THSCP_COR_PARA_VLD	(BIT(15) | BIT(14))

#define CTEMP_MASK	0xFFF

#define MCELSIUS(temp)	((temp) * 1000)
#define GEN3_FUSE_MASK	0xFFF

#define TSC_MAX_NUM	5

/* Structure for thermal temperature calculation */
struct equation_coefs {
	int a1;
	int b1;
	int a2;
	int b2;
};

struct rcar_gen3_thermal_tsc {
	void __iomem *base;
	struct thermal_zone_device *zone;
	struct equation_coefs coef;
	int tj_t;
	int thcode[3];
};

struct rcar_gen3_thermal_priv {
	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
	struct thermal_zone_device_ops ops;
	unsigned int num_tscs;
	int ptat[3];
};

static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
					 u32 reg)
{
	return ioread32(tsc->base + reg);
}

static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
					   u32 reg, u32 data)
{
	iowrite32(data, tsc->base + reg);
}

/*
 * Linear approximation for temperature
 *
 * [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
 *
 * The constants a and b are calculated using two triplets of int values PTAT
 * and THCODE. PTAT and THCODE can either be read from hardware or use hard
 * coded values from driver. The formula to calculate a and b are taken from
 * BSP and sparsely documented and understood.
 *
 * Examining the linear formula and the formula used to calculate constants a
 * and b while knowing that the span for PTAT and THCODE values are between
 * 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
 * Integer also needs to be signed so that leaves 7 bits for binary
 * fixed point scaling.
 */

#define FIXPT_SHIFT 7
#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)

#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */

/* no idea where these constants come from */
#define TJ_3 -41

static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_priv *priv,
					 struct rcar_gen3_thermal_tsc *tsc,
					 int ths_tj_1)
{
	/* TODO: Find documentation and document constant calculation formula */

	/*
	 * Division is not scaled in BSP and if scaled it might overflow
	 * the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
	 */
	tsc->tj_t = (FIXPT_INT((priv->ptat[1] - priv->ptat[2]) * (ths_tj_1 - TJ_3))
		     / (priv->ptat[0] - priv->ptat[2])) + FIXPT_INT(TJ_3);

	tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[2]),
				 tsc->tj_t - FIXPT_INT(TJ_3));
	tsc->coef.b1 = FIXPT_INT(tsc->thcode[2]) - tsc->coef.a1 * TJ_3;

	tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[0]),
				 tsc->tj_t - FIXPT_INT(ths_tj_1));
	tsc->coef.b2 = FIXPT_INT(tsc->thcode[0]) - tsc->coef.a2 * ths_tj_1;
}

static int rcar_gen3_thermal_round(int temp)
{
	int result, round_offs;

	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
		-RCAR3_THERMAL_GRAN / 2;
	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
	return result * RCAR3_THERMAL_GRAN;
}

static int rcar_gen3_thermal_get_temp(struct thermal_zone_device *tz, int *temp)
{
	struct rcar_gen3_thermal_tsc *tsc = thermal_zone_device_priv(tz);
	int mcelsius, val;
	int reg;

	/* Read register and convert to mili Celsius */
	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;

	if (reg <= tsc->thcode[1])
		val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
				tsc->coef.a1);
	else
		val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
				tsc->coef.a2);
	mcelsius = FIXPT_TO_MCELSIUS(val);

	/* Guaranteed operating range is -40C to 125C. */

	/* Round value to device granularity setting */
	*temp = rcar_gen3_thermal_round(mcelsius);

	return 0;
}

static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
					      int mcelsius)
{
	int celsius, val;

	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
	if (celsius <= INT_FIXPT(tsc->tj_t))
		val = celsius * tsc->coef.a1 + tsc->coef.b1;
	else
		val = celsius * tsc->coef.a2 + tsc->coef.b2;

	return INT_FIXPT(val);
}

static int rcar_gen3_thermal_set_trips(struct thermal_zone_device *tz, int low, int high)
{
	struct rcar_gen3_thermal_tsc *tsc = thermal_zone_device_priv(tz);
	u32 irqmsk = 0;

	if (low != -INT_MAX) {
		irqmsk |= IRQ_TEMPD1;
		rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
					rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
	}

	if (high != INT_MAX) {
		irqmsk |= IRQ_TEMP2;
		rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
					rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
	}

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, irqmsk);

	return 0;
}

static const struct thermal_zone_device_ops rcar_gen3_tz_of_ops = {
	.get_temp	= rcar_gen3_thermal_get_temp,
	.set_trips	= rcar_gen3_thermal_set_trips,
};

static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
{
	struct rcar_gen3_thermal_priv *priv = data;
	unsigned int i;
	u32 status;

	for (i = 0; i < priv->num_tscs; i++) {
		status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
		rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
		if (status && priv->tscs[i]->zone)
			thermal_zone_device_update(priv->tscs[i]->zone,
						   THERMAL_EVENT_UNSPECIFIED);
	}

	return IRQ_HANDLED;
}

static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
{
	unsigned int i;
	u32 thscp;

	/* If fuses are not set, fallback to pseudo values. */
	thscp = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_THSCP);
	if ((thscp & THSCP_COR_PARA_VLD) != THSCP_COR_PARA_VLD) {
		/* Default THCODE values in case FUSEs are not set. */
		static const int thcodes[TSC_MAX_NUM][3] = {
			{ 3397, 2800, 2221 },
			{ 3393, 2795, 2216 },
			{ 3389, 2805, 2237 },
			{ 3415, 2694, 2195 },
			{ 3356, 2724, 2244 },
		};

		priv->ptat[0] = 2631;
		priv->ptat[1] = 1509;
		priv->ptat[2] = 435;

		for (i = 0; i < priv->num_tscs; i++) {
			struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

			tsc->thcode[0] = thcodes[i][0];
			tsc->thcode[1] = thcodes[i][1];
			tsc->thcode[2] = thcodes[i][2];
		}

		return false;
	}

	/*
	 * Set the pseudo calibration points with fused values.
	 * PTAT is shared between all TSCs but only fused for the first
	 * TSC while THCODEs are fused for each TSC.
	 */
	priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT1) &
		GEN3_FUSE_MASK;
	priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT2) &
		GEN3_FUSE_MASK;
	priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT3) &
		GEN3_FUSE_MASK;

	for (i = 0; i < priv->num_tscs; i++) {
		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

		tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE1) &
			GEN3_FUSE_MASK;
		tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE2) &
			GEN3_FUSE_MASK;
		tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE3) &
			GEN3_FUSE_MASK;
	}

	return true;
}

static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_priv *priv,
				   struct rcar_gen3_thermal_tsc *tsc)
{
	u32 reg_val;

	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	reg_val &= ~THCTR_PONM;
	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);

	usleep_range(1000, 2000);

	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
	if (priv->ops.set_trips)
		rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
					IRQ_TEMPD1 | IRQ_TEMP2);

	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	reg_val |= THCTR_THSST;
	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);

	usleep_range(1000, 2000);
}

static const int rcar_gen3_ths_tj_1 = 126;
static const int rcar_gen3_ths_tj_1_m3_w = 116;
static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
	{
		.compatible = "renesas,r8a774a1-thermal",
		.data = &rcar_gen3_ths_tj_1_m3_w,
	},
	{
		.compatible = "renesas,r8a774b1-thermal",
		.data = &rcar_gen3_ths_tj_1,
	},
	{
		.compatible = "renesas,r8a774e1-thermal",
		.data = &rcar_gen3_ths_tj_1,
	},
	{
		.compatible = "renesas,r8a7795-thermal",
		.data = &rcar_gen3_ths_tj_1,
	},
	{
		.compatible = "renesas,r8a7796-thermal",
		.data = &rcar_gen3_ths_tj_1_m3_w,
	},
	{
		.compatible = "renesas,r8a77961-thermal",
		.data = &rcar_gen3_ths_tj_1_m3_w,
	},
	{
		.compatible = "renesas,r8a77965-thermal",
		.data = &rcar_gen3_ths_tj_1,
	},
	{
		.compatible = "renesas,r8a77980-thermal",
		.data = &rcar_gen3_ths_tj_1,
	},
	{
		.compatible = "renesas,r8a779a0-thermal",
		.data = &rcar_gen3_ths_tj_1,
	},
	{
		.compatible = "renesas,r8a779f0-thermal",
		.data = &rcar_gen3_ths_tj_1,
	},
	{
		.compatible = "renesas,r8a779g0-thermal",
		.data = &rcar_gen3_ths_tj_1,
	},
	{},
};
MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);

static int rcar_gen3_thermal_remove(struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;

	pm_runtime_put(dev);
	pm_runtime_disable(dev);

	return 0;
}

static void rcar_gen3_hwmon_action(void *data)
{
	struct thermal_zone_device *zone = data;

	thermal_remove_hwmon_sysfs(zone);
}

static int rcar_gen3_thermal_request_irqs(struct rcar_gen3_thermal_priv *priv,
					  struct platform_device *pdev)
{
	struct device *dev = &pdev->dev;
	unsigned int i;
	char *irqname;
	int ret, irq;

	for (i = 0; i < 2; i++) {
		irq = platform_get_irq_optional(pdev, i);
		if (irq < 0)
			return irq;

		irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
					 dev_name(dev), i);
		if (!irqname)
			return -ENOMEM;

		ret = devm_request_threaded_irq(dev, irq, NULL,
						rcar_gen3_thermal_irq,
						IRQF_ONESHOT, irqname, priv);
		if (ret)
			return ret;
	}

	return 0;
}

static int rcar_gen3_thermal_probe(struct platform_device *pdev)
{
	struct rcar_gen3_thermal_priv *priv;
	struct device *dev = &pdev->dev;
	const int *ths_tj_1 = of_device_get_match_data(dev);
	struct resource *res;
	struct thermal_zone_device *zone;
	unsigned int i;
	int ret;

	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	if (!priv)
		return -ENOMEM;

	priv->ops = rcar_gen3_tz_of_ops;

	platform_set_drvdata(pdev, priv);

	if (rcar_gen3_thermal_request_irqs(priv, pdev))
		priv->ops.set_trips = NULL;

	pm_runtime_enable(dev);
	pm_runtime_get_sync(dev);

	for (i = 0; i < TSC_MAX_NUM; i++) {
		struct rcar_gen3_thermal_tsc *tsc;

		res = platform_get_resource(pdev, IORESOURCE_MEM, i);
		if (!res)
			break;

		tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
		if (!tsc) {
			ret = -ENOMEM;
			goto error_unregister;
		}

		tsc->base = devm_ioremap_resource(dev, res);
		if (IS_ERR(tsc->base)) {
			ret = PTR_ERR(tsc->base);
			goto error_unregister;
		}

		priv->tscs[i] = tsc;
	}

	priv->num_tscs = i;

	if (!rcar_gen3_thermal_read_fuses(priv))
		dev_info(dev, "No calibration values fused, fallback to driver values\n");

	for (i = 0; i < priv->num_tscs; i++) {
		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

		rcar_gen3_thermal_init(priv, tsc);
		rcar_gen3_thermal_calc_coefs(priv, tsc, *ths_tj_1);

		zone = devm_thermal_of_zone_register(dev, i, tsc, &priv->ops);
		if (IS_ERR(zone)) {
			dev_err(dev, "Sensor %u: Can't register thermal zone\n", i);
			ret = PTR_ERR(zone);
			goto error_unregister;
		}
		tsc->zone = zone;

		ret = thermal_add_hwmon_sysfs(tsc->zone);
		if (ret)
			goto error_unregister;

		ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
		if (ret)
			goto error_unregister;

		ret = thermal_zone_get_num_trips(tsc->zone);
		if (ret < 0)
			goto error_unregister;

		dev_info(dev, "Sensor %u: Loaded %d trip points\n", i, ret);
	}

	if (!priv->num_tscs) {
		ret = -ENODEV;
		goto error_unregister;
	}

	return 0;

error_unregister:
	rcar_gen3_thermal_remove(pdev);

	return ret;
}

static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
{
	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	unsigned int i;

	for (i = 0; i < priv->num_tscs; i++) {
		struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];

		rcar_gen3_thermal_init(priv, tsc);
	}

	return 0;
}

static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL,
			 rcar_gen3_thermal_resume);

static struct platform_driver rcar_gen3_thermal_driver = {
	.driver	= {
		.name	= "rcar_gen3_thermal",
		.pm = &rcar_gen3_thermal_pm_ops,
		.of_match_table = rcar_gen3_thermal_dt_ids,
	},
	.probe		= rcar_gen3_thermal_probe,
	.remove		= rcar_gen3_thermal_remove,
};
module_platform_driver(rcar_gen3_thermal_driver);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");
Commit	Line	Data
d316522d	1	// SPDX-License-Identifier: GPL-2.0
564e73d2 WS	2	/*
	3	* R-Car Gen3 THS thermal sensor driver
	4	* Based on rcar_thermal.c and work from Hien Dang and Khiem Nguyen.
	5	*
	6	* Copyright (C) 2016 Renesas Electronics Corporation.
	7	* Copyright (C) 2016 Sang Engineering
564e73d2 WS	8	*/
	9	#include <linux/delay.h>
	10	#include <linux/err.h>
	11	#include <linux/interrupt.h>
	12	#include <linux/io.h>
	13	#include <linux/module.h>
564e73d2 WS	14	#include <linux/of_device.h>
	15	#include <linux/platform_device.h>
	16	#include <linux/pm_runtime.h>
	17	#include <linux/thermal.h>
	18
6269e9f7	19	#include "thermal_hwmon.h"
7d4b2697	20
564e73d2 WS	21	/* Register offsets */
	22	#define REG_GEN3_IRQSTR 0x04
	23	#define REG_GEN3_IRQMSK 0x08
	24	#define REG_GEN3_IRQCTL 0x0C
	25	#define REG_GEN3_IRQEN 0x10
	26	#define REG_GEN3_IRQTEMP1 0x14
	27	#define REG_GEN3_IRQTEMP2 0x18
	28	#define REG_GEN3_IRQTEMP3 0x1C
564e73d2 WS	29	#define REG_GEN3_THCTR 0x20
	30	#define REG_GEN3_TEMP 0x28
	31	#define REG_GEN3_THCODE1 0x50
	32	#define REG_GEN3_THCODE2 0x54
	33	#define REG_GEN3_THCODE3 0x58
c3131bd5 NS	34	#define REG_GEN3_PTAT1 0x5c
	35	#define REG_GEN3_PTAT2 0x60
	36	#define REG_GEN3_PTAT3 0x64
	37	#define REG_GEN3_THSCP 0x68
564e73d2	38
7d4b2697 NS	39	/* IRQ{STR,MSK,EN} bits */
	40	#define IRQ_TEMP1 BIT(0)
	41	#define IRQ_TEMP2 BIT(1)
	42	#define IRQ_TEMP3 BIT(2)
	43	#define IRQ_TEMPD1 BIT(3)
	44	#define IRQ_TEMPD2 BIT(4)
	45	#define IRQ_TEMPD3 BIT(5)
	46
564e73d2 WS	47	/* THCTR bits */
	48	#define THCTR_PONM BIT(6)
	49	#define THCTR_THSST BIT(0)
	50
c3131bd5 NS	51	/* THSCP bits */
	52	#define THSCP_COR_PARA_VLD (BIT(15) \| BIT(14))
	53
564e73d2 WS	54	#define CTEMP_MASK 0xFFF
	55
	56	#define MCELSIUS(temp) ((temp) * 1000)
	57	#define GEN3_FUSE_MASK 0xFFF
	58
7fd49ca0	59	#define TSC_MAX_NUM 5
564e73d2 WS	60
	61	/* Structure for thermal temperature calculation */
	62	struct equation_coefs {
	63	int a1;
	64	int b1;
	65	int a2;
	66	int b2;
	67	};
	68
	69	struct rcar_gen3_thermal_tsc {
	70	void __iomem *base;
	71	struct thermal_zone_device *zone;
	72	struct equation_coefs coef;
bdc4480a	73	int tj_t;
b8aaf141	74	int thcode[3];
564e73d2 WS	75	};
	76
	77	struct rcar_gen3_thermal_priv {
	78	struct rcar_gen3_thermal_tsc *tscs[TSC_MAX_NUM];
aef43e04	79	struct thermal_zone_device_ops ops;
97dad1f1	80	unsigned int num_tscs;
b8aaf141	81	int ptat[3];
564e73d2 WS	82	};
	83
	84	static inline u32 rcar_gen3_thermal_read(struct rcar_gen3_thermal_tsc *tsc,
	85	u32 reg)
	86	{
	87	return ioread32(tsc->base + reg);
	88	}
	89
	90	static inline void rcar_gen3_thermal_write(struct rcar_gen3_thermal_tsc *tsc,
	91	u32 reg, u32 data)
	92	{
	93	iowrite32(data, tsc->base + reg);
	94	}
	95
	96	/*
	97	* Linear approximation for temperature
	98	*
	99	* [reg] = [temp] * a + b => [temp] = ([reg] - b) / a
	100	*
	101	* The constants a and b are calculated using two triplets of int values PTAT
	102	* and THCODE. PTAT and THCODE can either be read from hardware or use hard
	103	* coded values from driver. The formula to calculate a and b are taken from
	104	* BSP and sparsely documented and understood.
	105	*
	106	* Examining the linear formula and the formula used to calculate constants a
	107	* and b while knowing that the span for PTAT and THCODE values are between
	108	* 0x000 and 0xfff the largest integer possible is 0xfff * 0xfff == 0xffe001.
	109	* Integer also needs to be signed so that leaves 7 bits for binary
	110	* fixed point scaling.
	111	*/
	112
	113	#define FIXPT_SHIFT 7
	114	#define FIXPT_INT(_x) ((_x) << FIXPT_SHIFT)
7d4b2697	115	#define INT_FIXPT(_x) ((_x) >> FIXPT_SHIFT)
564e73d2 WS	116	#define FIXPT_DIV(_a, _b) DIV_ROUND_CLOSEST(((_a) << FIXPT_SHIFT), (_b))
	117	#define FIXPT_TO_MCELSIUS(_x) ((_x) * 1000 >> FIXPT_SHIFT)
	118
	119	#define RCAR3_THERMAL_GRAN 500 /* mili Celsius */
	120
	121	/* no idea where these constants come from */
564e73d2 WS	122	#define TJ_3 -41
564e73d2 WS	123
b8aaf141 NS	124	static void rcar_gen3_thermal_calc_coefs(struct rcar_gen3_thermal_priv *priv,
b8aaf141 NS	125	struct rcar_gen3_thermal_tsc *tsc,
4eb39f79	126	int ths_tj_1)
564e73d2	127	{
564e73d2 WS	128	/* TODO: Find documentation and document constant calculation formula */
	129
	130	/*
	131	* Division is not scaled in BSP and if scaled it might overflow
	132	* the dividend (4095 * 4095 << 14 > INT_MAX) so keep it unscaled
	133	*/
b8aaf141 NS	134	tsc->tj_t = (FIXPT_INT((priv->ptat[1] - priv->ptat[2]) * (ths_tj_1 - TJ_3))
b8aaf141 NS	135	/ (priv->ptat[0] - priv->ptat[2])) + FIXPT_INT(TJ_3);
564e73d2	136
b8aaf141	137	tsc->coef.a1 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[2]),
bdc4480a	138	tsc->tj_t - FIXPT_INT(TJ_3));
b8aaf141	139	tsc->coef.b1 = FIXPT_INT(tsc->thcode[2]) - tsc->coef.a1 * TJ_3;
564e73d2	140
b8aaf141	141	tsc->coef.a2 = FIXPT_DIV(FIXPT_INT(tsc->thcode[1] - tsc->thcode[0]),
bdc4480a	142	tsc->tj_t - FIXPT_INT(ths_tj_1));
b8aaf141	143	tsc->coef.b2 = FIXPT_INT(tsc->thcode[0]) - tsc->coef.a2 * ths_tj_1;
564e73d2 WS	144	}
	145
	146	static int rcar_gen3_thermal_round(int temp)
	147	{
	148	int result, round_offs;
	149
	150	round_offs = temp >= 0 ? RCAR3_THERMAL_GRAN / 2 :
	151	-RCAR3_THERMAL_GRAN / 2;
	152	result = (temp + round_offs) / RCAR3_THERMAL_GRAN;
	153	return result * RCAR3_THERMAL_GRAN;
	154	}
	155
2ebd4f2f	156	static int rcar_gen3_thermal_get_temp(struct thermal_zone_device tz, int temp)
564e73d2	157	{
5f68d078	158	struct rcar_gen3_thermal_tsc *tsc = thermal_zone_device_priv(tz);
6a310f8f	159	int mcelsius, val;
5f8f0642	160	int reg;
564e73d2 WS	161
564e73d2 WS	162	/* Read register and convert to mili Celsius */
564e73d2 WS	163	reg = rcar_gen3_thermal_read(tsc, REG_GEN3_TEMP) & CTEMP_MASK;
564e73d2 WS	164
b8aaf141	165	if (reg <= tsc->thcode[1])
6a310f8f YK	166	val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b1,
	167	tsc->coef.a1);
	168	else
	169	val = FIXPT_DIV(FIXPT_INT(reg) - tsc->coef.b2,
	170	tsc->coef.a2);
	171	mcelsius = FIXPT_TO_MCELSIUS(val);
564e73d2	172
0f510a24	173	/* Guaranteed operating range is -40C to 125C. */
564e73d2 WS	174
	175	/* Round value to device granularity setting */
	176	*temp = rcar_gen3_thermal_round(mcelsius);
	177
	178	return 0;
	179	}
	180
47cf09e0 NS	181	static int rcar_gen3_thermal_mcelsius_to_temp(struct rcar_gen3_thermal_tsc *tsc,
	182	int mcelsius)
	183	{
	184	int celsius, val;
	185
	186	celsius = DIV_ROUND_CLOSEST(mcelsius, 1000);
	187	if (celsius <= INT_FIXPT(tsc->tj_t))
	188	val = celsius * tsc->coef.a1 + tsc->coef.b1;
	189	else
	190	val = celsius * tsc->coef.a2 + tsc->coef.b2;
	191
	192	return INT_FIXPT(val);
	193	}
	194
2ebd4f2f	195	static int rcar_gen3_thermal_set_trips(struct thermal_zone_device *tz, int low, int high)
47cf09e0	196	{
5f68d078	197	struct rcar_gen3_thermal_tsc *tsc = thermal_zone_device_priv(tz);
47cf09e0 NS	198	u32 irqmsk = 0;
	199
	200	if (low != -INT_MAX) {
	201	irqmsk \|= IRQ_TEMPD1;
	202	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP1,
	203	rcar_gen3_thermal_mcelsius_to_temp(tsc, low));
	204	}
	205
	206	if (high != INT_MAX) {
	207	irqmsk \|= IRQ_TEMP2;
	208	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQTEMP2,
	209	rcar_gen3_thermal_mcelsius_to_temp(tsc, high));
	210	}
	211
	212	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, irqmsk);
	213
	214	return 0;
	215	}
	216
aef43e04	217	static const struct thermal_zone_device_ops rcar_gen3_tz_of_ops = {
564e73d2	218	.get_temp = rcar_gen3_thermal_get_temp,
47cf09e0	219	.set_trips = rcar_gen3_thermal_set_trips,
564e73d2 WS	220	};
564e73d2 WS	221
47cf09e0 NS	222	static irqreturn_t rcar_gen3_thermal_irq(int irq, void *data)
	223	{
	224	struct rcar_gen3_thermal_priv *priv = data;
	225	unsigned int i;
	226	u32 status;
	227
	228	for (i = 0; i < priv->num_tscs; i++) {
	229	status = rcar_gen3_thermal_read(priv->tscs[i], REG_GEN3_IRQSTR);
	230	rcar_gen3_thermal_write(priv->tscs[i], REG_GEN3_IRQSTR, 0);
47b2d3d2	231	if (status && priv->tscs[i]->zone)
47cf09e0 NS	232	thermal_zone_device_update(priv->tscs[i]->zone,
	233	THERMAL_EVENT_UNSPECIFIED);
	234	}
	235
	236	return IRQ_HANDLED;
	237	}
	238
c3131bd5 NS	239	static bool rcar_gen3_thermal_read_fuses(struct rcar_gen3_thermal_priv *priv)
	240	{
	241	unsigned int i;
	242	u32 thscp;
	243
	244	/* If fuses are not set, fallback to pseudo values. */
	245	thscp = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_THSCP);
	246	if ((thscp & THSCP_COR_PARA_VLD) != THSCP_COR_PARA_VLD) {
	247	/* Default THCODE values in case FUSEs are not set. */
	248	static const int thcodes[TSC_MAX_NUM][3] = {
	249	{ 3397, 2800, 2221 },
	250	{ 3393, 2795, 2216 },
	251	{ 3389, 2805, 2237 },
	252	{ 3415, 2694, 2195 },
	253	{ 3356, 2724, 2244 },
	254	};
	255
	256	priv->ptat[0] = 2631;
	257	priv->ptat[1] = 1509;
	258	priv->ptat[2] = 435;
	259
	260	for (i = 0; i < priv->num_tscs; i++) {
	261	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
	262
	263	tsc->thcode[0] = thcodes[i][0];
	264	tsc->thcode[1] = thcodes[i][1];
	265	tsc->thcode[2] = thcodes[i][2];
	266	}
	267
	268	return false;
	269	}
	270
	271	/*
	272	* Set the pseudo calibration points with fused values.
	273	* PTAT is shared between all TSCs but only fused for the first
	274	* TSC while THCODEs are fused for each TSC.
	275	*/
	276	priv->ptat[0] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT1) &
	277	GEN3_FUSE_MASK;
	278	priv->ptat[1] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT2) &
	279	GEN3_FUSE_MASK;
	280	priv->ptat[2] = rcar_gen3_thermal_read(priv->tscs[0], REG_GEN3_PTAT3) &
	281	GEN3_FUSE_MASK;
	282
	283	for (i = 0; i < priv->num_tscs; i++) {
	284	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
	285
	286	tsc->thcode[0] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE1) &
	287	GEN3_FUSE_MASK;
	288	tsc->thcode[1] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE2) &
	289	GEN3_FUSE_MASK;
	290	tsc->thcode[2] = rcar_gen3_thermal_read(tsc, REG_GEN3_THCODE3) &
	291	GEN3_FUSE_MASK;
	292	}
	293
	294	return true;
	295	}
	296
47b2d3d2 NS	297	static void rcar_gen3_thermal_init(struct rcar_gen3_thermal_priv *priv,
47b2d3d2 NS	298	struct rcar_gen3_thermal_tsc *tsc)
564e73d2 WS	299	{
	300	u32 reg_val;
	301
	302	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	303	reg_val &= ~THCTR_PONM;
	304	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
	305
	306	usleep_range(1000, 2000);
	307
ed1b1ac1	308	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQCTL, 0);
7d4b2697	309	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQMSK, 0);
47b2d3d2	310	if (priv->ops.set_trips)
47cf09e0 NS	311	rcar_gen3_thermal_write(tsc, REG_GEN3_IRQEN,
47cf09e0 NS	312	IRQ_TEMPD1 \| IRQ_TEMP2);
7d4b2697	313
564e73d2 WS	314	reg_val = rcar_gen3_thermal_read(tsc, REG_GEN3_THCTR);
	315	reg_val \|= THCTR_THSST;
	316	rcar_gen3_thermal_write(tsc, REG_GEN3_THCTR, reg_val);
78aefd2d NS	317
78aefd2d NS	318	usleep_range(1000, 2000);
564e73d2 WS	319	}
564e73d2 WS	320
4eb39f79 YK	321	static const int rcar_gen3_ths_tj_1 = 126;
4eb39f79 YK	322	static const int rcar_gen3_ths_tj_1_m3_w = 116;
564e73d2	323	static const struct of_device_id rcar_gen3_thermal_dt_ids[] = {
4eb39f79 YK	324	{
	325	.compatible = "renesas,r8a774a1-thermal",
	326	.data = &rcar_gen3_ths_tj_1_m3_w,
	327	},
1a005912 BD	328	{
	329	.compatible = "renesas,r8a774b1-thermal",
	330	.data = &rcar_gen3_ths_tj_1,
	331	},
947d85f0 MCR	332	{
	333	.compatible = "renesas,r8a774e1-thermal",
	334	.data = &rcar_gen3_ths_tj_1,
	335	},
4eb39f79 YK	336	{
	337	.compatible = "renesas,r8a7795-thermal",
	338	.data = &rcar_gen3_ths_tj_1,
	339	},
	340	{
	341	.compatible = "renesas,r8a7796-thermal",
	342	.data = &rcar_gen3_ths_tj_1_m3_w,
	343	},
8d74bf79 GU	344	{
	345	.compatible = "renesas,r8a77961-thermal",
	346	.data = &rcar_gen3_ths_tj_1_m3_w,
	347	},
4eb39f79 YK	348	{
	349	.compatible = "renesas,r8a77965-thermal",
	350	.data = &rcar_gen3_ths_tj_1,
	351	},
	352	{
	353	.compatible = "renesas,r8a77980-thermal",
	354	.data = &rcar_gen3_ths_tj_1,
	355	},
e854da4f NS	356	{
	357	.compatible = "renesas,r8a779a0-thermal",
	358	.data = &rcar_gen3_ths_tj_1,
	359	},
5b2ca9bc WS	360	{
	361	.compatible = "renesas,r8a779f0-thermal",
	362	.data = &rcar_gen3_ths_tj_1,
	363	},
883d1552 GU	364	{
	365	.compatible = "renesas,r8a779g0-thermal",
	366	.data = &rcar_gen3_ths_tj_1,
	367	},
564e73d2 WS	368	{},
	369	};
	370	MODULE_DEVICE_TABLE(of, rcar_gen3_thermal_dt_ids);
	371
	372	static int rcar_gen3_thermal_remove(struct platform_device *pdev)
	373	{
	374	struct device *dev = &pdev->dev;
	375
	376	pm_runtime_put(dev);
	377	pm_runtime_disable(dev);
	378
	379	return 0;
	380	}
	381
6269e9f7 MV	382	static void rcar_gen3_hwmon_action(void *data)
	383	{
	384	struct thermal_zone_device *zone = data;
	385
	386	thermal_remove_hwmon_sysfs(zone);
	387	}
	388
47cf09e0 NS	389	static int rcar_gen3_thermal_request_irqs(struct rcar_gen3_thermal_priv *priv,
	390	struct platform_device *pdev)
	391	{
	392	struct device *dev = &pdev->dev;
	393	unsigned int i;
	394	char *irqname;
	395	int ret, irq;
	396
	397	for (i = 0; i < 2; i++) {
	398	irq = platform_get_irq_optional(pdev, i);
	399	if (irq < 0)
	400	return irq;
	401
	402	irqname = devm_kasprintf(dev, GFP_KERNEL, "%s:ch%d",
	403	dev_name(dev), i);
	404	if (!irqname)
	405	return -ENOMEM;
	406
	407	ret = devm_request_threaded_irq(dev, irq, NULL,
	408	rcar_gen3_thermal_irq,
	409	IRQF_ONESHOT, irqname, priv);
	410	if (ret)
	411	return ret;
	412	}
	413
	414	return 0;
	415	}
	416
564e73d2 WS	417	static int rcar_gen3_thermal_probe(struct platform_device *pdev)
	418	{
	419	struct rcar_gen3_thermal_priv *priv;
	420	struct device *dev = &pdev->dev;
3ae5950d	421	const int *ths_tj_1 = of_device_get_match_data(dev);
564e73d2 WS	422	struct resource *res;
564e73d2 WS	423	struct thermal_zone_device *zone;
d3a2328e NS	424	unsigned int i;
d3a2328e NS	425	int ret;
564e73d2	426
564e73d2 WS	427	priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL);
	428	if (!priv)
	429	return -ENOMEM;
	430
aef43e04	431	priv->ops = rcar_gen3_tz_of_ops;
cc4d072b	432
564e73d2 WS	433	platform_set_drvdata(pdev, priv);
564e73d2 WS	434
47cf09e0	435	if (rcar_gen3_thermal_request_irqs(priv, pdev))
aef43e04	436	priv->ops.set_trips = NULL;
47cf09e0	437
564e73d2 WS	438	pm_runtime_enable(dev);
	439	pm_runtime_get_sync(dev);
	440
	441	for (i = 0; i < TSC_MAX_NUM; i++) {
	442	struct rcar_gen3_thermal_tsc *tsc;
	443
d51546c0 NS	444	res = platform_get_resource(pdev, IORESOURCE_MEM, i);
	445	if (!res)
	446	break;
	447
564e73d2 WS	448	tsc = devm_kzalloc(dev, sizeof(*tsc), GFP_KERNEL);
	449	if (!tsc) {
	450	ret = -ENOMEM;
	451	goto error_unregister;
	452	}
	453
564e73d2 WS	454	tsc->base = devm_ioremap_resource(dev, res);
	455	if (IS_ERR(tsc->base)) {
	456	ret = PTR_ERR(tsc->base);
	457	goto error_unregister;
	458	}
b8aaf141	459
564e73d2	460	priv->tscs[i] = tsc;
c3131bd5 NS	461	}
	462
	463	priv->num_tscs = i;
	464
	465	if (!rcar_gen3_thermal_read_fuses(priv))
	466	dev_info(dev, "No calibration values fused, fallback to driver values\n");
	467
	468	for (i = 0; i < priv->num_tscs; i++) {
	469	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
564e73d2	470
3f2f6895	471	rcar_gen3_thermal_init(priv, tsc);
47b2d3d2 NS	472	rcar_gen3_thermal_calc_coefs(priv, tsc, *ths_tj_1);
47b2d3d2 NS	473
aef43e04	474	zone = devm_thermal_of_zone_register(dev, i, tsc, &priv->ops);
564e73d2	475	if (IS_ERR(zone)) {
404dd7df	476	dev_err(dev, "Sensor %u: Can't register thermal zone\n", i);
564e73d2 WS	477	ret = PTR_ERR(zone);
	478	goto error_unregister;
	479	}
	480	tsc->zone = zone;
7d4b2697	481
6269e9f7 MV	482	ret = thermal_add_hwmon_sysfs(tsc->zone);
	483	if (ret)
	484	goto error_unregister;
	485
b9cd1663	486	ret = devm_add_action_or_reset(dev, rcar_gen3_hwmon_action, zone);
d543c842	487	if (ret)
6269e9f7	488	goto error_unregister;
6269e9f7	489
d5299c1b	490	ret = thermal_zone_get_num_trips(tsc->zone);
e380ea81 JW	491	if (ret < 0)
	492	goto error_unregister;
	493
404dd7df	494	dev_info(dev, "Sensor %u: Loaded %d trip points\n", i, ret);
564e73d2 WS	495	}
564e73d2 WS	496
97dad1f1 NS	497	if (!priv->num_tscs) {
	498	ret = -ENODEV;
	499	goto error_unregister;
	500	}
	501
564e73d2 WS	502	return 0;
	503
	504	error_unregister:
	505	rcar_gen3_thermal_remove(pdev);
	506
	507	return ret;
	508	}
	509
75f78d6d NS	510	static int __maybe_unused rcar_gen3_thermal_resume(struct device *dev)
	511	{
	512	struct rcar_gen3_thermal_priv *priv = dev_get_drvdata(dev);
	513	unsigned int i;
	514
	515	for (i = 0; i < priv->num_tscs; i++) {
	516	struct rcar_gen3_thermal_tsc *tsc = priv->tscs[i];
	517
3f2f6895	518	rcar_gen3_thermal_init(priv, tsc);
75f78d6d NS	519	}
75f78d6d NS	520
75f78d6d NS	521	return 0;
	522	}
	523
1b57b959	524	static SIMPLE_DEV_PM_OPS(rcar_gen3_thermal_pm_ops, NULL,
75f78d6d NS	525	rcar_gen3_thermal_resume);
75f78d6d NS	526
564e73d2 WS	527	static struct platform_driver rcar_gen3_thermal_driver = {
	528	.driver = {
	529	.name = "rcar_gen3_thermal",
75f78d6d	530	.pm = &rcar_gen3_thermal_pm_ops,
564e73d2 WS	531	.of_match_table = rcar_gen3_thermal_dt_ids,
	532	},
	533	.probe = rcar_gen3_thermal_probe,
	534	.remove = rcar_gen3_thermal_remove,
	535	};
	536	module_platform_driver(rcar_gen3_thermal_driver);
	537
	538	MODULE_LICENSE("GPL v2");
	539	MODULE_DESCRIPTION("R-Car Gen3 THS thermal sensor driver");
	540	MODULE_AUTHOR("Wolfram Sang <wsa+renesas@sang-engineering.com>");