[linux-block.git] / drivers / thermal / intel / intel_pch_thermal.c

// SPDX-License-Identifier: GPL-2.0-only
/* intel_pch_thermal.c - Intel PCH Thermal driver
 *
 * Copyright (c) 2015, Intel Corporation.
 *
 * Authors:
 *     Tushar Dave <tushar.n.dave@intel.com>
 */

#include <linux/acpi.h>
#include <linux/delay.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/pci.h>
#include <linux/pm.h>
#include <linux/suspend.h>
#include <linux/thermal.h>
#include <linux/types.h>
#include <linux/units.h>

/* Intel PCH thermal Device IDs */
#define PCH_THERMAL_DID_HSW_1	0x9C24 /* Haswell PCH */
#define PCH_THERMAL_DID_HSW_2	0x8C24 /* Haswell PCH */
#define PCH_THERMAL_DID_WPT	0x9CA4 /* Wildcat Point */
#define PCH_THERMAL_DID_SKL	0x9D31 /* Skylake PCH */
#define PCH_THERMAL_DID_SKL_H	0xA131 /* Skylake PCH 100 series */
#define PCH_THERMAL_DID_CNL	0x9Df9 /* CNL PCH */
#define PCH_THERMAL_DID_CNL_H	0xA379 /* CNL-H PCH */
#define PCH_THERMAL_DID_CNL_LP	0x02F9 /* CNL-LP PCH */
#define PCH_THERMAL_DID_CML_H	0X06F9 /* CML-H PCH */
#define PCH_THERMAL_DID_LWB	0xA1B1 /* Lewisburg PCH */
#define PCH_THERMAL_DID_WBG	0x8D24 /* Wellsburg PCH */

/* Wildcat Point-LP  PCH Thermal registers */
#define WPT_TEMP	0x0000	/* Temperature */
#define WPT_TSC	0x04	/* Thermal Sensor Control */
#define WPT_TSS	0x06	/* Thermal Sensor Status */
#define WPT_TSEL	0x08	/* Thermal Sensor Enable and Lock */
#define WPT_TSREL	0x0A	/* Thermal Sensor Report Enable and Lock */
#define WPT_TSMIC	0x0C	/* Thermal Sensor SMI Control */
#define WPT_CTT	0x0010	/* Catastrophic Trip Point */
#define WPT_TSPM	0x001C	/* Thermal Sensor Power Management */
#define WPT_TAHV	0x0014	/* Thermal Alert High Value */
#define WPT_TALV	0x0018	/* Thermal Alert Low Value */
#define WPT_TL		0x00000040	/* Throttle Value */
#define WPT_PHL	0x0060	/* PCH Hot Level */
#define WPT_PHLC	0x62	/* PHL Control */
#define WPT_TAS	0x80	/* Thermal Alert Status */
#define WPT_TSPIEN	0x82	/* PCI Interrupt Event Enables */
#define WPT_TSGPEN	0x84	/* General Purpose Event Enables */

/*  Wildcat Point-LP  PCH Thermal Register bit definitions */
#define WPT_TEMP_TSR	0x01ff	/* Temp TS Reading */
#define WPT_TSC_CPDE	0x01	/* Catastrophic Power-Down Enable */
#define WPT_TSS_TSDSS	0x10	/* Thermal Sensor Dynamic Shutdown Status */
#define WPT_TSS_GPES	0x08	/* GPE status */
#define WPT_TSEL_ETS	0x01    /* Enable TS */
#define WPT_TSEL_PLDB	0x80	/* TSEL Policy Lock-Down Bit */
#define WPT_TL_TOL	0x000001FF	/* T0 Level */
#define WPT_TL_T1L	0x1ff00000	/* T1 Level */
#define WPT_TL_TTEN	0x20000000	/* TT Enable */

/* Resolution of 1/2 degree C and an offset of -50C */
#define PCH_TEMP_OFFSET	(-50)
#define GET_WPT_TEMP(x)	((x) * MILLIDEGREE_PER_DEGREE / 2 + WPT_TEMP_OFFSET)
#define WPT_TEMP_OFFSET	(PCH_TEMP_OFFSET * MILLIDEGREE_PER_DEGREE)
#define GET_PCH_TEMP(x)	(((x) / 2) + PCH_TEMP_OFFSET)

#define PCH_MAX_TRIPS 3 /* critical, hot, passive */

/* Amount of time for each cooling delay, 100ms by default for now */
static unsigned int delay_timeout = 100;
module_param(delay_timeout, int, 0644);
MODULE_PARM_DESC(delay_timeout, "amount of time delay for each iteration.");

/* Number of iterations for cooling delay, 600 counts by default for now */
static unsigned int delay_cnt = 600;
module_param(delay_cnt, int, 0644);
MODULE_PARM_DESC(delay_cnt, "total number of iterations for time delay.");

static char driver_name[] = "Intel PCH thermal driver";

struct pch_thermal_device {
	void __iomem *hw_base;
	struct pci_dev *pdev;
	struct thermal_zone_device *tzd;
	bool bios_enabled;
};

#ifdef CONFIG_ACPI
/*
 * On some platforms, there is a companion ACPI device, which adds
 * passive trip temperature using _PSV method. There is no specific
 * passive temperature setting in MMIO interface of this PCI device.
 */
static int pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd,
				     struct thermal_trip *trip)
{
	struct acpi_device *adev;
	int temp;

	adev = ACPI_COMPANION(&ptd->pdev->dev);
	if (!adev)
		return 0;

	if (thermal_acpi_passive_trip_temp(adev, &temp) || temp <= 0)
		return 0;

	trip->type = THERMAL_TRIP_PASSIVE;
	trip->temperature = temp;
	return 1;
}
#else
static int pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd,
				     struct thermal_trip *trip)
{
	return 0;
}
#endif

static int pch_thermal_get_temp(struct thermal_zone_device *tzd, int *temp)
{
	struct pch_thermal_device *ptd = thermal_zone_device_priv(tzd);

	*temp = GET_WPT_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
	return 0;
}

static void pch_critical(struct thermal_zone_device *tzd)
{
	dev_dbg(thermal_zone_device(tzd), "%s: critical temperature reached\n",
		thermal_zone_device_type(tzd));
}

static const struct thermal_zone_device_ops tzd_ops = {
	.get_temp = pch_thermal_get_temp,
	.critical = pch_critical,
};

enum pch_board_ids {
	PCH_BOARD_HSW = 0,
	PCH_BOARD_WPT,
	PCH_BOARD_SKL,
	PCH_BOARD_CNL,
	PCH_BOARD_CML,
	PCH_BOARD_LWB,
	PCH_BOARD_WBG,
};

static const char *board_names[] = {
	[PCH_BOARD_HSW] = "pch_haswell",
	[PCH_BOARD_WPT] = "pch_wildcat_point",
	[PCH_BOARD_SKL] = "pch_skylake",
	[PCH_BOARD_CNL] = "pch_cannonlake",
	[PCH_BOARD_CML] = "pch_cometlake",
	[PCH_BOARD_LWB] = "pch_lewisburg",
	[PCH_BOARD_WBG] = "pch_wellsburg",
};

static int intel_pch_thermal_probe(struct pci_dev *pdev,
				   const struct pci_device_id *id)
{
	struct thermal_trip ptd_trips[PCH_MAX_TRIPS] = { 0 };
	enum pch_board_ids board_id = id->driver_data;
	struct pch_thermal_device *ptd;
	int nr_trips = 0;
	u16 trip_temp;
	u8 tsel;
	int err;

	ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL);
	if (!ptd)
		return -ENOMEM;

	pci_set_drvdata(pdev, ptd);
	ptd->pdev = pdev;

	err = pci_enable_device(pdev);
	if (err) {
		dev_err(&pdev->dev, "failed to enable pci device\n");
		return err;
	}

	err = pci_request_regions(pdev, driver_name);
	if (err) {
		dev_err(&pdev->dev, "failed to request pci region\n");
		goto error_disable;
	}

	ptd->hw_base = pci_ioremap_bar(pdev, 0);
	if (!ptd->hw_base) {
		err = -ENOMEM;
		dev_err(&pdev->dev, "failed to map mem base\n");
		goto error_release;
	}

	/* Check if BIOS has already enabled thermal sensor */
	if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) {
		ptd->bios_enabled = true;
		goto read_trips;
	}

	tsel = readb(ptd->hw_base + WPT_TSEL);
	/*
	 * When TSEL's Policy Lock-Down bit is 1, TSEL become RO.
	 * If so, thermal sensor cannot enable. Bail out.
	 */
	if (tsel & WPT_TSEL_PLDB) {
		dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
		err = -ENODEV;
		goto error_cleanup;
	}

	writeb(tsel|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
	if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) {
		dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
		err = -ENODEV;
		goto error_cleanup;
	}

read_trips:
	trip_temp = readw(ptd->hw_base + WPT_CTT);
	trip_temp &= 0x1FF;
	if (trip_temp) {
		ptd_trips[nr_trips].temperature = GET_WPT_TEMP(trip_temp);
		ptd_trips[nr_trips++].type = THERMAL_TRIP_CRITICAL;
	}

	trip_temp = readw(ptd->hw_base + WPT_PHL);
	trip_temp &= 0x1FF;
	if (trip_temp) {
		ptd_trips[nr_trips].temperature = GET_WPT_TEMP(trip_temp);
		ptd_trips[nr_trips++].type = THERMAL_TRIP_HOT;
	}

	nr_trips += pch_wpt_add_acpi_psv_trip(ptd, &ptd_trips[nr_trips]);

	ptd->tzd = thermal_zone_device_register_with_trips(board_names[board_id],
							   ptd_trips, nr_trips,
							   ptd, &tzd_ops,
							   NULL, 0, 0);
	if (IS_ERR(ptd->tzd)) {
		dev_err(&pdev->dev, "Failed to register thermal zone %s\n",
			board_names[board_id]);
		err = PTR_ERR(ptd->tzd);
		goto error_cleanup;
	}
	err = thermal_zone_device_enable(ptd->tzd);
	if (err)
		goto err_unregister;

	return 0;

err_unregister:
	thermal_zone_device_unregister(ptd->tzd);
error_cleanup:
	iounmap(ptd->hw_base);
error_release:
	pci_release_regions(pdev);
error_disable:
	pci_disable_device(pdev);
	dev_err(&pdev->dev, "pci device failed to probe\n");
	return err;
}

static void intel_pch_thermal_remove(struct pci_dev *pdev)
{
	struct pch_thermal_device *ptd = pci_get_drvdata(pdev);

	thermal_zone_device_unregister(ptd->tzd);
	iounmap(ptd->hw_base);
	pci_set_drvdata(pdev, NULL);
	pci_release_regions(pdev);
	pci_disable_device(pdev);
}

static int intel_pch_thermal_suspend_noirq(struct device *device)
{
	struct pch_thermal_device *ptd = dev_get_drvdata(device);
	u16 pch_thr_temp, pch_cur_temp;
	int pch_delay_cnt = 0;
	u8 tsel;

	/* Shutdown the thermal sensor if it is not enabled by BIOS */
	if (!ptd->bios_enabled) {
		tsel = readb(ptd->hw_base + WPT_TSEL);
		writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL);
		return 0;
	}

	/* Do not check temperature if it is not s2idle */
	if (pm_suspend_via_firmware())
		return 0;

	/* Get the PCH temperature threshold value */
	pch_thr_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TSPM));

	/* Get the PCH current temperature value */
	pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));

	if (pch_cur_temp >= pch_thr_temp)
		dev_warn(&ptd->pdev->dev,
			"CPU-PCH current temp [%dC] higher than the threshold temp [%dC], S0ix might fail. Start cooling...\n",
			pch_cur_temp, pch_thr_temp);

	/*
	 * If current PCH temperature is higher than configured PCH threshold
	 * value, run some delay loop with sleep to let the current temperature
	 * go down below the threshold value which helps to allow system enter
	 * lower power S0ix suspend state. Even after delay loop if PCH current
	 * temperature stays above threshold, notify the warning message
	 * which helps to indentify the reason why S0ix entry was rejected.
	 */
	while (pch_delay_cnt < delay_cnt) {
		if (pch_cur_temp < pch_thr_temp)
			break;

		if (pm_wakeup_pending()) {
			dev_warn(&ptd->pdev->dev, "Wakeup event detected, abort cooling\n");
			return 0;
		}

		pch_delay_cnt++;
		dev_dbg(&ptd->pdev->dev,
			"CPU-PCH current temp [%dC] higher than the threshold temp [%dC], sleep %d times for %d ms duration\n",
			pch_cur_temp, pch_thr_temp, pch_delay_cnt, delay_timeout);
		msleep(delay_timeout);
		/* Read the PCH current temperature for next cycle. */
		pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
	}

	if (pch_cur_temp >= pch_thr_temp)
		dev_warn(&ptd->pdev->dev,
			"CPU-PCH is hot [%dC] after %d ms delay. S0ix might fail\n",
			pch_cur_temp, pch_delay_cnt * delay_timeout);
	else {
		if (pch_delay_cnt)
			dev_info(&ptd->pdev->dev,
				"CPU-PCH is cool [%dC] after %d ms delay\n",
				pch_cur_temp, pch_delay_cnt * delay_timeout);
		else
			dev_info(&ptd->pdev->dev,
				"CPU-PCH is cool [%dC]\n",
				pch_cur_temp);
	}

	return 0;
}

static int intel_pch_thermal_resume(struct device *device)
{
	struct pch_thermal_device *ptd = dev_get_drvdata(device);
	u8 tsel;

	if (ptd->bios_enabled)
		return 0;

	tsel = readb(ptd->hw_base + WPT_TSEL);

	writeb(tsel | WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);

	return 0;
}

static const struct pci_device_id intel_pch_thermal_id[] = {
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1),
		.driver_data = PCH_BOARD_HSW, },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2),
		.driver_data = PCH_BOARD_HSW, },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT),
		.driver_data = PCH_BOARD_WPT, },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL),
		.driver_data = PCH_BOARD_SKL, },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H),
		.driver_data = PCH_BOARD_SKL, },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL),
		.driver_data = PCH_BOARD_CNL, },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H),
		.driver_data = PCH_BOARD_CNL, },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_LP),
		.driver_data = PCH_BOARD_CNL, },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H),
		.driver_data = PCH_BOARD_CML, },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_LWB),
		.driver_data = PCH_BOARD_LWB, },
	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WBG),
		.driver_data = PCH_BOARD_WBG, },
	{ 0, },
};
MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id);

static const struct dev_pm_ops intel_pch_pm_ops = {
	.suspend_noirq = intel_pch_thermal_suspend_noirq,
	.resume = intel_pch_thermal_resume,
};

static struct pci_driver intel_pch_thermal_driver = {
	.name		= "intel_pch_thermal",
	.id_table	= intel_pch_thermal_id,
	.probe		= intel_pch_thermal_probe,
	.remove		= intel_pch_thermal_remove,
	.driver.pm	= &intel_pch_pm_ops,
};

module_pci_driver(intel_pch_thermal_driver);

MODULE_LICENSE("GPL v2");
MODULE_DESCRIPTION("Intel PCH Thermal driver");
Commit	Line	Data
2025cf9e	1	// SPDX-License-Identifier: GPL-2.0-only
d0a12625 TD	2	/* intel_pch_thermal.c - Intel PCH Thermal driver
	3	*
	4	* Copyright (c) 2015, Intel Corporation.
	5	*
	6	* Authors:
	7	* Tushar Dave <tushar.n.dave@intel.com>
d0a12625 TD	8	*/
d0a12625 TD	9
ef63b043 SP	10	#include <linux/acpi.h>
ef63b043 SP	11	#include <linux/delay.h>
d0a12625	12	#include <linux/module.h>
d0a12625 TD	13	#include <linux/init.h>
d0a12625 TD	14	#include <linux/pci.h>
ef63b043 SP	15	#include <linux/pm.h>
ef63b043 SP	16	#include <linux/suspend.h>
d0a12625	17	#include <linux/thermal.h>
ef63b043	18	#include <linux/types.h>
97a0a49d	19	#include <linux/units.h>
d0a12625 TD	20
d0a12625 TD	21	/* Intel PCH thermal Device IDs */
33086a9a SP	22	#define PCH_THERMAL_DID_HSW_1 0x9C24 /* Haswell PCH */
33086a9a SP	23	#define PCH_THERMAL_DID_HSW_2 0x8C24 /* Haswell PCH */
d0a12625	24	#define PCH_THERMAL_DID_WPT 0x9CA4 /* Wildcat Point */
4cba7d23	25	#define PCH_THERMAL_DID_SKL 0x9D31 /* Skylake PCH */
c6068a6e	26	#define PCH_THERMAL_DID_SKL_H 0xA131 /* Skylake PCH 100 series */
6ed5ed14 SP	27	#define PCH_THERMAL_DID_CNL 0x9Df9 /* CNL PCH */
6ed5ed14 SP	28	#define PCH_THERMAL_DID_CNL_H 0xA379 /* CNL-H PCH */
c569e805	29	#define PCH_THERMAL_DID_CNL_LP 0x02F9 /* CNL-LP PCH */
35709c4e	30	#define PCH_THERMAL_DID_CML_H 0X06F9 /* CML-H PCH */
e78acf7e	31	#define PCH_THERMAL_DID_LWB 0xA1B1 /* Lewisburg PCH */
40dc1929	32	#define PCH_THERMAL_DID_WBG 0x8D24 /* Wellsburg PCH */
d0a12625 TD	33
	34	/* Wildcat Point-LP PCH Thermal registers */
	35	#define WPT_TEMP 0x0000 /* Temperature */
	36	#define WPT_TSC 0x04 /* Thermal Sensor Control */
	37	#define WPT_TSS 0x06 /* Thermal Sensor Status */
	38	#define WPT_TSEL 0x08 /* Thermal Sensor Enable and Lock */
	39	#define WPT_TSREL 0x0A /* Thermal Sensor Report Enable and Lock */
	40	#define WPT_TSMIC 0x0C /* Thermal Sensor SMI Control */
	41	#define WPT_CTT 0x0010 /* Catastrophic Trip Point */
ef63b043	42	#define WPT_TSPM 0x001C /* Thermal Sensor Power Management */
d0a12625 TD	43	#define WPT_TAHV 0x0014 /* Thermal Alert High Value */
	44	#define WPT_TALV 0x0018 /* Thermal Alert Low Value */
	45	#define WPT_TL 0x00000040 /* Throttle Value */
	46	#define WPT_PHL 0x0060 /* PCH Hot Level */
	47	#define WPT_PHLC 0x62 /* PHL Control */
	48	#define WPT_TAS 0x80 /* Thermal Alert Status */
	49	#define WPT_TSPIEN 0x82 /* PCI Interrupt Event Enables */
	50	#define WPT_TSGPEN 0x84 /* General Purpose Event Enables */
	51
	52	/* Wildcat Point-LP PCH Thermal Register bit definitions */
23c973f5	53	#define WPT_TEMP_TSR 0x01ff /* Temp TS Reading */
d0a12625 TD	54	#define WPT_TSC_CPDE 0x01 /* Catastrophic Power-Down Enable */
	55	#define WPT_TSS_TSDSS 0x10 /* Thermal Sensor Dynamic Shutdown Status */
	56	#define WPT_TSS_GPES 0x08 /* GPE status */
	57	#define WPT_TSEL_ETS 0x01 /* Enable TS */
	58	#define WPT_TSEL_PLDB 0x80 /* TSEL Policy Lock-Down Bit */
	59	#define WPT_TL_TOL 0x000001FF /* T0 Level */
	60	#define WPT_TL_T1L 0x1ff00000 /* T1 Level */
	61	#define WPT_TL_TTEN 0x20000000 /* TT Enable */
	62
ef63b043 SP	63	/* Resolution of 1/2 degree C and an offset of -50C */
	64	#define PCH_TEMP_OFFSET (-50)
	65	#define GET_WPT_TEMP(x) ((x) * MILLIDEGREE_PER_DEGREE / 2 + WPT_TEMP_OFFSET)
	66	#define WPT_TEMP_OFFSET (PCH_TEMP_OFFSET * MILLIDEGREE_PER_DEGREE)
	67	#define GET_PCH_TEMP(x) (((x) / 2) + PCH_TEMP_OFFSET)
	68
fee19c69 DL	69	#define PCH_MAX_TRIPS 3 /* critical, hot, passive */
fee19c69 DL	70
ef63b043 SP	71	/* Amount of time for each cooling delay, 100ms by default for now */
	72	static unsigned int delay_timeout = 100;
	73	module_param(delay_timeout, int, 0644);
	74	MODULE_PARM_DESC(delay_timeout, "amount of time delay for each iteration.");
	75
92923028 ZR	76	/* Number of iterations for cooling delay, 600 counts by default for now */
92923028 ZR	77	static unsigned int delay_cnt = 600;
ef63b043 SP	78	module_param(delay_cnt, int, 0644);
	79	MODULE_PARM_DESC(delay_cnt, "total number of iterations for time delay.");
	80
d0a12625 TD	81	static char driver_name[] = "Intel PCH thermal driver";
	82
	83	struct pch_thermal_device {
	84	void __iomem *hw_base;
d0a12625 TD	85	struct pci_dev *pdev;
d0a12625 TD	86	struct thermal_zone_device *tzd;
176b1ec2	87	bool bios_enabled;
d0a12625 TD	88	};
d0a12625 TD	89
aed3f249	90	#ifdef CONFIG_ACPI
aed3f249 SP	91	/*
	92	* On some platforms, there is a companion ACPI device, which adds
	93	* passive trip temperature using _PSV method. There is no specific
	94	* passive temperature setting in MMIO interface of this PCI device.
	95	*/
fcbf8780 RW	96	static int pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd,
fcbf8780 RW	97	struct thermal_trip *trip)
aed3f249 SP	98	{
aed3f249 SP	99	struct acpi_device *adev;
dd3b3d16	100	int temp;
aed3f249 SP	101
aed3f249 SP	102	adev = ACPI_COMPANION(&ptd->pdev->dev);
fee19c69	103	if (!adev)
2cee7356	104	return 0;
fee19c69	105
dd3b3d16	106	if (thermal_acpi_passive_trip_temp(adev, &temp) \|\| temp <= 0)
2cee7356	107	return 0;
fee19c69	108
fcbf8780 RW	109	trip->type = THERMAL_TRIP_PASSIVE;
fcbf8780 RW	110	trip->temperature = temp;
2cee7356	111	return 1;
aed3f249 SP	112	}
aed3f249 SP	113	#else
fcbf8780 RW	114	static int pch_wpt_add_acpi_psv_trip(struct pch_thermal_device *ptd,
fcbf8780 RW	115	struct thermal_trip *trip)
aed3f249	116	{
2cee7356	117	return 0;
aed3f249 SP	118	}
	119	#endif
	120
dfb22fc5	121	static int pch_thermal_get_temp(struct thermal_zone_device tzd, int temp)
d0a12625	122	{
5f68d078	123	struct pch_thermal_device *ptd = thermal_zone_device_priv(tzd);
d0a12625	124
35c87f94	125	*temp = GET_WPT_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
558718f4	126	return 0;
d0a12625 TD	127	}
d0a12625 TD	128
03671968 KHF	129	static void pch_critical(struct thermal_zone_device *tzd)
03671968 KHF	130	{
ba7894be DL	131	dev_dbg(thermal_zone_device(tzd), "%s: critical temperature reached\n",
ba7894be DL	132	thermal_zone_device_type(tzd));
03671968 KHF	133	}
03671968 KHF	134
62dd1784	135	static const struct thermal_zone_device_ops tzd_ops = {
d0a12625	136	.get_temp = pch_thermal_get_temp,
03671968	137	.critical = pch_critical,
d0a12625 TD	138	};
d0a12625 TD	139
ae98e57a RW	140	enum pch_board_ids {
	141	PCH_BOARD_HSW = 0,
	142	PCH_BOARD_WPT,
	143	PCH_BOARD_SKL,
	144	PCH_BOARD_CNL,
	145	PCH_BOARD_CML,
	146	PCH_BOARD_LWB,
	147	PCH_BOARD_WBG,
c6068a6e OH	148	};
c6068a6e OH	149
2153a87f RW	150	static const char *board_names[] = {
	151	[PCH_BOARD_HSW] = "pch_haswell",
	152	[PCH_BOARD_WPT] = "pch_wildcat_point",
	153	[PCH_BOARD_SKL] = "pch_skylake",
	154	[PCH_BOARD_CNL] = "pch_cannonlake",
	155	[PCH_BOARD_CML] = "pch_cometlake",
	156	[PCH_BOARD_LWB] = "pch_lewisburg",
	157	[PCH_BOARD_WBG] = "pch_wellsburg",
c6068a6e	158	};
d0a12625 TD	159
	160	static int intel_pch_thermal_probe(struct pci_dev *pdev,
	161	const struct pci_device_id *id)
	162	{
fcbf8780	163	struct thermal_trip ptd_trips[PCH_MAX_TRIPS] = { 0 };
ae98e57a	164	enum pch_board_ids board_id = id->driver_data;
d0a12625	165	struct pch_thermal_device *ptd;
35c87f94 RW	166	int nr_trips = 0;
	167	u16 trip_temp;
	168	u8 tsel;
d0a12625	169	int err;
d0a12625 TD	170
	171	ptd = devm_kzalloc(&pdev->dev, sizeof(*ptd), GFP_KERNEL);
	172	if (!ptd)
	173	return -ENOMEM;
	174
d0a12625 TD	175	pci_set_drvdata(pdev, ptd);
	176	ptd->pdev = pdev;
	177
	178	err = pci_enable_device(pdev);
	179	if (err) {
	180	dev_err(&pdev->dev, "failed to enable pci device\n");
	181	return err;
	182	}
	183
	184	err = pci_request_regions(pdev, driver_name);
	185	if (err) {
	186	dev_err(&pdev->dev, "failed to request pci region\n");
	187	goto error_disable;
	188	}
	189
	190	ptd->hw_base = pci_ioremap_bar(pdev, 0);
	191	if (!ptd->hw_base) {
	192	err = -ENOMEM;
	193	dev_err(&pdev->dev, "failed to map mem base\n");
	194	goto error_release;
	195	}
	196
35c87f94 RW	197	/* Check if BIOS has already enabled thermal sensor */
	198	if (WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL)) {
	199	ptd->bios_enabled = true;
	200	goto read_trips;
	201	}
	202
	203	tsel = readb(ptd->hw_base + WPT_TSEL);
	204	/*
	205	* When TSEL's Policy Lock-Down bit is 1, TSEL become RO.
	206	* If so, thermal sensor cannot enable. Bail out.
	207	*/
	208	if (tsel & WPT_TSEL_PLDB) {
	209	dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
	210	err = -ENODEV;
d0a12625	211	goto error_cleanup;
558718f4	212	}
d0a12625	213
35c87f94 RW	214	writeb(tsel\|WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
	215	if (!(WPT_TSEL_ETS & readb(ptd->hw_base + WPT_TSEL))) {
	216	dev_err(&ptd->pdev->dev, "Sensor can't be enabled\n");
	217	err = -ENODEV;
	218	goto error_cleanup;
	219	}
	220
	221	read_trips:
	222	trip_temp = readw(ptd->hw_base + WPT_CTT);
	223	trip_temp &= 0x1FF;
	224	if (trip_temp) {
fcbf8780 RW	225	ptd_trips[nr_trips].temperature = GET_WPT_TEMP(trip_temp);
fcbf8780 RW	226	ptd_trips[nr_trips++].type = THERMAL_TRIP_CRITICAL;
35c87f94 RW	227	}
	228
	229	trip_temp = readw(ptd->hw_base + WPT_PHL);
	230	trip_temp &= 0x1FF;
	231	if (trip_temp) {
fcbf8780 RW	232	ptd_trips[nr_trips].temperature = GET_WPT_TEMP(trip_temp);
fcbf8780 RW	233	ptd_trips[nr_trips++].type = THERMAL_TRIP_HOT;
35c87f94 RW	234	}
35c87f94 RW	235
fcbf8780	236	nr_trips += pch_wpt_add_acpi_psv_trip(ptd, &ptd_trips[nr_trips]);
35c87f94	237
2153a87f	238	ptd->tzd = thermal_zone_device_register_with_trips(board_names[board_id],
fcbf8780	239	ptd_trips, nr_trips,
4a62d588	240	ptd, &tzd_ops,
2153a87f	241	NULL, 0, 0);
d0a12625 TD	242	if (IS_ERR(ptd->tzd)) {
d0a12625 TD	243	dev_err(&pdev->dev, "Failed to register thermal zone %s\n",
2153a87f	244	board_names[board_id]);
d0a12625 TD	245	err = PTR_ERR(ptd->tzd);
	246	goto error_cleanup;
	247	}
bbcf90c0 AP	248	err = thermal_zone_device_enable(ptd->tzd);
	249	if (err)
	250	goto err_unregister;
d0a12625 TD	251
	252	return 0;
	253
bbcf90c0 AP	254	err_unregister:
bbcf90c0 AP	255	thermal_zone_device_unregister(ptd->tzd);
d0a12625 TD	256	error_cleanup:
	257	iounmap(ptd->hw_base);
	258	error_release:
	259	pci_release_regions(pdev);
	260	error_disable:
	261	pci_disable_device(pdev);
	262	dev_err(&pdev->dev, "pci device failed to probe\n");
	263	return err;
	264	}
	265
	266	static void intel_pch_thermal_remove(struct pci_dev *pdev)
	267	{
	268	struct pch_thermal_device *ptd = pci_get_drvdata(pdev);
	269
	270	thermal_zone_device_unregister(ptd->tzd);
	271	iounmap(ptd->hw_base);
	272	pci_set_drvdata(pdev, NULL);
66dd8b80	273	pci_release_regions(pdev);
d0a12625 TD	274	pci_disable_device(pdev);
	275	}
	276
28708e19	277	static int intel_pch_thermal_suspend_noirq(struct device *device)
176b1ec2	278	{
97e9cafe	279	struct pch_thermal_device *ptd = dev_get_drvdata(device);
c5f43242 RW	280	u16 pch_thr_temp, pch_cur_temp;
	281	int pch_delay_cnt = 0;
	282	u8 tsel;
	283
	284	/* Shutdown the thermal sensor if it is not enabled by BIOS */
	285	if (!ptd->bios_enabled) {
	286	tsel = readb(ptd->hw_base + WPT_TSEL);
	287	writeb(tsel & 0xFE, ptd->hw_base + WPT_TSEL);
	288	return 0;
	289	}
	290
	291	/* Do not check temperature if it is not s2idle */
	292	if (pm_suspend_via_firmware())
	293	return 0;
	294
	295	/* Get the PCH temperature threshold value */
	296	pch_thr_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TSPM));
	297
	298	/* Get the PCH current temperature value */
	299	pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
176b1ec2	300
68de0ae4 ZR	301	if (pch_cur_temp >= pch_thr_temp)
	302	dev_warn(&ptd->pdev->dev,
	303	"CPU-PCH current temp [%dC] higher than the threshold temp [%dC], S0ix might fail. Start cooling...\n",
	304	pch_cur_temp, pch_thr_temp);
	305
c5f43242 RW	306	/*
	307	* If current PCH temperature is higher than configured PCH threshold
	308	* value, run some delay loop with sleep to let the current temperature
	309	* go down below the threshold value which helps to allow system enter
	310	* lower power S0ix suspend state. Even after delay loop if PCH current
	311	* temperature stays above threshold, notify the warning message
	312	* which helps to indentify the reason why S0ix entry was rejected.
	313	*/
	314	while (pch_delay_cnt < delay_cnt) {
	315	if (pch_cur_temp < pch_thr_temp)
	316	break;
	317
	318	if (pm_wakeup_pending()) {
	319	dev_warn(&ptd->pdev->dev, "Wakeup event detected, abort cooling\n");
	320	return 0;
	321	}
	322
	323	pch_delay_cnt++;
	324	dev_dbg(&ptd->pdev->dev,
	325	"CPU-PCH current temp [%dC] higher than the threshold temp [%dC], sleep %d times for %d ms duration\n",
	326	pch_cur_temp, pch_thr_temp, pch_delay_cnt, delay_timeout);
	327	msleep(delay_timeout);
	328	/* Read the PCH current temperature for next cycle. */
	329	pch_cur_temp = GET_PCH_TEMP(WPT_TEMP_TSR & readw(ptd->hw_base + WPT_TEMP));
	330	}
	331
	332	if (pch_cur_temp >= pch_thr_temp)
	333	dev_warn(&ptd->pdev->dev,
	334	"CPU-PCH is hot [%dC] after %d ms delay. S0ix might fail\n",
	335	pch_cur_temp, pch_delay_cnt * delay_timeout);
	336	else {
	337	if (pch_delay_cnt)
	338	dev_info(&ptd->pdev->dev,
	339	"CPU-PCH is cool [%dC] after %d ms delay\n",
	340	pch_cur_temp, pch_delay_cnt * delay_timeout);
	341	else
	342	dev_info(&ptd->pdev->dev,
	343	"CPU-PCH is cool [%dC]\n",
	344	pch_cur_temp);
	345	}
	346
	347	return 0;
176b1ec2 SP	348	}
	349
	350	static int intel_pch_thermal_resume(struct device *device)
	351	{
97e9cafe	352	struct pch_thermal_device *ptd = dev_get_drvdata(device);
c5f43242	353	u8 tsel;
176b1ec2	354
c5f43242 RW	355	if (ptd->bios_enabled)
	356	return 0;
	357
	358	tsel = readb(ptd->hw_base + WPT_TSEL);
	359
	360	writeb(tsel \| WPT_TSEL_ETS, ptd->hw_base + WPT_TSEL);
	361
	362	return 0;
176b1ec2 SP	363	}
176b1ec2 SP	364
9b877de3	365	static const struct pci_device_id intel_pch_thermal_id[] = {
c6068a6e	366	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_1),
ae98e57a	367	.driver_data = PCH_BOARD_HSW, },
c6068a6e	368	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_HSW_2),
ae98e57a	369	.driver_data = PCH_BOARD_HSW, },
c6068a6e	370	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WPT),
ae98e57a	371	.driver_data = PCH_BOARD_WPT, },
c6068a6e	372	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL),
ae98e57a	373	.driver_data = PCH_BOARD_SKL, },
c6068a6e	374	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_SKL_H),
ae98e57a	375	.driver_data = PCH_BOARD_SKL, },
6ed5ed14	376	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL),
ae98e57a	377	.driver_data = PCH_BOARD_CNL, },
6ed5ed14	378	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_H),
ae98e57a	379	.driver_data = PCH_BOARD_CNL, },
c569e805	380	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CNL_LP),
ae98e57a	381	.driver_data = PCH_BOARD_CNL, },
35709c4e	382	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_CML_H),
ae98e57a	383	.driver_data = PCH_BOARD_CML, },
e78acf7e	384	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_LWB),
ae98e57a	385	.driver_data = PCH_BOARD_LWB, },
40dc1929	386	{ PCI_DEVICE(PCI_VENDOR_ID_INTEL, PCH_THERMAL_DID_WBG),
ae98e57a	387	.driver_data = PCH_BOARD_WBG, },
d0a12625 TD	388	{ 0, },
	389	};
	390	MODULE_DEVICE_TABLE(pci, intel_pch_thermal_id);
	391
176b1ec2	392	static const struct dev_pm_ops intel_pch_pm_ops = {
28708e19	393	.suspend_noirq = intel_pch_thermal_suspend_noirq,
176b1ec2 SP	394	.resume = intel_pch_thermal_resume,
	395	};
	396
d0a12625 TD	397	static struct pci_driver intel_pch_thermal_driver = {
	398	.name = "intel_pch_thermal",
	399	.id_table = intel_pch_thermal_id,
	400	.probe = intel_pch_thermal_probe,
	401	.remove = intel_pch_thermal_remove,
176b1ec2	402	.driver.pm = &intel_pch_pm_ops,
d0a12625 TD	403	};
	404
	405	module_pci_driver(intel_pch_thermal_driver);
	406
	407	MODULE_LICENSE("GPL v2");
	408	MODULE_DESCRIPTION("Intel PCH Thermal driver");