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45f8b0dd FE |
1 | // SPDX-License-Identifier: GPL-2.0 |
2 | // | |
3 | // Copyright 2013 Freescale Semiconductor, Inc. | |
ca3de46b | 4 | |
329fe7b1 | 5 | #include <linux/clk.h> |
4d753aa7 | 6 | #include <linux/cpufreq.h> |
ca3de46b | 7 | #include <linux/cpu_cooling.h> |
ca3de46b | 8 | #include <linux/delay.h> |
37713a1e | 9 | #include <linux/interrupt.h> |
ca3de46b | 10 | #include <linux/io.h> |
ca3de46b SG |
11 | #include <linux/mfd/syscon.h> |
12 | #include <linux/module.h> | |
13 | #include <linux/of.h> | |
3c94f17e | 14 | #include <linux/of_device.h> |
ca3de46b | 15 | #include <linux/regmap.h> |
ca3de46b | 16 | #include <linux/thermal.h> |
ae621557 | 17 | #include <linux/nvmem-consumer.h> |
4cf2ddf1 | 18 | #include <linux/pm_runtime.h> |
ca3de46b SG |
19 | |
20 | #define REG_SET 0x4 | |
21 | #define REG_CLR 0x8 | |
22 | #define REG_TOG 0xc | |
23 | ||
f085f672 AH |
24 | /* i.MX6 specific */ |
25 | #define IMX6_MISC0 0x0150 | |
26 | #define IMX6_MISC0_REFTOP_SELBIASOFF (1 << 3) | |
27 | #define IMX6_MISC1 0x0160 | |
28 | #define IMX6_MISC1_IRQ_TEMPHIGH (1 << 29) | |
3c94f17e | 29 | /* Below LOW and PANIC bits are only for TEMPMON_IMX6SX */ |
f085f672 AH |
30 | #define IMX6_MISC1_IRQ_TEMPLOW (1 << 28) |
31 | #define IMX6_MISC1_IRQ_TEMPPANIC (1 << 27) | |
32 | ||
33 | #define IMX6_TEMPSENSE0 0x0180 | |
34 | #define IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT 20 | |
35 | #define IMX6_TEMPSENSE0_ALARM_VALUE_MASK (0xfff << 20) | |
36 | #define IMX6_TEMPSENSE0_TEMP_CNT_SHIFT 8 | |
37 | #define IMX6_TEMPSENSE0_TEMP_CNT_MASK (0xfff << 8) | |
38 | #define IMX6_TEMPSENSE0_FINISHED (1 << 2) | |
39 | #define IMX6_TEMPSENSE0_MEASURE_TEMP (1 << 1) | |
40 | #define IMX6_TEMPSENSE0_POWER_DOWN (1 << 0) | |
41 | ||
42 | #define IMX6_TEMPSENSE1 0x0190 | |
43 | #define IMX6_TEMPSENSE1_MEASURE_FREQ 0xffff | |
44 | #define IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT 0 | |
ca3de46b | 45 | |
a2291bad | 46 | #define OCOTP_MEM0 0x0480 |
ca3de46b SG |
47 | #define OCOTP_ANA1 0x04e0 |
48 | ||
f085f672 AH |
49 | /* Below TEMPSENSE2 is only for TEMPMON_IMX6SX */ |
50 | #define IMX6_TEMPSENSE2 0x0290 | |
51 | #define IMX6_TEMPSENSE2_LOW_VALUE_SHIFT 0 | |
52 | #define IMX6_TEMPSENSE2_LOW_VALUE_MASK 0xfff | |
53 | #define IMX6_TEMPSENSE2_PANIC_VALUE_SHIFT 16 | |
54 | #define IMX6_TEMPSENSE2_PANIC_VALUE_MASK 0xfff0000 | |
55 | ||
56 | /* i.MX7 specific */ | |
57 | #define IMX7_ANADIG_DIGPROG 0x800 | |
58 | #define IMX7_TEMPSENSE0 0x300 | |
59 | #define IMX7_TEMPSENSE0_PANIC_ALARM_SHIFT 18 | |
60 | #define IMX7_TEMPSENSE0_PANIC_ALARM_MASK (0x1ff << 18) | |
61 | #define IMX7_TEMPSENSE0_HIGH_ALARM_SHIFT 9 | |
62 | #define IMX7_TEMPSENSE0_HIGH_ALARM_MASK (0x1ff << 9) | |
63 | #define IMX7_TEMPSENSE0_LOW_ALARM_SHIFT 0 | |
64 | #define IMX7_TEMPSENSE0_LOW_ALARM_MASK 0x1ff | |
65 | ||
66 | #define IMX7_TEMPSENSE1 0x310 | |
67 | #define IMX7_TEMPSENSE1_MEASURE_FREQ_SHIFT 16 | |
68 | #define IMX7_TEMPSENSE1_MEASURE_FREQ_MASK (0xffff << 16) | |
69 | #define IMX7_TEMPSENSE1_FINISHED (1 << 11) | |
70 | #define IMX7_TEMPSENSE1_MEASURE_TEMP (1 << 10) | |
71 | #define IMX7_TEMPSENSE1_POWER_DOWN (1 << 9) | |
72 | #define IMX7_TEMPSENSE1_TEMP_VALUE_SHIFT 0 | |
73 | #define IMX7_TEMPSENSE1_TEMP_VALUE_MASK 0x1ff | |
74 | ||
ca3de46b SG |
75 | /* The driver supports 1 passive trip point and 1 critical trip point */ |
76 | enum imx_thermal_trip { | |
77 | IMX_TRIP_PASSIVE, | |
78 | IMX_TRIP_CRITICAL, | |
ca3de46b SG |
79 | }; |
80 | ||
ca3de46b SG |
81 | #define IMX_POLLING_DELAY 2000 /* millisecond */ |
82 | #define IMX_PASSIVE_DELAY 1000 | |
83 | ||
3c94f17e AH |
84 | #define TEMPMON_IMX6Q 1 |
85 | #define TEMPMON_IMX6SX 2 | |
f085f672 | 86 | #define TEMPMON_IMX7D 3 |
3c94f17e AH |
87 | |
88 | struct thermal_soc_data { | |
89 | u32 version; | |
f085f672 AH |
90 | |
91 | u32 sensor_ctrl; | |
92 | u32 power_down_mask; | |
93 | u32 measure_temp_mask; | |
94 | ||
95 | u32 measure_freq_ctrl; | |
96 | u32 measure_freq_mask; | |
97 | u32 measure_freq_shift; | |
98 | ||
99 | u32 temp_data; | |
100 | u32 temp_value_mask; | |
101 | u32 temp_value_shift; | |
102 | u32 temp_valid_mask; | |
103 | ||
104 | u32 panic_alarm_ctrl; | |
105 | u32 panic_alarm_mask; | |
106 | u32 panic_alarm_shift; | |
107 | ||
108 | u32 high_alarm_ctrl; | |
109 | u32 high_alarm_mask; | |
110 | u32 high_alarm_shift; | |
111 | ||
112 | u32 low_alarm_ctrl; | |
113 | u32 low_alarm_mask; | |
114 | u32 low_alarm_shift; | |
3c94f17e AH |
115 | }; |
116 | ||
30233a22 DL |
117 | static struct thermal_trip trips[] = { |
118 | [IMX_TRIP_PASSIVE] = { .type = THERMAL_TRIP_PASSIVE }, | |
119 | [IMX_TRIP_CRITICAL] = { .type = THERMAL_TRIP_CRITICAL }, | |
120 | }; | |
121 | ||
3c94f17e AH |
122 | static struct thermal_soc_data thermal_imx6q_data = { |
123 | .version = TEMPMON_IMX6Q, | |
f085f672 AH |
124 | |
125 | .sensor_ctrl = IMX6_TEMPSENSE0, | |
126 | .power_down_mask = IMX6_TEMPSENSE0_POWER_DOWN, | |
127 | .measure_temp_mask = IMX6_TEMPSENSE0_MEASURE_TEMP, | |
128 | ||
129 | .measure_freq_ctrl = IMX6_TEMPSENSE1, | |
130 | .measure_freq_shift = IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT, | |
131 | .measure_freq_mask = IMX6_TEMPSENSE1_MEASURE_FREQ, | |
132 | ||
133 | .temp_data = IMX6_TEMPSENSE0, | |
134 | .temp_value_mask = IMX6_TEMPSENSE0_TEMP_CNT_MASK, | |
135 | .temp_value_shift = IMX6_TEMPSENSE0_TEMP_CNT_SHIFT, | |
136 | .temp_valid_mask = IMX6_TEMPSENSE0_FINISHED, | |
137 | ||
138 | .high_alarm_ctrl = IMX6_TEMPSENSE0, | |
139 | .high_alarm_mask = IMX6_TEMPSENSE0_ALARM_VALUE_MASK, | |
140 | .high_alarm_shift = IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT, | |
3c94f17e AH |
141 | }; |
142 | ||
143 | static struct thermal_soc_data thermal_imx6sx_data = { | |
144 | .version = TEMPMON_IMX6SX, | |
f085f672 AH |
145 | |
146 | .sensor_ctrl = IMX6_TEMPSENSE0, | |
147 | .power_down_mask = IMX6_TEMPSENSE0_POWER_DOWN, | |
148 | .measure_temp_mask = IMX6_TEMPSENSE0_MEASURE_TEMP, | |
149 | ||
150 | .measure_freq_ctrl = IMX6_TEMPSENSE1, | |
151 | .measure_freq_shift = IMX6_TEMPSENSE1_MEASURE_FREQ_SHIFT, | |
152 | .measure_freq_mask = IMX6_TEMPSENSE1_MEASURE_FREQ, | |
153 | ||
154 | .temp_data = IMX6_TEMPSENSE0, | |
155 | .temp_value_mask = IMX6_TEMPSENSE0_TEMP_CNT_MASK, | |
156 | .temp_value_shift = IMX6_TEMPSENSE0_TEMP_CNT_SHIFT, | |
157 | .temp_valid_mask = IMX6_TEMPSENSE0_FINISHED, | |
158 | ||
159 | .high_alarm_ctrl = IMX6_TEMPSENSE0, | |
160 | .high_alarm_mask = IMX6_TEMPSENSE0_ALARM_VALUE_MASK, | |
161 | .high_alarm_shift = IMX6_TEMPSENSE0_ALARM_VALUE_SHIFT, | |
162 | ||
163 | .panic_alarm_ctrl = IMX6_TEMPSENSE2, | |
164 | .panic_alarm_mask = IMX6_TEMPSENSE2_PANIC_VALUE_MASK, | |
165 | .panic_alarm_shift = IMX6_TEMPSENSE2_PANIC_VALUE_SHIFT, | |
166 | ||
167 | .low_alarm_ctrl = IMX6_TEMPSENSE2, | |
168 | .low_alarm_mask = IMX6_TEMPSENSE2_LOW_VALUE_MASK, | |
169 | .low_alarm_shift = IMX6_TEMPSENSE2_LOW_VALUE_SHIFT, | |
170 | }; | |
171 | ||
172 | static struct thermal_soc_data thermal_imx7d_data = { | |
173 | .version = TEMPMON_IMX7D, | |
174 | ||
175 | .sensor_ctrl = IMX7_TEMPSENSE1, | |
176 | .power_down_mask = IMX7_TEMPSENSE1_POWER_DOWN, | |
177 | .measure_temp_mask = IMX7_TEMPSENSE1_MEASURE_TEMP, | |
178 | ||
179 | .measure_freq_ctrl = IMX7_TEMPSENSE1, | |
180 | .measure_freq_shift = IMX7_TEMPSENSE1_MEASURE_FREQ_SHIFT, | |
181 | .measure_freq_mask = IMX7_TEMPSENSE1_MEASURE_FREQ_MASK, | |
182 | ||
183 | .temp_data = IMX7_TEMPSENSE1, | |
184 | .temp_value_mask = IMX7_TEMPSENSE1_TEMP_VALUE_MASK, | |
185 | .temp_value_shift = IMX7_TEMPSENSE1_TEMP_VALUE_SHIFT, | |
186 | .temp_valid_mask = IMX7_TEMPSENSE1_FINISHED, | |
187 | ||
188 | .panic_alarm_ctrl = IMX7_TEMPSENSE1, | |
189 | .panic_alarm_mask = IMX7_TEMPSENSE0_PANIC_ALARM_MASK, | |
190 | .panic_alarm_shift = IMX7_TEMPSENSE0_PANIC_ALARM_SHIFT, | |
191 | ||
192 | .high_alarm_ctrl = IMX7_TEMPSENSE0, | |
193 | .high_alarm_mask = IMX7_TEMPSENSE0_HIGH_ALARM_MASK, | |
194 | .high_alarm_shift = IMX7_TEMPSENSE0_HIGH_ALARM_SHIFT, | |
195 | ||
196 | .low_alarm_ctrl = IMX7_TEMPSENSE0, | |
197 | .low_alarm_mask = IMX7_TEMPSENSE0_LOW_ALARM_MASK, | |
198 | .low_alarm_shift = IMX7_TEMPSENSE0_LOW_ALARM_SHIFT, | |
3c94f17e AH |
199 | }; |
200 | ||
ca3de46b | 201 | struct imx_thermal_data { |
4cf2ddf1 | 202 | struct device *dev; |
4d753aa7 | 203 | struct cpufreq_policy *policy; |
ca3de46b SG |
204 | struct thermal_zone_device *tz; |
205 | struct thermal_cooling_device *cdev; | |
ca3de46b | 206 | struct regmap *tempmon; |
ae621557 | 207 | u32 c1, c2; /* See formula in imx_init_calib() */ |
a2291bad | 208 | int temp_max; |
17e8351a SH |
209 | int alarm_temp; |
210 | int last_temp; | |
37713a1e PZ |
211 | bool irq_enabled; |
212 | int irq; | |
329fe7b1 | 213 | struct clk *thermal_clk; |
3c94f17e | 214 | const struct thermal_soc_data *socdata; |
a2291bad | 215 | const char *temp_grade; |
ca3de46b SG |
216 | }; |
217 | ||
3c94f17e | 218 | static void imx_set_panic_temp(struct imx_thermal_data *data, |
17e8351a | 219 | int panic_temp) |
3c94f17e | 220 | { |
f085f672 | 221 | const struct thermal_soc_data *soc_data = data->socdata; |
3c94f17e AH |
222 | struct regmap *map = data->tempmon; |
223 | int critical_value; | |
224 | ||
225 | critical_value = (data->c2 - panic_temp) / data->c1; | |
f085f672 AH |
226 | |
227 | regmap_write(map, soc_data->panic_alarm_ctrl + REG_CLR, | |
228 | soc_data->panic_alarm_mask); | |
229 | regmap_write(map, soc_data->panic_alarm_ctrl + REG_SET, | |
230 | critical_value << soc_data->panic_alarm_shift); | |
3c94f17e AH |
231 | } |
232 | ||
37713a1e | 233 | static void imx_set_alarm_temp(struct imx_thermal_data *data, |
17e8351a | 234 | int alarm_temp) |
37713a1e PZ |
235 | { |
236 | struct regmap *map = data->tempmon; | |
f085f672 | 237 | const struct thermal_soc_data *soc_data = data->socdata; |
37713a1e PZ |
238 | int alarm_value; |
239 | ||
240 | data->alarm_temp = alarm_temp; | |
f085f672 AH |
241 | |
242 | if (data->socdata->version == TEMPMON_IMX7D) | |
243 | alarm_value = alarm_temp / 1000 + data->c1 - 25; | |
244 | else | |
245 | alarm_value = (data->c2 - alarm_temp) / data->c1; | |
246 | ||
247 | regmap_write(map, soc_data->high_alarm_ctrl + REG_CLR, | |
248 | soc_data->high_alarm_mask); | |
249 | regmap_write(map, soc_data->high_alarm_ctrl + REG_SET, | |
250 | alarm_value << soc_data->high_alarm_shift); | |
37713a1e PZ |
251 | } |
252 | ||
17e8351a | 253 | static int imx_get_temp(struct thermal_zone_device *tz, int *temp) |
ca3de46b | 254 | { |
5f68d078 | 255 | struct imx_thermal_data *data = thermal_zone_device_priv(tz); |
f085f672 | 256 | const struct thermal_soc_data *soc_data = data->socdata; |
ca3de46b | 257 | struct regmap *map = data->tempmon; |
ca3de46b SG |
258 | unsigned int n_meas; |
259 | u32 val; | |
4cf2ddf1 | 260 | int ret; |
ca3de46b | 261 | |
4cf2ddf1 OR |
262 | ret = pm_runtime_resume_and_get(data->dev); |
263 | if (ret < 0) | |
264 | return ret; | |
ca3de46b | 265 | |
f085f672 | 266 | regmap_read(map, soc_data->temp_data, &val); |
37713a1e | 267 | |
abda7383 | 268 | if ((val & soc_data->temp_valid_mask) == 0) |
ca3de46b | 269 | return -EAGAIN; |
ca3de46b | 270 | |
f085f672 AH |
271 | n_meas = (val & soc_data->temp_value_mask) |
272 | >> soc_data->temp_value_shift; | |
ca3de46b | 273 | |
ae621557 | 274 | /* See imx_init_calib() for formula derivation */ |
f085f672 AH |
275 | if (data->socdata->version == TEMPMON_IMX7D) |
276 | *temp = (n_meas - data->c1 + 25) * 1000; | |
277 | else | |
278 | *temp = data->c2 - n_meas * data->c1; | |
ca3de46b | 279 | |
3c94f17e AH |
280 | /* Update alarm value to next higher trip point for TEMPMON_IMX6Q */ |
281 | if (data->socdata->version == TEMPMON_IMX6Q) { | |
30233a22 DL |
282 | if (data->alarm_temp == trips[IMX_TRIP_PASSIVE].temperature && |
283 | *temp >= trips[IMX_TRIP_PASSIVE].temperature) | |
284 | imx_set_alarm_temp(data, trips[IMX_TRIP_CRITICAL].temperature); | |
285 | if (data->alarm_temp == trips[IMX_TRIP_CRITICAL].temperature && | |
286 | *temp < trips[IMX_TRIP_PASSIVE].temperature) { | |
287 | imx_set_alarm_temp(data, trips[IMX_TRIP_PASSIVE].temperature); | |
17e8351a | 288 | dev_dbg(&tz->device, "thermal alarm off: T < %d\n", |
3c94f17e AH |
289 | data->alarm_temp / 1000); |
290 | } | |
37713a1e PZ |
291 | } |
292 | ||
293 | if (*temp != data->last_temp) { | |
17e8351a | 294 | dev_dbg(&tz->device, "millicelsius: %d\n", *temp); |
37713a1e PZ |
295 | data->last_temp = *temp; |
296 | } | |
297 | ||
298 | /* Reenable alarm IRQ if temperature below alarm temperature */ | |
299 | if (!data->irq_enabled && *temp < data->alarm_temp) { | |
300 | data->irq_enabled = true; | |
301 | enable_irq(data->irq); | |
ca3de46b SG |
302 | } |
303 | ||
4cf2ddf1 OR |
304 | pm_runtime_put(data->dev); |
305 | ||
ca3de46b SG |
306 | return 0; |
307 | } | |
308 | ||
f5e50bf4 AP |
309 | static int imx_change_mode(struct thermal_zone_device *tz, |
310 | enum thermal_device_mode mode) | |
ca3de46b | 311 | { |
5f68d078 | 312 | struct imx_thermal_data *data = thermal_zone_device_priv(tz); |
ca3de46b SG |
313 | |
314 | if (mode == THERMAL_DEVICE_ENABLED) { | |
4cf2ddf1 | 315 | pm_runtime_get(data->dev); |
37713a1e PZ |
316 | |
317 | if (!data->irq_enabled) { | |
318 | data->irq_enabled = true; | |
319 | enable_irq(data->irq); | |
320 | } | |
ca3de46b | 321 | } else { |
4cf2ddf1 | 322 | pm_runtime_put(data->dev); |
37713a1e | 323 | |
37713a1e PZ |
324 | if (data->irq_enabled) { |
325 | disable_irq(data->irq); | |
326 | data->irq_enabled = false; | |
327 | } | |
ca3de46b SG |
328 | } |
329 | ||
ca3de46b SG |
330 | return 0; |
331 | } | |
332 | ||
17e8351a | 333 | static int imx_get_crit_temp(struct thermal_zone_device *tz, int *temp) |
ca3de46b | 334 | { |
30233a22 | 335 | *temp = trips[IMX_TRIP_CRITICAL].temperature; |
017e5142 | 336 | |
017e5142 PZ |
337 | return 0; |
338 | } | |
339 | ||
340 | static int imx_set_trip_temp(struct thermal_zone_device *tz, int trip, | |
17e8351a | 341 | int temp) |
017e5142 | 342 | { |
5f68d078 | 343 | struct imx_thermal_data *data = thermal_zone_device_priv(tz); |
4cf2ddf1 OR |
344 | int ret; |
345 | ||
346 | ret = pm_runtime_resume_and_get(data->dev); | |
347 | if (ret < 0) | |
348 | return ret; | |
017e5142 | 349 | |
a2291bad | 350 | /* do not allow changing critical threshold */ |
017e5142 PZ |
351 | if (trip == IMX_TRIP_CRITICAL) |
352 | return -EPERM; | |
353 | ||
a2291bad | 354 | /* do not allow passive to be set higher than critical */ |
30233a22 | 355 | if (temp < 0 || temp > trips[IMX_TRIP_CRITICAL].temperature) |
017e5142 PZ |
356 | return -EINVAL; |
357 | ||
30233a22 | 358 | trips[IMX_TRIP_PASSIVE].temperature = temp; |
017e5142 | 359 | |
37713a1e PZ |
360 | imx_set_alarm_temp(data, temp); |
361 | ||
4cf2ddf1 OR |
362 | pm_runtime_put(data->dev); |
363 | ||
ca3de46b SG |
364 | return 0; |
365 | } | |
366 | ||
367 | static int imx_bind(struct thermal_zone_device *tz, | |
368 | struct thermal_cooling_device *cdev) | |
369 | { | |
370 | int ret; | |
371 | ||
372 | ret = thermal_zone_bind_cooling_device(tz, IMX_TRIP_PASSIVE, cdev, | |
373 | THERMAL_NO_LIMIT, | |
6cd9e9f6 KS |
374 | THERMAL_NO_LIMIT, |
375 | THERMAL_WEIGHT_DEFAULT); | |
ca3de46b SG |
376 | if (ret) { |
377 | dev_err(&tz->device, | |
378 | "binding zone %s with cdev %s failed:%d\n", | |
379 | tz->type, cdev->type, ret); | |
380 | return ret; | |
381 | } | |
382 | ||
383 | return 0; | |
384 | } | |
385 | ||
386 | static int imx_unbind(struct thermal_zone_device *tz, | |
387 | struct thermal_cooling_device *cdev) | |
388 | { | |
389 | int ret; | |
390 | ||
391 | ret = thermal_zone_unbind_cooling_device(tz, IMX_TRIP_PASSIVE, cdev); | |
392 | if (ret) { | |
393 | dev_err(&tz->device, | |
394 | "unbinding zone %s with cdev %s failed:%d\n", | |
395 | tz->type, cdev->type, ret); | |
396 | return ret; | |
397 | } | |
398 | ||
399 | return 0; | |
400 | } | |
401 | ||
cbb07bb3 | 402 | static struct thermal_zone_device_ops imx_tz_ops = { |
ca3de46b SG |
403 | .bind = imx_bind, |
404 | .unbind = imx_unbind, | |
405 | .get_temp = imx_get_temp, | |
f5e50bf4 | 406 | .change_mode = imx_change_mode, |
ca3de46b | 407 | .get_crit_temp = imx_get_crit_temp, |
017e5142 | 408 | .set_trip_temp = imx_set_trip_temp, |
ca3de46b SG |
409 | }; |
410 | ||
e4bb2240 | 411 | static int imx_init_calib(struct platform_device *pdev, u32 ocotp_ana1) |
ca3de46b SG |
412 | { |
413 | struct imx_thermal_data *data = platform_get_drvdata(pdev); | |
4e5f61ca | 414 | int n1; |
749e8be7 | 415 | u64 temp64; |
ca3de46b | 416 | |
e4bb2240 | 417 | if (ocotp_ana1 == 0 || ocotp_ana1 == ~0) { |
ca3de46b SG |
418 | dev_err(&pdev->dev, "invalid sensor calibration data\n"); |
419 | return -EINVAL; | |
420 | } | |
421 | ||
f085f672 AH |
422 | /* |
423 | * On i.MX7D, we only use the calibration data at 25C to get the temp, | |
424 | * Tmeas = ( Nmeas - n1) + 25; n1 is the fuse value for 25C. | |
425 | */ | |
426 | if (data->socdata->version == TEMPMON_IMX7D) { | |
427 | data->c1 = (ocotp_ana1 >> 9) & 0x1ff; | |
428 | return 0; | |
429 | } | |
430 | ||
ca3de46b | 431 | /* |
c5bbdb4b UKK |
432 | * The sensor is calibrated at 25 °C (aka T1) and the value measured |
433 | * (aka N1) at this temperature is provided in bits [31:20] in the | |
434 | * i.MX's OCOTP value ANA1. | |
435 | * To find the actual temperature T, the following formula has to be used | |
436 | * when reading value n from the sensor: | |
437 | * | |
4e5f61ca UKK |
438 | * T = T1 + (N - N1) / (0.4148468 - 0.0015423 * N1) °C + 3.580661 °C |
439 | * = [T1' - N1 / (0.4148468 - 0.0015423 * N1) °C] + N / (0.4148468 - 0.0015423 * N1) °C | |
440 | * = [T1' + N1 / (0.0015423 * N1 - 0.4148468) °C] - N / (0.0015423 * N1 - 0.4148468) °C | |
c5bbdb4b UKK |
441 | * = c2 - c1 * N |
442 | * | |
443 | * with | |
444 | * | |
4e5f61ca UKK |
445 | * T1' = 28.580661 °C |
446 | * c1 = 1 / (0.0015423 * N1 - 0.4297157) °C | |
447 | * c2 = T1' + N1 / (0.0015423 * N1 - 0.4148468) °C | |
448 | * = T1' + N1 * c1 | |
ca3de46b | 449 | */ |
e4bb2240 | 450 | n1 = ocotp_ana1 >> 20; |
ca3de46b | 451 | |
4e5f61ca | 452 | temp64 = 10000000; /* use 10^7 as fixed point constant for values in formula */ |
c5bbdb4b | 453 | temp64 *= 1000; /* to get result in °mC */ |
4e5f61ca | 454 | do_div(temp64, 15423 * n1 - 4148468); |
749e8be7 | 455 | data->c1 = temp64; |
4e5f61ca | 456 | data->c2 = n1 * data->c1 + 28581; |
ca3de46b | 457 | |
ae621557 LC |
458 | return 0; |
459 | } | |
460 | ||
e4bb2240 | 461 | static void imx_init_temp_grade(struct platform_device *pdev, u32 ocotp_mem0) |
ae621557 LC |
462 | { |
463 | struct imx_thermal_data *data = platform_get_drvdata(pdev); | |
a2291bad TH |
464 | |
465 | /* The maximum die temp is specified by the Temperature Grade */ | |
e4bb2240 | 466 | switch ((ocotp_mem0 >> 6) & 0x3) { |
339d7492 | 467 | case 0: /* Commercial (0 to 95 °C) */ |
a2291bad TH |
468 | data->temp_grade = "Commercial"; |
469 | data->temp_max = 95000; | |
470 | break; | |
339d7492 | 471 | case 1: /* Extended Commercial (-20 °C to 105 °C) */ |
a2291bad TH |
472 | data->temp_grade = "Extended Commercial"; |
473 | data->temp_max = 105000; | |
474 | break; | |
339d7492 | 475 | case 2: /* Industrial (-40 °C to 105 °C) */ |
a2291bad TH |
476 | data->temp_grade = "Industrial"; |
477 | data->temp_max = 105000; | |
478 | break; | |
339d7492 | 479 | case 3: /* Automotive (-40 °C to 125 °C) */ |
a2291bad TH |
480 | data->temp_grade = "Automotive"; |
481 | data->temp_max = 125000; | |
482 | break; | |
483 | } | |
017e5142 PZ |
484 | |
485 | /* | |
339d7492 UKK |
486 | * Set the critical trip point at 5 °C under max |
487 | * Set the passive trip point at 10 °C under max (changeable via sysfs) | |
017e5142 | 488 | */ |
30233a22 DL |
489 | trips[IMX_TRIP_PASSIVE].temperature = data->temp_max - (1000 * 10); |
490 | trips[IMX_TRIP_CRITICAL].temperature = data->temp_max - (1000 * 5); | |
ae621557 LC |
491 | } |
492 | ||
493 | static int imx_init_from_tempmon_data(struct platform_device *pdev) | |
494 | { | |
495 | struct regmap *map; | |
496 | int ret; | |
497 | u32 val; | |
498 | ||
499 | map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, | |
500 | "fsl,tempmon-data"); | |
501 | if (IS_ERR(map)) { | |
502 | ret = PTR_ERR(map); | |
503 | dev_err(&pdev->dev, "failed to get sensor regmap: %d\n", ret); | |
504 | return ret; | |
505 | } | |
506 | ||
507 | ret = regmap_read(map, OCOTP_ANA1, &val); | |
508 | if (ret) { | |
509 | dev_err(&pdev->dev, "failed to read sensor data: %d\n", ret); | |
510 | return ret; | |
511 | } | |
512 | ret = imx_init_calib(pdev, val); | |
513 | if (ret) | |
514 | return ret; | |
515 | ||
516 | ret = regmap_read(map, OCOTP_MEM0, &val); | |
517 | if (ret) { | |
518 | dev_err(&pdev->dev, "failed to read sensor data: %d\n", ret); | |
519 | return ret; | |
520 | } | |
521 | imx_init_temp_grade(pdev, val); | |
522 | ||
523 | return 0; | |
524 | } | |
525 | ||
526 | static int imx_init_from_nvmem_cells(struct platform_device *pdev) | |
527 | { | |
528 | int ret; | |
529 | u32 val; | |
530 | ||
531 | ret = nvmem_cell_read_u32(&pdev->dev, "calib", &val); | |
532 | if (ret) | |
533 | return ret; | |
be926cee JCD |
534 | |
535 | ret = imx_init_calib(pdev, val); | |
536 | if (ret) | |
537 | return ret; | |
ae621557 LC |
538 | |
539 | ret = nvmem_cell_read_u32(&pdev->dev, "temp_grade", &val); | |
540 | if (ret) | |
541 | return ret; | |
542 | imx_init_temp_grade(pdev, val); | |
017e5142 | 543 | |
ca3de46b SG |
544 | return 0; |
545 | } | |
546 | ||
37713a1e PZ |
547 | static irqreturn_t imx_thermal_alarm_irq(int irq, void *dev) |
548 | { | |
549 | struct imx_thermal_data *data = dev; | |
550 | ||
551 | disable_irq_nosync(irq); | |
552 | data->irq_enabled = false; | |
553 | ||
554 | return IRQ_WAKE_THREAD; | |
555 | } | |
556 | ||
557 | static irqreturn_t imx_thermal_alarm_irq_thread(int irq, void *dev) | |
558 | { | |
559 | struct imx_thermal_data *data = dev; | |
560 | ||
17e8351a | 561 | dev_dbg(&data->tz->device, "THERMAL ALARM: T > %d\n", |
37713a1e PZ |
562 | data->alarm_temp / 1000); |
563 | ||
0e70f466 | 564 | thermal_zone_device_update(data->tz, THERMAL_EVENT_UNSPECIFIED); |
37713a1e PZ |
565 | |
566 | return IRQ_HANDLED; | |
567 | } | |
568 | ||
3c94f17e AH |
569 | static const struct of_device_id of_imx_thermal_match[] = { |
570 | { .compatible = "fsl,imx6q-tempmon", .data = &thermal_imx6q_data, }, | |
571 | { .compatible = "fsl,imx6sx-tempmon", .data = &thermal_imx6sx_data, }, | |
f085f672 | 572 | { .compatible = "fsl,imx7d-tempmon", .data = &thermal_imx7d_data, }, |
3c94f17e AH |
573 | { /* end */ } |
574 | }; | |
575 | MODULE_DEVICE_TABLE(of, of_imx_thermal_match); | |
576 | ||
c589c566 | 577 | #ifdef CONFIG_CPU_FREQ |
a1d00154 BS |
578 | /* |
579 | * Create cooling device in case no #cooling-cells property is available in | |
580 | * CPU node | |
581 | */ | |
582 | static int imx_thermal_register_legacy_cooling(struct imx_thermal_data *data) | |
583 | { | |
c589c566 | 584 | struct device_node *np; |
b45fd13b | 585 | int ret = 0; |
a1d00154 | 586 | |
c589c566 AH |
587 | data->policy = cpufreq_cpu_get(0); |
588 | if (!data->policy) { | |
589 | pr_debug("%s: CPUFreq policy not found\n", __func__); | |
590 | return -EPROBE_DEFER; | |
591 | } | |
592 | ||
593 | np = of_get_cpu_node(data->policy->cpu, NULL); | |
594 | ||
a1d00154 BS |
595 | if (!np || !of_find_property(np, "#cooling-cells", NULL)) { |
596 | data->cdev = cpufreq_cooling_register(data->policy); | |
597 | if (IS_ERR(data->cdev)) { | |
598 | ret = PTR_ERR(data->cdev); | |
599 | cpufreq_cpu_put(data->policy); | |
a1d00154 BS |
600 | } |
601 | } | |
602 | ||
b45fd13b AH |
603 | of_node_put(np); |
604 | ||
605 | return ret; | |
a1d00154 BS |
606 | } |
607 | ||
c589c566 AH |
608 | static void imx_thermal_unregister_legacy_cooling(struct imx_thermal_data *data) |
609 | { | |
610 | cpufreq_cooling_unregister(data->cdev); | |
611 | cpufreq_cpu_put(data->policy); | |
612 | } | |
613 | ||
614 | #else | |
615 | ||
616 | static inline int imx_thermal_register_legacy_cooling(struct imx_thermal_data *data) | |
617 | { | |
618 | return 0; | |
619 | } | |
620 | ||
621 | static inline void imx_thermal_unregister_legacy_cooling(struct imx_thermal_data *data) | |
622 | { | |
623 | } | |
624 | #endif | |
625 | ||
ca3de46b SG |
626 | static int imx_thermal_probe(struct platform_device *pdev) |
627 | { | |
628 | struct imx_thermal_data *data; | |
ca3de46b | 629 | struct regmap *map; |
37713a1e | 630 | int measure_freq; |
ca3de46b SG |
631 | int ret; |
632 | ||
633 | data = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL); | |
634 | if (!data) | |
635 | return -ENOMEM; | |
636 | ||
4cf2ddf1 OR |
637 | data->dev = &pdev->dev; |
638 | ||
ca3de46b SG |
639 | map = syscon_regmap_lookup_by_phandle(pdev->dev.of_node, "fsl,tempmon"); |
640 | if (IS_ERR(map)) { | |
641 | ret = PTR_ERR(map); | |
642 | dev_err(&pdev->dev, "failed to get tempmon regmap: %d\n", ret); | |
643 | return ret; | |
644 | } | |
645 | data->tempmon = map; | |
646 | ||
829bc78a | 647 | data->socdata = of_device_get_match_data(&pdev->dev); |
8b051ec3 SV |
648 | if (!data->socdata) { |
649 | dev_err(&pdev->dev, "no device match found\n"); | |
650 | return -ENODEV; | |
651 | } | |
3c94f17e AH |
652 | |
653 | /* make sure the IRQ flag is clear before enabling irq on i.MX6SX */ | |
654 | if (data->socdata->version == TEMPMON_IMX6SX) { | |
f085f672 AH |
655 | regmap_write(map, IMX6_MISC1 + REG_CLR, |
656 | IMX6_MISC1_IRQ_TEMPHIGH | IMX6_MISC1_IRQ_TEMPLOW | |
657 | | IMX6_MISC1_IRQ_TEMPPANIC); | |
3c94f17e AH |
658 | /* |
659 | * reset value of LOW ALARM is incorrect, set it to lowest | |
660 | * value to avoid false trigger of low alarm. | |
661 | */ | |
f085f672 AH |
662 | regmap_write(map, data->socdata->low_alarm_ctrl + REG_SET, |
663 | data->socdata->low_alarm_mask); | |
3c94f17e AH |
664 | } |
665 | ||
37713a1e PZ |
666 | data->irq = platform_get_irq(pdev, 0); |
667 | if (data->irq < 0) | |
668 | return data->irq; | |
669 | ||
ca3de46b SG |
670 | platform_set_drvdata(pdev, data); |
671 | ||
ae621557 LC |
672 | if (of_find_property(pdev->dev.of_node, "nvmem-cells", NULL)) { |
673 | ret = imx_init_from_nvmem_cells(pdev); | |
5f3c0200 AH |
674 | if (ret) |
675 | return dev_err_probe(&pdev->dev, ret, | |
676 | "failed to init from nvmem\n"); | |
ae621557 LC |
677 | } else { |
678 | ret = imx_init_from_tempmon_data(pdev); | |
679 | if (ret) { | |
337a4aec | 680 | dev_err(&pdev->dev, "failed to init from fsl,tempmon-data\n"); |
ae621557 LC |
681 | return ret; |
682 | } | |
ca3de46b SG |
683 | } |
684 | ||
685 | /* Make sure sensor is in known good state for measurements */ | |
f085f672 AH |
686 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, |
687 | data->socdata->power_down_mask); | |
688 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, | |
689 | data->socdata->measure_temp_mask); | |
690 | regmap_write(map, data->socdata->measure_freq_ctrl + REG_CLR, | |
691 | data->socdata->measure_freq_mask); | |
692 | if (data->socdata->version != TEMPMON_IMX7D) | |
693 | regmap_write(map, IMX6_MISC0 + REG_SET, | |
694 | IMX6_MISC0_REFTOP_SELBIASOFF); | |
695 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, | |
696 | data->socdata->power_down_mask); | |
ca3de46b | 697 | |
a1d00154 | 698 | ret = imx_thermal_register_legacy_cooling(data); |
5f3c0200 AH |
699 | if (ret) |
700 | return dev_err_probe(&pdev->dev, ret, | |
701 | "failed to register cpufreq cooling device\n"); | |
ca3de46b | 702 | |
90a21ff5 HK |
703 | data->thermal_clk = devm_clk_get(&pdev->dev, NULL); |
704 | if (IS_ERR(data->thermal_clk)) { | |
705 | ret = PTR_ERR(data->thermal_clk); | |
706 | if (ret != -EPROBE_DEFER) | |
707 | dev_err(&pdev->dev, | |
708 | "failed to get thermal clk: %d\n", ret); | |
c589c566 | 709 | goto legacy_cleanup; |
90a21ff5 HK |
710 | } |
711 | ||
712 | /* | |
713 | * Thermal sensor needs clk on to get correct value, normally | |
714 | * we should enable its clk before taking measurement and disable | |
715 | * clk after measurement is done, but if alarm function is enabled, | |
716 | * hardware will auto measure the temperature periodically, so we | |
717 | * need to keep the clk always on for alarm function. | |
718 | */ | |
719 | ret = clk_prepare_enable(data->thermal_clk); | |
720 | if (ret) { | |
721 | dev_err(&pdev->dev, "failed to enable thermal clk: %d\n", ret); | |
c589c566 | 722 | goto legacy_cleanup; |
90a21ff5 HK |
723 | } |
724 | ||
30233a22 DL |
725 | data->tz = thermal_zone_device_register_with_trips("imx_thermal_zone", |
726 | trips, | |
727 | ARRAY_SIZE(trips), | |
728 | BIT(IMX_TRIP_PASSIVE), data, | |
729 | &imx_tz_ops, NULL, | |
730 | IMX_PASSIVE_DELAY, | |
731 | IMX_POLLING_DELAY); | |
ca3de46b SG |
732 | if (IS_ERR(data->tz)) { |
733 | ret = PTR_ERR(data->tz); | |
734 | dev_err(&pdev->dev, | |
735 | "failed to register thermal zone device %d\n", ret); | |
b6ad3981 | 736 | goto clk_disable; |
ca3de46b SG |
737 | } |
738 | ||
a2291bad TH |
739 | dev_info(&pdev->dev, "%s CPU temperature grade - max:%dC" |
740 | " critical:%dC passive:%dC\n", data->temp_grade, | |
30233a22 DL |
741 | data->temp_max / 1000, trips[IMX_TRIP_CRITICAL].temperature / 1000, |
742 | trips[IMX_TRIP_PASSIVE].temperature / 1000); | |
a2291bad | 743 | |
37713a1e | 744 | /* Enable measurements at ~ 10 Hz */ |
f085f672 AH |
745 | regmap_write(map, data->socdata->measure_freq_ctrl + REG_CLR, |
746 | data->socdata->measure_freq_mask); | |
37713a1e | 747 | measure_freq = DIV_ROUND_UP(32768, 10); /* 10 Hz */ |
f085f672 AH |
748 | regmap_write(map, data->socdata->measure_freq_ctrl + REG_SET, |
749 | measure_freq << data->socdata->measure_freq_shift); | |
30233a22 | 750 | imx_set_alarm_temp(data, trips[IMX_TRIP_PASSIVE].temperature); |
3c94f17e AH |
751 | |
752 | if (data->socdata->version == TEMPMON_IMX6SX) | |
30233a22 | 753 | imx_set_panic_temp(data, trips[IMX_TRIP_CRITICAL].temperature); |
3c94f17e | 754 | |
f085f672 AH |
755 | regmap_write(map, data->socdata->sensor_ctrl + REG_CLR, |
756 | data->socdata->power_down_mask); | |
757 | regmap_write(map, data->socdata->sensor_ctrl + REG_SET, | |
758 | data->socdata->measure_temp_mask); | |
4cf2ddf1 OR |
759 | /* After power up, we need a delay before first access can be done. */ |
760 | usleep_range(20, 50); | |
761 | ||
762 | /* the core was configured and enabled just before */ | |
763 | pm_runtime_set_active(&pdev->dev); | |
764 | pm_runtime_enable(data->dev); | |
765 | ||
766 | ret = pm_runtime_resume_and_get(data->dev); | |
767 | if (ret < 0) | |
768 | goto disable_runtime_pm; | |
37713a1e | 769 | |
cf1ba1d7 | 770 | data->irq_enabled = true; |
7f4957be AP |
771 | ret = thermal_zone_device_enable(data->tz); |
772 | if (ret) | |
773 | goto thermal_zone_unregister; | |
cf1ba1d7 | 774 | |
84866ee5 BP |
775 | ret = devm_request_threaded_irq(&pdev->dev, data->irq, |
776 | imx_thermal_alarm_irq, imx_thermal_alarm_irq_thread, | |
777 | 0, "imx_thermal", data); | |
778 | if (ret < 0) { | |
779 | dev_err(&pdev->dev, "failed to request alarm irq: %d\n", ret); | |
b6ad3981 | 780 | goto thermal_zone_unregister; |
84866ee5 BP |
781 | } |
782 | ||
4cf2ddf1 OR |
783 | pm_runtime_put(data->dev); |
784 | ||
ca3de46b | 785 | return 0; |
b6ad3981 AH |
786 | |
787 | thermal_zone_unregister: | |
788 | thermal_zone_device_unregister(data->tz); | |
4cf2ddf1 OR |
789 | disable_runtime_pm: |
790 | pm_runtime_put_noidle(data->dev); | |
791 | pm_runtime_disable(data->dev); | |
b6ad3981 AH |
792 | clk_disable: |
793 | clk_disable_unprepare(data->thermal_clk); | |
c589c566 AH |
794 | legacy_cleanup: |
795 | imx_thermal_unregister_legacy_cooling(data); | |
b6ad3981 AH |
796 | |
797 | return ret; | |
ca3de46b SG |
798 | } |
799 | ||
800 | static int imx_thermal_remove(struct platform_device *pdev) | |
801 | { | |
802 | struct imx_thermal_data *data = platform_get_drvdata(pdev); | |
37713a1e | 803 | |
4cf2ddf1 OR |
804 | pm_runtime_put_noidle(data->dev); |
805 | pm_runtime_disable(data->dev); | |
ca3de46b SG |
806 | |
807 | thermal_zone_device_unregister(data->tz); | |
9db11010 | 808 | imx_thermal_unregister_legacy_cooling(data); |
ca3de46b SG |
809 | |
810 | return 0; | |
811 | } | |
812 | ||
b009514f | 813 | static int __maybe_unused imx_thermal_suspend(struct device *dev) |
ca3de46b SG |
814 | { |
815 | struct imx_thermal_data *data = dev_get_drvdata(dev); | |
7f4957be | 816 | int ret; |
ca3de46b | 817 | |
b46cce59 AH |
818 | /* |
819 | * Need to disable thermal sensor, otherwise, when thermal core | |
820 | * try to get temperature before thermal sensor resume, a wrong | |
821 | * temperature will be read as the thermal sensor is powered | |
f5e50bf4 | 822 | * down. This is done in change_mode() operation called from |
7f4957be | 823 | * thermal_zone_device_disable() |
b46cce59 | 824 | */ |
7f4957be AP |
825 | ret = thermal_zone_device_disable(data->tz); |
826 | if (ret) | |
827 | return ret; | |
4cf2ddf1 OR |
828 | |
829 | return pm_runtime_force_suspend(data->dev); | |
830 | } | |
831 | ||
832 | static int __maybe_unused imx_thermal_resume(struct device *dev) | |
833 | { | |
834 | struct imx_thermal_data *data = dev_get_drvdata(dev); | |
835 | int ret; | |
836 | ||
837 | ret = pm_runtime_force_resume(data->dev); | |
838 | if (ret) | |
839 | return ret; | |
840 | /* Enabled thermal sensor after resume */ | |
841 | return thermal_zone_device_enable(data->tz); | |
842 | } | |
843 | ||
844 | static int __maybe_unused imx_thermal_runtime_suspend(struct device *dev) | |
845 | { | |
846 | struct imx_thermal_data *data = dev_get_drvdata(dev); | |
847 | const struct thermal_soc_data *socdata = data->socdata; | |
848 | struct regmap *map = data->tempmon; | |
849 | int ret; | |
850 | ||
851 | ret = regmap_write(map, socdata->sensor_ctrl + REG_CLR, | |
852 | socdata->measure_temp_mask); | |
853 | if (ret) | |
854 | return ret; | |
855 | ||
856 | ret = regmap_write(map, socdata->sensor_ctrl + REG_SET, | |
857 | socdata->power_down_mask); | |
858 | if (ret) | |
859 | return ret; | |
860 | ||
d26eef8b | 861 | clk_disable_unprepare(data->thermal_clk); |
ca3de46b SG |
862 | |
863 | return 0; | |
864 | } | |
865 | ||
4cf2ddf1 | 866 | static int __maybe_unused imx_thermal_runtime_resume(struct device *dev) |
ca3de46b | 867 | { |
b46cce59 | 868 | struct imx_thermal_data *data = dev_get_drvdata(dev); |
4cf2ddf1 OR |
869 | const struct thermal_soc_data *socdata = data->socdata; |
870 | struct regmap *map = data->tempmon; | |
e3bdc8d7 | 871 | int ret; |
b46cce59 | 872 | |
e3bdc8d7 AY |
873 | ret = clk_prepare_enable(data->thermal_clk); |
874 | if (ret) | |
875 | return ret; | |
4cf2ddf1 OR |
876 | |
877 | ret = regmap_write(map, socdata->sensor_ctrl + REG_CLR, | |
878 | socdata->power_down_mask); | |
879 | if (ret) | |
880 | return ret; | |
881 | ||
882 | ret = regmap_write(map, socdata->sensor_ctrl + REG_SET, | |
883 | socdata->measure_temp_mask); | |
7f4957be AP |
884 | if (ret) |
885 | return ret; | |
b46cce59 | 886 | |
4cf2ddf1 OR |
887 | /* |
888 | * According to the temp sensor designers, it may require up to ~17us | |
889 | * to complete a measurement. | |
890 | */ | |
891 | usleep_range(20, 50); | |
892 | ||
ca3de46b SG |
893 | return 0; |
894 | } | |
ca3de46b | 895 | |
4cf2ddf1 OR |
896 | static const struct dev_pm_ops imx_thermal_pm_ops = { |
897 | SET_SYSTEM_SLEEP_PM_OPS(imx_thermal_suspend, imx_thermal_resume) | |
898 | SET_RUNTIME_PM_OPS(imx_thermal_runtime_suspend, | |
899 | imx_thermal_runtime_resume, NULL) | |
900 | }; | |
ca3de46b | 901 | |
ca3de46b SG |
902 | static struct platform_driver imx_thermal = { |
903 | .driver = { | |
904 | .name = "imx_thermal", | |
ca3de46b SG |
905 | .pm = &imx_thermal_pm_ops, |
906 | .of_match_table = of_imx_thermal_match, | |
907 | }, | |
908 | .probe = imx_thermal_probe, | |
909 | .remove = imx_thermal_remove, | |
910 | }; | |
911 | module_platform_driver(imx_thermal); | |
912 | ||
913 | MODULE_AUTHOR("Freescale Semiconductor, Inc."); | |
914 | MODULE_DESCRIPTION("Thermal driver for Freescale i.MX SoCs"); | |
915 | MODULE_LICENSE("GPL v2"); | |
916 | MODULE_ALIAS("platform:imx-thermal"); |