Commit | Line | Data |
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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
d7636e0b | 2 | #ifndef _LINUX_XGIFB |
3 | #define _LINUX_XGIFB | |
c62f2e46 | 4 | #include "vgatypes.h" |
b33704df | 5 | #include "vb_struct.h" |
c62f2e46 | 6 | |
289ea524 AK |
7 | enum xgifb_display_type { |
8 | XGIFB_DISP_NONE = 0, | |
9 | XGIFB_DISP_CRT, | |
10 | XGIFB_DISP_LCD, | |
11 | XGIFB_DISP_TV, | |
12 | }; | |
d7636e0b | 13 | |
a17379e7 KT |
14 | #define HASVB_NONE 0x00 |
15 | #define HASVB_301 0x01 | |
16 | #define HASVB_LVDS 0x02 | |
17 | #define HASVB_TRUMPION 0x04 | |
18 | #define HASVB_LVDS_CHRONTEL 0x10 | |
19 | #define HASVB_302 0x20 | |
a17379e7 | 20 | #define HASVB_CHRONTEL 0x80 |
d7636e0b | 21 | |
716083c6 | 22 | enum XGI_CHIP_TYPE { |
a17379e7 | 23 | XG40 = 32, |
a17379e7 | 24 | XG42, |
a17379e7 KT |
25 | XG20 = 48, |
26 | XG21, | |
27 | XG27, | |
716083c6 | 28 | }; |
d7636e0b | 29 | |
716083c6 | 30 | enum xgi_tvtype { |
d7636e0b | 31 | TVMODE_NTSC = 0, |
32 | TVMODE_PAL, | |
33 | TVMODE_HIVISION, | |
949eb0ae MG |
34 | TVTYPE_PALM, |
35 | TVTYPE_PALN, | |
36 | TVTYPE_NTSCJ, | |
d7636e0b | 37 | TVMODE_TOTAL |
716083c6 | 38 | }; |
d7636e0b | 39 | |
949eb0ae | 40 | enum xgi_tv_plug { |
a17379e7 KT |
41 | TVPLUG_UNKNOWN = 0, |
42 | TVPLUG_COMPOSITE = 1, | |
43 | TVPLUG_SVIDEO = 2, | |
44 | TVPLUG_COMPOSITE_AND_SVIDEO = 3, | |
45 | TVPLUG_SCART = 4, | |
46 | TVPLUG_YPBPR_525i = 5, | |
47 | TVPLUG_YPBPR_525P = 6, | |
48 | TVPLUG_YPBPR_750P = 7, | |
49 | TVPLUG_YPBPR_1080i = 8, | |
d7636e0b | 50 | TVPLUG_TOTAL |
a3e735a5 | 51 | }; |
d7636e0b | 52 | |
ab886ff8 | 53 | struct xgifb_video_info { |
19c1e88e | 54 | struct fb_info *fb_info; |
c62f2e46 | 55 | struct xgi_hw_device_info hw_info; |
f2df8c09 | 56 | struct vb_device_info dev_info; |
19c1e88e | 57 | |
ccf265ad | 58 | int mode_idx; |
5aa55d9f | 59 | int rate_idx; |
ccf265ad | 60 | |
76cabaa4 AK |
61 | u32 pseudo_palette[17]; |
62 | ||
a17379e7 KT |
63 | int chip_id; |
64 | unsigned int video_size; | |
f650caaa | 65 | phys_addr_t video_base; |
c44fa627 | 66 | void __iomem *video_vbase; |
f650caaa | 67 | phys_addr_t mmio_base; |
1b3909e5 | 68 | unsigned long mmio_size; |
863c02af | 69 | void __iomem *mmio_vbase; |
a17379e7 | 70 | unsigned long vga_base; |
8cedcc70 | 71 | int mtrr; |
a17379e7 KT |
72 | |
73 | int video_bpp; | |
74 | int video_cmap_len; | |
75 | int video_width; | |
76 | int video_height; | |
77 | int video_vwidth; | |
78 | int video_vheight; | |
79 | int org_x; | |
80 | int org_y; | |
81 | int video_linelength; | |
82 | unsigned int refresh_rate; | |
83 | ||
289ea524 | 84 | enum xgifb_display_type display2; /* the second display output type */ |
25aa75f1 | 85 | bool display2_force; |
a17379e7 KT |
86 | unsigned char hasVB; |
87 | unsigned char TV_type; | |
88 | unsigned char TV_plug; | |
d7636e0b | 89 | |
fab04b97 AK |
90 | struct XGI21_LVDSCapStruct lvds_data; |
91 | ||
716083c6 | 92 | enum XGI_CHIP_TYPE chip; |
a17379e7 | 93 | unsigned char revision_id; |
d7636e0b | 94 | |
a17379e7 KT |
95 | unsigned short DstColor; |
96 | unsigned long XGI310_AccelDepth; | |
97 | unsigned long CommandReg; | |
d7636e0b | 98 | |
a17379e7 KT |
99 | unsigned int pcibus; |
100 | unsigned int pcislot; | |
101 | unsigned int pcifunc; | |
d7636e0b | 102 | |
a17379e7 KT |
103 | unsigned short subsysvendor; |
104 | unsigned short subsysdevice; | |
d7636e0b | 105 | |
a17379e7 | 106 | char reserved[236]; |
d7636e0b | 107 | }; |
108 | ||
d7636e0b | 109 | #endif |