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rtc: ds1307: simplify irq setup code
[linux-2.6-block.git] / drivers / staging / xgifb / XGI_main_26.c
CommitLineData
d7636e0b 1/*
2 * XG20, XG21, XG40, XG42 frame buffer device
3 * for Linux kernels 2.5.x, 2.6.x
4 * Base on TW's sis fbdev code.
5 */
6
96c66042
SH		 7#define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
8
b654f878 9/* #include <linux/config.h> */
d7636e0b 10#include <linux/module.h>
11#include <linux/moduleparam.h>
12#include <linux/kernel.h>
13#include <linux/spinlock.h>
14#include <linux/errno.h>
15#include <linux/string.h>
16#include <linux/mm.h>
17#include <linux/tty.h>
18#include <linux/slab.h>
19#include <linux/delay.h>
20#include <linux/fb.h>
21#include <linux/console.h>
22#include <linux/selection.h>
23#include <linux/ioport.h>
24#include <linux/init.h>
25#include <linux/pci.h>
d7636e0b 26#include <linux/vt_kern.h>
27#include <linux/capability.h>
28#include <linux/fs.h>
29#include <linux/types.h>
30#include <linux/proc_fs.h>
d7636e0b 31
a12c27c5 32#include <linux/io.h>
d7636e0b 33#ifdef CONFIG_MTRR
34#include <asm/mtrr.h>
35#endif
36
37#include "XGIfb.h"
38#include "vgatypes.h"
39#include "XGI_main.h"
d542af50 40#include "vb_init.h"
d7636e0b 41#include "vb_util.h"
d542af50 42#include "vb_setmode.h"
d7636e0b 43
d7636e0b 44#define Index_CR_GPIO_Reg1 0x48
d7636e0b 45#define Index_CR_GPIO_Reg3 0x4a
46
47#define GPIOG_EN (1<<6)
d7636e0b 48#define GPIOG_READ (1<<1)
d7636e0b 49
2d2c880f 50static char *forcecrt2type;
dfbdf805 51static char *mode;
c3228308 52static int vesa = -1;
7548a83e 53static unsigned int refresh_rate;
dfbdf805 54
d7636e0b 55/* -------------------- Macro definitions ---------------------------- */
56
57#undef XGIFBDEBUG
58
59#ifdef XGIFBDEBUG
4a6b1518 60#define DPRINTK(fmt, args...) pr_debug("%s: " fmt, __func__ , ## args)
d7636e0b 61#else
62#define DPRINTK(fmt, args...)
63#endif
64
65#ifdef XGIFBDEBUG
66static void dumpVGAReg(void)
67{
b654f878
PS		 68 u8 i, reg;
69
b6e2dc39 70 xgifb_reg_set(XGISR, 0x05, 0x86);
b654f878 71 /*
b6e2dc39
AK		 72 xgifb_reg_set(XGISR, 0x08, 0x4f);
73 xgifb_reg_set(XGISR, 0x0f, 0x20);
74 xgifb_reg_set(XGISR, 0x11, 0x4f);
75 xgifb_reg_set(XGISR, 0x13, 0x45);
76 xgifb_reg_set(XGISR, 0x14, 0x51);
77 xgifb_reg_set(XGISR, 0x1e, 0x41);
78 xgifb_reg_set(XGISR, 0x1f, 0x0);
79 xgifb_reg_set(XGISR, 0x20, 0xa1);
80 xgifb_reg_set(XGISR, 0x22, 0xfb);
81 xgifb_reg_set(XGISR, 0x26, 0x22);
82 xgifb_reg_set(XGISR, 0x3e, 0x07);
b654f878
PS		 83 */
84
b6e2dc39
AK		 85 /* xgifb_reg_set(XGICR, 0x19, 0x00); */
86 /* xgifb_reg_set(XGICR, 0x1a, 0x3C); */
87 /* xgifb_reg_set(XGICR, 0x22, 0xff); */
88 /* xgifb_reg_set(XGICR, 0x3D, 0x10); */
b654f878 89
b6e2dc39 90 /* xgifb_reg_set(XGICR, 0x4a, 0xf3); */
b654f878 91
b6e2dc39
AK		 92 /* xgifb_reg_set(XGICR, 0x57, 0x0); */
93 /* xgifb_reg_set(XGICR, 0x7a, 0x2c); */
b654f878 94
b6e2dc39
AK		 95 /* xgifb_reg_set(XGICR, 0x82, 0xcc); */
96 /* xgifb_reg_set(XGICR, 0x8c, 0x0); */
b654f878 97 /*
b6e2dc39
AK		 98 xgifb_reg_set(XGICR, 0x99, 0x1);
99 xgifb_reg_set(XGICR, 0x41, 0x40);
b654f878
PS		 100 */
101
102 for (i = 0; i < 0x4f; i++) {
7e119b75 103 reg = xgifb_reg_get(XGISR, i);
b654f878
PS		 104 printk("\no 3c4 %x", i);
105 printk("\ni 3c5 => %x", reg);
106 }
107
108 for (i = 0; i < 0xF0; i++) {
7e119b75 109 reg = xgifb_reg_get(XGICR, i);
b654f878
PS		 110 printk("\no 3d4 %x", i);
111 printk("\ni 3d5 => %x", reg);
112 }
113 /*
b6e2dc39 114 xgifb_reg_set(XGIPART1,0x2F,1);
b654f878 115 for (i=1; i < 0x50; i++) {
7e119b75 116 reg = xgifb_reg_get(XGIPART1, i);
b654f878
PS		 117 printk("\no d004 %x", i);
118 printk("\ni d005 => %x", reg);
119 }
120
121 for (i=0; i < 0x50; i++) {
7e119b75 122 reg = xgifb_reg_get(XGIPART2, i);
b654f878
PS		 123 printk("\no d010 %x", i);
124 printk("\ni d011 => %x", reg);
125 }
126 for (i=0; i < 0x50; i++) {
7e119b75 127 reg = xgifb_reg_get(XGIPART3, i);
b654f878
PS		 128 printk("\no d012 %x",i);
129 printk("\ni d013 => %x",reg);
130 }
131 for (i=0; i < 0x50; i++) {
7e119b75 132 reg = xgifb_reg_get(XGIPART4, i);
b654f878
PS		 133 printk("\no d014 %x",i);
134 printk("\ni d015 => %x",reg);
135 }
136 */
d7636e0b 137}
138#else
b654f878
PS		 139static inline void dumpVGAReg(void)
140{
141}
d7636e0b 142#endif
143
d7636e0b 144#if 1
145#define DEBUGPRN(x)
146#else
4a6b1518 147#define DEBUGPRN(x) pr_info(x "\n");
d7636e0b 148#endif
149
d7636e0b 150/* --------------- Hardware Access Routines -------------------------- */
151
b654f878
PS		 152static int XGIfb_mode_rate_to_dclock(struct vb_device_info *XGI_Pr,
153 struct xgi_hw_device_info *HwDeviceExtension,
154 unsigned char modeno, unsigned char rateindex)
d7636e0b 155{
b654f878
PS		 156 unsigned short ModeNo = modeno;
157 unsigned short ModeIdIndex = 0, ClockIndex = 0;
158 unsigned short RefreshRateTableIndex = 0;
d7636e0b 159
b654f878
PS		 160 /* unsigned long temp = 0; */
161 int Clock;
b654f878 162 InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr);
d7636e0b 163
b654f878
PS		 164 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo,
165 ModeIdIndex, XGI_Pr);
d7636e0b 166
b654f878
PS		 167 /*
168 temp = XGI_SearchModeID(ModeNo , &ModeIdIndex, XGI_Pr) ;
169 if (!temp) {
170 printk(KERN_ERR "Could not find mode %x\n", ModeNo);
171 return 65000;
172 }
d7636e0b 173
b654f878
PS		 174 RefreshRateTableIndex = XGI_Pr->EModeIDTable[ModeIdIndex].REFindex;
175 RefreshRateTableIndex += (rateindex - 1);
d7636e0b 176
b654f878
PS		 177 */
178 ClockIndex = XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_CRTVCLK;
b654f878
PS		 179
180 Clock = XGI_Pr->VCLKData[ClockIndex].CLOCK * 1000;
d7636e0b 181
b654f878 182 return Clock;
d7636e0b 183}
184
b654f878
PS		 185static int XGIfb_mode_rate_to_ddata(struct vb_device_info *XGI_Pr,
186 struct xgi_hw_device_info *HwDeviceExtension,
187 unsigned char modeno, unsigned char rateindex,
188 u32 *left_margin, u32 *right_margin, u32 *upper_margin,
189 u32 *lower_margin, u32 *hsync_len, u32 *vsync_len, u32 *sync,
190 u32 *vmode)
d7636e0b 191{
b654f878
PS		 192 unsigned short ModeNo = modeno;
193 unsigned short ModeIdIndex = 0, index = 0;
194 unsigned short RefreshRateTableIndex = 0;
195
196 unsigned short VRE, VBE, VRS, VBS, VDE, VT;
197 unsigned short HRE, HBE, HRS, HBS, HDE, HT;
198 unsigned char sr_data, cr_data, cr_data2;
199 unsigned long cr_data3;
200 int A, B, C, D, E, F, temp, j;
b654f878
PS		 201 InitTo330Pointer(HwDeviceExtension->jChipType, XGI_Pr);
202 RefreshRateTableIndex = XGI_GetRatePtrCRT2(HwDeviceExtension, ModeNo,
203 ModeIdIndex, XGI_Pr);
204 /*
205 temp = XGI_SearchModeID(ModeNo, &ModeIdIndex, XGI_Pr);
206 if (!temp)
207 return 0;
d7636e0b 208
b654f878
PS		 209 RefreshRateTableIndex = XGI_Pr->EModeIDTable[ModeIdIndex].REFindex;
210 RefreshRateTableIndex += (rateindex - 1);
211 */
212 index = XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_CRT1CRTC;
d7636e0b 213
b654f878 214 sr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[5];
d7636e0b 215
b654f878 216 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[0];
d7636e0b 217
b654f878
PS		 218 /* Horizontal total */
219 HT = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x03) << 8);
220 A = HT + 5;
d7636e0b 221
b654f878
PS		 222 /*
223 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[1];
d7636e0b 224
b654f878
PS		 225 Horizontal display enable end
226 HDE = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x0C) << 6);
227 */
228 HDE = (XGI_Pr->RefIndex[RefreshRateTableIndex].XRes >> 3) - 1;
229 E = HDE + 1;
d7636e0b 230
b654f878 231 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[3];
d7636e0b 232
b654f878
PS		 233 /* Horizontal retrace (=sync) start */
234 HRS = (cr_data & 0xff) | ((unsigned short) (sr_data & 0xC0) << 2);
235 F = HRS - E - 3;
d7636e0b 236
b654f878 237 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[1];
d7636e0b 238
b654f878
PS		 239 /* Horizontal blank start */
240 HBS = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x30) << 4);
d7636e0b 241
b654f878 242 sr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[6];
d7636e0b 243
b654f878 244 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[2];
d7636e0b 245
b654f878 246 cr_data2 = XGI_Pr->XGINEWUB_CRT1Table[index].CR[4];
d7636e0b 247
b654f878
PS		 248 /* Horizontal blank end */
249 HBE = (cr_data & 0x1f) | ((unsigned short) (cr_data2 & 0x80) >> 2)
250 | ((unsigned short) (sr_data & 0x03) << 6);
d7636e0b 251
b654f878
PS		 252 /* Horizontal retrace (=sync) end */
253 HRE = (cr_data2 & 0x1f) | ((sr_data & 0x04) << 3);
d7636e0b 254
b654f878
PS		 255 temp = HBE - ((E - 1) & 255);
256 B = (temp > 0) ? temp : (temp + 256);
d7636e0b 257
b654f878
PS		 258 temp = HRE - ((E + F + 3) & 63);
259 C = (temp > 0) ? temp : (temp + 64);
d7636e0b 260
b654f878 261 D = B - F - C;
d7636e0b 262
b654f878
PS		 263 *left_margin = D * 8;
264 *right_margin = F * 8;
265 *hsync_len = C * 8;
d7636e0b 266
b654f878 267 sr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[14];
d7636e0b 268
b654f878 269 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[8];
d7636e0b 270
b654f878 271 cr_data2 = XGI_Pr->XGINEWUB_CRT1Table[index].CR[9];
d7636e0b 272
b654f878
PS		 273 /* Vertical total */
274 VT = (cr_data & 0xFF) | ((unsigned short) (cr_data2 & 0x01) << 8)
275 | ((unsigned short) (cr_data2 & 0x20) << 4)
276 | ((unsigned short) (sr_data & 0x01) << 10);
277 A = VT + 2;
d7636e0b 278
b654f878 279 /* cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[10]; */
d7636e0b 280
b654f878
PS		 281 /* Vertical display enable end */
282 /*
283 VDE = (cr_data & 0xff) |
284 ((unsigned short) (cr_data2 & 0x02) << 7) |
285 ((unsigned short) (cr_data2 & 0x40) << 3) |
286 ((unsigned short) (sr_data & 0x02) << 9);
287 */
288 VDE = XGI_Pr->RefIndex[RefreshRateTableIndex].YRes - 1;
289 E = VDE + 1;
d7636e0b 290
b654f878 291 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[10];
d7636e0b 292
b654f878
PS		 293 /* Vertical retrace (=sync) start */
294 VRS = (cr_data & 0xff) | ((unsigned short) (cr_data2 & 0x04) << 6)
295 | ((unsigned short) (cr_data2 & 0x80) << 2)
296 | ((unsigned short) (sr_data & 0x08) << 7);
297 F = VRS + 1 - E;
d7636e0b 298
b654f878 299 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[12];
d7636e0b 300
b654f878 301 cr_data3 = (XGI_Pr->XGINEWUB_CRT1Table[index].CR[14] & 0x80) << 5;
d7636e0b 302
b654f878
PS		 303 /* Vertical blank start */
304 VBS = (cr_data & 0xff) | ((unsigned short) (cr_data2 & 0x08) << 5)
305 | ((unsigned short) (cr_data3 & 0x20) << 4)
306 | ((unsigned short) (sr_data & 0x04) << 8);
d7636e0b 307
b654f878 308 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[13];
d7636e0b 309
b654f878
PS		 310 /* Vertical blank end */
311 VBE = (cr_data & 0xff) | ((unsigned short) (sr_data & 0x10) << 4);
312 temp = VBE - ((E - 1) & 511);
313 B = (temp > 0) ? temp : (temp + 512);
d7636e0b 314
b654f878 315 cr_data = XGI_Pr->XGINEWUB_CRT1Table[index].CR[11];
d7636e0b 316
b654f878
PS		 317 /* Vertical retrace (=sync) end */
318 VRE = (cr_data & 0x0f) | ((sr_data & 0x20) >> 1);
319 temp = VRE - ((E + F - 1) & 31);
320 C = (temp > 0) ? temp : (temp + 32);
d7636e0b 321
b654f878 322 D = B - F - C;
d7636e0b 323
b654f878
PS		 324 *upper_margin = D;
325 *lower_margin = F;
326 *vsync_len = C;
d7636e0b 327
b654f878
PS		 328 if (XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x8000)
329 *sync &= ~FB_SYNC_VERT_HIGH_ACT;
330 else
331 *sync |= FB_SYNC_VERT_HIGH_ACT;
d7636e0b 332
b654f878
PS		 333 if (XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x4000)
334 *sync &= ~FB_SYNC_HOR_HIGH_ACT;
335 else
336 *sync |= FB_SYNC_HOR_HIGH_ACT;
d7636e0b 337
b654f878
PS		 338 *vmode = FB_VMODE_NONINTERLACED;
339 if (XGI_Pr->RefIndex[RefreshRateTableIndex].Ext_InfoFlag & 0x0080)
340 *vmode = FB_VMODE_INTERLACED;
341 else {
342 j = 0;
343 while (XGI_Pr->EModeIDTable[j].Ext_ModeID != 0xff) {
a12c27c5
KT		 344 if (XGI_Pr->EModeIDTable[j].Ext_ModeID ==
345 XGI_Pr->RefIndex[RefreshRateTableIndex].ModeID) {
346 if (XGI_Pr->EModeIDTable[j].Ext_ModeFlag &
347 DoubleScanMode) {
b654f878
PS		 348 *vmode = FB_VMODE_DOUBLE;
349 }
350 break;
351 }
352 j++;
353 }
354 }
d7636e0b 355
b654f878
PS		 356 return 1;
357}
d7636e0b 358
8922967e 359static void XGIRegInit(struct vb_device_info *XGI_Pr, unsigned long BaseAddr)
d7636e0b 360{
b654f878
PS		 361 XGI_Pr->RelIO = BaseAddr;
362 XGI_Pr->P3c4 = BaseAddr + 0x14;
363 XGI_Pr->P3d4 = BaseAddr + 0x24;
364 XGI_Pr->P3c0 = BaseAddr + 0x10;
365 XGI_Pr->P3ce = BaseAddr + 0x1e;
366 XGI_Pr->P3c2 = BaseAddr + 0x12;
367 XGI_Pr->P3ca = BaseAddr + 0x1a;
368 XGI_Pr->P3c6 = BaseAddr + 0x16;
369 XGI_Pr->P3c7 = BaseAddr + 0x17;
370 XGI_Pr->P3c8 = BaseAddr + 0x18;
371 XGI_Pr->P3c9 = BaseAddr + 0x19;
372 XGI_Pr->P3da = BaseAddr + 0x2A;
a12c27c5 373 /* Digital video interface registers (LCD) */
6896b94e 374 XGI_Pr->Part1Port = BaseAddr + SIS_CRT2_PORT_04;
a12c27c5 375 /* 301 TV Encoder registers */
6896b94e 376 XGI_Pr->Part2Port = BaseAddr + SIS_CRT2_PORT_10;
a12c27c5 377 /* 301 Macrovision registers */
6896b94e 378 XGI_Pr->Part3Port = BaseAddr + SIS_CRT2_PORT_12;
a12c27c5 379 /* 301 VGA2 (and LCD) registers */
6896b94e 380 XGI_Pr->Part4Port = BaseAddr + SIS_CRT2_PORT_14;
a12c27c5 381 /* 301 palette address port registers */
6896b94e 382 XGI_Pr->Part5Port = BaseAddr + SIS_CRT2_PORT_14 + 2;
d7636e0b 383
384}
385
d7636e0b 386/* ------------------ Internal helper routines ----------------- */
387
fab04b97 388static int XGIfb_GetXG21DefaultLVDSModeIdx(struct xgifb_video_info *xgifb_info)
c4fa7dfe
AK		 389{
390
391 int found_mode = 0;
392 int XGIfb_mode_idx = 0;
393
394 found_mode = 0;
395 while ((XGIbios_mode[XGIfb_mode_idx].mode_no != 0)
396 && (XGIbios_mode[XGIfb_mode_idx].xres
fab04b97 397 <= xgifb_info->lvds_data.LVDSHDE)) {
c4fa7dfe 398 if ((XGIbios_mode[XGIfb_mode_idx].xres
fab04b97 399 == xgifb_info->lvds_data.LVDSHDE)
c4fa7dfe 400 && (XGIbios_mode[XGIfb_mode_idx].yres
fab04b97 401 == xgifb_info->lvds_data.LVDSVDE)
c4fa7dfe 402 && (XGIbios_mode[XGIfb_mode_idx].bpp == 8)) {
c4fa7dfe
AK		 403 found_mode = 1;
404 break;
405 }
406 XGIfb_mode_idx++;
407 }
408 if (!found_mode)
de736dbb 409 XGIfb_mode_idx = -1;
c4fa7dfe
AK		 410
411 return XGIfb_mode_idx;
412}
413
ccf265ad
AK		 414static void XGIfb_search_mode(struct xgifb_video_info *xgifb_info,
415 const char *name)
d7636e0b 416{
417 int i = 0, j = 0, l;
418
b654f878 419 while (XGIbios_mode[i].mode_no != 0) {
d7636e0b 420 l = min(strlen(name), strlen(XGIbios_mode[i].name));
421 if (!strncmp(name, XGIbios_mode[i].name, l)) {
ccf265ad 422 xgifb_info->mode_idx = i;
d7636e0b 423 j = 1;
424 break;
425 }
426 i++;
427 }
b654f878 428 if (!j)
4a6b1518 429 pr_info("Invalid mode '%s'\n", name);
d7636e0b 430}
431
ccf265ad
AK		 432static void XGIfb_search_vesamode(struct xgifb_video_info *xgifb_info,
433 unsigned int vesamode)
d7636e0b 434{
435 int i = 0, j = 0;
436
c3228308
AK		 437 if (vesamode == 0)
438 goto invalid;
d7636e0b 439
b654f878 440 vesamode &= 0x1dff; /* Clean VESA mode number from other flags */
d7636e0b 441
b654f878 442 while (XGIbios_mode[i].mode_no != 0) {
a12c27c5
KT		 443 if ((XGIbios_mode[i].vesa_mode_no_1 == vesamode) ||
444 (XGIbios_mode[i].vesa_mode_no_2 == vesamode)) {
ccf265ad 445 xgifb_info->mode_idx = i;
d7636e0b 446 j = 1;
447 break;
448 }
449 i++;
450 }
c3228308
AK		 451
452invalid:
b654f878 453 if (!j)
4a6b1518 454 pr_info("Invalid VESA mode 0x%x'\n", vesamode);
d7636e0b 455}
456
fd26d420 457static int XGIfb_validate_mode(struct xgifb_video_info *xgifb_info, int myindex)
d7636e0b 458{
b654f878 459 u16 xres, yres;
fd26d420 460 struct xgi_hw_device_info *hw_info = &xgifb_info->hw_info;
b654f878 461
fd26d420 462 if (xgifb_info->chip == XG21) {
289ea524 463 if (xgifb_info->display2 == XGIFB_DISP_LCD) {
fab04b97
AK		 464 xres = xgifb_info->lvds_data.LVDSHDE;
465 yres = xgifb_info->lvds_data.LVDSVDE;
b654f878
PS		 466 if (XGIbios_mode[myindex].xres > xres)
467 return -1;
468 if (XGIbios_mode[myindex].yres > yres)
469 return -1;
a12c27c5
KT		 470 if ((XGIbios_mode[myindex].xres < xres) &&
471 (XGIbios_mode[myindex].yres < yres)) {
b654f878
PS		 472 if (XGIbios_mode[myindex].bpp > 8)
473 return -1;
474 }
475
476 }
477 return myindex;
478
d7636e0b 479 }
b654f878
PS		 480
481 /* FIXME: for now, all is valid on XG27 */
fd26d420 482 if (xgifb_info->chip == XG27)
b654f878
PS		 483 return myindex;
484
485 if (!(XGIbios_mode[myindex].chipset & MD_XGI315))
486 return -1;
487
289ea524
AK		 488 switch (xgifb_info->display2) {
489 case XGIFB_DISP_LCD:
c62f2e46 490 switch (hw_info->ulCRT2LCDType) {
b654f878
PS		 491 case LCD_640x480:
492 xres = 640;
493 yres = 480;
d7636e0b 494 break;
b654f878
PS		 495 case LCD_800x600:
496 xres = 800;
497 yres = 600;
d7636e0b 498 break;
b654f878
PS		 499 case LCD_1024x600:
500 xres = 1024;
501 yres = 600;
d7636e0b 502 break;
b654f878
PS		 503 case LCD_1024x768:
504 xres = 1024;
505 yres = 768;
d7636e0b 506 break;
b654f878
PS		 507 case LCD_1152x768:
508 xres = 1152;
509 yres = 768;
d7636e0b 510 break;
b654f878
PS		 511 case LCD_1280x960:
512 xres = 1280;
513 yres = 960;
d7636e0b 514 break;
b654f878
PS		 515 case LCD_1280x768:
516 xres = 1280;
517 yres = 768;
d7636e0b 518 break;
b654f878
PS		 519 case LCD_1280x1024:
520 xres = 1280;
521 yres = 1024;
d7636e0b 522 break;
b654f878
PS		 523 case LCD_1400x1050:
524 xres = 1400;
525 yres = 1050;
d7636e0b 526 break;
b654f878
PS		 527 case LCD_1600x1200:
528 xres = 1600;
529 yres = 1200;
530 break;
b654f878
PS		 531 default:
532 xres = 0;
533 yres = 0;
534 break;
535 }
536 if (XGIbios_mode[myindex].xres > xres)
537 return -1;
538 if (XGIbios_mode[myindex].yres > yres)
539 return -1;
c62f2e46
AK		 540 if ((hw_info->ulExternalChip == 0x01) || /* LVDS */
541 (hw_info->ulExternalChip == 0x05)) { /* LVDS+Chrontel */
b654f878
PS		 542 switch (XGIbios_mode[myindex].xres) {
543 case 512:
544 if (XGIbios_mode[myindex].yres != 512)
545 return -1;
c62f2e46 546 if (hw_info->ulCRT2LCDType == LCD_1024x600)
b654f878
PS		 547 return -1;
548 break;
549 case 640:
550 if ((XGIbios_mode[myindex].yres != 400)
551 && (XGIbios_mode[myindex].yres
552 != 480))
553 return -1;
554 break;
555 case 800:
556 if (XGIbios_mode[myindex].yres != 600)
557 return -1;
558 break;
559 case 1024:
a12c27c5
KT		 560 if ((XGIbios_mode[myindex].yres != 600) &&
561 (XGIbios_mode[myindex].yres != 768))
b654f878 562 return -1;
a12c27c5 563 if ((XGIbios_mode[myindex].yres == 600) &&
c62f2e46 564 (hw_info->ulCRT2LCDType != LCD_1024x600))
b654f878
PS		 565 return -1;
566 break;
567 case 1152:
568 if ((XGIbios_mode[myindex].yres) != 768)
569 return -1;
c62f2e46 570 if (hw_info->ulCRT2LCDType != LCD_1152x768)
b654f878
PS		 571 return -1;
572 break;
573 case 1280:
a12c27c5
KT		 574 if ((XGIbios_mode[myindex].yres != 768) &&
575 (XGIbios_mode[myindex].yres != 1024))
b654f878 576 return -1;
a12c27c5 577 if ((XGIbios_mode[myindex].yres == 768) &&
c62f2e46 578 (hw_info->ulCRT2LCDType != LCD_1280x768))
b654f878
PS		 579 return -1;
580 break;
581 case 1400:
582 if (XGIbios_mode[myindex].yres != 1050)
583 return -1;
584 break;
585 case 1600:
586 if (XGIbios_mode[myindex].yres != 1200)
587 return -1;
588 break;
589 default:
590 return -1;
d7636e0b 591 }
b654f878
PS		 592 } else {
593 switch (XGIbios_mode[myindex].xres) {
594 case 512:
595 if (XGIbios_mode[myindex].yres != 512)
596 return -1;
597 break;
598 case 640:
a12c27c5
KT		 599 if ((XGIbios_mode[myindex].yres != 400) &&
600 (XGIbios_mode[myindex].yres != 480))
b654f878
PS		 601 return -1;
602 break;
603 case 800:
604 if (XGIbios_mode[myindex].yres != 600)
605 return -1;
606 break;
607 case 1024:
608 if (XGIbios_mode[myindex].yres != 768)
609 return -1;
610 break;
611 case 1280:
a12c27c5
KT		 612 if ((XGIbios_mode[myindex].yres != 960) &&
613 (XGIbios_mode[myindex].yres != 1024))
b654f878
PS		 614 return -1;
615 if (XGIbios_mode[myindex].yres == 960) {
c62f2e46 616 if (hw_info->ulCRT2LCDType ==
a12c27c5 617 LCD_1400x1050)
b654f878
PS		 618 return -1;
619 }
620 break;
621 case 1400:
622 if (XGIbios_mode[myindex].yres != 1050)
623 return -1;
624 break;
625 case 1600:
626 if (XGIbios_mode[myindex].yres != 1200)
627 return -1;
628 break;
629 default:
630 return -1;
d7636e0b 631 }
632 }
d7636e0b 633 break;
289ea524 634 case XGIFB_DISP_TV:
b654f878
PS		 635 switch (XGIbios_mode[myindex].xres) {
636 case 512:
637 case 640:
638 case 800:
639 break;
640 case 720:
fd26d420 641 if (xgifb_info->TV_type == TVMODE_NTSC) {
b654f878
PS		 642 if (XGIbios_mode[myindex].yres != 480)
643 return -1;
fd26d420 644 } else if (xgifb_info->TV_type == TVMODE_PAL) {
b654f878
PS		 645 if (XGIbios_mode[myindex].yres != 576)
646 return -1;
d7636e0b 647 }
b654f878 648 /* TW: LVDS/CHRONTEL does not support 720 */
fd26d420
AK		 649 if (xgifb_info->hasVB == HASVB_LVDS_CHRONTEL ||
650 xgifb_info->hasVB == HASVB_CHRONTEL) {
b654f878
PS		 651 return -1;
652 }
653 break;
654 case 1024:
fd26d420 655 if (xgifb_info->TV_type == TVMODE_NTSC) {
b654f878
PS		 656 if (XGIbios_mode[myindex].bpp == 32)
657 return -1;
658 }
b654f878
PS		 659 break;
660 default:
661 return -1;
d7636e0b 662 }
663 break;
289ea524 664 case XGIFB_DISP_CRT:
b654f878
PS		 665 if (XGIbios_mode[myindex].xres > 1280)
666 return -1;
667 break;
289ea524
AK		 668 case XGIFB_DISP_NONE:
669 break;
d7636e0b 670 }
b654f878 671 return myindex;
d7636e0b 672
673}
674
675static void XGIfb_search_crt2type(const char *name)
676{
677 int i = 0;
678
b654f878 679 if (name == NULL)
d7636e0b 680 return;
681
b654f878 682 while (XGI_crt2type[i].type_no != -1) {
d7636e0b 683 if (!strcmp(name, XGI_crt2type[i].name)) {
684 XGIfb_crt2type = XGI_crt2type[i].type_no;
685 XGIfb_tvplug = XGI_crt2type[i].tvplug_no;
686 break;
687 }
688 i++;
689 }
b654f878 690 if (XGIfb_crt2type < 0)
4a6b1518 691 pr_info("Invalid CRT2 type: %s\n", name);
d7636e0b 692}
693
fd26d420
AK		 694static u8 XGIfb_search_refresh_rate(struct xgifb_video_info *xgifb_info,
695 unsigned int rate)
d7636e0b 696{
697 u16 xres, yres;
698 int i = 0;
699
ccf265ad
AK		 700 xres = XGIbios_mode[xgifb_info->mode_idx].xres;
701 yres = XGIbios_mode[xgifb_info->mode_idx].yres;
d7636e0b 702
5aa55d9f 703 xgifb_info->rate_idx = 0;
d7636e0b 704 while ((XGIfb_vrate[i].idx != 0) && (XGIfb_vrate[i].xres <= xres)) {
a12c27c5
KT		 705 if ((XGIfb_vrate[i].xres == xres) &&
706 (XGIfb_vrate[i].yres == yres)) {
d7636e0b 707 if (XGIfb_vrate[i].refresh == rate) {
5aa55d9f 708 xgifb_info->rate_idx = XGIfb_vrate[i].idx;
d7636e0b 709 break;
710 } else if (XGIfb_vrate[i].refresh > rate) {
711 if ((XGIfb_vrate[i].refresh - rate) <= 3) {
712 DPRINTK("XGIfb: Adjusting rate from %d up to %d\n",
a12c27c5 713 rate, XGIfb_vrate[i].refresh);
5aa55d9f
AK		 714 xgifb_info->rate_idx =
715 XGIfb_vrate[i].idx;
fd26d420 716 xgifb_info->refresh_rate =
a12c27c5 717 XGIfb_vrate[i].refresh;
b654f878
PS		 718 } else if (((rate - XGIfb_vrate[i - 1].refresh)
719 <= 2) && (XGIfb_vrate[i].idx
720 != 1)) {
d7636e0b 721 DPRINTK("XGIfb: Adjusting rate from %d down to %d\n",
a12c27c5 722 rate, XGIfb_vrate[i-1].refresh);
5aa55d9f
AK		 723 xgifb_info->rate_idx =
724 XGIfb_vrate[i - 1].idx;
fd26d420 725 xgifb_info->refresh_rate =
a12c27c5 726 XGIfb_vrate[i - 1].refresh;
d7636e0b 727 }
728 break;
b654f878 729 } else if ((rate - XGIfb_vrate[i].refresh) <= 2) {
d7636e0b 730 DPRINTK("XGIfb: Adjusting rate from %d down to %d\n",
a12c27c5 731 rate, XGIfb_vrate[i].refresh);
5aa55d9f 732 xgifb_info->rate_idx = XGIfb_vrate[i].idx;
b654f878
PS		 733 break;
734 }
d7636e0b 735 }
736 i++;
737 }
5aa55d9f
AK		 738 if (xgifb_info->rate_idx > 0) {
739 return xgifb_info->rate_idx;
d7636e0b 740 } else {
4a6b1518 741 pr_info("Unsupported rate %d for %dx%d\n",
a12c27c5 742 rate, xres, yres);
d7636e0b 743 return 0;
744 }
745}
746
747static void XGIfb_search_tvstd(const char *name)
748{
749 int i = 0;
750
b654f878 751 if (name == NULL)
d7636e0b 752 return;
753
754 while (XGI_tvtype[i].type_no != -1) {
755 if (!strcmp(name, XGI_tvtype[i].name)) {
756 XGIfb_tvmode = XGI_tvtype[i].type_no;
757 break;
758 }
759 i++;
760 }
761}
762
d7636e0b 763/* ----------- FBDev related routines for all series ----------- */
764
fd26d420
AK		 765static void XGIfb_bpp_to_var(struct xgifb_video_info *xgifb_info,
766 struct fb_var_screeninfo *var)
d7636e0b 767{
b654f878
PS		 768 switch (var->bits_per_pixel) {
769 case 8:
770 var->red.offset = var->green.offset = var->blue.offset = 0;
d7636e0b 771 var->red.length = var->green.length = var->blue.length = 6;
fd26d420 772 xgifb_info->video_cmap_len = 256;
d7636e0b 773 break;
b654f878 774 case 16:
d7636e0b 775 var->red.offset = 11;
776 var->red.length = 5;
777 var->green.offset = 5;
778 var->green.length = 6;
779 var->blue.offset = 0;
780 var->blue.length = 5;
781 var->transp.offset = 0;
782 var->transp.length = 0;
fd26d420 783 xgifb_info->video_cmap_len = 16;
d7636e0b 784 break;
b654f878 785 case 32:
d7636e0b 786 var->red.offset = 16;
787 var->red.length = 8;
788 var->green.offset = 8;
789 var->green.length = 8;
790 var->blue.offset = 0;
791 var->blue.length = 8;
792 var->transp.offset = 24;
793 var->transp.length = 8;
fd26d420 794 xgifb_info->video_cmap_len = 16;
d7636e0b 795 break;
796 }
797}
798
c4fa7dfe 799/* --------------------- SetMode routines ------------------------- */
d7636e0b 800
fd26d420 801static void XGIfb_pre_setmode(struct xgifb_video_info *xgifb_info)
c4fa7dfe
AK		 802{
803 u8 cr30 = 0, cr31 = 0;
d7636e0b 804
c4fa7dfe
AK		 805 cr31 = xgifb_reg_get(XGICR, 0x31);
806 cr31 &= ~0x60;
d7636e0b 807
289ea524
AK		 808 switch (xgifb_info->display2) {
809 case XGIFB_DISP_CRT:
fc39dcb7
PH		 810 cr30 = (SIS_VB_OUTPUT_CRT2 | SIS_SIMULTANEOUS_VIEW_ENABLE);
811 cr31 |= SIS_DRIVER_MODE;
c4fa7dfe 812 break;
289ea524 813 case XGIFB_DISP_LCD:
fc39dcb7
PH		 814 cr30 = (SIS_VB_OUTPUT_LCD | SIS_SIMULTANEOUS_VIEW_ENABLE);
815 cr31 |= SIS_DRIVER_MODE;
c4fa7dfe 816 break;
289ea524 817 case XGIFB_DISP_TV:
fd26d420 818 if (xgifb_info->TV_type == TVMODE_HIVISION)
fc39dcb7
PH		 819 cr30 = (SIS_VB_OUTPUT_HIVISION
820 | SIS_SIMULTANEOUS_VIEW_ENABLE);
fd26d420 821 else if (xgifb_info->TV_plug == TVPLUG_SVIDEO)
fc39dcb7
PH		 822 cr30 = (SIS_VB_OUTPUT_SVIDEO
823 | SIS_SIMULTANEOUS_VIEW_ENABLE);
fd26d420 824 else if (xgifb_info->TV_plug == TVPLUG_COMPOSITE)
fc39dcb7
PH		 825 cr30 = (SIS_VB_OUTPUT_COMPOSITE
826 | SIS_SIMULTANEOUS_VIEW_ENABLE);
fd26d420 827 else if (xgifb_info->TV_plug == TVPLUG_SCART)
fc39dcb7
PH		 828 cr30 = (SIS_VB_OUTPUT_SCART
829 | SIS_SIMULTANEOUS_VIEW_ENABLE);
830 cr31 |= SIS_DRIVER_MODE;
d7636e0b 831
fd26d420 832 if (XGIfb_tvmode == 1 || xgifb_info->TV_type == TVMODE_PAL)
c4fa7dfe
AK		 833 cr31 |= 0x01;
834 else
835 cr31 &= ~0x01;
836 break;
837 default: /* disable CRT2 */
838 cr30 = 0x00;
fc39dcb7 839 cr31 |= (SIS_DRIVER_MODE | SIS_VB_OUTPUT_DISABLE);
d7636e0b 840 }
841
c4fa7dfe
AK		 842 xgifb_reg_set(XGICR, IND_XGI_SCRATCH_REG_CR30, cr30);
843 xgifb_reg_set(XGICR, IND_XGI_SCRATCH_REG_CR31, cr31);
5aa55d9f
AK		 844 xgifb_reg_set(XGICR, IND_XGI_SCRATCH_REG_CR33,
845 (xgifb_info->rate_idx & 0x0F));
c4fa7dfe 846}
d7636e0b 847
fd26d420 848static void XGIfb_post_setmode(struct xgifb_video_info *xgifb_info)
c4fa7dfe
AK		 849{
850 u8 reg;
851 unsigned char doit = 1;
852 /*
fc39dcb7 853 xgifb_reg_set(XGISR,IND_SIS_PASSWORD,SIS_PASSWORD);
c4fa7dfe
AK		 854 xgifb_reg_set(XGICR, 0x13, 0x00);
855 xgifb_reg_and_or(XGISR,0x0E, 0xF0, 0x01);
856 *test*
857 */
fd26d420 858 if (xgifb_info->video_bpp == 8) {
a12c27c5
KT		 859 /* TW: We can't switch off CRT1 on LVDS/Chrontel
860 * in 8bpp Modes */
fd26d420
AK		 861 if ((xgifb_info->hasVB == HASVB_LVDS) ||
862 (xgifb_info->hasVB == HASVB_LVDS_CHRONTEL)) {
c4fa7dfe
AK		 863 doit = 0;
864 }
a12c27c5
KT		 865 /* TW: We can't switch off CRT1 on 301B-DH
866 * in 8bpp Modes if using LCD */
289ea524 867 if (xgifb_info->display2 == XGIFB_DISP_LCD)
c4fa7dfe 868 doit = 0;
d7636e0b 869 }
870
c4fa7dfe 871 /* TW: We can't switch off CRT1 if bridge is in slave mode */
fd26d420 872 if (xgifb_info->hasVB != HASVB_NONE) {
c4fa7dfe 873 reg = xgifb_reg_get(XGIPART1, 0x00);
d7636e0b 874
c4fa7dfe
AK		 875 if ((reg & 0x50) == 0x10)
876 doit = 0;
d7636e0b 877
c4fa7dfe
AK		 878 } else {
879 XGIfb_crt1off = 0;
d7636e0b 880 }
881
c4fa7dfe
AK		 882 reg = xgifb_reg_get(XGICR, 0x17);
883 if ((XGIfb_crt1off) && (doit))
884 reg &= ~0x80;
d7636e0b 885 else
c4fa7dfe
AK		 886 reg |= 0x80;
887 xgifb_reg_set(XGICR, 0x17, reg);
d7636e0b 888
fc39dcb7 889 xgifb_reg_and(XGISR, IND_SIS_RAMDAC_CONTROL, ~0x04);
d7636e0b 890
289ea524
AK		 891 if (xgifb_info->display2 == XGIFB_DISP_TV &&
892 xgifb_info->hasVB == HASVB_301) {
d7636e0b 893
c4fa7dfe 894 reg = xgifb_reg_get(XGIPART4, 0x01);
d7636e0b 895
c4fa7dfe 896 if (reg < 0xB0) { /* Set filter for XGI301 */
84a6c46e
AK		 897 int filter_tb;
898
fd26d420 899 switch (xgifb_info->video_width) {
c4fa7dfe 900 case 320:
fd26d420 901 filter_tb = (xgifb_info->TV_type ==
a12c27c5 902 TVMODE_NTSC) ? 4 : 12;
c4fa7dfe
AK		 903 break;
904 case 640:
fd26d420 905 filter_tb = (xgifb_info->TV_type ==
a12c27c5 906 TVMODE_NTSC) ? 5 : 13;
c4fa7dfe
AK		 907 break;
908 case 720:
fd26d420 909 filter_tb = (xgifb_info->TV_type ==
a12c27c5 910 TVMODE_NTSC) ? 6 : 14;
c4fa7dfe
AK		 911 break;
912 case 800:
fd26d420 913 filter_tb = (xgifb_info->TV_type ==
a12c27c5 914 TVMODE_NTSC) ? 7 : 15;
c4fa7dfe
AK		 915 break;
916 default:
84a6c46e 917 filter_tb = 0;
c4fa7dfe
AK		 918 filter = -1;
919 break;
920 }
39f10bf1 921 xgifb_reg_or(XGIPART1,
fc39dcb7 922 SIS_CRT2_WENABLE_315,
39f10bf1 923 0x01);
d7636e0b 924
fd26d420 925 if (xgifb_info->TV_type == TVMODE_NTSC) {
d7636e0b 926
c4fa7dfe 927 xgifb_reg_and(XGIPART2, 0x3a, 0x1f);
d7636e0b 928
fd26d420 929 if (xgifb_info->TV_plug == TVPLUG_SVIDEO) {
c4fa7dfe
AK		 930
931 xgifb_reg_and(XGIPART2, 0x30, 0xdf);
932
fd26d420 933 } else if (xgifb_info->TV_plug
c4fa7dfe
AK		 934 == TVPLUG_COMPOSITE) {
935
936 xgifb_reg_or(XGIPART2, 0x30, 0x20);
937
fd26d420 938 switch (xgifb_info->video_width) {
c4fa7dfe 939 case 640:
a12c27c5
KT		 940 xgifb_reg_set(XGIPART2,
941 0x35,
942 0xEB);
943 xgifb_reg_set(XGIPART2,
944 0x36,
945 0x04);
946 xgifb_reg_set(XGIPART2,
947 0x37,
948 0x25);
949 xgifb_reg_set(XGIPART2,
950 0x38,
951 0x18);
c4fa7dfe
AK		 952 break;
953 case 720:
a12c27c5
KT		 954 xgifb_reg_set(XGIPART2,
955 0x35,
956 0xEE);
957 xgifb_reg_set(XGIPART2,
958 0x36,
959 0x0C);
960 xgifb_reg_set(XGIPART2,
961 0x37,
962 0x22);
963 xgifb_reg_set(XGIPART2,
964 0x38,
965 0x08);
c4fa7dfe
AK		 966 break;
967 case 800:
a12c27c5
KT		 968 xgifb_reg_set(XGIPART2,
969 0x35,
970 0xEB);
971 xgifb_reg_set(XGIPART2,
972 0x36,
973 0x15);
974 xgifb_reg_set(XGIPART2,
975 0x37,
976 0x25);
977 xgifb_reg_set(XGIPART2,
978 0x38,
979 0xF6);
c4fa7dfe
AK		 980 break;
981 }
982 }
983
fd26d420 984 } else if (xgifb_info->TV_type == TVMODE_PAL) {
c4fa7dfe
AK		 985
986 xgifb_reg_and(XGIPART2, 0x3A, 0x1F);
987
fd26d420 988 if (xgifb_info->TV_plug == TVPLUG_SVIDEO) {
c4fa7dfe
AK		 989
990 xgifb_reg_and(XGIPART2, 0x30, 0xDF);
991
fd26d420 992 } else if (xgifb_info->TV_plug
c4fa7dfe
AK		 993 == TVPLUG_COMPOSITE) {
994
995 xgifb_reg_or(XGIPART2, 0x30, 0x20);
996
fd26d420 997 switch (xgifb_info->video_width) {
c4fa7dfe 998 case 640:
a12c27c5
KT		 999 xgifb_reg_set(XGIPART2,
1000 0x35,
1001 0xF1);
1002 xgifb_reg_set(XGIPART2,
1003 0x36,
1004 0xF7);
1005 xgifb_reg_set(XGIPART2,
1006 0x37,
1007 0x1F);
1008 xgifb_reg_set(XGIPART2,
1009 0x38,
1010 0x32);
c4fa7dfe
AK		 1011 break;
1012 case 720:
a12c27c5
KT		 1013 xgifb_reg_set(XGIPART2,
1014 0x35,
1015 0xF3);
1016 xgifb_reg_set(XGIPART2,
1017 0x36,
1018 0x00);
1019 xgifb_reg_set(XGIPART2,
1020 0x37,
1021 0x1D);
1022 xgifb_reg_set(XGIPART2,
1023 0x38,
1024 0x20);
c4fa7dfe
AK		 1025 break;
1026 case 800:
a12c27c5
KT		 1027 xgifb_reg_set(XGIPART2,
1028 0x35,
1029 0xFC);
1030 xgifb_reg_set(XGIPART2,
1031 0x36,
1032 0xFB);
1033 xgifb_reg_set(XGIPART2,
1034 0x37,
1035 0x14);
1036 xgifb_reg_set(XGIPART2,
1037 0x38,
1038 0x2A);
c4fa7dfe
AK		 1039 break;
1040 }
1041 }
1042 }
1043
1044 if ((filter >= 0) && (filter <= 7)) {
a12c27c5
KT		 1045 DPRINTK("FilterTable[%d]-%d: %02x %02x %02x %02x\n",
1046 filter_tb, filter,
1047 XGI_TV_filter[filter_tb].
1048 filter[filter][0],
1049 XGI_TV_filter[filter_tb].
1050 filter[filter][1],
1051 XGI_TV_filter[filter_tb].
1052 filter[filter][2],
1053 XGI_TV_filter[filter_tb].
1054 filter[filter][3]
c4fa7dfe
AK		 1055 );
1056 xgifb_reg_set(
a12c27c5
KT		 1057 XGIPART2,
1058 0x35,
1059 (XGI_TV_filter[filter_tb].
1060 filter[filter][0]));
c4fa7dfe 1061 xgifb_reg_set(
a12c27c5
KT		 1062 XGIPART2,
1063 0x36,
1064 (XGI_TV_filter[filter_tb].
1065 filter[filter][1]));
c4fa7dfe 1066 xgifb_reg_set(
a12c27c5
KT		 1067 XGIPART2,
1068 0x37,
1069 (XGI_TV_filter[filter_tb].
1070 filter[filter][2]));
c4fa7dfe 1071 xgifb_reg_set(
a12c27c5
KT		 1072 XGIPART2,
1073 0x38,
1074 (XGI_TV_filter[filter_tb].
1075 filter[filter][3]));
c4fa7dfe 1076 }
c4fa7dfe 1077 }
c4fa7dfe 1078 }
c4fa7dfe
AK		 1079}
1080
1081static int XGIfb_do_set_var(struct fb_var_screeninfo *var, int isactive,
1082 struct fb_info *info)
1083{
fd26d420
AK		 1084 struct xgifb_video_info *xgifb_info = info->par;
1085 struct xgi_hw_device_info *hw_info = &xgifb_info->hw_info;
c4fa7dfe
AK		 1086 unsigned int htotal = var->left_margin + var->xres + var->right_margin
1087 + var->hsync_len;
1088 unsigned int vtotal = var->upper_margin + var->yres + var->lower_margin
1089 + var->vsync_len;
1090#if defined(__powerpc__)
1091 u8 sr_data, cr_data;
1092#endif
1093 unsigned int drate = 0, hrate = 0;
1094 int found_mode = 0;
1095 int old_mode;
1096 /* unsigned char reg, reg1; */
1097
1098 DEBUGPRN("Inside do_set_var");
1099 /* printk(KERN_DEBUG "XGIfb:var->yres=%d, var->upper_margin=%d, var->lower_margin=%d, var->vsync_len=%d\n", var->yres, var->upper_margin, var->lower_margin, var->vsync_len); */
1100
1101 info->var.xres_virtual = var->xres_virtual;
1102 info->var.yres_virtual = var->yres_virtual;
1103 info->var.bits_per_pixel = var->bits_per_pixel;
1104
1105 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED)
1106 vtotal <<= 1;
1107 else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE)
1108 vtotal <<= 2;
1109 else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
1110 /* vtotal <<= 1; */
1111 /* var->yres <<= 1; */
1112 }
1113
1114 if (!htotal || !vtotal) {
1115 DPRINTK("XGIfb: Invalid 'var' information\n");
1116 return -EINVAL;
4a6b1518 1117 } pr_debug("var->pixclock=%d, htotal=%d, vtotal=%d\n",
c4fa7dfe
AK		 1118 var->pixclock, htotal, vtotal);
1119
1120 if (var->pixclock && htotal && vtotal) {
1121 drate = 1000000000 / var->pixclock;
1122 hrate = (drate * 1000) / htotal;
fd26d420 1123 xgifb_info->refresh_rate = (unsigned int) (hrate * 2
c4fa7dfe
AK		 1124 / vtotal);
1125 } else {
fd26d420 1126 xgifb_info->refresh_rate = 60;
c4fa7dfe
AK		 1127 }
1128
4a6b1518 1129 pr_debug("Change mode to %dx%dx%d-%dHz\n",
a12c27c5
KT		 1130 var->xres,
1131 var->yres,
1132 var->bits_per_pixel,
fd26d420 1133 xgifb_info->refresh_rate);
c4fa7dfe 1134
ccf265ad
AK		 1135 old_mode = xgifb_info->mode_idx;
1136 xgifb_info->mode_idx = 0;
c4fa7dfe 1137
ccf265ad
AK		 1138 while ((XGIbios_mode[xgifb_info->mode_idx].mode_no != 0) &&
1139 (XGIbios_mode[xgifb_info->mode_idx].xres <= var->xres)) {
1140 if ((XGIbios_mode[xgifb_info->mode_idx].xres == var->xres) &&
1141 (XGIbios_mode[xgifb_info->mode_idx].yres == var->yres) &&
1142 (XGIbios_mode[xgifb_info->mode_idx].bpp
c4fa7dfe 1143 == var->bits_per_pixel)) {
c4fa7dfe
AK		 1144 found_mode = 1;
1145 break;
1146 }
ccf265ad 1147 xgifb_info->mode_idx++;
c4fa7dfe
AK		 1148 }
1149
1150 if (found_mode)
ccf265ad
AK		 1151 xgifb_info->mode_idx = XGIfb_validate_mode(xgifb_info,
1152 xgifb_info->mode_idx);
c4fa7dfe 1153 else
ccf265ad 1154 xgifb_info->mode_idx = -1;
c4fa7dfe 1155
ccf265ad 1156 if (xgifb_info->mode_idx < 0) {
4a6b1518 1157 pr_err("Mode %dx%dx%d not supported\n",
a12c27c5 1158 var->xres, var->yres, var->bits_per_pixel);
ccf265ad 1159 xgifb_info->mode_idx = old_mode;
c4fa7dfe
AK		 1160 return -EINVAL;
1161 }
1162
fd26d420
AK		 1163 if (XGIfb_search_refresh_rate(xgifb_info,
1164 xgifb_info->refresh_rate) == 0) {
5aa55d9f
AK		 1165 xgifb_info->rate_idx =
1166 XGIbios_mode[xgifb_info->mode_idx].rate_idx;
fd26d420 1167 xgifb_info->refresh_rate = 60;
c4fa7dfe
AK		 1168 }
1169
1170 if (isactive) {
1171
fd26d420 1172 XGIfb_pre_setmode(xgifb_info);
fab04b97 1173 if (XGISetModeNew(xgifb_info, hw_info,
ccf265ad
AK		 1174 XGIbios_mode[xgifb_info->mode_idx].mode_no)
1175 == 0) {
4a6b1518 1176 pr_err("Setting mode[0x%x] failed\n",
ccf265ad 1177 XGIbios_mode[xgifb_info->mode_idx].mode_no);
c4fa7dfe
AK		 1178 return -EINVAL;
1179 }
1180 info->fix.line_length = ((info->var.xres_virtual
1181 * info->var.bits_per_pixel) >> 6);
1182
fc39dcb7 1183 xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
c4fa7dfe
AK		 1184
1185 xgifb_reg_set(XGICR, 0x13, (info->fix.line_length & 0x00ff));
a12c27c5
KT		 1186 xgifb_reg_set(XGISR,
1187 0x0E,
1188 (info->fix.line_length & 0xff00) >> 8);
c4fa7dfe 1189
fd26d420 1190 XGIfb_post_setmode(xgifb_info);
c4fa7dfe
AK		 1191
1192 DPRINTK("XGIfb: Set new mode: %dx%dx%d-%d\n",
ccf265ad
AK		 1193 XGIbios_mode[xgifb_info->mode_idx].xres,
1194 XGIbios_mode[xgifb_info->mode_idx].yres,
1195 XGIbios_mode[xgifb_info->mode_idx].bpp,
fd26d420
AK		 1196 xgifb_info->refresh_rate);
1197
ccf265ad 1198 xgifb_info->video_bpp = XGIbios_mode[xgifb_info->mode_idx].bpp;
fd26d420 1199 xgifb_info->video_vwidth = info->var.xres_virtual;
ccf265ad
AK		 1200 xgifb_info->video_width =
1201 XGIbios_mode[xgifb_info->mode_idx].xres;
fd26d420 1202 xgifb_info->video_vheight = info->var.yres_virtual;
ccf265ad
AK		 1203 xgifb_info->video_height =
1204 XGIbios_mode[xgifb_info->mode_idx].yres;
fd26d420
AK		 1205 xgifb_info->org_x = xgifb_info->org_y = 0;
1206 xgifb_info->video_linelength = info->var.xres_virtual
1207 * (xgifb_info->video_bpp >> 3);
1208 switch (xgifb_info->video_bpp) {
c4fa7dfe 1209 case 8:
fd26d420
AK		 1210 xgifb_info->DstColor = 0x0000;
1211 xgifb_info->XGI310_AccelDepth = 0x00000000;
1212 xgifb_info->video_cmap_len = 256;
c4fa7dfe
AK		 1213#if defined(__powerpc__)
1214 cr_data = xgifb_reg_get(XGICR, 0x4D);
1215 xgifb_reg_set(XGICR, 0x4D, (cr_data & 0xE0));
1216#endif
1217 break;
1218 case 16:
fd26d420
AK		 1219 xgifb_info->DstColor = 0x8000;
1220 xgifb_info->XGI310_AccelDepth = 0x00010000;
d7636e0b 1221#if defined(__powerpc__)
7e119b75 1222 cr_data = xgifb_reg_get(XGICR, 0x4D);
b6e2dc39 1223 xgifb_reg_set(XGICR, 0x4D, ((cr_data & 0xE0) | 0x0B));
d7636e0b 1224#endif
fd26d420 1225 xgifb_info->video_cmap_len = 16;
b654f878
PS		 1226 break;
1227 case 32:
fd26d420
AK		 1228 xgifb_info->DstColor = 0xC000;
1229 xgifb_info->XGI310_AccelDepth = 0x00020000;
1230 xgifb_info->video_cmap_len = 16;
d7636e0b 1231#if defined(__powerpc__)
7e119b75 1232 cr_data = xgifb_reg_get(XGICR, 0x4D);
b6e2dc39 1233 xgifb_reg_set(XGICR, 0x4D, ((cr_data & 0xE0) | 0x15));
d7636e0b 1234#endif
b654f878
PS		 1235 break;
1236 default:
fd26d420 1237 xgifb_info->video_cmap_len = 16;
4a6b1518 1238 pr_err("Unsupported depth %d",
fd26d420 1239 xgifb_info->video_bpp);
b654f878
PS		 1240 break;
1241 }
d7636e0b 1242 }
fd26d420 1243 XGIfb_bpp_to_var(xgifb_info, var); /*update ARGB info*/
d7636e0b 1244 DEBUGPRN("End of do_set_var");
1245
1246 dumpVGAReg();
1247 return 0;
1248}
1249
0d5c6ca3 1250static int XGIfb_pan_var(struct fb_var_screeninfo *var, struct fb_info *info)
d7636e0b 1251{
acff987d 1252 struct xgifb_video_info *xgifb_info = info->par;
d7636e0b 1253 unsigned int base;
1254
b654f878 1255 /* printk("Inside pan_var"); */
d7636e0b 1256
0d5c6ca3 1257 base = var->yoffset * info->var.xres_virtual + var->xoffset;
d7636e0b 1258
b654f878 1259 /* calculate base bpp dep. */
0d5c6ca3 1260 switch (info->var.bits_per_pixel) {
b654f878
PS		 1261 case 16:
1262 base >>= 1;
1263 break;
d7636e0b 1264 case 32:
b654f878 1265 break;
d7636e0b 1266 case 8:
b654f878
PS		 1267 default:
1268 base >>= 2;
1269 break;
1270 }
d7636e0b 1271
fc39dcb7 1272 xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
d7636e0b 1273
b6e2dc39
AK		 1274 xgifb_reg_set(XGICR, 0x0D, base & 0xFF);
1275 xgifb_reg_set(XGICR, 0x0C, (base >> 8) & 0xFF);
1276 xgifb_reg_set(XGISR, 0x0D, (base >> 16) & 0xFF);
1277 xgifb_reg_set(XGISR, 0x37, (base >> 24) & 0x03);
65283d42 1278 xgifb_reg_and_or(XGISR, 0x37, 0xDF, (base >> 21) & 0x04);
d7636e0b 1279
289ea524 1280 if (xgifb_info->display2 != XGIFB_DISP_NONE) {
fc39dcb7 1281 xgifb_reg_or(XGIPART1, SIS_CRT2_WENABLE_315, 0x01);
b6e2dc39
AK		 1282 xgifb_reg_set(XGIPART1, 0x06, (base & 0xFF));
1283 xgifb_reg_set(XGIPART1, 0x05, ((base >> 8) & 0xFF));
1284 xgifb_reg_set(XGIPART1, 0x04, ((base >> 16) & 0xFF));
a12c27c5
KT		 1285 xgifb_reg_and_or(XGIPART1,
1286 0x02,
1287 0x7F,
1288 ((base >> 24) & 0x01) << 7);
b654f878
PS		 1289 }
1290 /* printk("End of pan_var"); */
d7636e0b 1291 return 0;
1292}
d7636e0b 1293
d7636e0b 1294static int XGIfb_open(struct fb_info *info, int user)
1295{
b654f878 1296 return 0;
d7636e0b 1297}
1298
1299static int XGIfb_release(struct fb_info *info, int user)
1300{
b654f878 1301 return 0;
d7636e0b 1302}
1303
1304static int XGIfb_get_cmap_len(const struct fb_var_screeninfo *var)
1305{
1306 int rc = 16;
1307
b654f878 1308 switch (var->bits_per_pixel) {
d7636e0b 1309 case 8:
1310 rc = 256;
1311 break;
1312 case 16:
1313 rc = 16;
1314 break;
1315 case 32:
1316 rc = 16;
1317 break;
1318 }
1319 return rc;
1320}
1321
b654f878
PS		 1322static int XGIfb_setcolreg(unsigned regno, unsigned red, unsigned green,
1323 unsigned blue, unsigned transp, struct fb_info *info)
d7636e0b 1324{
fd26d420
AK		 1325 struct xgifb_video_info *xgifb_info = info->par;
1326
d7636e0b 1327 if (regno >= XGIfb_get_cmap_len(&info->var))
1328 return 1;
1329
1330 switch (info->var.bits_per_pixel) {
1331 case 8:
e3d5ceb0
AK		 1332 outb(regno, XGIDACA);
1333 outb((red >> 10), XGIDACD);
1334 outb((green >> 10), XGIDACD);
1335 outb((blue >> 10), XGIDACD);
289ea524 1336 if (xgifb_info->display2 != XGIFB_DISP_NONE) {
e3d5ceb0
AK		 1337 outb(regno, XGIDAC2A);
1338 outb((red >> 8), XGIDAC2D);
1339 outb((green >> 8), XGIDAC2D);
1340 outb((blue >> 8), XGIDAC2D);
d7636e0b 1341 }
1342 break;
1343 case 16:
b654f878
PS		 1344 ((u32 *) (info->pseudo_palette))[regno] = ((red & 0xf800))
1345 | ((green & 0xfc00) >> 5) | ((blue & 0xf800)
1346 >> 11);
d7636e0b 1347 break;
1348 case 32:
1349 red >>= 8;
1350 green >>= 8;
1351 blue >>= 8;
b654f878
PS		 1352 ((u32 *) (info->pseudo_palette))[regno] = (red << 16) | (green
1353 << 8) | (blue);
d7636e0b 1354 break;
1355 }
1356 return 0;
1357}
1358
c4fa7dfe
AK		 1359/* ----------- FBDev related routines for all series ---------- */
1360
1361static int XGIfb_get_fix(struct fb_fix_screeninfo *fix, int con,
1362 struct fb_info *info)
1363{
fd26d420
AK		 1364 struct xgifb_video_info *xgifb_info = info->par;
1365
c4fa7dfe
AK		 1366 DEBUGPRN("inside get_fix");
1367 memset(fix, 0, sizeof(struct fb_fix_screeninfo));
1368
fd26d420 1369 fix->smem_start = xgifb_info->video_base;
c4fa7dfe 1370
fd26d420 1371 fix->smem_len = xgifb_info->video_size;
c4fa7dfe 1372
de351ba6 1373 fix->type = FB_TYPE_PACKED_PIXELS;
c4fa7dfe 1374 fix->type_aux = 0;
fd26d420 1375 if (xgifb_info->video_bpp == 8)
c4fa7dfe
AK		 1376 fix->visual = FB_VISUAL_PSEUDOCOLOR;
1377 else
1378 fix->visual = FB_VISUAL_DIRECTCOLOR;
1379 fix->xpanstep = 0;
c4fa7dfe
AK		 1380 if (XGIfb_ypan)
1381 fix->ypanstep = 1;
c4fa7dfe 1382 fix->ywrapstep = 0;
fd26d420
AK		 1383 fix->line_length = xgifb_info->video_linelength;
1384 fix->mmio_start = xgifb_info->mmio_base;
1385 fix->mmio_len = xgifb_info->mmio_size;
fc39dcb7 1386 fix->accel = FB_ACCEL_SIS_XABRE;
c4fa7dfe
AK		 1387
1388 DEBUGPRN("end of get_fix");
1389 return 0;
1390}
1391
d7636e0b 1392static int XGIfb_set_par(struct fb_info *info)
1393{
1394 int err;
1395
b654f878
PS		 1396 /* printk("XGIfb: inside set_par\n"); */
1397 err = XGIfb_do_set_var(&info->var, 1, info);
1398 if (err)
d7636e0b 1399 return err;
d7636e0b 1400 XGIfb_get_fix(&info->fix, -1, info);
b654f878 1401 /* printk("XGIfb: end of set_par\n"); */
d7636e0b 1402 return 0;
1403}
1404
b654f878 1405static int XGIfb_check_var(struct fb_var_screeninfo *var, struct fb_info *info)
d7636e0b 1406{
fd26d420 1407 struct xgifb_video_info *xgifb_info = info->par;
b654f878
PS		 1408 unsigned int htotal = var->left_margin + var->xres + var->right_margin
1409 + var->hsync_len;
d7636e0b 1410 unsigned int vtotal = 0;
1411 unsigned int drate = 0, hrate = 0;
1412 int found_mode = 0;
1413 int refresh_rate, search_idx;
1414
1415 DEBUGPRN("Inside check_var");
1416
b654f878
PS		 1417 if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_NONINTERLACED) {
1418 vtotal = var->upper_margin + var->yres + var->lower_margin
1419 + var->vsync_len;
d7636e0b 1420 vtotal <<= 1;
b654f878
PS		 1421 } else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_DOUBLE) {
1422 vtotal = var->upper_margin + var->yres + var->lower_margin
1423 + var->vsync_len;
d7636e0b 1424 vtotal <<= 2;
b654f878
PS		 1425 } else if ((var->vmode & FB_VMODE_MASK) == FB_VMODE_INTERLACED) {
1426 vtotal = var->upper_margin + (var->yres / 2)
1427 + var->lower_margin + var->vsync_len;
1428 } else
1429 vtotal = var->upper_margin + var->yres + var->lower_margin
1430 + var->vsync_len;
d7636e0b 1431
b654f878 1432 if (!(htotal) || !(vtotal))
d7636e0b 1433 XGIFAIL("XGIfb: no valid timing data");
d7636e0b 1434
b654f878
PS		 1435 if (var->pixclock && htotal && vtotal) {
1436 drate = 1000000000 / var->pixclock;
1437 hrate = (drate * 1000) / htotal;
fd26d420 1438 xgifb_info->refresh_rate =
a12c27c5 1439 (unsigned int) (hrate * 2 / vtotal);
4a6b1518 1440 pr_debug(
b654f878
PS		 1441 "%s: pixclock = %d ,htotal=%d, vtotal=%d\n"
1442 "%s: drate=%d, hrate=%d, refresh_rate=%d\n",
1443 __func__, var->pixclock, htotal, vtotal,
fd26d420 1444 __func__, drate, hrate, xgifb_info->refresh_rate);
b654f878 1445 } else {
fd26d420 1446 xgifb_info->refresh_rate = 60;
b654f878 1447 }
d7636e0b 1448
b654f878
PS		 1449 /*
1450 if ((var->pixclock) && (htotal)) {
1451 drate = 1E12 / var->pixclock;
1452 hrate = drate / htotal;
1453 refresh_rate = (unsigned int) (hrate / vtotal * 2 + 0.5);
1454 } else {
1455 refresh_rate = 60;
1456 }
1457 */
d7636e0b 1458 /* TW: Calculation wrong for 1024x600 - force it to 60Hz */
b654f878
PS		 1459 if ((var->xres == 1024) && (var->yres == 600))
1460 refresh_rate = 60;
d7636e0b 1461
1462 search_idx = 0;
b654f878
PS		 1463 while ((XGIbios_mode[search_idx].mode_no != 0) &&
1464 (XGIbios_mode[search_idx].xres <= var->xres)) {
1465 if ((XGIbios_mode[search_idx].xres == var->xres) &&
1466 (XGIbios_mode[search_idx].yres == var->yres) &&
1467 (XGIbios_mode[search_idx].bpp == var->bits_per_pixel)) {
fd26d420 1468 if (XGIfb_validate_mode(xgifb_info, search_idx) > 0) {
b654f878
PS		 1469 found_mode = 1;
1470 break;
1471 }
1472 }
d7636e0b 1473 search_idx++;
1474 }
1475
b654f878 1476 if (!found_mode) {
d7636e0b 1477
4a6b1518 1478 pr_err("%dx%dx%d is no valid mode\n",
d7636e0b 1479 var->xres, var->yres, var->bits_per_pixel);
b654f878
PS		 1480 search_idx = 0;
1481 while (XGIbios_mode[search_idx].mode_no != 0) {
b654f878 1482 if ((var->xres <= XGIbios_mode[search_idx].xres) &&
a12c27c5
KT		 1483 (var->yres <= XGIbios_mode[search_idx].yres) &&
1484 (var->bits_per_pixel ==
1485 XGIbios_mode[search_idx].bpp)) {
fd26d420
AK		 1486 if (XGIfb_validate_mode(xgifb_info,
1487 search_idx) > 0) {
b654f878
PS		 1488 found_mode = 1;
1489 break;
1490 }
1491 }
1492 search_idx++;
1493 }
1494 if (found_mode) {
d7636e0b 1495 var->xres = XGIbios_mode[search_idx].xres;
b654f878 1496 var->yres = XGIbios_mode[search_idx].yres;
4a6b1518 1497 pr_debug("Adapted to mode %dx%dx%d\n",
b654f878 1498 var->xres, var->yres, var->bits_per_pixel);
d7636e0b 1499
1500 } else {
4a6b1518 1501 pr_err("Failed to find similar mode to %dx%dx%d\n",
d7636e0b 1502 var->xres, var->yres, var->bits_per_pixel);
b654f878 1503 return -EINVAL;
d7636e0b 1504 }
1505 }
1506
1507 /* TW: TODO: Check the refresh rate */
1508
1509 /* Adapt RGB settings */
fd26d420 1510 XGIfb_bpp_to_var(xgifb_info, var);
d7636e0b 1511
1512 /* Sanity check for offsets */
1513 if (var->xoffset < 0)
1514 var->xoffset = 0;
1515 if (var->yoffset < 0)
1516 var->yoffset = 0;
1517
b654f878
PS		 1518 if (!XGIfb_ypan) {
1519 if (var->xres != var->xres_virtual)
1520 var->xres_virtual = var->xres;
1521 if (var->yres != var->yres_virtual)
d7636e0b 1522 var->yres_virtual = var->yres;
b654f878
PS		 1523 } /* else { */
1524 /* TW: Now patch yres_virtual if we use panning */
1525 /* May I do this? */
fd26d420 1526 /* var->yres_virtual = xgifb_info->heapstart /
a12c27c5 1527 (var->xres * (var->bits_per_pixel >> 3)); */
b654f878
PS		 1528 /* if (var->yres_virtual <= var->yres) { */
1529 /* TW: Paranoia check */
1530 /* var->yres_virtual = var->yres; */
1531 /* } */
1532 /* } */
d7636e0b 1533
1534 /* Truncate offsets to maximum if too high */
1535 if (var->xoffset > var->xres_virtual - var->xres)
1536 var->xoffset = var->xres_virtual - var->xres - 1;
1537
1538 if (var->yoffset > var->yres_virtual - var->yres)
1539 var->yoffset = var->yres_virtual - var->yres - 1;
1540
1541 /* Set everything else to 0 */
1542 var->red.msb_right =
b654f878
PS		 1543 var->green.msb_right =
1544 var->blue.msb_right =
1545 var->transp.offset = var->transp.length = var->transp.msb_right = 0;
d7636e0b 1546
1547 DEBUGPRN("end of check_var");
1548 return 0;
1549}
1550
b654f878
PS		 1551static int XGIfb_pan_display(struct fb_var_screeninfo *var,
1552 struct fb_info *info)
d7636e0b 1553{
1554 int err;
1555
b654f878 1556 /* printk("\nInside pan_display:\n"); */
d7636e0b 1557
0d5c6ca3 1558 if (var->xoffset > (info->var.xres_virtual - info->var.xres))
d7636e0b 1559 return -EINVAL;
0d5c6ca3 1560 if (var->yoffset > (info->var.yres_virtual - info->var.yres))
d7636e0b 1561 return -EINVAL;
1562
1563 if (var->vmode & FB_VMODE_YWRAP) {
b654f878
PS		 1564 if (var->yoffset < 0 || var->yoffset >= info->var.yres_virtual
1565 || var->xoffset)
1566 return -EINVAL;
d7636e0b 1567 } else {
b654f878
PS		 1568 if (var->xoffset + info->var.xres > info->var.xres_virtual
1569 || var->yoffset + info->var.yres
1570 > info->var.yres_virtual)
d7636e0b 1571 return -EINVAL;
1572 }
0d5c6ca3 1573 err = XGIfb_pan_var(var, info);
b654f878
PS		 1574 if (err < 0)
1575 return err;
d7636e0b 1576
1577 info->var.xoffset = var->xoffset;
1578 info->var.yoffset = var->yoffset;
1579 if (var->vmode & FB_VMODE_YWRAP)
1580 info->var.vmode |= FB_VMODE_YWRAP;
1581 else
1582 info->var.vmode &= ~FB_VMODE_YWRAP;
1583
b654f878 1584 /* printk("End of pan_display\n"); */
d7636e0b 1585 return 0;
1586}
d7636e0b 1587
d7636e0b 1588static int XGIfb_blank(int blank, struct fb_info *info)
1589{
f2df8c09 1590 struct xgifb_video_info *xgifb_info = info->par;
d7636e0b 1591 u8 reg;
1592
7e119b75 1593 reg = xgifb_reg_get(XGICR, 0x17);
d7636e0b 1594
b654f878 1595 if (blank > 0)
d7636e0b 1596 reg &= 0x7f;
1597 else
1598 reg |= 0x80;
1599
b6e2dc39
AK		 1600 xgifb_reg_set(XGICR, 0x17, reg);
1601 xgifb_reg_set(XGISR, 0x00, 0x01); /* Synchronous Reset */
1602 xgifb_reg_set(XGISR, 0x00, 0x03); /* End Reset */
b654f878 1603 return 0;
d7636e0b 1604}
1605
d7636e0b 1606static struct fb_ops XGIfb_ops = {
b654f878
PS		 1607 .owner = THIS_MODULE,
1608 .fb_open = XGIfb_open,
1609 .fb_release = XGIfb_release,
d7636e0b 1610 .fb_check_var = XGIfb_check_var,
b654f878 1611 .fb_set_par = XGIfb_set_par,
d7636e0b 1612 .fb_setcolreg = XGIfb_setcolreg,
b654f878 1613 .fb_pan_display = XGIfb_pan_display,
b654f878 1614 .fb_blank = XGIfb_blank,
1b402967 1615 .fb_fillrect = cfb_fillrect,
85c3c562 1616 .fb_copyarea = cfb_copyarea,
d7636e0b 1617 .fb_imageblit = cfb_imageblit,
b654f878 1618 /* .fb_mmap = XGIfb_mmap, */
d7636e0b 1619};
1620
1621/* ---------------- Chip generation dependent routines ---------------- */
1622
d7636e0b 1623/* for XGI 315/550/650/740/330 */
1624
fd26d420 1625static int XGIfb_get_dram_size(struct xgifb_video_info *xgifb_info)
d7636e0b 1626{
1627
b654f878
PS		 1628 u8 ChannelNum, tmp;
1629 u8 reg = 0;
d7636e0b 1630
1631 /* xorg driver sets 32MB * 1 channel */
fd26d420 1632 if (xgifb_info->chip == XG27)
fc39dcb7 1633 xgifb_reg_set(XGISR, IND_SIS_DRAM_SIZE, 0x51);
d7636e0b 1634
fc39dcb7 1635 reg = xgifb_reg_get(XGISR, IND_SIS_DRAM_SIZE);
b654f878
PS		 1636 switch ((reg & XGI_DRAM_SIZE_MASK) >> 4) {
1637 case XGI_DRAM_SIZE_1MB:
fd26d420 1638 xgifb_info->video_size = 0x100000;
b654f878
PS		 1639 break;
1640 case XGI_DRAM_SIZE_2MB:
fd26d420 1641 xgifb_info->video_size = 0x200000;
b654f878
PS		 1642 break;
1643 case XGI_DRAM_SIZE_4MB:
fd26d420 1644 xgifb_info->video_size = 0x400000;
b654f878
PS		 1645 break;
1646 case XGI_DRAM_SIZE_8MB:
fd26d420 1647 xgifb_info->video_size = 0x800000;
b654f878
PS		 1648 break;
1649 case XGI_DRAM_SIZE_16MB:
fd26d420 1650 xgifb_info->video_size = 0x1000000;
b654f878
PS		 1651 break;
1652 case XGI_DRAM_SIZE_32MB:
fd26d420 1653 xgifb_info->video_size = 0x2000000;
b654f878
PS		 1654 break;
1655 case XGI_DRAM_SIZE_64MB:
fd26d420 1656 xgifb_info->video_size = 0x4000000;
b654f878
PS		 1657 break;
1658 case XGI_DRAM_SIZE_128MB:
fd26d420 1659 xgifb_info->video_size = 0x8000000;
b654f878
PS		 1660 break;
1661 case XGI_DRAM_SIZE_256MB:
fd26d420 1662 xgifb_info->video_size = 0x10000000;
b654f878
PS		 1663 break;
1664 default:
1665 return -1;
1666 }
d7636e0b 1667
b654f878 1668 tmp = (reg & 0x0c) >> 2;
fd26d420 1669 switch (xgifb_info->chip) {
b654f878
PS		 1670 case XG20:
1671 case XG21:
1672 case XG27:
1673 ChannelNum = 1;
1674 break;
d7636e0b 1675
b654f878
PS		 1676 case XG42:
1677 if (reg & 0x04)
1678 ChannelNum = 2;
1679 else
1680 ChannelNum = 1;
1681 break;
d7636e0b 1682
b654f878
PS		 1683 case XG45:
1684 if (tmp == 1)
1685 ChannelNum = 2;
1686 else if (tmp == 2)
1687 ChannelNum = 3;
1688 else if (tmp == 3)
1689 ChannelNum = 4;
1690 else
1691 ChannelNum = 1;
1692 break;
d7636e0b 1693
b654f878
PS		 1694 case XG40:
1695 default:
1696 if (tmp == 2)
1697 ChannelNum = 2;
1698 else if (tmp == 3)
1699 ChannelNum = 3;
1700 else
1701 ChannelNum = 1;
1702 break;
1703 }
1704
fd26d420 1705 xgifb_info->video_size = xgifb_info->video_size * ChannelNum;
b654f878 1706 /* PLiad fixed for benchmarking and fb set */
fd26d420
AK		 1707 /* xgifb_info->video_size = 0x200000; */ /* 1024x768x16 */
1708 /* xgifb_info->video_size = 0x1000000; */ /* benchmark */
b654f878 1709
4a6b1518 1710 pr_info("SR14=%x DramSzie %x ChannelNum %x\n",
a12c27c5 1711 reg,
fd26d420 1712 xgifb_info->video_size, ChannelNum);
b654f878 1713 return 0;
d7636e0b 1714
1715}
1716
fd26d420 1717static void XGIfb_detect_VB(struct xgifb_video_info *xgifb_info)
d7636e0b 1718{
b654f878 1719 u8 cr32, temp = 0;
d7636e0b 1720
fd26d420 1721 xgifb_info->TV_plug = xgifb_info->TV_type = 0;
d7636e0b 1722
fd26d420 1723 switch (xgifb_info->hasVB) {
b654f878
PS		 1724 case HASVB_LVDS_CHRONTEL:
1725 case HASVB_CHRONTEL:
1726 break;
1727 case HASVB_301:
1728 case HASVB_302:
1729 /* XGI_Sense30x(); */ /* Yi-Lin TV Sense? */
1730 break;
d7636e0b 1731 }
1732
7e119b75 1733 cr32 = xgifb_reg_get(XGICR, IND_XGI_SCRATCH_REG_CR32);
d7636e0b 1734
fc39dcb7 1735 if ((cr32 & SIS_CRT1) && !XGIfb_crt1off)
d7636e0b 1736 XGIfb_crt1off = 0;
1737 else {
1738 if (cr32 & 0x5F)
1739 XGIfb_crt1off = 1;
1740 else
1741 XGIfb_crt1off = 0;
1742 }
1743
25aa75f1 1744 if (!xgifb_info->display2_force) {
fc39dcb7 1745 if (cr32 & SIS_VB_TV)
25aa75f1 1746 xgifb_info->display2 = XGIFB_DISP_TV;
fc39dcb7 1747 else if (cr32 & SIS_VB_LCD)
25aa75f1 1748 xgifb_info->display2 = XGIFB_DISP_LCD;
fc39dcb7 1749 else if (cr32 & SIS_VB_CRT2)
25aa75f1
AK		 1750 xgifb_info->display2 = XGIFB_DISP_CRT;
1751 else
1752 xgifb_info->display2 = XGIFB_DISP_NONE;
1753 }
d7636e0b 1754
b654f878 1755 if (XGIfb_tvplug != -1)
d7636e0b 1756 /* PR/TW: Override with option */
fd26d420 1757 xgifb_info->TV_plug = XGIfb_tvplug;
fc39dcb7 1758 else if (cr32 & SIS_VB_HIVISION) {
fd26d420
AK		 1759 xgifb_info->TV_type = TVMODE_HIVISION;
1760 xgifb_info->TV_plug = TVPLUG_SVIDEO;
fc39dcb7 1761 } else if (cr32 & SIS_VB_SVIDEO)
fd26d420 1762 xgifb_info->TV_plug = TVPLUG_SVIDEO;
fc39dcb7 1763 else if (cr32 & SIS_VB_COMPOSITE)
fd26d420 1764 xgifb_info->TV_plug = TVPLUG_COMPOSITE;
fc39dcb7 1765 else if (cr32 & SIS_VB_SCART)
fd26d420 1766 xgifb_info->TV_plug = TVPLUG_SCART;
d7636e0b 1767
fd26d420 1768 if (xgifb_info->TV_type == 0) {
7e119b75 1769 temp = xgifb_reg_get(XGICR, 0x38);
ebe7846d 1770 if (temp & 0x10)
fd26d420 1771 xgifb_info->TV_type = TVMODE_PAL;
ebe7846d 1772 else
fd26d420 1773 xgifb_info->TV_type = TVMODE_NTSC;
d7636e0b 1774 }
1775
1776 /* TW: Copy forceCRT1 option to CRT1off if option is given */
b654f878
PS		 1777 if (XGIfb_forcecrt1 != -1) {
1778 if (XGIfb_forcecrt1)
1779 XGIfb_crt1off = 0;
1780 else
1781 XGIfb_crt1off = 1;
1782 }
d7636e0b 1783}
1784
fd26d420 1785static int XGIfb_has_VB(struct xgifb_video_info *xgifb_info)
d7636e0b 1786{
1787 u8 vb_chipid;
1788
7e119b75 1789 vb_chipid = xgifb_reg_get(XGIPART4, 0x00);
d7636e0b 1790 switch (vb_chipid) {
b654f878 1791 case 0x01:
fd26d420 1792 xgifb_info->hasVB = HASVB_301;
d7636e0b 1793 break;
b654f878 1794 case 0x02:
fd26d420 1795 xgifb_info->hasVB = HASVB_302;
d7636e0b 1796 break;
b654f878 1797 default:
fd26d420 1798 xgifb_info->hasVB = HASVB_NONE;
dda08c59 1799 return 0;
d7636e0b 1800 }
dda08c59 1801 return 1;
d7636e0b 1802}
1803
fd26d420 1804static void XGIfb_get_VB_type(struct xgifb_video_info *xgifb_info)
c4fa7dfe
AK		 1805{
1806 u8 reg;
1807
fd26d420 1808 if (!XGIfb_has_VB(xgifb_info)) {
c4fa7dfe 1809 reg = xgifb_reg_get(XGICR, IND_XGI_SCRATCH_REG_CR37);
fc39dcb7
PH		 1810 switch ((reg & SIS_EXTERNAL_CHIP_MASK) >> 1) {
1811 case SIS_EXTERNAL_CHIP_LVDS:
fd26d420 1812 xgifb_info->hasVB = HASVB_LVDS;
c4fa7dfe 1813 break;
fc39dcb7 1814 case SIS_EXTERNAL_CHIP_LVDS_CHRONTEL:
fd26d420 1815 xgifb_info->hasVB = HASVB_LVDS_CHRONTEL;
c4fa7dfe
AK		 1816 break;
1817 default:
1818 break;
1819 }
1820 }
1821}
1822
d27c6bc9
AK		 1823static int __init xgifb_optval(char *fullopt, int validx)
1824{
1825 unsigned long lres;
1826
1827 if (kstrtoul(fullopt + validx, 0, &lres) < 0 || lres > INT_MAX) {
1828 pr_err("xgifb: invalid value for option: %s\n", fullopt);
1829 return 0;
1830 }
1831 return lres;
1832}
1833
032abf7b 1834static int __init XGIfb_setup(char *options)
d7636e0b 1835{
1836 char *this_opt;
1837
d7636e0b 1838 if (!options || !*options)
1839 return 0;
1840
79bea04c
AK		 1841 pr_info("xgifb: options: %s\n", options);
1842
b654f878 1843 while ((this_opt = strsep(&options, ",")) != NULL) {
d7636e0b 1844
b654f878
PS		 1845 if (!*this_opt)
1846 continue;
d7636e0b 1847
1848 if (!strncmp(this_opt, "mode:", 5)) {
dfbdf805 1849 mode = this_opt + 5;
d7636e0b 1850 } else if (!strncmp(this_opt, "vesa:", 5)) {
dfbdf805 1851 vesa = xgifb_optval(this_opt, 5);
d7636e0b 1852 } else if (!strncmp(this_opt, "vrate:", 6)) {
7548a83e 1853 refresh_rate = xgifb_optval(this_opt, 6);
d7636e0b 1854 } else if (!strncmp(this_opt, "rate:", 5)) {
7548a83e 1855 refresh_rate = xgifb_optval(this_opt, 5);
d7636e0b 1856 } else if (!strncmp(this_opt, "crt1off", 7)) {
1857 XGIfb_crt1off = 1;
1858 } else if (!strncmp(this_opt, "filter:", 7)) {
d27c6bc9 1859 filter = xgifb_optval(this_opt, 7);
d7636e0b 1860 } else if (!strncmp(this_opt, "forcecrt2type:", 14)) {
1861 XGIfb_search_crt2type(this_opt + 14);
1862 } else if (!strncmp(this_opt, "forcecrt1:", 10)) {
d27c6bc9 1863 XGIfb_forcecrt1 = xgifb_optval(this_opt, 10);
b654f878
PS		 1864 } else if (!strncmp(this_opt, "tvmode:", 7)) {
1865 XGIfb_search_tvstd(this_opt + 7);
1866 } else if (!strncmp(this_opt, "tvstandard:", 11)) {
d7636e0b 1867 XGIfb_search_tvstd(this_opt + 7);
b654f878 1868 } else if (!strncmp(this_opt, "dstn", 4)) {
d7636e0b 1869 enable_dstn = 1;
1870 /* TW: DSTN overrules forcecrt2type */
289ea524 1871 XGIfb_crt2type = XGIFB_DISP_LCD;
d7636e0b 1872 } else if (!strncmp(this_opt, "noypan", 6)) {
b654f878 1873 XGIfb_ypan = 0;
d7636e0b 1874 } else {
dfbdf805 1875 mode = this_opt;
d7636e0b 1876 }
d7636e0b 1877 }
d7636e0b 1878 return 0;
1879}
d7636e0b 1880
8922967e 1881static int __devinit xgifb_probe(struct pci_dev *pdev,
b654f878 1882 const struct pci_device_id *ent)
d7636e0b 1883{
b654f878
PS		 1884 u8 reg, reg1;
1885 u8 CR48, CR38;
bb292234 1886 int ret;
19c1e88e 1887 struct fb_info *fb_info;
fcbdda90
AK		 1888 struct xgifb_video_info *xgifb_info;
1889 struct xgi_hw_device_info *hw_info;
bb292234 1890
fcbdda90 1891 fb_info = framebuffer_alloc(sizeof(*xgifb_info), &pdev->dev);
b654f878
PS		 1892 if (!fb_info)
1893 return -ENOMEM;
1894
fcbdda90
AK		 1895 xgifb_info = fb_info->par;
1896 hw_info = &xgifb_info->hw_info;
fd26d420
AK		 1897 xgifb_info->fb_info = fb_info;
1898 xgifb_info->chip_id = pdev->device;
a12c27c5
KT		 1899 pci_read_config_byte(pdev,
1900 PCI_REVISION_ID,
fd26d420
AK		 1901 &xgifb_info->revision_id);
1902 hw_info->jChipRevision = xgifb_info->revision_id;
1903
1904 xgifb_info->pcibus = pdev->bus->number;
1905 xgifb_info->pcislot = PCI_SLOT(pdev->devfn);
1906 xgifb_info->pcifunc = PCI_FUNC(pdev->devfn);
1907 xgifb_info->subsysvendor = pdev->subsystem_vendor;
1908 xgifb_info->subsysdevice = pdev->subsystem_device;
1909
1910 xgifb_info->video_base = pci_resource_start(pdev, 0);
1911 xgifb_info->mmio_base = pci_resource_start(pdev, 1);
1912 xgifb_info->mmio_size = pci_resource_len(pdev, 1);
1913 xgifb_info->vga_base = pci_resource_start(pdev, 2) + 0x30;
1914 hw_info->pjIOAddress = (unsigned char *)xgifb_info->vga_base;
b654f878 1915 /* XGI_Pr.RelIO = ioremap(pci_resource_start(pdev, 2), 128) + 0x30; */
4a6b1518 1916 pr_info("Relocate IO address: %lx [%08lx]\n",
f2df8c09
AK		 1917 (unsigned long)pci_resource_start(pdev, 2),
1918 xgifb_info->dev_info.RelIO);
b654f878 1919
bb292234
AK		 1920 if (pci_enable_device(pdev)) {
1921 ret = -EIO;
1922 goto error;
1923 }
b654f878 1924
25aa75f1
AK		 1925 if (XGIfb_crt2type != -1) {
1926 xgifb_info->display2 = XGIfb_crt2type;
1927 xgifb_info->display2_force = true;
1928 }
1929
f2df8c09 1930 XGIRegInit(&xgifb_info->dev_info, (unsigned long)hw_info->pjIOAddress);
b654f878 1931
fc39dcb7
PH		 1932 xgifb_reg_set(XGISR, IND_SIS_PASSWORD, SIS_PASSWORD);
1933 reg1 = xgifb_reg_get(XGISR, IND_SIS_PASSWORD);
b654f878
PS		 1934
1935 if (reg1 != 0xa1) { /*I/O error */
4a6b1518 1936 pr_err("I/O error!!!");
bb292234
AK		 1937 ret = -EIO;
1938 goto error;
b654f878 1939 }
d7636e0b 1940
fd26d420 1941 switch (xgifb_info->chip_id) {
fc39dcb7 1942 case PCI_DEVICE_ID_XGI_20:
e67f4d4d 1943 xgifb_reg_or(XGICR, Index_CR_GPIO_Reg3, GPIOG_EN);
7e119b75 1944 CR48 = xgifb_reg_get(XGICR, Index_CR_GPIO_Reg1);
d7636e0b 1945 if (CR48&GPIOG_READ)
fd26d420 1946 xgifb_info->chip = XG21;
d7636e0b 1947 else
fd26d420 1948 xgifb_info->chip = XG20;
d7636e0b 1949 break;
fc39dcb7 1950 case PCI_DEVICE_ID_XGI_40:
fd26d420 1951 xgifb_info->chip = XG40;
d7636e0b 1952 break;
fc39dcb7 1953 case PCI_DEVICE_ID_XGI_41:
fd26d420 1954 xgifb_info->chip = XG41;
d7636e0b 1955 break;
fc39dcb7 1956 case PCI_DEVICE_ID_XGI_42:
fd26d420 1957 xgifb_info->chip = XG42;
d7636e0b 1958 break;
fc39dcb7 1959 case PCI_DEVICE_ID_XGI_27:
fd26d420 1960 xgifb_info->chip = XG27;
d7636e0b 1961 break;
b654f878 1962 default:
bb292234
AK		 1963 ret = -ENODEV;
1964 goto error;
d7636e0b 1965 }
1966
4a6b1518 1967 pr_info("chipid = %x\n", xgifb_info->chip);
fd26d420 1968 hw_info->jChipType = xgifb_info->chip;
d7636e0b 1969
fd26d420 1970 if (XGIfb_get_dram_size(xgifb_info)) {
4a6b1518 1971 pr_err("Fatal error: Unable to determine RAM size.\n");
bb292234
AK		 1972 ret = -ENODEV;
1973 goto error;
b654f878 1974 }
d7636e0b 1975
e1521a16
AK		 1976 /* Enable PCI_LINEAR_ADDRESSING and MMIO_ENABLE */
1977 xgifb_reg_or(XGISR,
fc39dcb7
PH		 1978 IND_SIS_PCI_ADDRESS_SET,
1979 (SIS_PCI_ADDR_ENABLE | SIS_MEM_MAP_IO_ENABLE));
e1521a16 1980 /* Enable 2D accelerator engine */
fc39dcb7 1981 xgifb_reg_or(XGISR, IND_SIS_MODULE_ENABLE, SIS_ENABLE_2D);
d7636e0b 1982
fd26d420 1983 hw_info->ulVideoMemorySize = xgifb_info->video_size;
d7636e0b 1984
fd26d420
AK		 1985 if (!request_mem_region(xgifb_info->video_base,
1986 xgifb_info->video_size,
a12c27c5 1987 "XGIfb FB")) {
4a6b1518 1988 pr_err("unable request memory size %x\n",
fd26d420 1989 xgifb_info->video_size);
4a6b1518
SH		 1990 pr_err("Fatal error: Unable to reserve frame buffer memory\n");
1991 pr_err("Is there another framebuffer driver active?\n");
bb292234
AK		 1992 ret = -ENODEV;
1993 goto error;
d7636e0b 1994 }
d7636e0b 1995
fd26d420
AK		 1996 if (!request_mem_region(xgifb_info->mmio_base,
1997 xgifb_info->mmio_size,
1b3909e5 1998 "XGIfb MMIO")) {
4a6b1518 1999 pr_err("Fatal error: Unable to reserve MMIO region\n");
bb292234 2000 ret = -ENODEV;
5c0ef2ac 2001 goto error_0;
b654f878 2002 }
d7636e0b 2003
fd26d420
AK		 2004 xgifb_info->video_vbase = hw_info->pjVideoMemoryAddress =
2005 ioremap(xgifb_info->video_base, xgifb_info->video_size);
2006 xgifb_info->mmio_vbase = ioremap(xgifb_info->mmio_base,
2007 xgifb_info->mmio_size);
d7636e0b 2008
4a6b1518 2009 pr_info("Framebuffer at 0x%lx, mapped to 0x%p, size %dk\n",
fd26d420
AK		 2010 xgifb_info->video_base,
2011 xgifb_info->video_vbase,
2012 xgifb_info->video_size / 1024);
d7636e0b 2013
4a6b1518 2014 pr_info("MMIO at 0x%lx, mapped to 0x%p, size %ldk\n",
fd26d420
AK		 2015 xgifb_info->mmio_base, xgifb_info->mmio_vbase,
2016 xgifb_info->mmio_size / 1024);
4a6b1518 2017
fcbdda90 2018 pci_set_drvdata(pdev, xgifb_info);
4a6b1518
SH		 2019 if (!XGIInitNew(pdev))
2020 pr_err("XGIInitNew() failed!\n");
b654f878 2021
fd26d420 2022 xgifb_info->mtrr = (unsigned int) 0;
b654f878 2023
fd26d420
AK		 2024 xgifb_info->hasVB = HASVB_NONE;
2025 if ((xgifb_info->chip == XG20) ||
2026 (xgifb_info->chip == XG27)) {
2027 xgifb_info->hasVB = HASVB_NONE;
2028 } else if (xgifb_info->chip == XG21) {
e1521a16 2029 CR38 = xgifb_reg_get(XGICR, 0x38);
cae9a7be 2030 if ((CR38&0xE0) == 0xC0)
289ea524 2031 xgifb_info->display2 = XGIFB_DISP_LCD;
cae9a7be 2032 else if ((CR38&0xE0) == 0x60)
fd26d420 2033 xgifb_info->hasVB = HASVB_CHRONTEL;
cae9a7be 2034 else
fd26d420 2035 xgifb_info->hasVB = HASVB_NONE;
e1521a16 2036 } else {
fd26d420 2037 XGIfb_get_VB_type(xgifb_info);
e1521a16 2038 }
d7636e0b 2039
c62f2e46 2040 hw_info->ujVBChipID = VB_CHIP_UNKNOWN;
d7636e0b 2041
c62f2e46 2042 hw_info->ulExternalChip = 0;
d7636e0b 2043
fd26d420 2044 switch (xgifb_info->hasVB) {
e1521a16
AK		 2045 case HASVB_301:
2046 reg = xgifb_reg_get(XGIPART4, 0x01);
2047 if (reg >= 0xE0) {
c62f2e46 2048 hw_info->ujVBChipID = VB_CHIP_302LV;
4a6b1518 2049 pr_info("XGI302LV bridge detected (revision 0x%02x)\n", reg);
e1521a16 2050 } else if (reg >= 0xD0) {
c62f2e46 2051 hw_info->ujVBChipID = VB_CHIP_301LV;
4a6b1518 2052 pr_info("XGI301LV bridge detected (revision 0x%02x)\n", reg);
d7636e0b 2053 }
e1521a16 2054 /* else if (reg >= 0xB0) {
c62f2e46 2055 hw_info->ujVBChipID = VB_CHIP_301B;
e1521a16
AK		 2056 reg1 = xgifb_reg_get(XGIPART4, 0x23);
2057 printk("XGIfb: XGI301B bridge detected\n");
2058 } */
2059 else {
c62f2e46 2060 hw_info->ujVBChipID = VB_CHIP_301;
4a6b1518 2061 pr_info("XGI301 bridge detected\n");
e1521a16
AK		 2062 }
2063 break;
2064 case HASVB_302:
2065 reg = xgifb_reg_get(XGIPART4, 0x01);
2066 if (reg >= 0xE0) {
c62f2e46 2067 hw_info->ujVBChipID = VB_CHIP_302LV;
4a6b1518 2068 pr_info("XGI302LV bridge detected (revision 0x%02x)\n", reg);
e1521a16 2069 } else if (reg >= 0xD0) {
c62f2e46 2070 hw_info->ujVBChipID = VB_CHIP_301LV;
4a6b1518 2071 pr_info("XGI302LV bridge detected (revision 0x%02x)\n", reg);
e1521a16
AK		 2072 } else if (reg >= 0xB0) {
2073 reg1 = xgifb_reg_get(XGIPART4, 0x23);
d7636e0b 2074
c62f2e46 2075 hw_info->ujVBChipID = VB_CHIP_302B;
d7636e0b 2076
d7636e0b 2077 } else {
c62f2e46 2078 hw_info->ujVBChipID = VB_CHIP_302;
4a6b1518 2079 pr_info("XGI302 bridge detected\n");
d7636e0b 2080 }
e1521a16
AK		 2081 break;
2082 case HASVB_LVDS:
c62f2e46 2083 hw_info->ulExternalChip = 0x1;
4a6b1518 2084 pr_info("LVDS transmitter detected\n");
e1521a16
AK		 2085 break;
2086 case HASVB_TRUMPION:
c62f2e46 2087 hw_info->ulExternalChip = 0x2;
4a6b1518 2088 pr_info("Trumpion Zurac LVDS scaler detected\n");
e1521a16
AK		 2089 break;
2090 case HASVB_CHRONTEL:
c62f2e46 2091 hw_info->ulExternalChip = 0x4;
4a6b1518 2092 pr_info("Chrontel TV encoder detected\n");
e1521a16
AK		 2093 break;
2094 case HASVB_LVDS_CHRONTEL:
c62f2e46 2095 hw_info->ulExternalChip = 0x5;
4a6b1518 2096 pr_info("LVDS transmitter and Chrontel TV encoder detected\n");
e1521a16
AK		 2097 break;
2098 default:
4a6b1518 2099 pr_info("No or unknown bridge type detected\n");
e1521a16
AK		 2100 break;
2101 }
d7636e0b 2102
fd26d420
AK		 2103 if (xgifb_info->hasVB != HASVB_NONE)
2104 XGIfb_detect_VB(xgifb_info);
25aa75f1
AK		 2105 else if (xgifb_info->chip != XG21)
2106 xgifb_info->display2 = XGIFB_DISP_NONE;
b654f878 2107
289ea524 2108 if (xgifb_info->display2 == XGIFB_DISP_LCD) {
e1521a16
AK		 2109 if (!enable_dstn) {
2110 reg = xgifb_reg_get(XGICR, IND_XGI_LCD_PANEL);
2111 reg &= 0x0f;
c62f2e46 2112 hw_info->ulCRT2LCDType = XGI310paneltype[reg];
d7636e0b 2113 }
e1521a16 2114 }
d7636e0b 2115
c62f2e46
AK		 2116 if ((hw_info->ujVBChipID == VB_CHIP_302B) ||
2117 (hw_info->ujVBChipID == VB_CHIP_301LV) ||
2118 (hw_info->ujVBChipID == VB_CHIP_302LV)) {
e1521a16
AK		 2119 int tmp;
2120 tmp = xgifb_reg_get(XGICR, 0x34);
2121 if (tmp <= 0x13) {
2122 /* Currently on LCDA?
2123 *(Some BIOSes leave CR38) */
2124 tmp = xgifb_reg_get(XGICR, 0x38);
2125 if ((tmp & 0x03) == 0x03) {
2126 /* XGI_Pr.XGI_UseLCDA = 1; */
2127 } else {
a12c27c5 2128 /* Currently on LCDA?
e1521a16
AK		 2129 *(Some newer BIOSes set D0 in CR35) */
2130 tmp = xgifb_reg_get(XGICR, 0x35);
2131 if (tmp & 0x01) {
b654f878
PS		 2132 /* XGI_Pr.XGI_UseLCDA = 1; */
2133 } else {
e1521a16
AK		 2134 tmp = xgifb_reg_get(XGICR,
2135 0x30);
2136 if (tmp & 0x20) {
2137 tmp = xgifb_reg_get(
2138 XGIPART1, 0x13);
b654f878
PS		 2139 }
2140 }
2141 }
b654f878 2142 }
d7636e0b 2143
e1521a16 2144 }
d7636e0b 2145
ccf265ad
AK		 2146 xgifb_info->mode_idx = -1;
2147
dfbdf805 2148 if (mode)
ccf265ad 2149 XGIfb_search_mode(xgifb_info, mode);
dfbdf805 2150 else if (vesa != -1)
ccf265ad 2151 XGIfb_search_vesamode(xgifb_info, vesa);
dfbdf805 2152
ccf265ad
AK		 2153 if (xgifb_info->mode_idx >= 0)
2154 xgifb_info->mode_idx =
2155 XGIfb_validate_mode(xgifb_info, xgifb_info->mode_idx);
d7636e0b 2156
ccf265ad 2157 if (xgifb_info->mode_idx < 0) {
289ea524 2158 if (xgifb_info->display2 == XGIFB_DISP_LCD &&
fd26d420 2159 xgifb_info->chip == XG21)
ccf265ad 2160 xgifb_info->mode_idx =
fab04b97 2161 XGIfb_GetXG21DefaultLVDSModeIdx(xgifb_info);
c8bec1f0 2162 else
ccf265ad 2163 xgifb_info->mode_idx = DEFAULT_MODE;
e1521a16 2164 }
d7636e0b 2165
ccf265ad 2166 if (xgifb_info->mode_idx < 0) {
de736dbb
AK		 2167 dev_err(&pdev->dev, "no supported video mode found\n");
2168 goto error_1;
2169 }
2170
e1521a16 2171 /* yilin set default refresh rate */
fd26d420
AK		 2172 xgifb_info->refresh_rate = refresh_rate;
2173 if (xgifb_info->refresh_rate == 0)
2174 xgifb_info->refresh_rate = 60;
2175 if (XGIfb_search_refresh_rate(xgifb_info,
2176 xgifb_info->refresh_rate) == 0) {
5aa55d9f
AK		 2177 xgifb_info->rate_idx =
2178 XGIbios_mode[xgifb_info->mode_idx].rate_idx;
fd26d420 2179 xgifb_info->refresh_rate = 60;
e1521a16
AK		 2180 }
2181
ccf265ad 2182 xgifb_info->video_bpp = XGIbios_mode[xgifb_info->mode_idx].bpp;
fd26d420
AK		 2183 xgifb_info->video_vwidth =
2184 xgifb_info->video_width =
ccf265ad 2185 XGIbios_mode[xgifb_info->mode_idx].xres;
fd26d420
AK		 2186 xgifb_info->video_vheight =
2187 xgifb_info->video_height =
ccf265ad 2188 XGIbios_mode[xgifb_info->mode_idx].yres;
fd26d420
AK		 2189 xgifb_info->org_x = xgifb_info->org_y = 0;
2190 xgifb_info->video_linelength =
2191 xgifb_info->video_width *
2192 (xgifb_info->video_bpp >> 3);
2193 switch (xgifb_info->video_bpp) {
e1521a16 2194 case 8:
fd26d420
AK		 2195 xgifb_info->DstColor = 0x0000;
2196 xgifb_info->XGI310_AccelDepth = 0x00000000;
2197 xgifb_info->video_cmap_len = 256;
e1521a16
AK		 2198 break;
2199 case 16:
fd26d420
AK		 2200 xgifb_info->DstColor = 0x8000;
2201 xgifb_info->XGI310_AccelDepth = 0x00010000;
2202 xgifb_info->video_cmap_len = 16;
e1521a16
AK		 2203 break;
2204 case 32:
fd26d420
AK		 2205 xgifb_info->DstColor = 0xC000;
2206 xgifb_info->XGI310_AccelDepth = 0x00020000;
2207 xgifb_info->video_cmap_len = 16;
e1521a16
AK		 2208 break;
2209 default:
fd26d420 2210 xgifb_info->video_cmap_len = 16;
4a6b1518 2211 pr_info("Unsupported depth %d\n",
fd26d420 2212 xgifb_info->video_bpp);
e1521a16
AK		 2213 break;
2214 }
2215
4a6b1518 2216 pr_info("Default mode is %dx%dx%d (%dHz)\n",
fd26d420
AK		 2217 xgifb_info->video_width,
2218 xgifb_info->video_height,
2219 xgifb_info->video_bpp,
2220 xgifb_info->refresh_rate);
e1521a16 2221
e9865d47
AK		 2222 fb_info->var.red.length = 8;
2223 fb_info->var.green.length = 8;
2224 fb_info->var.blue.length = 8;
2225 fb_info->var.activate = FB_ACTIVATE_NOW;
2226 fb_info->var.height = -1;
2227 fb_info->var.width = -1;
2228 fb_info->var.vmode = FB_VMODE_NONINTERLACED;
2229 fb_info->var.xres = xgifb_info->video_width;
2230 fb_info->var.xres_virtual = xgifb_info->video_width;
2231 fb_info->var.yres = xgifb_info->video_height;
2232 fb_info->var.yres_virtual = xgifb_info->video_height;
2233 fb_info->var.bits_per_pixel = xgifb_info->video_bpp;
2234
2235 XGIfb_bpp_to_var(xgifb_info, &fb_info->var);
2236
2237 fb_info->var.pixclock = (u32) (1000000000 /
f2df8c09
AK		 2238 XGIfb_mode_rate_to_dclock(&xgifb_info->dev_info,
2239 hw_info,
ccf265ad 2240 XGIbios_mode[xgifb_info->mode_idx].mode_no,
5aa55d9f 2241 xgifb_info->rate_idx));
e1521a16 2242
f2df8c09 2243 if (XGIfb_mode_rate_to_ddata(&xgifb_info->dev_info, hw_info,
5aa55d9f
AK		 2244 XGIbios_mode[xgifb_info->mode_idx].mode_no,
2245 xgifb_info->rate_idx,
e9865d47
AK		 2246 &fb_info->var.left_margin,
2247 &fb_info->var.right_margin,
2248 &fb_info->var.upper_margin,
2249 &fb_info->var.lower_margin,
2250 &fb_info->var.hsync_len,
2251 &fb_info->var.vsync_len,
2252 &fb_info->var.sync,
2253 &fb_info->var.vmode)) {
2254
2255 if ((fb_info->var.vmode & FB_VMODE_MASK) ==
e1521a16 2256 FB_VMODE_INTERLACED) {
e9865d47
AK		 2257 fb_info->var.yres <<= 1;
2258 fb_info->var.yres_virtual <<= 1;
2259 } else if ((fb_info->var.vmode & FB_VMODE_MASK) ==
e1521a16 2260 FB_VMODE_DOUBLE) {
e9865d47
AK		 2261 fb_info->var.pixclock >>= 1;
2262 fb_info->var.yres >>= 1;
2263 fb_info->var.yres_virtual >>= 1;
b654f878 2264 }
d7636e0b 2265
e1521a16
AK		 2266 }
2267
c11d0ef3
AK		 2268 strncpy(fb_info->fix.id, "XGI", sizeof(fb_info->fix.id) - 1);
2269 fb_info->fix.type = FB_TYPE_PACKED_PIXELS;
2270 fb_info->fix.xpanstep = 1;
2271 fb_info->fix.ypanstep = 1;
2272
e1521a16 2273 fb_info->flags = FBINFO_FLAG_DEFAULT;
fd26d420 2274 fb_info->screen_base = xgifb_info->video_vbase;
e1521a16
AK		 2275 fb_info->fbops = &XGIfb_ops;
2276 XGIfb_get_fix(&fb_info->fix, -1, fb_info);
76cabaa4 2277 fb_info->pseudo_palette = xgifb_info->pseudo_palette;
d7636e0b 2278
e1521a16 2279 fb_alloc_cmap(&fb_info->cmap, 256 , 0);
d7636e0b 2280
d7636e0b 2281#ifdef CONFIG_MTRR
fd26d420
AK		 2282 xgifb_info->mtrr = mtrr_add(xgifb_info->video_base,
2283 xgifb_info->video_size, MTRR_TYPE_WRCOMB, 1);
2284 if (xgifb_info->mtrr >= 0)
15ebe6c6 2285 dev_info(&pdev->dev, "added MTRR\n");
d7636e0b 2286#endif
2287
e1521a16
AK		 2288 if (register_framebuffer(fb_info) < 0) {
2289 ret = -EINVAL;
3028474c 2290 goto error_mtrr;
e1521a16 2291 }
d7636e0b 2292
d7636e0b 2293 dumpVGAReg();
2294
2295 return 0;
bb292234 2296
3028474c
AK		 2297error_mtrr:
2298#ifdef CONFIG_MTRR
fd26d420
AK		 2299 if (xgifb_info->mtrr >= 0)
2300 mtrr_del(xgifb_info->mtrr, xgifb_info->video_base,
2301 xgifb_info->video_size);
3028474c 2302#endif /* CONFIG_MTRR */
5c0ef2ac 2303error_1:
fd26d420
AK		 2304 iounmap(xgifb_info->mmio_vbase);
2305 iounmap(xgifb_info->video_vbase);
2306 release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size);
5c0ef2ac 2307error_0:
fd26d420 2308 release_mem_region(xgifb_info->video_base, xgifb_info->video_size);
bb292234
AK		 2309error:
2310 framebuffer_release(fb_info);
2311 return ret;
d7636e0b 2312}
2313
d7636e0b 2314/*****************************************************/
2315/* PCI DEVICE HANDLING */
2316/*****************************************************/
2317
2318static void __devexit xgifb_remove(struct pci_dev *pdev)
2319{
ab886ff8 2320 struct xgifb_video_info *xgifb_info = pci_get_drvdata(pdev);
19c1e88e 2321 struct fb_info *fb_info = xgifb_info->fb_info;
54301b5c 2322
b654f878 2323 unregister_framebuffer(fb_info);
3028474c 2324#ifdef CONFIG_MTRR
54301b5c
AK		 2325 if (xgifb_info->mtrr >= 0)
2326 mtrr_del(xgifb_info->mtrr, xgifb_info->video_base,
2327 xgifb_info->video_size);
3028474c 2328#endif /* CONFIG_MTRR */
54301b5c
AK		 2329 iounmap(xgifb_info->mmio_vbase);
2330 iounmap(xgifb_info->video_vbase);
2331 release_mem_region(xgifb_info->mmio_base, xgifb_info->mmio_size);
2332 release_mem_region(xgifb_info->video_base, xgifb_info->video_size);
b654f878 2333 framebuffer_release(fb_info);
d7636e0b 2334 pci_set_drvdata(pdev, NULL);
45dcfaf1 2335}
d7636e0b 2336
2337static struct pci_driver xgifb_driver = {
b654f878
PS		 2338 .name = "xgifb",
2339 .id_table = xgifb_pci_table,
2340 .probe = xgifb_probe,
2341 .remove = __devexit_p(xgifb_remove)
d7636e0b 2342};
2343
032abf7b 2344static int __init xgifb_init(void)
d7636e0b 2345{
d7636e0b 2346 char *option = NULL;
2347
2d2c880f
AK		 2348 if (forcecrt2type != NULL)
2349 XGIfb_search_crt2type(forcecrt2type);
d7636e0b 2350 if (fb_get_options("xgifb", &option))
2351 return -ENODEV;
2352 XGIfb_setup(option);
328f55ba 2353
b654f878 2354 return pci_register_driver(&xgifb_driver);
d7636e0b 2355}
2356
d7636e0b 2357module_init(xgifb_init);
d7636e0b 2358
2359/*****************************************************/
2360/* MODULE */
2361/*****************************************************/
2362
2363#ifdef MODULE
2364
d7636e0b 2365MODULE_DESCRIPTION("Z7 Z9 Z9S Z11 framebuffer device driver");
2366MODULE_LICENSE("GPL");
2367MODULE_AUTHOR("XGITECH , Others");
2368
d7636e0b 2369module_param(mode, charp, 0);
2370module_param(vesa, int, 0);
d7636e0b 2371module_param(filter, int, 0);
2d2c880f
AK		 2372module_param(forcecrt2type, charp, 0);
2373
2374MODULE_PARM_DESC(forcecrt2type,
2375 "\nForce the second display output type. Possible values are NONE,\n"
2376 "LCD, TV, VGA, SVIDEO or COMPOSITE.\n");
d7636e0b 2377
d7636e0b 2378MODULE_PARM_DESC(mode,
47c92d5f
AK		 2379 "\nSelects the desired default display mode in the format XxYxDepth,\n"
2380 "eg. 1024x768x16.\n");
d7636e0b 2381
2382MODULE_PARM_DESC(vesa,
47c92d5f
AK		 2383 "\nSelects the desired default display mode by VESA mode number, eg.\n"
2384 "0x117.\n");
d7636e0b 2385
d7636e0b 2386MODULE_PARM_DESC(filter,
b654f878
PS		 2387 "\nSelects TV flicker filter type (only for systems with a SiS301 video bridge).\n"
2388 "(Possible values 0-7, default: [no filter])\n");
d7636e0b 2389
d7636e0b 2390static void __exit xgifb_remove_module(void)
2391{
2392 pci_unregister_driver(&xgifb_driver);
4a6b1518 2393 pr_debug("Module unloaded\n");
d7636e0b 2394}
2395
d7636e0b 2396module_exit(xgifb_remove_module);
2397
b654f878 2398#endif /* /MODULE */
Linux 6.x block layer and io_uring tree(s)