staging: wlan-ng: Remove wrapper function
[linux-2.6-block.git] / drivers / staging / wlan-ng / hfa384x_usb.c
CommitLineData
00b3ed16
GKH
1/* src/prism2/driver/hfa384x_usb.c
2*
3* Functions that talk to the USB variantof the Intersil hfa384x MAC
4*
5* Copyright (C) 1999 AbsoluteValue Systems, Inc. All Rights Reserved.
6* --------------------------------------------------------------------
7*
8* linux-wlan
9*
10* The contents of this file are subject to the Mozilla Public
11* License Version 1.1 (the "License"); you may not use this file
12* except in compliance with the License. You may obtain a copy of
13* the License at http://www.mozilla.org/MPL/
14*
15* Software distributed under the License is distributed on an "AS
16* IS" basis, WITHOUT WARRANTY OF ANY KIND, either express or
17* implied. See the License for the specific language governing
18* rights and limitations under the License.
19*
20* Alternatively, the contents of this file may be used under the
21* terms of the GNU Public License version 2 (the "GPL"), in which
22* case the provisions of the GPL are applicable instead of the
23* above. If you wish to allow the use of your version of this file
24* only under the terms of the GPL and not to allow others to use
25* your version of this file under the MPL, indicate your decision
26* by deleting the provisions above and replace them with the notice
27* and other provisions required by the GPL. If you do not delete
28* the provisions above, a recipient may use your version of this
29* file under either the MPL or the GPL.
30*
31* --------------------------------------------------------------------
32*
33* Inquiries regarding the linux-wlan Open Source project can be
34* made directly to:
35*
36* AbsoluteValue Systems Inc.
37* info@linux-wlan.com
38* http://www.linux-wlan.com
39*
40* --------------------------------------------------------------------
41*
42* Portions of the development of this software were funded by
43* Intersil Corporation as part of PRISM(R) chipset product development.
44*
45* --------------------------------------------------------------------
46*
47* This file implements functions that correspond to the prism2/hfa384x
48* 802.11 MAC hardware and firmware host interface.
49*
50* The functions can be considered to represent several levels of
51* abstraction. The lowest level functions are simply C-callable wrappers
52* around the register accesses. The next higher level represents C-callable
53* prism2 API functions that match the Intersil documentation as closely
54* as is reasonable. The next higher layer implements common sequences
3fc0d278 55* of invocations of the API layer (e.g. write to bap, followed by cmd).
00b3ed16
GKH
56*
57* Common sequences:
58* hfa384x_drvr_xxx Highest level abstractions provided by the
59* hfa384x code. They are driver defined wrappers
60* for common sequences. These functions generally
61* use the services of the lower levels.
62*
63* hfa384x_drvr_xxxconfig An example of the drvr level abstraction. These
64* functions are wrappers for the RID get/set
631c8dec
EH
65* sequence. They call copy_[to|from]_bap() and
66* cmd_access(). These functions operate on the
67* RIDs and buffers without validation. The caller
00b3ed16
GKH
68* is responsible for that.
69*
70* API wrapper functions:
71* hfa384x_cmd_xxx functions that provide access to the f/w commands.
72* The function arguments correspond to each command
73* argument, even command arguments that get packed
74* into single registers. These functions _just_
75* issue the command by setting the cmd/parm regs
76* & reading the status/resp regs. Additional
77* activities required to fully use a command
78* (read/write from/to bap, get/set int status etc.)
79* are implemented separately. Think of these as
80* C-callable prism2 commands.
81*
82* Lowest Layer Functions:
83* hfa384x_docmd_xxx These functions implement the sequence required
84* to issue any prism2 command. Primarily used by the
85* hfa384x_cmd_xxx functions.
86*
87* hfa384x_bap_xxx BAP read/write access functions.
88* Note: we usually use BAP0 for non-interrupt context
89* and BAP1 for interrupt context.
90*
91* hfa384x_dl_xxx download related functions.
92*
93* Driver State Issues:
94* Note that there are two pairs of functions that manage the
95* 'initialized' and 'running' states of the hw/MAC combo. The four
96* functions are create(), destroy(), start(), and stop(). create()
97* sets up the data structures required to support the hfa384x_*
98* functions and destroy() cleans them up. The start() function gets
99* the actual hardware running and enables the interrupts. The stop()
100* function shuts the hardware down. The sequence should be:
101* create()
102* start()
103* .
104* . Do interesting things w/ the hardware
105* .
106* stop()
107* destroy()
108*
109* Note that destroy() can be called without calling stop() first.
110* --------------------------------------------------------------------
111*/
112
00b3ed16
GKH
113#include <linux/module.h>
114#include <linux/kernel.h>
115#include <linux/sched.h>
116#include <linux/types.h>
117#include <linux/slab.h>
118#include <linux/wireless.h>
119#include <linux/netdevice.h>
120#include <linux/timer.h>
ef1a0ed7 121#include <linux/io.h>
00b3ed16
GKH
122#include <linux/delay.h>
123#include <asm/byteorder.h>
ef1a0ed7 124#include <linux/bitops.h>
00b3ed16
GKH
125#include <linux/list.h>
126#include <linux/usb.h>
ae26230b 127#include <linux/byteorder/generic.h>
00b3ed16 128
5dd8acc8 129#define SUBMIT_URB(u, f) usb_submit_urb(u, f)
00b3ed16 130
00b3ed16
GKH
131#include "p80211types.h"
132#include "p80211hdr.h"
133#include "p80211mgmt.h"
134#include "p80211conv.h"
135#include "p80211msg.h"
136#include "p80211netdev.h"
137#include "p80211req.h"
138#include "p80211metadef.h"
139#include "p80211metastruct.h"
140#include "hfa384x.h"
141#include "prism2mgmt.h"
142
21dc0f89
MM
143enum cmd_mode {
144 DOWAIT = 0,
145 DOASYNC
00b3ed16 146};
00b3ed16
GKH
147
148#define THROTTLE_JIFFIES (HZ/8)
2d200d9f
MM
149#define URB_ASYNC_UNLINK 0
150#define USB_QUEUE_BULK 0
00b3ed16 151
00b3ed16
GKH
152#define ROUNDUP64(a) (((a)+63)&~63)
153
00b3ed16 154#ifdef DEBUG_USB
21dc0f89 155static void dbprint_urb(struct urb *urb);
00b3ed16
GKH
156#endif
157
158static void
297f06ce 159hfa384x_int_rxmonitor(wlandevice_t *wlandev, hfa384x_usb_rxfrm_t *rxfrm);
00b3ed16 160
21dc0f89 161static void hfa384x_usb_defer(struct work_struct *data);
00b3ed16 162
297f06ce 163static int submit_rx_urb(hfa384x_t *hw, gfp_t flags);
00b3ed16 164
297f06ce 165static int submit_tx_urb(hfa384x_t *hw, struct urb *tx_urb, gfp_t flags);
00b3ed16
GKH
166
167/*---------------------------------------------------*/
168/* Callbacks */
21dc0f89
MM
169static void hfa384x_usbout_callback(struct urb *urb);
170static void hfa384x_ctlxout_callback(struct urb *urb);
171static void hfa384x_usbin_callback(struct urb *urb);
00b3ed16
GKH
172
173static void
32adf1e5 174hfa384x_usbin_txcompl(wlandevice_t *wlandev, hfa384x_usbin_t *usbin);
00b3ed16 175
297f06ce 176static void hfa384x_usbin_rx(wlandevice_t *wlandev, struct sk_buff *skb);
00b3ed16 177
32adf1e5 178static void hfa384x_usbin_info(wlandevice_t *wlandev, hfa384x_usbin_t *usbin);
00b3ed16
GKH
179
180static void
297f06ce 181hfa384x_usbout_tx(wlandevice_t *wlandev, hfa384x_usbout_t *usbout);
00b3ed16 182
297f06ce 183static void hfa384x_usbin_ctlx(hfa384x_t *hw, hfa384x_usbin_t *usbin,
00b3ed16
GKH
184 int urb_status);
185
186/*---------------------------------------------------*/
187/* Functions to support the prism2 usb command queue */
188
297f06ce 189static void hfa384x_usbctlxq_run(hfa384x_t *hw);
00b3ed16 190
21dc0f89 191static void hfa384x_usbctlx_reqtimerfn(unsigned long data);
00b3ed16 192
21dc0f89 193static void hfa384x_usbctlx_resptimerfn(unsigned long data);
00b3ed16 194
21dc0f89 195static void hfa384x_usb_throttlefn(unsigned long data);
00b3ed16 196
21dc0f89 197static void hfa384x_usbctlx_completion_task(unsigned long data);
00b3ed16 198
21dc0f89 199static void hfa384x_usbctlx_reaper_task(unsigned long data);
00b3ed16 200
297f06ce 201static int hfa384x_usbctlx_submit(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx);
00b3ed16 202
297f06ce 203static void unlocked_usbctlx_complete(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx);
00b3ed16 204
21dc0f89 205struct usbctlx_completor {
83f91687 206 int (*complete)(struct usbctlx_completor *);
00b3ed16 207};
00b3ed16
GKH
208
209static int
297f06ce
MT
210hfa384x_usbctlx_complete_sync(hfa384x_t *hw,
211 hfa384x_usbctlx_t *ctlx,
631c8dec 212 struct usbctlx_completor *completor);
00b3ed16
GKH
213
214static int
297f06ce 215unlocked_usbctlx_cancel_async(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx);
00b3ed16 216
297f06ce 217static void hfa384x_cb_status(hfa384x_t *hw, const hfa384x_usbctlx_t *ctlx);
00b3ed16 218
297f06ce 219static void hfa384x_cb_rrid(hfa384x_t *hw, const hfa384x_usbctlx_t *ctlx);
00b3ed16
GKH
220
221static int
297f06ce
MT
222usbctlx_get_status(const hfa384x_usb_cmdresp_t *cmdresp,
223 hfa384x_cmdresult_t *result);
00b3ed16
GKH
224
225static void
297f06ce
MT
226usbctlx_get_rridresult(const hfa384x_usb_rridresp_t *rridresp,
227 hfa384x_rridresult_t *result);
00b3ed16
GKH
228
229/*---------------------------------------------------*/
230/* Low level req/resp CTLX formatters and submitters */
231static int
297f06ce 232hfa384x_docmd(hfa384x_t *hw,
631c8dec 233 enum cmd_mode mode,
297f06ce 234 hfa384x_metacmd_t *cmd,
21dc0f89 235 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data);
00b3ed16
GKH
236
237static int
297f06ce 238hfa384x_dorrid(hfa384x_t *hw,
631c8dec 239 enum cmd_mode mode,
21dc0f89
MM
240 u16 rid,
241 void *riddata,
242 unsigned int riddatalen,
243 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data);
00b3ed16
GKH
244
245static int
297f06ce 246hfa384x_dowrid(hfa384x_t *hw,
631c8dec 247 enum cmd_mode mode,
21dc0f89
MM
248 u16 rid,
249 void *riddata,
250 unsigned int riddatalen,
251 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data);
00b3ed16
GKH
252
253static int
297f06ce 254hfa384x_dormem(hfa384x_t *hw,
631c8dec 255 enum cmd_mode mode,
21dc0f89
MM
256 u16 page,
257 u16 offset,
258 void *data,
259 unsigned int len,
260 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data);
00b3ed16
GKH
261
262static int
297f06ce 263hfa384x_dowmem(hfa384x_t *hw,
631c8dec 264 enum cmd_mode mode,
21dc0f89
MM
265 u16 page,
266 u16 offset,
267 void *data,
268 unsigned int len,
269 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data);
00b3ed16 270
21dc0f89 271static int hfa384x_isgood_pdrcode(u16 pdrcode);
00b3ed16 272
21dc0f89 273static inline const char *ctlxstr(CTLX_STATE s)
00b3ed16 274{
d6ae4a99 275 static const char * const ctlx_str[] = {
00b3ed16
GKH
276 "Initial state",
277 "Complete",
278 "Request failed",
279 "Request pending",
280 "Request packet submitted",
281 "Request packet completed",
282 "Response packet completed"
283 };
284
285 return ctlx_str[s];
286};
287
32adf1e5 288static inline hfa384x_usbctlx_t *get_active_ctlx(hfa384x_t *hw)
00b3ed16
GKH
289{
290 return list_entry(hw->ctlxq.active.next, hfa384x_usbctlx_t, list);
291}
292
00b3ed16 293#ifdef DEBUG_USB
21dc0f89 294void dbprint_urb(struct urb *urb)
00b3ed16 295{
a7cf7bae
MM
296 pr_debug("urb->pipe=0x%08x\n", urb->pipe);
297 pr_debug("urb->status=0x%08x\n", urb->status);
298 pr_debug("urb->transfer_flags=0x%08x\n", urb->transfer_flags);
21dc0f89 299 pr_debug("urb->transfer_buffer=0x%08x\n",
75f49e07 300 (unsigned int)urb->transfer_buffer);
21dc0f89 301 pr_debug("urb->transfer_buffer_length=0x%08x\n",
75f49e07 302 urb->transfer_buffer_length);
a7cf7bae
MM
303 pr_debug("urb->actual_length=0x%08x\n", urb->actual_length);
304 pr_debug("urb->bandwidth=0x%08x\n", urb->bandwidth);
21dc0f89 305 pr_debug("urb->setup_packet(ctl)=0x%08x\n",
75f49e07
MT
306 (unsigned int)urb->setup_packet);
307 pr_debug("urb->start_frame(iso/irq)=0x%08x\n", urb->start_frame);
a7cf7bae
MM
308 pr_debug("urb->interval(irq)=0x%08x\n", urb->interval);
309 pr_debug("urb->error_count(iso)=0x%08x\n", urb->error_count);
310 pr_debug("urb->timeout=0x%08x\n", urb->timeout);
311 pr_debug("urb->context=0x%08x\n", (unsigned int)urb->context);
75f49e07 312 pr_debug("urb->complete=0x%08x\n", (unsigned int)urb->complete);
00b3ed16
GKH
313}
314#endif
315
00b3ed16
GKH
316/*----------------------------------------------------------------
317* submit_rx_urb
318*
319* Listen for input data on the BULK-IN pipe. If the pipe has
320* stalled then schedule it to be reset.
321*
322* Arguments:
323* hw device struct
324* memflags memory allocation flags
325*
326* Returns:
327* error code from submission
328*
329* Call context:
330* Any
331----------------------------------------------------------------*/
297f06ce 332static int submit_rx_urb(hfa384x_t *hw, gfp_t memflags)
00b3ed16
GKH
333{
334 struct sk_buff *skb;
335 int result;
336
00b3ed16
GKH
337 skb = dev_alloc_skb(sizeof(hfa384x_usbin_t));
338 if (skb == NULL) {
339 result = -ENOMEM;
340 goto done;
341 }
342
343 /* Post the IN urb */
344 usb_fill_bulk_urb(&hw->rx_urb, hw->usb,
21dc0f89
MM
345 hw->endp_in,
346 skb->data, sizeof(hfa384x_usbin_t),
347 hfa384x_usbin_callback, hw->wlandev);
00b3ed16
GKH
348
349 hw->rx_urb_skb = skb;
350
351 result = -ENOLINK;
631c8dec 352 if (!hw->wlandev->hwremoved &&
3f2d6564 353 !test_bit(WORK_RX_HALT, &hw->usb_flags)) {
00b3ed16
GKH
354 result = SUBMIT_URB(&hw->rx_urb, memflags);
355
356 /* Check whether we need to reset the RX pipe */
357 if (result == -EPIPE) {
263b8bb9 358 netdev_warn(hw->wlandev->netdev,
3f2d6564
SSA
359 "%s rx pipe stalled: requesting reset\n",
360 hw->wlandev->netdev->name);
21dc0f89 361 if (!test_and_set_bit(WORK_RX_HALT, &hw->usb_flags))
00b3ed16
GKH
362 schedule_work(&hw->usb_work);
363 }
364 }
365
366 /* Don't leak memory if anything should go wrong */
367 if (result != 0) {
368 dev_kfree_skb(skb);
369 hw->rx_urb_skb = NULL;
370 }
371
21dc0f89 372done:
00b3ed16
GKH
373 return result;
374}
375
376/*----------------------------------------------------------------
377* submit_tx_urb
378*
379* Prepares and submits the URB of transmitted data. If the
380* submission fails then it will schedule the output pipe to
381* be reset.
382*
383* Arguments:
384* hw device struct
1a6dfce7 385* tx_urb URB of data for transmission
00b3ed16
GKH
386* memflags memory allocation flags
387*
388* Returns:
389* error code from submission
390*
391* Call context:
392* Any
393----------------------------------------------------------------*/
297f06ce 394static int submit_tx_urb(hfa384x_t *hw, struct urb *tx_urb, gfp_t memflags)
00b3ed16
GKH
395{
396 struct net_device *netdev = hw->wlandev->netdev;
397 int result;
398
00b3ed16 399 result = -ENOLINK;
21dc0f89 400 if (netif_running(netdev)) {
a3542e66
SSA
401 if (!hw->wlandev->hwremoved &&
402 !test_bit(WORK_TX_HALT, &hw->usb_flags)) {
00b3ed16
GKH
403 result = SUBMIT_URB(tx_urb, memflags);
404
405 /* Test whether we need to reset the TX pipe */
406 if (result == -EPIPE) {
263b8bb9 407 netdev_warn(hw->wlandev->netdev,
3f2d6564
SSA
408 "%s tx pipe stalled: requesting reset\n",
409 netdev->name);
00b3ed16
GKH
410 set_bit(WORK_TX_HALT, &hw->usb_flags);
411 schedule_work(&hw->usb_work);
412 } else if (result == 0) {
413 netif_stop_queue(netdev);
414 }
415 }
416 }
417
00b3ed16
GKH
418 return result;
419}
420
421/*----------------------------------------------------------------
422* hfa394x_usb_defer
423*
424* There are some things that the USB stack cannot do while
425* in interrupt context, so we arrange this function to run
426* in process context.
427*
428* Arguments:
429* hw device structure
430*
431* Returns:
432* nothing
433*
434* Call context:
435* process (by design)
436----------------------------------------------------------------*/
21dc0f89 437static void hfa384x_usb_defer(struct work_struct *data)
00b3ed16
GKH
438{
439 hfa384x_t *hw = container_of(data, struct hfa384x, usb_work);
440 struct net_device *netdev = hw->wlandev->netdev;
441
00b3ed16
GKH
442 /* Don't bother trying to reset anything if the plug
443 * has been pulled ...
444 */
21dc0f89 445 if (hw->wlandev->hwremoved)
00b3ed16 446 return;
00b3ed16
GKH
447
448 /* Reception has stopped: try to reset the input pipe */
449 if (test_bit(WORK_RX_HALT, &hw->usb_flags)) {
450 int ret;
451
631c8dec 452 usb_kill_urb(&hw->rx_urb); /* Cannot be holding spinlock! */
00b3ed16
GKH
453
454 ret = usb_clear_halt(hw->usb, hw->endp_in);
455 if (ret != 0) {
263b8bb9 456 netdev_err(hw->wlandev->netdev,
3f2d6564
SSA
457 "Failed to clear rx pipe for %s: err=%d\n",
458 netdev->name, ret);
00b3ed16 459 } else {
263b8bb9 460 netdev_info(hw->wlandev->netdev, "%s rx pipe reset complete.\n",
3f2d6564 461 netdev->name);
00b3ed16
GKH
462 clear_bit(WORK_RX_HALT, &hw->usb_flags);
463 set_bit(WORK_RX_RESUME, &hw->usb_flags);
464 }
465 }
466
467 /* Resume receiving data back from the device. */
21dc0f89 468 if (test_bit(WORK_RX_RESUME, &hw->usb_flags)) {
00b3ed16
GKH
469 int ret;
470
471 ret = submit_rx_urb(hw, GFP_KERNEL);
472 if (ret != 0) {
263b8bb9 473 netdev_err(hw->wlandev->netdev,
3f2d6564
SSA
474 "Failed to resume %s rx pipe.\n",
475 netdev->name);
00b3ed16
GKH
476 } else {
477 clear_bit(WORK_RX_RESUME, &hw->usb_flags);
478 }
479 }
480
481 /* Transmission has stopped: try to reset the output pipe */
482 if (test_bit(WORK_TX_HALT, &hw->usb_flags)) {
483 int ret;
484
485 usb_kill_urb(&hw->tx_urb);
486 ret = usb_clear_halt(hw->usb, hw->endp_out);
487 if (ret != 0) {
263b8bb9 488 netdev_err(hw->wlandev->netdev,
3f2d6564
SSA
489 "Failed to clear tx pipe for %s: err=%d\n",
490 netdev->name, ret);
00b3ed16 491 } else {
263b8bb9 492 netdev_info(hw->wlandev->netdev, "%s tx pipe reset complete.\n",
3f2d6564 493 netdev->name);
00b3ed16
GKH
494 clear_bit(WORK_TX_HALT, &hw->usb_flags);
495 set_bit(WORK_TX_RESUME, &hw->usb_flags);
496
497 /* Stopping the BULK-OUT pipe also blocked
498 * us from sending any more CTLX URBs, so
499 * we need to re-run our queue ...
500 */
501 hfa384x_usbctlxq_run(hw);
502 }
503 }
504
505 /* Resume transmitting. */
21dc0f89 506 if (test_and_clear_bit(WORK_TX_RESUME, &hw->usb_flags))
cbec30c4 507 netif_wake_queue(hw->wlandev->netdev);
00b3ed16
GKH
508}
509
00b3ed16
GKH
510/*----------------------------------------------------------------
511* hfa384x_create
512*
513* Sets up the hfa384x_t data structure for use. Note this
9b0131cb 514* does _not_ initialize the actual hardware, just the data structures
00b3ed16
GKH
515* we use to keep track of its state.
516*
517* Arguments:
518* hw device structure
519* irq device irq number
520* iobase i/o base address for register access
521* membase memory base address for register access
522*
523* Returns:
524* nothing
525*
526* Side effects:
527*
528* Call context:
529* process
530----------------------------------------------------------------*/
297f06ce 531void hfa384x_create(hfa384x_t *hw, struct usb_device *usb)
00b3ed16 532{
00b3ed16
GKH
533 memset(hw, 0, sizeof(hfa384x_t));
534 hw->usb = usb;
535
536 /* set up the endpoints */
537 hw->endp_in = usb_rcvbulkpipe(usb, 1);
538 hw->endp_out = usb_sndbulkpipe(usb, 2);
539
540 /* Set up the waitq */
541 init_waitqueue_head(&hw->cmdq);
542
543 /* Initialize the command queue */
544 spin_lock_init(&hw->ctlxq.lock);
545 INIT_LIST_HEAD(&hw->ctlxq.pending);
546 INIT_LIST_HEAD(&hw->ctlxq.active);
547 INIT_LIST_HEAD(&hw->ctlxq.completing);
548 INIT_LIST_HEAD(&hw->ctlxq.reapable);
549
550 /* Initialize the authentication queue */
551 skb_queue_head_init(&hw->authq);
552
553 tasklet_init(&hw->reaper_bh,
21dc0f89 554 hfa384x_usbctlx_reaper_task, (unsigned long)hw);
00b3ed16 555 tasklet_init(&hw->completion_bh,
21dc0f89 556 hfa384x_usbctlx_completion_task, (unsigned long)hw);
575a8a5c
SP
557 INIT_WORK(&hw->link_bh, prism2sta_processing_defer);
558 INIT_WORK(&hw->usb_work, hfa384x_usb_defer);
00b3ed16 559
2f83aeda 560 setup_timer(&hw->throttle, hfa384x_usb_throttlefn, (unsigned long)hw);
00b3ed16 561
2f83aeda
AM
562 setup_timer(&hw->resptimer, hfa384x_usbctlx_resptimerfn,
563 (unsigned long)hw);
00b3ed16 564
2f83aeda
AM
565 setup_timer(&hw->reqtimer, hfa384x_usbctlx_reqtimerfn,
566 (unsigned long)hw);
00b3ed16
GKH
567
568 usb_init_urb(&hw->rx_urb);
569 usb_init_urb(&hw->tx_urb);
570 usb_init_urb(&hw->ctlx_urb);
571
572 hw->link_status = HFA384x_LINK_NOTCONNECTED;
573 hw->state = HFA384x_STATE_INIT;
574
21dc0f89 575 INIT_WORK(&hw->commsqual_bh, prism2sta_commsqual_defer);
2f83aeda
AM
576 setup_timer(&hw->commsqual_timer, prism2sta_commsqual_timer,
577 (unsigned long)hw);
00b3ed16
GKH
578}
579
00b3ed16
GKH
580/*----------------------------------------------------------------
581* hfa384x_destroy
582*
583* Partner to hfa384x_create(). This function cleans up the hw
584* structure so that it can be freed by the caller using a simple
585* kfree. Currently, this function is just a placeholder. If, at some
586* point in the future, an hw in the 'shutdown' state requires a 'deep'
587* kfree, this is where it should be done. Note that if this function
588* is called on a _running_ hw structure, the drvr_stop() function is
589* called.
590*
591* Arguments:
592* hw device structure
593*
594* Returns:
595* nothing, this function is not allowed to fail.
596*
597* Side effects:
598*
599* Call context:
600* process
601----------------------------------------------------------------*/
297f06ce 602void hfa384x_destroy(hfa384x_t *hw)
00b3ed16
GKH
603{
604 struct sk_buff *skb;
605
21dc0f89 606 if (hw->state == HFA384x_STATE_RUNNING)
00b3ed16 607 hfa384x_drvr_stop(hw);
00b3ed16
GKH
608 hw->state = HFA384x_STATE_PREINIT;
609
a6f9c48f
IM
610 kfree(hw->scanresults);
611 hw->scanresults = NULL;
00b3ed16
GKH
612
613 /* Now to clean out the auth queue */
21dc0f89
MM
614 while ((skb = skb_dequeue(&hw->authq)))
615 dev_kfree_skb(skb);
00b3ed16
GKH
616}
617
21dc0f89 618static hfa384x_usbctlx_t *usbctlx_alloc(void)
00b3ed16
GKH
619{
620 hfa384x_usbctlx_t *ctlx;
621
d0edf4bc
NSN
622 ctlx = kzalloc(sizeof(*ctlx),
623 in_interrupt() ? GFP_ATOMIC : GFP_KERNEL);
624 if (ctlx != NULL)
00b3ed16 625 init_completion(&ctlx->done);
00b3ed16
GKH
626
627 return ctlx;
628}
629
00b3ed16 630static int
297f06ce
MT
631usbctlx_get_status(const hfa384x_usb_cmdresp_t *cmdresp,
632 hfa384x_cmdresult_t *result)
00b3ed16 633{
18c7f792
MM
634 result->status = le16_to_cpu(cmdresp->status);
635 result->resp0 = le16_to_cpu(cmdresp->resp0);
636 result->resp1 = le16_to_cpu(cmdresp->resp1);
637 result->resp2 = le16_to_cpu(cmdresp->resp2);
00b3ed16 638
a2120136 639 pr_debug("cmdresult:status=0x%04x resp0=0x%04x resp1=0x%04x resp2=0x%04x\n",
75f49e07 640 result->status, result->resp0, result->resp1, result->resp2);
00b3ed16 641
21dc0f89 642 return result->status & HFA384x_STATUS_RESULT;
00b3ed16
GKH
643}
644
645static void
297f06ce
MT
646usbctlx_get_rridresult(const hfa384x_usb_rridresp_t *rridresp,
647 hfa384x_rridresult_t *result)
00b3ed16 648{
18c7f792 649 result->rid = le16_to_cpu(rridresp->rid);
00b3ed16 650 result->riddata = rridresp->data;
18c7f792 651 result->riddata_len = ((le16_to_cpu(rridresp->frmlen) - 1) * 2);
00b3ed16
GKH
652}
653
00b3ed16
GKH
654/*----------------------------------------------------------------
655* Completor object:
656* This completor must be passed to hfa384x_usbctlx_complete_sync()
657* when processing a CTLX that returns a hfa384x_cmdresult_t structure.
658----------------------------------------------------------------*/
21dc0f89 659struct usbctlx_cmd_completor {
631c8dec 660 struct usbctlx_completor head;
00b3ed16 661
21dc0f89
MM
662 const hfa384x_usb_cmdresp_t *cmdresp;
663 hfa384x_cmdresult_t *result;
00b3ed16 664};
00b3ed16 665
631c8dec 666static inline int usbctlx_cmd_completor_fn(struct usbctlx_completor *head)
00b3ed16 667{
631c8dec
EH
668 struct usbctlx_cmd_completor *complete;
669
5d85fe34 670 complete = (struct usbctlx_cmd_completor *)head;
00b3ed16
GKH
671 return usbctlx_get_status(complete->cmdresp, complete->result);
672}
673
631c8dec
EH
674static inline struct usbctlx_completor *init_cmd_completor(
675 struct usbctlx_cmd_completor
676 *completor,
677 const hfa384x_usb_cmdresp_t
678 *cmdresp,
679 hfa384x_cmdresult_t *result)
00b3ed16
GKH
680{
681 completor->head.complete = usbctlx_cmd_completor_fn;
682 completor->cmdresp = cmdresp;
683 completor->result = result;
684 return &(completor->head);
685}
686
687/*----------------------------------------------------------------
688* Completor object:
689* This completor must be passed to hfa384x_usbctlx_complete_sync()
690* when processing a CTLX that reads a RID.
691----------------------------------------------------------------*/
21dc0f89 692struct usbctlx_rrid_completor {
631c8dec 693 struct usbctlx_completor head;
00b3ed16 694
21dc0f89
MM
695 const hfa384x_usb_rridresp_t *rridresp;
696 void *riddata;
697 unsigned int riddatalen;
00b3ed16 698};
00b3ed16 699
631c8dec 700static int usbctlx_rrid_completor_fn(struct usbctlx_completor *head)
00b3ed16 701{
631c8dec 702 struct usbctlx_rrid_completor *complete;
00b3ed16
GKH
703 hfa384x_rridresult_t rridresult;
704
5d85fe34 705 complete = (struct usbctlx_rrid_completor *)head;
00b3ed16
GKH
706 usbctlx_get_rridresult(complete->rridresp, &rridresult);
707
708 /* Validate the length, note body len calculation in bytes */
21dc0f89 709 if (rridresult.riddata_len != complete->riddatalen) {
baa8a6c0
SSA
710 pr_warn("RID len mismatch, rid=0x%04x hlen=%d fwlen=%d\n",
711 rridresult.rid,
712 complete->riddatalen, rridresult.riddata_len);
00b3ed16
GKH
713 return -ENODATA;
714 }
715
21dc0f89 716 memcpy(complete->riddata, rridresult.riddata, complete->riddatalen);
00b3ed16
GKH
717 return 0;
718}
719
631c8dec
EH
720static inline struct usbctlx_completor *init_rrid_completor(
721 struct usbctlx_rrid_completor
722 *completor,
723 const hfa384x_usb_rridresp_t
724 *rridresp,
725 void *riddata,
726 unsigned int riddatalen)
00b3ed16
GKH
727{
728 completor->head.complete = usbctlx_rrid_completor_fn;
729 completor->rridresp = rridresp;
730 completor->riddata = riddata;
731 completor->riddatalen = riddatalen;
732 return &(completor->head);
733}
734
735/*----------------------------------------------------------------
736* Completor object:
737* Interprets the results of a synchronous RID-write
738----------------------------------------------------------------*/
00b3ed16
GKH
739#define init_wrid_completor init_cmd_completor
740
741/*----------------------------------------------------------------
742* Completor object:
743* Interprets the results of a synchronous memory-write
744----------------------------------------------------------------*/
00b3ed16
GKH
745#define init_wmem_completor init_cmd_completor
746
747/*----------------------------------------------------------------
748* Completor object:
749* Interprets the results of a synchronous memory-read
750----------------------------------------------------------------*/
21dc0f89 751struct usbctlx_rmem_completor {
631c8dec 752 struct usbctlx_completor head;
00b3ed16 753
21dc0f89
MM
754 const hfa384x_usb_rmemresp_t *rmemresp;
755 void *data;
756 unsigned int len;
00b3ed16 757};
00b3ed16 758
631c8dec 759static int usbctlx_rmem_completor_fn(struct usbctlx_completor *head)
00b3ed16 760{
a03742ac
SSA
761 struct usbctlx_rmem_completor *complete =
762 (struct usbctlx_rmem_completor *)head;
00b3ed16 763
a7cf7bae 764 pr_debug("rmemresp:len=%d\n", complete->rmemresp->frmlen);
00b3ed16
GKH
765 memcpy(complete->data, complete->rmemresp->data, complete->len);
766 return 0;
767}
768
631c8dec 769static inline struct usbctlx_completor *init_rmem_completor(
a03742ac 770 struct usbctlx_rmem_completor
631c8dec
EH
771 *completor,
772 hfa384x_usb_rmemresp_t
773 *rmemresp,
774 void *data,
775 unsigned int len)
00b3ed16
GKH
776{
777 completor->head.complete = usbctlx_rmem_completor_fn;
778 completor->rmemresp = rmemresp;
779 completor->data = data;
780 completor->len = len;
781 return &(completor->head);
782}
783
784/*----------------------------------------------------------------
785* hfa384x_cb_status
786*
787* Ctlx_complete handler for async CMD type control exchanges.
788* mark the hw struct as such.
789*
790* Note: If the handling is changed here, it should probably be
791* changed in docmd as well.
792*
793* Arguments:
794* hw hw struct
795* ctlx completed CTLX
796*
797* Returns:
798* nothing
799*
800* Side effects:
801*
802* Call context:
803* interrupt
804----------------------------------------------------------------*/
297f06ce 805static void hfa384x_cb_status(hfa384x_t *hw, const hfa384x_usbctlx_t *ctlx)
00b3ed16 806{
21dc0f89 807 if (ctlx->usercb != NULL) {
00b3ed16
GKH
808 hfa384x_cmdresult_t cmdresult;
809
810 if (ctlx->state != CTLX_COMPLETE) {
811 memset(&cmdresult, 0, sizeof(cmdresult));
21dc0f89
MM
812 cmdresult.status =
813 HFA384x_STATUS_RESULT_SET(HFA384x_CMD_ERR);
00b3ed16
GKH
814 } else {
815 usbctlx_get_status(&ctlx->inbuf.cmdresp, &cmdresult);
816 }
817
818 ctlx->usercb(hw, &cmdresult, ctlx->usercb_data);
819 }
00b3ed16
GKH
820}
821
00b3ed16
GKH
822/*----------------------------------------------------------------
823* hfa384x_cb_rrid
824*
825* CTLX completion handler for async RRID type control exchanges.
826*
827* Note: If the handling is changed here, it should probably be
828* changed in dorrid as well.
829*
830* Arguments:
831* hw hw struct
832* ctlx completed CTLX
833*
834* Returns:
835* nothing
836*
837* Side effects:
838*
839* Call context:
840* interrupt
841----------------------------------------------------------------*/
297f06ce 842static void hfa384x_cb_rrid(hfa384x_t *hw, const hfa384x_usbctlx_t *ctlx)
00b3ed16 843{
21dc0f89 844 if (ctlx->usercb != NULL) {
00b3ed16
GKH
845 hfa384x_rridresult_t rridresult;
846
847 if (ctlx->state != CTLX_COMPLETE) {
848 memset(&rridresult, 0, sizeof(rridresult));
75f49e07 849 rridresult.rid = le16_to_cpu(ctlx->outbuf.rridreq.rid);
00b3ed16 850 } else {
21dc0f89
MM
851 usbctlx_get_rridresult(&ctlx->inbuf.rridresp,
852 &rridresult);
00b3ed16
GKH
853 }
854
855 ctlx->usercb(hw, &rridresult, ctlx->usercb_data);
856 }
00b3ed16
GKH
857}
858
297f06ce 859static inline int hfa384x_docmd_wait(hfa384x_t *hw, hfa384x_metacmd_t *cmd)
00b3ed16
GKH
860{
861 return hfa384x_docmd(hw, DOWAIT, cmd, NULL, NULL, NULL);
862}
863
864static inline int
297f06ce
MT
865hfa384x_docmd_async(hfa384x_t *hw,
866 hfa384x_metacmd_t *cmd,
21dc0f89 867 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data)
00b3ed16 868{
21dc0f89 869 return hfa384x_docmd(hw, DOASYNC, cmd, cmdcb, usercb, usercb_data);
00b3ed16
GKH
870}
871
872static inline int
297f06ce 873hfa384x_dorrid_wait(hfa384x_t *hw, u16 rid, void *riddata,
21dc0f89 874 unsigned int riddatalen)
00b3ed16
GKH
875{
876 return hfa384x_dorrid(hw, DOWAIT,
21dc0f89 877 rid, riddata, riddatalen, NULL, NULL, NULL);
00b3ed16
GKH
878}
879
880static inline int
297f06ce 881hfa384x_dorrid_async(hfa384x_t *hw,
21dc0f89
MM
882 u16 rid, void *riddata, unsigned int riddatalen,
883 ctlx_cmdcb_t cmdcb,
884 ctlx_usercb_t usercb, void *usercb_data)
00b3ed16
GKH
885{
886 return hfa384x_dorrid(hw, DOASYNC,
21dc0f89
MM
887 rid, riddata, riddatalen,
888 cmdcb, usercb, usercb_data);
00b3ed16
GKH
889}
890
891static inline int
297f06ce 892hfa384x_dowrid_wait(hfa384x_t *hw, u16 rid, void *riddata,
21dc0f89 893 unsigned int riddatalen)
00b3ed16
GKH
894{
895 return hfa384x_dowrid(hw, DOWAIT,
21dc0f89 896 rid, riddata, riddatalen, NULL, NULL, NULL);
00b3ed16
GKH
897}
898
899static inline int
297f06ce 900hfa384x_dowrid_async(hfa384x_t *hw,
21dc0f89
MM
901 u16 rid, void *riddata, unsigned int riddatalen,
902 ctlx_cmdcb_t cmdcb,
903 ctlx_usercb_t usercb, void *usercb_data)
00b3ed16
GKH
904{
905 return hfa384x_dowrid(hw, DOASYNC,
21dc0f89
MM
906 rid, riddata, riddatalen,
907 cmdcb, usercb, usercb_data);
00b3ed16
GKH
908}
909
910static inline int
297f06ce 911hfa384x_dormem_wait(hfa384x_t *hw,
21dc0f89 912 u16 page, u16 offset, void *data, unsigned int len)
00b3ed16
GKH
913{
914 return hfa384x_dormem(hw, DOWAIT,
21dc0f89 915 page, offset, data, len, NULL, NULL, NULL);
00b3ed16
GKH
916}
917
918static inline int
297f06ce 919hfa384x_dormem_async(hfa384x_t *hw,
21dc0f89
MM
920 u16 page, u16 offset, void *data, unsigned int len,
921 ctlx_cmdcb_t cmdcb,
922 ctlx_usercb_t usercb, void *usercb_data)
00b3ed16
GKH
923{
924 return hfa384x_dormem(hw, DOASYNC,
21dc0f89
MM
925 page, offset, data, len,
926 cmdcb, usercb, usercb_data);
00b3ed16
GKH
927}
928
929static inline int
297f06ce 930hfa384x_dowmem_wait(hfa384x_t *hw,
21dc0f89 931 u16 page, u16 offset, void *data, unsigned int len)
00b3ed16
GKH
932{
933 return hfa384x_dowmem(hw, DOWAIT,
21dc0f89 934 page, offset, data, len, NULL, NULL, NULL);
00b3ed16
GKH
935}
936
937static inline int
297f06ce 938hfa384x_dowmem_async(hfa384x_t *hw,
21dc0f89
MM
939 u16 page,
940 u16 offset,
941 void *data,
942 unsigned int len,
943 ctlx_cmdcb_t cmdcb,
944 ctlx_usercb_t usercb, void *usercb_data)
00b3ed16
GKH
945{
946 return hfa384x_dowmem(hw, DOASYNC,
21dc0f89
MM
947 page, offset, data, len,
948 cmdcb, usercb, usercb_data);
00b3ed16
GKH
949}
950
951/*----------------------------------------------------------------
952* hfa384x_cmd_initialize
953*
954* Issues the initialize command and sets the hw->state based
955* on the result.
956*
957* Arguments:
958* hw device structure
959*
960* Returns:
961* 0 success
962* >0 f/w reported error - f/w status code
963* <0 driver reported error
964*
965* Side effects:
966*
967* Call context:
968* process
969----------------------------------------------------------------*/
297f06ce 970int hfa384x_cmd_initialize(hfa384x_t *hw)
00b3ed16 971{
21dc0f89
MM
972 int result = 0;
973 int i;
00b3ed16
GKH
974 hfa384x_metacmd_t cmd;
975
00b3ed16
GKH
976 cmd.cmd = HFA384x_CMDCODE_INIT;
977 cmd.parm0 = 0;
978 cmd.parm1 = 0;
979 cmd.parm2 = 0;
980
981 result = hfa384x_docmd_wait(hw, &cmd);
982
a2120136 983 pr_debug("cmdresp.init: status=0x%04x, resp0=0x%04x, resp1=0x%04x, resp2=0x%04x\n",
75f49e07
MT
984 cmd.result.status,
985 cmd.result.resp0, cmd.result.resp1, cmd.result.resp2);
21dc0f89
MM
986 if (result == 0) {
987 for (i = 0; i < HFA384x_NUMPORTS_MAX; i++)
00b3ed16 988 hw->port_enabled[i] = 0;
00b3ed16
GKH
989 }
990
21dc0f89 991 hw->link_status = HFA384x_LINK_NOTCONNECTED;
00b3ed16 992
00b3ed16
GKH
993 return result;
994}
995
00b3ed16
GKH
996/*----------------------------------------------------------------
997* hfa384x_cmd_disable
998*
999* Issues the disable command to stop communications on one of
1000* the MACs 'ports'.
1001*
1002* Arguments:
1003* hw device structure
1004* macport MAC port number (host order)
1005*
1006* Returns:
1007* 0 success
1008* >0 f/w reported failure - f/w status code
1009* <0 driver reported error (timeout|bad arg)
1010*
1011* Side effects:
1012*
1013* Call context:
1014* process
1015----------------------------------------------------------------*/
297f06ce 1016int hfa384x_cmd_disable(hfa384x_t *hw, u16 macport)
00b3ed16 1017{
21dc0f89 1018 int result = 0;
00b3ed16
GKH
1019 hfa384x_metacmd_t cmd;
1020
00b3ed16 1021 cmd.cmd = HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_DISABLE) |
21dc0f89 1022 HFA384x_CMD_MACPORT_SET(macport);
00b3ed16
GKH
1023 cmd.parm0 = 0;
1024 cmd.parm1 = 0;
1025 cmd.parm2 = 0;
1026
1027 result = hfa384x_docmd_wait(hw, &cmd);
1028
00b3ed16
GKH
1029 return result;
1030}
1031
00b3ed16
GKH
1032/*----------------------------------------------------------------
1033* hfa384x_cmd_enable
1034*
1035* Issues the enable command to enable communications on one of
1036* the MACs 'ports'.
1037*
1038* Arguments:
1039* hw device structure
1040* macport MAC port number
1041*
1042* Returns:
1043* 0 success
1044* >0 f/w reported failure - f/w status code
1045* <0 driver reported error (timeout|bad arg)
1046*
1047* Side effects:
1048*
1049* Call context:
1050* process
1051----------------------------------------------------------------*/
297f06ce 1052int hfa384x_cmd_enable(hfa384x_t *hw, u16 macport)
00b3ed16 1053{
21dc0f89 1054 int result = 0;
00b3ed16
GKH
1055 hfa384x_metacmd_t cmd;
1056
00b3ed16 1057 cmd.cmd = HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_ENABLE) |
21dc0f89 1058 HFA384x_CMD_MACPORT_SET(macport);
00b3ed16
GKH
1059 cmd.parm0 = 0;
1060 cmd.parm1 = 0;
1061 cmd.parm2 = 0;
1062
1063 result = hfa384x_docmd_wait(hw, &cmd);
1064
00b3ed16
GKH
1065 return result;
1066}
1067
00b3ed16
GKH
1068/*----------------------------------------------------------------
1069* hfa384x_cmd_monitor
1070*
1071* Enables the 'monitor mode' of the MAC. Here's the description of
1072* monitor mode that I've received thus far:
1073*
1074* "The "monitor mode" of operation is that the MAC passes all
1075* frames for which the PLCP checks are correct. All received
1076* MPDUs are passed to the host with MAC Port = 7, with a
1077* receive status of good, FCS error, or undecryptable. Passing
1078* certain MPDUs is a violation of the 802.11 standard, but useful
1079* for a debugging tool." Normal communication is not possible
1080* while monitor mode is enabled.
1081*
1082* Arguments:
1083* hw device structure
1084* enable a code (0x0b|0x0f) that enables/disables
1085* monitor mode. (host order)
1086*
1087* Returns:
1088* 0 success
1089* >0 f/w reported failure - f/w status code
1090* <0 driver reported error (timeout|bad arg)
1091*
1092* Side effects:
1093*
1094* Call context:
1095* process
1096----------------------------------------------------------------*/
297f06ce 1097int hfa384x_cmd_monitor(hfa384x_t *hw, u16 enable)
00b3ed16 1098{
21dc0f89 1099 int result = 0;
00b3ed16
GKH
1100 hfa384x_metacmd_t cmd;
1101
00b3ed16 1102 cmd.cmd = HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_MONITOR) |
21dc0f89 1103 HFA384x_CMD_AINFO_SET(enable);
00b3ed16
GKH
1104 cmd.parm0 = 0;
1105 cmd.parm1 = 0;
1106 cmd.parm2 = 0;
1107
1108 result = hfa384x_docmd_wait(hw, &cmd);
1109
00b3ed16
GKH
1110 return result;
1111}
1112
00b3ed16
GKH
1113/*----------------------------------------------------------------
1114* hfa384x_cmd_download
1115*
1116* Sets the controls for the MAC controller code/data download
1117* process. The arguments set the mode and address associated
1118* with a download. Note that the aux registers should be enabled
1119* prior to setting one of the download enable modes.
1120*
1121* Arguments:
1122* hw device structure
1123* mode 0 - Disable programming and begin code exec
1124* 1 - Enable volatile mem programming
1125* 2 - Enable non-volatile mem programming
1126* 3 - Program non-volatile section from NV download
1127* buffer.
1128* (host order)
1129* lowaddr
1130* highaddr For mode 1, sets the high & low order bits of
1131* the "destination address". This address will be
1132* the execution start address when download is
1133* subsequently disabled.
1134* For mode 2, sets the high & low order bits of
1135* the destination in NV ram.
1136* For modes 0 & 3, should be zero. (host order)
1137* NOTE: these are CMD format.
1138* codelen Length of the data to write in mode 2,
1139* zero otherwise. (host order)
1140*
1141* Returns:
1142* 0 success
1143* >0 f/w reported failure - f/w status code
1144* <0 driver reported error (timeout|bad arg)
1145*
1146* Side effects:
1147*
1148* Call context:
1149* process
1150----------------------------------------------------------------*/
297f06ce 1151int hfa384x_cmd_download(hfa384x_t *hw, u16 mode, u16 lowaddr,
21dc0f89 1152 u16 highaddr, u16 codelen)
00b3ed16 1153{
21dc0f89 1154 int result = 0;
00b3ed16
GKH
1155 hfa384x_metacmd_t cmd;
1156
75f49e07
MT
1157 pr_debug("mode=%d, lowaddr=0x%04x, highaddr=0x%04x, codelen=%d\n",
1158 mode, lowaddr, highaddr, codelen);
00b3ed16
GKH
1159
1160 cmd.cmd = (HFA384x_CMD_CMDCODE_SET(HFA384x_CMDCODE_DOWNLD) |
1161 HFA384x_CMD_PROGMODE_SET(mode));
1162
1163 cmd.parm0 = lowaddr;
1164 cmd.parm1 = highaddr;
1165 cmd.parm2 = codelen;
1166
1167 result = hfa384x_docmd_wait(hw, &cmd);
1168
00b3ed16
GKH
1169 return result;
1170}
1171
00b3ed16
GKH
1172/*----------------------------------------------------------------
1173* hfa384x_corereset
1174*
1175* Perform a reset of the hfa38xx MAC core. We assume that the hw
1176* structure is in its "created" state. That is, it is initialized
1177* with proper values. Note that if a reset is done after the
1178* device has been active for awhile, the caller might have to clean
1179* up some leftover cruft in the hw structure.
1180*
1181* Arguments:
1182* hw device structure
1183* holdtime how long (in ms) to hold the reset
1184* settletime how long (in ms) to wait after releasing
1185* the reset
1186*
1187* Returns:
1188* nothing
1189*
1190* Side effects:
1191*
1192* Call context:
1193* process
1194----------------------------------------------------------------*/
297f06ce 1195int hfa384x_corereset(hfa384x_t *hw, int holdtime, int settletime, int genesis)
00b3ed16 1196{
df18b930 1197 int result;
00b3ed16 1198
21dc0f89
MM
1199 result = usb_reset_device(hw->usb);
1200 if (result < 0) {
263b8bb9 1201 netdev_err(hw->wlandev->netdev, "usb_reset_device() failed, result=%d.\n",
3f2d6564 1202 result);
00b3ed16
GKH
1203 }
1204
00b3ed16
GKH
1205 return result;
1206}
1207
00b3ed16
GKH
1208/*----------------------------------------------------------------
1209* hfa384x_usbctlx_complete_sync
1210*
1211* Waits for a synchronous CTLX object to complete,
1212* and then handles the response.
1213*
1214* Arguments:
1215* hw device structure
631c8dec 1216* ctlx CTLX ptr
00b3ed16
GKH
1217* completor functor object to decide what to
1218* do with the CTLX's result.
1219*
1220* Returns:
1221* 0 Success
1222* -ERESTARTSYS Interrupted by a signal
1223* -EIO CTLX failed
1224* -ENODEV Adapter was unplugged
1225* ??? Result from completor
1226*
1227* Side effects:
1228*
1229* Call context:
1230* process
1231----------------------------------------------------------------*/
297f06ce
MT
1232static int hfa384x_usbctlx_complete_sync(hfa384x_t *hw,
1233 hfa384x_usbctlx_t *ctlx,
631c8dec 1234 struct usbctlx_completor *completor)
00b3ed16
GKH
1235{
1236 unsigned long flags;
1237 int result;
1238
00b3ed16
GKH
1239 result = wait_for_completion_interruptible(&ctlx->done);
1240
1241 spin_lock_irqsave(&hw->ctlxq.lock, flags);
1242
1243 /*
1244 * We can only handle the CTLX if the USB disconnect
1245 * function has not run yet ...
1246 */
21dc0f89
MM
1247cleanup:
1248 if (hw->wlandev->hwremoved) {
00b3ed16
GKH
1249 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
1250 result = -ENODEV;
21dc0f89 1251 } else if (result != 0) {
00b3ed16
GKH
1252 int runqueue = 0;
1253
1254 /*
1255 * We were probably interrupted, so delete
1256 * this CTLX asynchronously, kill the timers
1257 * and the URB, and then start the next
1258 * pending CTLX.
1259 *
1260 * NOTE: We can only delete the timers and
1261 * the URB if this CTLX is active.
1262 */
21dc0f89 1263 if (ctlx == get_active_ctlx(hw)) {
00b3ed16
GKH
1264 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
1265
1266 del_singleshot_timer_sync(&hw->reqtimer);
1267 del_singleshot_timer_sync(&hw->resptimer);
1268 hw->req_timer_done = 1;
1269 hw->resp_timer_done = 1;
1270 usb_kill_urb(&hw->ctlx_urb);
1271
1272 spin_lock_irqsave(&hw->ctlxq.lock, flags);
1273
1274 runqueue = 1;
1275
1276 /*
1277 * This scenario is so unlikely that I'm
1278 * happy with a grubby "goto" solution ...
1279 */
21dc0f89 1280 if (hw->wlandev->hwremoved)
00b3ed16
GKH
1281 goto cleanup;
1282 }
1283
1284 /*
1285 * The completion task will send this CTLX
1286 * to the reaper the next time it runs. We
1287 * are no longer in a hurry.
1288 */
1289 ctlx->reapable = 1;
1290 ctlx->state = CTLX_REQ_FAILED;
1291 list_move_tail(&ctlx->list, &hw->ctlxq.completing);
1292
1293 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
1294
1295 if (runqueue)
1296 hfa384x_usbctlxq_run(hw);
1297 } else {
1298 if (ctlx->state == CTLX_COMPLETE) {
1299 result = completor->complete(completor);
1300 } else {
263b8bb9 1301 netdev_warn(hw->wlandev->netdev, "CTLX[%d] error: state(%s)\n",
3f2d6564
SSA
1302 le16_to_cpu(ctlx->outbuf.type),
1303 ctlxstr(ctlx->state));
00b3ed16
GKH
1304 result = -EIO;
1305 }
1306
1307 list_del(&ctlx->list);
1308 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
1309 kfree(ctlx);
1310 }
1311
00b3ed16
GKH
1312 return result;
1313}
1314
1315/*----------------------------------------------------------------
1316* hfa384x_docmd
1317*
1318* Constructs a command CTLX and submits it.
1319*
1320* NOTE: Any changes to the 'post-submit' code in this function
1321* need to be carried over to hfa384x_cbcmd() since the handling
1322* is virtually identical.
1323*
1324* Arguments:
1325* hw device structure
1326* mode DOWAIT or DOASYNC
1327* cmd cmd structure. Includes all arguments and result
1328* data points. All in host order. in host order
1329* cmdcb command-specific callback
1330* usercb user callback for async calls, NULL for DOWAIT calls
1331* usercb_data user supplied data pointer for async calls, NULL
1332* for DOASYNC calls
1333*
1334* Returns:
1335* 0 success
1336* -EIO CTLX failure
1337* -ERESTARTSYS Awakened on signal
1338* >0 command indicated error, Status and Resp0-2 are
1339* in hw structure.
1340*
1341* Side effects:
1342*
1343*
1344* Call context:
1345* process
1346----------------------------------------------------------------*/
1347static int
297f06ce 1348hfa384x_docmd(hfa384x_t *hw,
631c8dec 1349 enum cmd_mode mode,
297f06ce 1350 hfa384x_metacmd_t *cmd,
21dc0f89 1351 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data)
00b3ed16 1352{
21dc0f89
MM
1353 int result;
1354 hfa384x_usbctlx_t *ctlx;
00b3ed16 1355
00b3ed16 1356 ctlx = usbctlx_alloc();
21dc0f89 1357 if (ctlx == NULL) {
00b3ed16
GKH
1358 result = -ENOMEM;
1359 goto done;
1360 }
1361
1362 /* Initialize the command */
18c7f792
MM
1363 ctlx->outbuf.cmdreq.type = cpu_to_le16(HFA384x_USB_CMDREQ);
1364 ctlx->outbuf.cmdreq.cmd = cpu_to_le16(cmd->cmd);
1365 ctlx->outbuf.cmdreq.parm0 = cpu_to_le16(cmd->parm0);
1366 ctlx->outbuf.cmdreq.parm1 = cpu_to_le16(cmd->parm1);
1367 ctlx->outbuf.cmdreq.parm2 = cpu_to_le16(cmd->parm2);
00b3ed16
GKH
1368
1369 ctlx->outbufsize = sizeof(ctlx->outbuf.cmdreq);
1370
a2120136 1371 pr_debug("cmdreq: cmd=0x%04x parm0=0x%04x parm1=0x%04x parm2=0x%04x\n",
75f49e07 1372 cmd->cmd, cmd->parm0, cmd->parm1, cmd->parm2);
00b3ed16
GKH
1373
1374 ctlx->reapable = mode;
1375 ctlx->cmdcb = cmdcb;
1376 ctlx->usercb = usercb;
1377 ctlx->usercb_data = usercb_data;
1378
1379 result = hfa384x_usbctlx_submit(hw, ctlx);
1380 if (result != 0) {
1381 kfree(ctlx);
1382 } else if (mode == DOWAIT) {
631c8dec 1383 struct usbctlx_cmd_completor completor;
00b3ed16 1384
21dc0f89
MM
1385 result =
1386 hfa384x_usbctlx_complete_sync(hw, ctlx,
1387 init_cmd_completor(&completor,
1388 &ctlx->
1389 inbuf.
1390 cmdresp,
1391 &cmd->
1392 result));
00b3ed16
GKH
1393 }
1394
1395done:
00b3ed16
GKH
1396 return result;
1397}
1398
00b3ed16
GKH
1399/*----------------------------------------------------------------
1400* hfa384x_dorrid
1401*
1402* Constructs a read rid CTLX and issues it.
1403*
1404* NOTE: Any changes to the 'post-submit' code in this function
1405* need to be carried over to hfa384x_cbrrid() since the handling
1406* is virtually identical.
1407*
1408* Arguments:
1409* hw device structure
1410* mode DOWAIT or DOASYNC
1411* rid Read RID number (host order)
1412* riddata Caller supplied buffer that MAC formatted RID.data
1413* record will be written to for DOWAIT calls. Should
1414* be NULL for DOASYNC calls.
1415* riddatalen Buffer length for DOWAIT calls. Zero for DOASYNC calls.
1416* cmdcb command callback for async calls, NULL for DOWAIT calls
1417* usercb user callback for async calls, NULL for DOWAIT calls
1418* usercb_data user supplied data pointer for async calls, NULL
1419* for DOWAIT calls
1420*
1421* Returns:
1422* 0 success
1423* -EIO CTLX failure
1424* -ERESTARTSYS Awakened on signal
1425* -ENODATA riddatalen != macdatalen
1426* >0 command indicated error, Status and Resp0-2 are
1427* in hw structure.
1428*
1429* Side effects:
1430*
1431* Call context:
1432* interrupt (DOASYNC)
1433* process (DOWAIT or DOASYNC)
1434----------------------------------------------------------------*/
1435static int
297f06ce 1436hfa384x_dorrid(hfa384x_t *hw,
631c8dec 1437 enum cmd_mode mode,
21dc0f89
MM
1438 u16 rid,
1439 void *riddata,
1440 unsigned int riddatalen,
1441 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data)
00b3ed16 1442{
21dc0f89
MM
1443 int result;
1444 hfa384x_usbctlx_t *ctlx;
00b3ed16 1445
00b3ed16 1446 ctlx = usbctlx_alloc();
21dc0f89 1447 if (ctlx == NULL) {
00b3ed16
GKH
1448 result = -ENOMEM;
1449 goto done;
1450 }
1451
1452 /* Initialize the command */
18c7f792 1453 ctlx->outbuf.rridreq.type = cpu_to_le16(HFA384x_USB_RRIDREQ);
00b3ed16 1454 ctlx->outbuf.rridreq.frmlen =
18c7f792
MM
1455 cpu_to_le16(sizeof(ctlx->outbuf.rridreq.rid));
1456 ctlx->outbuf.rridreq.rid = cpu_to_le16(rid);
00b3ed16
GKH
1457
1458 ctlx->outbufsize = sizeof(ctlx->outbuf.rridreq);
1459
1460 ctlx->reapable = mode;
1461 ctlx->cmdcb = cmdcb;
1462 ctlx->usercb = usercb;
1463 ctlx->usercb_data = usercb_data;
1464
1465 /* Submit the CTLX */
1466 result = hfa384x_usbctlx_submit(hw, ctlx);
1467 if (result != 0) {
1468 kfree(ctlx);
1469 } else if (mode == DOWAIT) {
631c8dec 1470 struct usbctlx_rrid_completor completor;
00b3ed16 1471
21dc0f89
MM
1472 result =
1473 hfa384x_usbctlx_complete_sync(hw, ctlx,
1474 init_rrid_completor
1475 (&completor,
1476 &ctlx->inbuf.rridresp,
1477 riddata, riddatalen));
00b3ed16
GKH
1478 }
1479
1480done:
00b3ed16
GKH
1481 return result;
1482}
1483
00b3ed16
GKH
1484/*----------------------------------------------------------------
1485* hfa384x_dowrid
1486*
1487* Constructs a write rid CTLX and issues it.
1488*
1489* NOTE: Any changes to the 'post-submit' code in this function
1490* need to be carried over to hfa384x_cbwrid() since the handling
1491* is virtually identical.
1492*
1493* Arguments:
1494* hw device structure
631c8dec 1495* enum cmd_mode DOWAIT or DOASYNC
00b3ed16
GKH
1496* rid RID code
1497* riddata Data portion of RID formatted for MAC
1498* riddatalen Length of the data portion in bytes
1499* cmdcb command callback for async calls, NULL for DOWAIT calls
1500* usercb user callback for async calls, NULL for DOWAIT calls
1501* usercb_data user supplied data pointer for async calls
1502*
1503* Returns:
1504* 0 success
1505* -ETIMEDOUT timed out waiting for register ready or
1506* command completion
1507* >0 command indicated error, Status and Resp0-2 are
1508* in hw structure.
1509*
1510* Side effects:
1511*
1512* Call context:
1513* interrupt (DOASYNC)
1514* process (DOWAIT or DOASYNC)
1515----------------------------------------------------------------*/
1516static int
297f06ce 1517hfa384x_dowrid(hfa384x_t *hw,
631c8dec 1518 enum cmd_mode mode,
21dc0f89
MM
1519 u16 rid,
1520 void *riddata,
1521 unsigned int riddatalen,
1522 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data)
00b3ed16 1523{
21dc0f89
MM
1524 int result;
1525 hfa384x_usbctlx_t *ctlx;
00b3ed16 1526
00b3ed16 1527 ctlx = usbctlx_alloc();
21dc0f89 1528 if (ctlx == NULL) {
00b3ed16
GKH
1529 result = -ENOMEM;
1530 goto done;
1531 }
1532
1533 /* Initialize the command */
18c7f792
MM
1534 ctlx->outbuf.wridreq.type = cpu_to_le16(HFA384x_USB_WRIDREQ);
1535 ctlx->outbuf.wridreq.frmlen = cpu_to_le16((sizeof
75f49e07
MT
1536 (ctlx->outbuf.wridreq.rid) +
1537 riddatalen + 1) / 2);
18c7f792 1538 ctlx->outbuf.wridreq.rid = cpu_to_le16(rid);
00b3ed16
GKH
1539 memcpy(ctlx->outbuf.wridreq.data, riddata, riddatalen);
1540
1541 ctlx->outbufsize = sizeof(ctlx->outbuf.wridreq.type) +
21dc0f89
MM
1542 sizeof(ctlx->outbuf.wridreq.frmlen) +
1543 sizeof(ctlx->outbuf.wridreq.rid) + riddatalen;
00b3ed16
GKH
1544
1545 ctlx->reapable = mode;
1546 ctlx->cmdcb = cmdcb;
1547 ctlx->usercb = usercb;
1548 ctlx->usercb_data = usercb_data;
1549
1550 /* Submit the CTLX */
1551 result = hfa384x_usbctlx_submit(hw, ctlx);
1552 if (result != 0) {
1553 kfree(ctlx);
1554 } else if (mode == DOWAIT) {
a03742ac 1555 struct usbctlx_cmd_completor completor;
00b3ed16
GKH
1556 hfa384x_cmdresult_t wridresult;
1557
21dc0f89
MM
1558 result = hfa384x_usbctlx_complete_sync(hw,
1559 ctlx,
1560 init_wrid_completor
1561 (&completor,
1562 &ctlx->inbuf.wridresp,
1563 &wridresult));
00b3ed16
GKH
1564 }
1565
1566done:
00b3ed16
GKH
1567 return result;
1568}
1569
1570/*----------------------------------------------------------------
1571* hfa384x_dormem
1572*
1573* Constructs a readmem CTLX and issues it.
1574*
1575* NOTE: Any changes to the 'post-submit' code in this function
1576* need to be carried over to hfa384x_cbrmem() since the handling
1577* is virtually identical.
1578*
1579* Arguments:
1580* hw device structure
1581* mode DOWAIT or DOASYNC
1582* page MAC address space page (CMD format)
1583* offset MAC address space offset
1584* data Ptr to data buffer to receive read
1585* len Length of the data to read (max == 2048)
1586* cmdcb command callback for async calls, NULL for DOWAIT calls
1587* usercb user callback for async calls, NULL for DOWAIT calls
1588* usercb_data user supplied data pointer for async calls
1589*
1590* Returns:
1591* 0 success
1592* -ETIMEDOUT timed out waiting for register ready or
1593* command completion
1594* >0 command indicated error, Status and Resp0-2 are
1595* in hw structure.
1596*
1597* Side effects:
1598*
1599* Call context:
1600* interrupt (DOASYNC)
1601* process (DOWAIT or DOASYNC)
1602----------------------------------------------------------------*/
1603static int
297f06ce 1604hfa384x_dormem(hfa384x_t *hw,
631c8dec 1605 enum cmd_mode mode,
21dc0f89
MM
1606 u16 page,
1607 u16 offset,
1608 void *data,
1609 unsigned int len,
1610 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data)
00b3ed16 1611{
21dc0f89
MM
1612 int result;
1613 hfa384x_usbctlx_t *ctlx;
00b3ed16 1614
00b3ed16 1615 ctlx = usbctlx_alloc();
21dc0f89 1616 if (ctlx == NULL) {
00b3ed16
GKH
1617 result = -ENOMEM;
1618 goto done;
1619 }
1620
1621 /* Initialize the command */
18c7f792 1622 ctlx->outbuf.rmemreq.type = cpu_to_le16(HFA384x_USB_RMEMREQ);
21dc0f89 1623 ctlx->outbuf.rmemreq.frmlen =
18c7f792 1624 cpu_to_le16(sizeof(ctlx->outbuf.rmemreq.offset) +
75f49e07 1625 sizeof(ctlx->outbuf.rmemreq.page) + len);
18c7f792
MM
1626 ctlx->outbuf.rmemreq.offset = cpu_to_le16(offset);
1627 ctlx->outbuf.rmemreq.page = cpu_to_le16(page);
00b3ed16
GKH
1628
1629 ctlx->outbufsize = sizeof(ctlx->outbuf.rmemreq);
1630
75f49e07
MT
1631 pr_debug("type=0x%04x frmlen=%d offset=0x%04x page=0x%04x\n",
1632 ctlx->outbuf.rmemreq.type,
1633 ctlx->outbuf.rmemreq.frmlen,
1634 ctlx->outbuf.rmemreq.offset, ctlx->outbuf.rmemreq.page);
00b3ed16 1635
75f49e07 1636 pr_debug("pktsize=%zd\n", ROUNDUP64(sizeof(ctlx->outbuf.rmemreq)));
00b3ed16
GKH
1637
1638 ctlx->reapable = mode;
1639 ctlx->cmdcb = cmdcb;
1640 ctlx->usercb = usercb;
1641 ctlx->usercb_data = usercb_data;
1642
1643 result = hfa384x_usbctlx_submit(hw, ctlx);
1644 if (result != 0) {
1645 kfree(ctlx);
21dc0f89 1646 } else if (mode == DOWAIT) {
a03742ac 1647 struct usbctlx_rmem_completor completor;
21dc0f89
MM
1648
1649 result =
1650 hfa384x_usbctlx_complete_sync(hw, ctlx,
1651 init_rmem_completor
1652 (&completor,
1653 &ctlx->inbuf.rmemresp, data,
1654 len));
00b3ed16
GKH
1655 }
1656
1657done:
00b3ed16
GKH
1658 return result;
1659}
1660
00b3ed16
GKH
1661/*----------------------------------------------------------------
1662* hfa384x_dowmem
1663*
1664* Constructs a writemem CTLX and issues it.
1665*
1666* NOTE: Any changes to the 'post-submit' code in this function
1667* need to be carried over to hfa384x_cbwmem() since the handling
1668* is virtually identical.
1669*
1670* Arguments:
1671* hw device structure
1672* mode DOWAIT or DOASYNC
1673* page MAC address space page (CMD format)
1674* offset MAC address space offset
1675* data Ptr to data buffer containing write data
1676* len Length of the data to read (max == 2048)
1677* cmdcb command callback for async calls, NULL for DOWAIT calls
1678* usercb user callback for async calls, NULL for DOWAIT calls
1679* usercb_data user supplied data pointer for async calls.
1680*
1681* Returns:
1682* 0 success
1683* -ETIMEDOUT timed out waiting for register ready or
1684* command completion
1685* >0 command indicated error, Status and Resp0-2 are
1686* in hw structure.
1687*
1688* Side effects:
1689*
1690* Call context:
1691* interrupt (DOWAIT)
1692* process (DOWAIT or DOASYNC)
1693----------------------------------------------------------------*/
1694static int
297f06ce 1695hfa384x_dowmem(hfa384x_t *hw,
631c8dec 1696 enum cmd_mode mode,
21dc0f89
MM
1697 u16 page,
1698 u16 offset,
1699 void *data,
1700 unsigned int len,
1701 ctlx_cmdcb_t cmdcb, ctlx_usercb_t usercb, void *usercb_data)
00b3ed16 1702{
21dc0f89
MM
1703 int result;
1704 hfa384x_usbctlx_t *ctlx;
00b3ed16 1705
75f49e07 1706 pr_debug("page=0x%04x offset=0x%04x len=%d\n", page, offset, len);
00b3ed16
GKH
1707
1708 ctlx = usbctlx_alloc();
21dc0f89 1709 if (ctlx == NULL) {
00b3ed16
GKH
1710 result = -ENOMEM;
1711 goto done;
1712 }
1713
1714 /* Initialize the command */
18c7f792 1715 ctlx->outbuf.wmemreq.type = cpu_to_le16(HFA384x_USB_WMEMREQ);
21dc0f89 1716 ctlx->outbuf.wmemreq.frmlen =
18c7f792 1717 cpu_to_le16(sizeof(ctlx->outbuf.wmemreq.offset) +
75f49e07 1718 sizeof(ctlx->outbuf.wmemreq.page) + len);
18c7f792
MM
1719 ctlx->outbuf.wmemreq.offset = cpu_to_le16(offset);
1720 ctlx->outbuf.wmemreq.page = cpu_to_le16(page);
00b3ed16
GKH
1721 memcpy(ctlx->outbuf.wmemreq.data, data, len);
1722
1723 ctlx->outbufsize = sizeof(ctlx->outbuf.wmemreq.type) +
21dc0f89
MM
1724 sizeof(ctlx->outbuf.wmemreq.frmlen) +
1725 sizeof(ctlx->outbuf.wmemreq.offset) +
1726 sizeof(ctlx->outbuf.wmemreq.page) + len;
00b3ed16
GKH
1727
1728 ctlx->reapable = mode;
1729 ctlx->cmdcb = cmdcb;
1730 ctlx->usercb = usercb;
1731 ctlx->usercb_data = usercb_data;
1732
1733 result = hfa384x_usbctlx_submit(hw, ctlx);
1734 if (result != 0) {
1735 kfree(ctlx);
21dc0f89 1736 } else if (mode == DOWAIT) {
a03742ac 1737 struct usbctlx_cmd_completor completor;
21dc0f89
MM
1738 hfa384x_cmdresult_t wmemresult;
1739
1740 result = hfa384x_usbctlx_complete_sync(hw,
1741 ctlx,
1742 init_wmem_completor
1743 (&completor,
1744 &ctlx->inbuf.wmemresp,
1745 &wmemresult));
00b3ed16
GKH
1746 }
1747
1748done:
00b3ed16
GKH
1749 return result;
1750}
1751
00b3ed16
GKH
1752/*----------------------------------------------------------------
1753* hfa384x_drvr_commtallies
1754*
1755* Send a commtallies inquiry to the MAC. Note that this is an async
1756* call that will result in an info frame arriving sometime later.
1757*
1758* Arguments:
1759* hw device structure
1760*
1761* Returns:
1762* zero success.
1763*
1764* Side effects:
1765*
1766* Call context:
1767* process
1768----------------------------------------------------------------*/
297f06ce 1769int hfa384x_drvr_commtallies(hfa384x_t *hw)
00b3ed16
GKH
1770{
1771 hfa384x_metacmd_t cmd;
1772
00b3ed16
GKH
1773 cmd.cmd = HFA384x_CMDCODE_INQ;
1774 cmd.parm0 = HFA384x_IT_COMMTALLIES;
1775 cmd.parm1 = 0;
1776 cmd.parm2 = 0;
1777
1778 hfa384x_docmd_async(hw, &cmd, NULL, NULL, NULL);
1779
00b3ed16
GKH
1780 return 0;
1781}
1782
00b3ed16
GKH
1783/*----------------------------------------------------------------
1784* hfa384x_drvr_disable
1785*
1786* Issues the disable command to stop communications on one of
1787* the MACs 'ports'. Only macport 0 is valid for stations.
1788* APs may also disable macports 1-6. Only ports that have been
1789* previously enabled may be disabled.
1790*
1791* Arguments:
1792* hw device structure
1793* macport MAC port number (host order)
1794*
1795* Returns:
1796* 0 success
1797* >0 f/w reported failure - f/w status code
1798* <0 driver reported error (timeout|bad arg)
1799*
1800* Side effects:
1801*
1802* Call context:
1803* process
1804----------------------------------------------------------------*/
297f06ce 1805int hfa384x_drvr_disable(hfa384x_t *hw, u16 macport)
00b3ed16 1806{
21dc0f89 1807 int result = 0;
00b3ed16 1808
00b3ed16
GKH
1809 if ((!hw->isap && macport != 0) ||
1810 (hw->isap && !(macport <= HFA384x_PORTID_MAX)) ||
21dc0f89 1811 !(hw->port_enabled[macport])) {
00b3ed16
GKH
1812 result = -EINVAL;
1813 } else {
1814 result = hfa384x_cmd_disable(hw, macport);
21dc0f89 1815 if (result == 0)
00b3ed16 1816 hw->port_enabled[macport] = 0;
00b3ed16 1817 }
00b3ed16
GKH
1818 return result;
1819}
1820
00b3ed16
GKH
1821/*----------------------------------------------------------------
1822* hfa384x_drvr_enable
1823*
1824* Issues the enable command to enable communications on one of
1825* the MACs 'ports'. Only macport 0 is valid for stations.
1826* APs may also enable macports 1-6. Only ports that are currently
1827* disabled may be enabled.
1828*
1829* Arguments:
1830* hw device structure
1831* macport MAC port number
1832*
1833* Returns:
1834* 0 success
1835* >0 f/w reported failure - f/w status code
1836* <0 driver reported error (timeout|bad arg)
1837*
1838* Side effects:
1839*
1840* Call context:
1841* process
1842----------------------------------------------------------------*/
297f06ce 1843int hfa384x_drvr_enable(hfa384x_t *hw, u16 macport)
00b3ed16 1844{
21dc0f89 1845 int result = 0;
00b3ed16 1846
00b3ed16
GKH
1847 if ((!hw->isap && macport != 0) ||
1848 (hw->isap && !(macport <= HFA384x_PORTID_MAX)) ||
21dc0f89 1849 (hw->port_enabled[macport])) {
00b3ed16
GKH
1850 result = -EINVAL;
1851 } else {
1852 result = hfa384x_cmd_enable(hw, macport);
21dc0f89 1853 if (result == 0)
00b3ed16 1854 hw->port_enabled[macport] = 1;
00b3ed16 1855 }
00b3ed16
GKH
1856 return result;
1857}
1858
00b3ed16
GKH
1859/*----------------------------------------------------------------
1860* hfa384x_drvr_flashdl_enable
1861*
1862* Begins the flash download state. Checks to see that we're not
1863* already in a download state and that a port isn't enabled.
1864* Sets the download state and retrieves the flash download
1865* buffer location, buffer size, and timeout length.
1866*
1867* Arguments:
1868* hw device structure
1869*
1870* Returns:
1871* 0 success
1872* >0 f/w reported error - f/w status code
1873* <0 driver reported error
1874*
1875* Side effects:
1876*
1877* Call context:
1878* process
1879----------------------------------------------------------------*/
297f06ce 1880int hfa384x_drvr_flashdl_enable(hfa384x_t *hw)
00b3ed16 1881{
21dc0f89
MM
1882 int result = 0;
1883 int i;
00b3ed16 1884
00b3ed16 1885 /* Check that a port isn't active */
21dc0f89
MM
1886 for (i = 0; i < HFA384x_PORTID_MAX; i++) {
1887 if (hw->port_enabled[i]) {
a7cf7bae 1888 pr_debug("called when port enabled.\n");
00b3ed16
GKH
1889 return -EINVAL;
1890 }
1891 }
1892
1893 /* Check that we're not already in a download state */
21dc0f89 1894 if (hw->dlstate != HFA384x_DLSTATE_DISABLED)
00b3ed16 1895 return -EINVAL;
00b3ed16
GKH
1896
1897 /* Retrieve the buffer loc&size and timeout */
46800b22 1898 result = hfa384x_drvr_getconfig(hw, HFA384x_RID_DOWNLOADBUFFER,
3f4b4e77
AE
1899 &(hw->bufinfo), sizeof(hw->bufinfo));
1900 if (result)
00b3ed16 1901 return result;
3f4b4e77 1902
18c7f792
MM
1903 hw->bufinfo.page = le16_to_cpu(hw->bufinfo.page);
1904 hw->bufinfo.offset = le16_to_cpu(hw->bufinfo.offset);
1905 hw->bufinfo.len = le16_to_cpu(hw->bufinfo.len);
46800b22 1906 result = hfa384x_drvr_getconfig16(hw, HFA384x_RID_MAXLOADTIME,
3f4b4e77
AE
1907 &(hw->dltimeout));
1908 if (result)
00b3ed16 1909 return result;
3f4b4e77 1910
18c7f792 1911 hw->dltimeout = le16_to_cpu(hw->dltimeout);
00b3ed16 1912
a7cf7bae 1913 pr_debug("flashdl_enable\n");
00b3ed16
GKH
1914
1915 hw->dlstate = HFA384x_DLSTATE_FLASHENABLED;
8a251b55 1916
00b3ed16
GKH
1917 return result;
1918}
1919
00b3ed16
GKH
1920/*----------------------------------------------------------------
1921* hfa384x_drvr_flashdl_disable
1922*
1923* Ends the flash download state. Note that this will cause the MAC
1924* firmware to restart.
1925*
1926* Arguments:
1927* hw device structure
1928*
1929* Returns:
1930* 0 success
1931* >0 f/w reported error - f/w status code
1932* <0 driver reported error
1933*
1934* Side effects:
1935*
1936* Call context:
1937* process
1938----------------------------------------------------------------*/
297f06ce 1939int hfa384x_drvr_flashdl_disable(hfa384x_t *hw)
00b3ed16 1940{
00b3ed16 1941 /* Check that we're already in the download state */
21dc0f89 1942 if (hw->dlstate != HFA384x_DLSTATE_FLASHENABLED)
00b3ed16 1943 return -EINVAL;
00b3ed16 1944
a7cf7bae 1945 pr_debug("flashdl_enable\n");
00b3ed16
GKH
1946
1947 /* There isn't much we can do at this point, so I don't */
1948 /* bother w/ the return value */
21dc0f89 1949 hfa384x_cmd_download(hw, HFA384x_PROGMODE_DISABLE, 0, 0, 0);
00b3ed16
GKH
1950 hw->dlstate = HFA384x_DLSTATE_DISABLED;
1951
00b3ed16
GKH
1952 return 0;
1953}
1954
00b3ed16
GKH
1955/*----------------------------------------------------------------
1956* hfa384x_drvr_flashdl_write
1957*
1958* Performs a FLASH download of a chunk of data. First checks to see
1959* that we're in the FLASH download state, then sets the download
1960* mode, uses the aux functions to 1) copy the data to the flash
1961* buffer, 2) sets the download 'write flash' mode, 3) readback and
1962* compare. Lather rinse, repeat as many times an necessary to get
1963* all the given data into flash.
1964* When all data has been written using this function (possibly
1965* repeatedly), call drvr_flashdl_disable() to end the download state
1966* and restart the MAC.
1967*
1968* Arguments:
1969* hw device structure
1970* daddr Card address to write to. (host order)
1971* buf Ptr to data to write.
1972* len Length of data (host order).
1973*
1974* Returns:
1975* 0 success
1976* >0 f/w reported error - f/w status code
1977* <0 driver reported error
1978*
1979* Side effects:
1980*
1981* Call context:
1982* process
1983----------------------------------------------------------------*/
297f06ce 1984int hfa384x_drvr_flashdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len)
00b3ed16 1985{
21dc0f89
MM
1986 int result = 0;
1987 u32 dlbufaddr;
1988 int nburns;
1989 u32 burnlen;
1990 u32 burndaddr;
1991 u16 burnlo;
1992 u16 burnhi;
1993 int nwrites;
1994 u8 *writebuf;
1995 u16 writepage;
1996 u16 writeoffset;
1997 u32 writelen;
1998 int i;
1999 int j;
00b3ed16 2000
a7cf7bae 2001 pr_debug("daddr=0x%08x len=%d\n", daddr, len);
00b3ed16
GKH
2002
2003 /* Check that we're in the flash download state */
21dc0f89 2004 if (hw->dlstate != HFA384x_DLSTATE_FLASHENABLED)
00b3ed16 2005 return -EINVAL;
00b3ed16 2006
a2120136
SSA
2007 netdev_info(hw->wlandev->netdev,
2008 "Download %d bytes to flash @0x%06x\n", len, daddr);
00b3ed16
GKH
2009
2010 /* Convert to flat address for arithmetic */
2011 /* NOTE: dlbuffer RID stores the address in AUX format */
21dc0f89
MM
2012 dlbufaddr =
2013 HFA384x_ADDR_AUX_MKFLAT(hw->bufinfo.page, hw->bufinfo.offset);
75f49e07
MT
2014 pr_debug("dlbuf.page=0x%04x dlbuf.offset=0x%04x dlbufaddr=0x%08x\n",
2015 hw->bufinfo.page, hw->bufinfo.offset, dlbufaddr);
00b3ed16
GKH
2016 /* Calculations to determine how many fills of the dlbuffer to do
2017 * and how many USB wmemreq's to do for each fill. At this point
2018 * in time, the dlbuffer size and the wmemreq size are the same.
2019 * Therefore, nwrites should always be 1. The extra complexity
2020 * here is a hedge against future changes.
2021 */
2022
2023 /* Figure out how many times to do the flash programming */
2024 nburns = len / hw->bufinfo.len;
2025 nburns += (len % hw->bufinfo.len) ? 1 : 0;
2026
2027 /* For each flash program cycle, how many USB wmemreq's are needed? */
2028 nwrites = hw->bufinfo.len / HFA384x_USB_RWMEM_MAXLEN;
2029 nwrites += (hw->bufinfo.len % HFA384x_USB_RWMEM_MAXLEN) ? 1 : 0;
2030
2031 /* For each burn */
21dc0f89 2032 for (i = 0; i < nburns; i++) {
00b3ed16
GKH
2033 /* Get the dest address and len */
2034 burnlen = (len - (hw->bufinfo.len * i)) > hw->bufinfo.len ?
21dc0f89 2035 hw->bufinfo.len : (len - (hw->bufinfo.len * i));
00b3ed16
GKH
2036 burndaddr = daddr + (hw->bufinfo.len * i);
2037 burnlo = HFA384x_ADDR_CMD_MKOFF(burndaddr);
2038 burnhi = HFA384x_ADDR_CMD_MKPAGE(burndaddr);
2039
263b8bb9 2040 netdev_info(hw->wlandev->netdev, "Writing %d bytes to flash @0x%06x\n",
3f2d6564 2041 burnlen, burndaddr);
00b3ed16
GKH
2042
2043 /* Set the download mode */
2044 result = hfa384x_cmd_download(hw, HFA384x_PROGMODE_NV,
21dc0f89
MM
2045 burnlo, burnhi, burnlen);
2046 if (result) {
a2120136
SSA
2047 netdev_err(hw->wlandev->netdev,
2048 "download(NV,lo=%x,hi=%x,len=%x) cmd failed, result=%d. Aborting d/l\n",
2049 burnlo, burnhi, burnlen, result);
00b3ed16
GKH
2050 goto exit_proc;
2051 }
2052
2053 /* copy the data to the flash download buffer */
21dc0f89 2054 for (j = 0; j < nwrites; j++) {
00b3ed16 2055 writebuf = buf +
21dc0f89
MM
2056 (i * hw->bufinfo.len) +
2057 (j * HFA384x_USB_RWMEM_MAXLEN);
2058
2059 writepage = HFA384x_ADDR_CMD_MKPAGE(dlbufaddr +
631c8dec
EH
2060 (j * HFA384x_USB_RWMEM_MAXLEN));
2061 writeoffset = HFA384x_ADDR_CMD_MKOFF(dlbufaddr +
2062 (j * HFA384x_USB_RWMEM_MAXLEN));
21dc0f89
MM
2063
2064 writelen = burnlen - (j * HFA384x_USB_RWMEM_MAXLEN);
2065 writelen = writelen > HFA384x_USB_RWMEM_MAXLEN ?
2066 HFA384x_USB_RWMEM_MAXLEN : writelen;
2067
2068 result = hfa384x_dowmem_wait(hw,
2069 writepage,
2070 writeoffset,
2071 writebuf, writelen);
00b3ed16
GKH
2072 }
2073
2074 /* set the download 'write flash' mode */
2075 result = hfa384x_cmd_download(hw,
21dc0f89
MM
2076 HFA384x_PROGMODE_NVWRITE,
2077 0, 0, 0);
2078 if (result) {
263b8bb9 2079 netdev_err(hw->wlandev->netdev,
3f2d6564
SSA
2080 "download(NVWRITE,lo=%x,hi=%x,len=%x) cmd failed, result=%d. Aborting d/l\n",
2081 burnlo, burnhi, burnlen, result);
00b3ed16
GKH
2082 goto exit_proc;
2083 }
2084
2085 /* TODO: We really should do a readback and compare. */
2086 }
2087
2088exit_proc:
2089
2090 /* Leave the firmware in the 'post-prog' mode. flashdl_disable will */
2091 /* actually disable programming mode. Remember, that will cause the */
2092 /* the firmware to effectively reset itself. */
2093
00b3ed16
GKH
2094 return result;
2095}
2096
00b3ed16
GKH
2097/*----------------------------------------------------------------
2098* hfa384x_drvr_getconfig
2099*
2100* Performs the sequence necessary to read a config/info item.
2101*
2102* Arguments:
2103* hw device structure
2104* rid config/info record id (host order)
2105* buf host side record buffer. Upon return it will
2106* contain the body portion of the record (minus the
2107* RID and len).
2108* len buffer length (in bytes, should match record length)
2109*
2110* Returns:
2111* 0 success
2112* >0 f/w reported error - f/w status code
2113* <0 driver reported error
631c8dec 2114* -ENODATA length mismatch between argument and retrieved
00b3ed16
GKH
2115* record.
2116*
2117* Side effects:
2118*
2119* Call context:
2120* process
2121----------------------------------------------------------------*/
297f06ce 2122int hfa384x_drvr_getconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len)
00b3ed16 2123{
102db1fc 2124 return hfa384x_dorrid_wait(hw, rid, buf, len);
00b3ed16
GKH
2125}
2126
2127/*----------------------------------------------------------------
2128 * hfa384x_drvr_getconfig_async
2129 *
2130 * Performs the sequence necessary to perform an async read of
2131 * of a config/info item.
2132 *
2133 * Arguments:
2134 * hw device structure
2135 * rid config/info record id (host order)
2136 * buf host side record buffer. Upon return it will
2137 * contain the body portion of the record (minus the
2138 * RID and len).
2139 * len buffer length (in bytes, should match record length)
2140 * cbfn caller supplied callback, called when the command
2141 * is done (successful or not).
2142 * cbfndata pointer to some caller supplied data that will be
2143 * passed in as an argument to the cbfn.
2144 *
2145 * Returns:
2146 * nothing the cbfn gets a status argument identifying if
2147 * any errors occur.
2148 * Side effects:
2149 * Queues an hfa384x_usbcmd_t for subsequent execution.
2150 *
2151 * Call context:
2152 * Any
2153 ----------------------------------------------------------------*/
2154int
297f06ce 2155hfa384x_drvr_getconfig_async(hfa384x_t *hw,
21dc0f89 2156 u16 rid, ctlx_usercb_t usercb, void *usercb_data)
00b3ed16 2157{
21dc0f89
MM
2158 return hfa384x_dorrid_async(hw, rid, NULL, 0,
2159 hfa384x_cb_rrid, usercb, usercb_data);
00b3ed16
GKH
2160}
2161
2162/*----------------------------------------------------------------
2163 * hfa384x_drvr_setconfig_async
2164 *
2165 * Performs the sequence necessary to write a config/info item.
2166 *
2167 * Arguments:
2168 * hw device structure
2169 * rid config/info record id (in host order)
2170 * buf host side record buffer
2171 * len buffer length (in bytes)
2172 * usercb completion callback
2173 * usercb_data completion callback argument
2174 *
2175 * Returns:
2176 * 0 success
2177 * >0 f/w reported error - f/w status code
2178 * <0 driver reported error
2179 *
2180 * Side effects:
2181 *
2182 * Call context:
2183 * process
2184 ----------------------------------------------------------------*/
2185int
297f06ce 2186hfa384x_drvr_setconfig_async(hfa384x_t *hw,
21dc0f89
MM
2187 u16 rid,
2188 void *buf,
2189 u16 len, ctlx_usercb_t usercb, void *usercb_data)
00b3ed16
GKH
2190{
2191 return hfa384x_dowrid_async(hw, rid, buf, len,
2192 hfa384x_cb_status, usercb, usercb_data);
2193}
2194
00b3ed16
GKH
2195/*----------------------------------------------------------------
2196* hfa384x_drvr_ramdl_disable
2197*
2198* Ends the ram download state.
2199*
2200* Arguments:
2201* hw device structure
2202*
2203* Returns:
2204* 0 success
2205* >0 f/w reported error - f/w status code
2206* <0 driver reported error
2207*
2208* Side effects:
2209*
2210* Call context:
2211* process
2212----------------------------------------------------------------*/
297f06ce 2213int hfa384x_drvr_ramdl_disable(hfa384x_t *hw)
00b3ed16 2214{
00b3ed16 2215 /* Check that we're already in the download state */
21dc0f89 2216 if (hw->dlstate != HFA384x_DLSTATE_RAMENABLED)
00b3ed16 2217 return -EINVAL;
00b3ed16 2218
a7cf7bae 2219 pr_debug("ramdl_disable()\n");
00b3ed16
GKH
2220
2221 /* There isn't much we can do at this point, so I don't */
2222 /* bother w/ the return value */
21dc0f89 2223 hfa384x_cmd_download(hw, HFA384x_PROGMODE_DISABLE, 0, 0, 0);
00b3ed16
GKH
2224 hw->dlstate = HFA384x_DLSTATE_DISABLED;
2225
00b3ed16
GKH
2226 return 0;
2227}
2228
00b3ed16
GKH
2229/*----------------------------------------------------------------
2230* hfa384x_drvr_ramdl_enable
2231*
2232* Begins the ram download state. Checks to see that we're not
2233* already in a download state and that a port isn't enabled.
2234* Sets the download state and calls cmd_download with the
2235* ENABLE_VOLATILE subcommand and the exeaddr argument.
2236*
2237* Arguments:
2238* hw device structure
2239* exeaddr the card execution address that will be
2240* jumped to when ramdl_disable() is called
2241* (host order).
2242*
2243* Returns:
2244* 0 success
2245* >0 f/w reported error - f/w status code
2246* <0 driver reported error
2247*
2248* Side effects:
2249*
2250* Call context:
2251* process
2252----------------------------------------------------------------*/
297f06ce 2253int hfa384x_drvr_ramdl_enable(hfa384x_t *hw, u32 exeaddr)
00b3ed16 2254{
21dc0f89
MM
2255 int result = 0;
2256 u16 lowaddr;
2257 u16 hiaddr;
2258 int i;
8a251b55 2259
00b3ed16 2260 /* Check that a port isn't active */
21dc0f89
MM
2261 for (i = 0; i < HFA384x_PORTID_MAX; i++) {
2262 if (hw->port_enabled[i]) {
263b8bb9 2263 netdev_err(hw->wlandev->netdev,
3f2d6564 2264 "Can't download with a macport enabled.\n");
00b3ed16
GKH
2265 return -EINVAL;
2266 }
2267 }
2268
2269 /* Check that we're not already in a download state */
21dc0f89 2270 if (hw->dlstate != HFA384x_DLSTATE_DISABLED) {
263b8bb9 2271 netdev_err(hw->wlandev->netdev, "Download state not disabled.\n");
00b3ed16
GKH
2272 return -EINVAL;
2273 }
2274
a7cf7bae 2275 pr_debug("ramdl_enable, exeaddr=0x%08x\n", exeaddr);
00b3ed16
GKH
2276
2277 /* Call the download(1,addr) function */
2278 lowaddr = HFA384x_ADDR_CMD_MKOFF(exeaddr);
21dc0f89 2279 hiaddr = HFA384x_ADDR_CMD_MKPAGE(exeaddr);
00b3ed16
GKH
2280
2281 result = hfa384x_cmd_download(hw, HFA384x_PROGMODE_RAM,
21dc0f89 2282 lowaddr, hiaddr, 0);
00b3ed16 2283
21dc0f89 2284 if (result == 0) {
00b3ed16
GKH
2285 /* Set the download state */
2286 hw->dlstate = HFA384x_DLSTATE_RAMENABLED;
2287 } else {
75f49e07
MT
2288 pr_debug("cmd_download(0x%04x, 0x%04x) failed, result=%d.\n",
2289 lowaddr, hiaddr, result);
00b3ed16
GKH
2290 }
2291
00b3ed16
GKH
2292 return result;
2293}
2294
00b3ed16
GKH
2295/*----------------------------------------------------------------
2296* hfa384x_drvr_ramdl_write
2297*
2298* Performs a RAM download of a chunk of data. First checks to see
2299* that we're in the RAM download state, then uses the [read|write]mem USB
2300* commands to 1) copy the data, 2) readback and compare. The download
2301* state is unaffected. When all data has been written using
2302* this function, call drvr_ramdl_disable() to end the download state
2303* and restart the MAC.
2304*
2305* Arguments:
2306* hw device structure
2307* daddr Card address to write to. (host order)
2308* buf Ptr to data to write.
2309* len Length of data (host order).
2310*
2311* Returns:
2312* 0 success
2313* >0 f/w reported error - f/w status code
2314* <0 driver reported error
2315*
2316* Side effects:
2317*
2318* Call context:
2319* process
2320----------------------------------------------------------------*/
297f06ce 2321int hfa384x_drvr_ramdl_write(hfa384x_t *hw, u32 daddr, void *buf, u32 len)
00b3ed16 2322{
21dc0f89
MM
2323 int result = 0;
2324 int nwrites;
2325 u8 *data = buf;
2326 int i;
2327 u32 curraddr;
2328 u16 currpage;
2329 u16 curroffset;
2330 u16 currlen;
8a251b55 2331
00b3ed16 2332 /* Check that we're in the ram download state */
21dc0f89 2333 if (hw->dlstate != HFA384x_DLSTATE_RAMENABLED)
00b3ed16 2334 return -EINVAL;
00b3ed16 2335
a2120136
SSA
2336 netdev_info(hw->wlandev->netdev, "Writing %d bytes to ram @0x%06x\n",
2337 len, daddr);
00b3ed16
GKH
2338
2339 /* How many dowmem calls? */
2340 nwrites = len / HFA384x_USB_RWMEM_MAXLEN;
2341 nwrites += len % HFA384x_USB_RWMEM_MAXLEN ? 1 : 0;
2342
2343 /* Do blocking wmem's */
21dc0f89 2344 for (i = 0; i < nwrites; i++) {
00b3ed16
GKH
2345 /* make address args */
2346 curraddr = daddr + (i * HFA384x_USB_RWMEM_MAXLEN);
2347 currpage = HFA384x_ADDR_CMD_MKPAGE(curraddr);
2348 curroffset = HFA384x_ADDR_CMD_MKOFF(curraddr);
2349 currlen = len - (i * HFA384x_USB_RWMEM_MAXLEN);
21dc0f89 2350 if (currlen > HFA384x_USB_RWMEM_MAXLEN)
00b3ed16 2351 currlen = HFA384x_USB_RWMEM_MAXLEN;
00b3ed16 2352
21dc0f89
MM
2353 /* Do blocking ctlx */
2354 result = hfa384x_dowmem_wait(hw,
2355 currpage,
2356 curroffset,
2357 data +
2358 (i * HFA384x_USB_RWMEM_MAXLEN),
2359 currlen);
00b3ed16 2360
21dc0f89
MM
2361 if (result)
2362 break;
00b3ed16
GKH
2363
2364 /* TODO: We really should have a readback. */
2365 }
2366
00b3ed16
GKH
2367 return result;
2368}
2369
00b3ed16
GKH
2370/*----------------------------------------------------------------
2371* hfa384x_drvr_readpda
2372*
2373* Performs the sequence to read the PDA space. Note there is no
2374* drvr_writepda() function. Writing a PDA is
2375* generally implemented by a calling component via calls to
2376* cmd_download and writing to the flash download buffer via the
2377* aux regs.
2378*
2379* Arguments:
2380* hw device structure
2381* buf buffer to store PDA in
2382* len buffer length
2383*
2384* Returns:
2385* 0 success
2386* >0 f/w reported error - f/w status code
2387* <0 driver reported error
1a6dfce7 2388* -ETIMEDOUT timeout waiting for the cmd regs to become
00b3ed16
GKH
2389* available, or waiting for the control reg
2390* to indicate the Aux port is enabled.
2391* -ENODATA the buffer does NOT contain a valid PDA.
2392* Either the card PDA is bad, or the auxdata
2393* reads are giving us garbage.
2394
2395*
2396* Side effects:
2397*
2398* Call context:
2399* process or non-card interrupt.
2400----------------------------------------------------------------*/
297f06ce 2401int hfa384x_drvr_readpda(hfa384x_t *hw, void *buf, unsigned int len)
00b3ed16 2402{
21dc0f89
MM
2403 int result = 0;
2404 u16 *pda = buf;
2405 int pdaok = 0;
2406 int morepdrs = 1;
2407 int currpdr = 0; /* word offset of the current pdr */
2408 size_t i;
2409 u16 pdrlen; /* pdr length in bytes, host order */
2410 u16 pdrcode; /* pdr code, host order */
2411 u16 currpage;
2412 u16 curroffset;
00b3ed16 2413 struct pdaloc {
21dc0f89
MM
2414 u32 cardaddr;
2415 u16 auxctl;
2416 } pdaloc[] = {
2417 {
2418 HFA3842_PDA_BASE, 0}, {
2419 HFA3841_PDA_BASE, 0}, {
2420 HFA3841_PDA_BOGUS_BASE, 0}
00b3ed16
GKH
2421 };
2422
00b3ed16 2423 /* Read the pda from each known address. */
21dc0f89 2424 for (i = 0; i < ARRAY_SIZE(pdaloc); i++) {
00b3ed16
GKH
2425 /* Make address */
2426 currpage = HFA384x_ADDR_CMD_MKPAGE(pdaloc[i].cardaddr);
2427 curroffset = HFA384x_ADDR_CMD_MKOFF(pdaloc[i].cardaddr);
2428
631c8dec
EH
2429 /* units of bytes */
2430 result = hfa384x_dormem_wait(hw, currpage, curroffset, buf,
2431 len);
00b3ed16
GKH
2432
2433 if (result) {
263b8bb9 2434 netdev_warn(hw->wlandev->netdev,
3f2d6564
SSA
2435 "Read from index %zd failed, continuing\n",
2436 i);
00b3ed16
GKH
2437 continue;
2438 }
2439
2440 /* Test for garbage */
2441 pdaok = 1; /* initially assume good */
2442 morepdrs = 1;
21dc0f89 2443 while (pdaok && morepdrs) {
18c7f792
MM
2444 pdrlen = le16_to_cpu(pda[currpdr]) * 2;
2445 pdrcode = le16_to_cpu(pda[currpdr + 1]);
00b3ed16 2446 /* Test the record length */
21dc0f89 2447 if (pdrlen > HFA384x_PDR_LEN_MAX || pdrlen == 0) {
a2120136
SSA
2448 netdev_err(hw->wlandev->netdev,
2449 "pdrlen invalid=%d\n", pdrlen);
00b3ed16
GKH
2450 pdaok = 0;
2451 break;
2452 }
2453 /* Test the code */
21dc0f89 2454 if (!hfa384x_isgood_pdrcode(pdrcode)) {
263b8bb9 2455 netdev_err(hw->wlandev->netdev, "pdrcode invalid=%d\n",
3f2d6564 2456 pdrcode);
00b3ed16
GKH
2457 pdaok = 0;
2458 break;
2459 }
2460 /* Test for completion */
21dc0f89 2461 if (pdrcode == HFA384x_PDR_END_OF_PDA)
00b3ed16 2462 morepdrs = 0;
00b3ed16
GKH
2463
2464 /* Move to the next pdr (if necessary) */
21dc0f89 2465 if (morepdrs) {
00b3ed16 2466 /* note the access to pda[], need words here */
18c7f792 2467 currpdr += le16_to_cpu(pda[currpdr]) + 1;
00b3ed16
GKH
2468 }
2469 }
21dc0f89 2470 if (pdaok) {
263b8bb9 2471 netdev_info(hw->wlandev->netdev,
3f2d6564
SSA
2472 "PDA Read from 0x%08x in %s space.\n",
2473 pdaloc[i].cardaddr,
2474 pdaloc[i].auxctl == 0 ? "EXTDS" :
2475 pdaloc[i].auxctl == 1 ? "NV" :
2476 pdaloc[i].auxctl == 2 ? "PHY" :
2477 pdaloc[i].auxctl == 3 ? "ICSRAM" :
2478 "<bogus auxctl>");
00b3ed16
GKH
2479 break;
2480 }
2481 }
2482 result = pdaok ? 0 : -ENODATA;
2483
21dc0f89 2484 if (result)
a7cf7bae 2485 pr_debug("Failure: pda is not okay\n");
00b3ed16 2486
00b3ed16
GKH
2487 return result;
2488}
2489
00b3ed16
GKH
2490/*----------------------------------------------------------------
2491* hfa384x_drvr_setconfig
2492*
2493* Performs the sequence necessary to write a config/info item.
2494*
2495* Arguments:
2496* hw device structure
2497* rid config/info record id (in host order)
2498* buf host side record buffer
2499* len buffer length (in bytes)
2500*
2501* Returns:
2502* 0 success
2503* >0 f/w reported error - f/w status code
2504* <0 driver reported error
2505*
2506* Side effects:
2507*
2508* Call context:
2509* process
2510----------------------------------------------------------------*/
297f06ce 2511int hfa384x_drvr_setconfig(hfa384x_t *hw, u16 rid, void *buf, u16 len)
00b3ed16
GKH
2512{
2513 return hfa384x_dowrid_wait(hw, rid, buf, len);
2514}
2515
2516/*----------------------------------------------------------------
2517* hfa384x_drvr_start
2518*
2519* Issues the MAC initialize command, sets up some data structures,
2520* and enables the interrupts. After this function completes, the
2521* low-level stuff should be ready for any/all commands.
2522*
2523* Arguments:
2524* hw device structure
2525* Returns:
2526* 0 success
2527* >0 f/w reported error - f/w status code
2528* <0 driver reported error
2529*
2530* Side effects:
2531*
2532* Call context:
2533* process
2534----------------------------------------------------------------*/
7b7e7e84 2535
297f06ce 2536int hfa384x_drvr_start(hfa384x_t *hw)
00b3ed16 2537{
21dc0f89
MM
2538 int result, result1, result2;
2539 u16 status;
00b3ed16
GKH
2540
2541 might_sleep();
2542
7b7e7e84
RK
2543 /* Clear endpoint stalls - but only do this if the endpoint
2544 * is showing a stall status. Some prism2 cards seem to behave
2545 * badly if a clear_halt is called when the endpoint is already
2546 * ok
2547 */
21dc0f89
MM
2548 result =
2549 usb_get_status(hw->usb, USB_RECIP_ENDPOINT, hw->endp_in, &status);
7b7e7e84 2550 if (result < 0) {
263b8bb9 2551 netdev_err(hw->wlandev->netdev, "Cannot get bulk in endpoint status.\n");
7b7e7e84
RK
2552 goto done;
2553 }
21dc0f89 2554 if ((status == 1) && usb_clear_halt(hw->usb, hw->endp_in))
263b8bb9 2555 netdev_err(hw->wlandev->netdev, "Failed to reset bulk in endpoint.\n");
00b3ed16 2556
21dc0f89
MM
2557 result =
2558 usb_get_status(hw->usb, USB_RECIP_ENDPOINT, hw->endp_out, &status);
7b7e7e84 2559 if (result < 0) {
263b8bb9 2560 netdev_err(hw->wlandev->netdev, "Cannot get bulk out endpoint status.\n");
7b7e7e84
RK
2561 goto done;
2562 }
21dc0f89 2563 if ((status == 1) && usb_clear_halt(hw->usb, hw->endp_out))
263b8bb9 2564 netdev_err(hw->wlandev->netdev, "Failed to reset bulk out endpoint.\n");
00b3ed16
GKH
2565
2566 /* Synchronous unlink, in case we're trying to restart the driver */
2567 usb_kill_urb(&hw->rx_urb);
2568
2569 /* Post the IN urb */
2570 result = submit_rx_urb(hw, GFP_KERNEL);
2571 if (result != 0) {
263b8bb9 2572 netdev_err(hw->wlandev->netdev,
3f2d6564
SSA
2573 "Fatal, failed to submit RX URB, result=%d\n",
2574 result);
00b3ed16
GKH
2575 goto done;
2576 }
2577
7b7e7e84
RK
2578 /* Call initialize twice, with a 1 second sleep in between.
2579 * This is a nasty work-around since many prism2 cards seem to
2580 * need time to settle after an init from cold. The second
2581 * call to initialize in theory is not necessary - but we call
2582 * it anyway as a double insurance policy:
2583 * 1) If the first init should fail, the second may well succeed
2584 * and the card can still be used
2585 * 2) It helps ensures all is well with the card after the first
2586 * init and settle time.
2587 */
2588 result1 = hfa384x_cmd_initialize(hw);
2589 msleep(1000);
96b1971a
SSA
2590 result = hfa384x_cmd_initialize(hw);
2591 result2 = result;
7b7e7e84
RK
2592 if (result1 != 0) {
2593 if (result2 != 0) {
263b8bb9 2594 netdev_err(hw->wlandev->netdev,
3f2d6564
SSA
2595 "cmd_initialize() failed on two attempts, results %d and %d\n",
2596 result1, result2);
7b7e7e84
RK
2597 usb_kill_urb(&hw->rx_urb);
2598 goto done;
2599 } else {
75f49e07
MT
2600 pr_debug("First cmd_initialize() failed (result %d),\n",
2601 result1);
4ffab688 2602 pr_debug("but second attempt succeeded. All should be ok\n");
7b7e7e84
RK
2603 }
2604 } else if (result2 != 0) {
263b8bb9 2605 netdev_warn(hw->wlandev->netdev, "First cmd_initialize() succeeded, but second attempt failed (result=%d)\n",
3f2d6564 2606 result2);
263b8bb9 2607 netdev_warn(hw->wlandev->netdev,
3f2d6564 2608 "Most likely the card will be functional\n");
21dc0f89 2609 goto done;
00b3ed16
GKH
2610 }
2611
2612 hw->state = HFA384x_STATE_RUNNING;
2613
2614done:
00b3ed16
GKH
2615 return result;
2616}
2617
00b3ed16
GKH
2618/*----------------------------------------------------------------
2619* hfa384x_drvr_stop
2620*
2621* Shuts down the MAC to the point where it is safe to unload the
2622* driver. Any subsystem that may be holding a data or function
2623* ptr into the driver must be cleared/deinitialized.
2624*
2625* Arguments:
2626* hw device structure
2627* Returns:
2628* 0 success
2629* >0 f/w reported error - f/w status code
2630* <0 driver reported error
2631*
2632* Side effects:
2633*
2634* Call context:
2635* process
2636----------------------------------------------------------------*/
297f06ce 2637int hfa384x_drvr_stop(hfa384x_t *hw)
00b3ed16 2638{
21dc0f89 2639 int i;
00b3ed16
GKH
2640
2641 might_sleep();
2642
2643 /* There's no need for spinlocks here. The USB "disconnect"
2644 * function sets this "removed" flag and then calls us.
2645 */
21dc0f89 2646 if (!hw->wlandev->hwremoved) {
00b3ed16
GKH
2647 /* Call initialize to leave the MAC in its 'reset' state */
2648 hfa384x_cmd_initialize(hw);
2649
2650 /* Cancel the rxurb */
2651 usb_kill_urb(&hw->rx_urb);
2652 }
2653
2654 hw->link_status = HFA384x_LINK_NOTCONNECTED;
2655 hw->state = HFA384x_STATE_INIT;
2656
2657 del_timer_sync(&hw->commsqual_timer);
2658
2659 /* Clear all the port status */
21dc0f89 2660 for (i = 0; i < HFA384x_NUMPORTS_MAX; i++)
00b3ed16 2661 hw->port_enabled[i] = 0;
00b3ed16 2662
4764ca98 2663 return 0;
00b3ed16
GKH
2664}
2665
2666/*----------------------------------------------------------------
2667* hfa384x_drvr_txframe
2668*
2669* Takes a frame from prism2sta and queues it for transmission.
2670*
2671* Arguments:
2672* hw device structure
2673* skb packet buffer struct. Contains an 802.11
2674* data frame.
2675* p80211_hdr points to the 802.11 header for the packet.
2676* Returns:
2677* 0 Success and more buffs available
2678* 1 Success but no more buffs
2679* 2 Allocation failure
2680* 4 Buffer full or queue busy
2681*
2682* Side effects:
2683*
2684* Call context:
2685* interrupt
2686----------------------------------------------------------------*/
297f06ce 2687int hfa384x_drvr_txframe(hfa384x_t *hw, struct sk_buff *skb,
93df38e5 2688 union p80211_hdr *p80211_hdr,
51e4896a 2689 struct p80211_metawep *p80211_wep)
00b3ed16 2690{
21dc0f89
MM
2691 int usbpktlen = sizeof(hfa384x_tx_frame_t);
2692 int result;
2693 int ret;
2694 char *ptr;
00b3ed16 2695
00b3ed16 2696 if (hw->tx_urb.status == -EINPROGRESS) {
263b8bb9 2697 netdev_warn(hw->wlandev->netdev, "TX URB already in use\n");
00b3ed16
GKH
2698 result = 3;
2699 goto exit;
2700 }
2701
2702 /* Build Tx frame structure */
2703 /* Set up the control field */
2704 memset(&hw->txbuff.txfrm.desc, 0, sizeof(hw->txbuff.txfrm.desc));
2705
2706 /* Setup the usb type field */
18c7f792 2707 hw->txbuff.type = cpu_to_le16(HFA384x_USB_TXFRM);
00b3ed16
GKH
2708
2709 /* Set up the sw_support field to identify this frame */
2710 hw->txbuff.txfrm.desc.sw_support = 0x0123;
2711
2712/* Tx complete and Tx exception disable per dleach. Might be causing
2713 * buf depletion
2714 */
21dc0f89 2715/* #define DOEXC SLP -- doboth breaks horribly under load, doexc less so. */
00b3ed16
GKH
2716#if defined(DOBOTH)
2717 hw->txbuff.txfrm.desc.tx_control =
21dc0f89
MM
2718 HFA384x_TX_MACPORT_SET(0) | HFA384x_TX_STRUCTYPE_SET(1) |
2719 HFA384x_TX_TXEX_SET(1) | HFA384x_TX_TXOK_SET(1);
00b3ed16
GKH
2720#elif defined(DOEXC)
2721 hw->txbuff.txfrm.desc.tx_control =
21dc0f89
MM
2722 HFA384x_TX_MACPORT_SET(0) | HFA384x_TX_STRUCTYPE_SET(1) |
2723 HFA384x_TX_TXEX_SET(1) | HFA384x_TX_TXOK_SET(0);
00b3ed16
GKH
2724#else
2725 hw->txbuff.txfrm.desc.tx_control =
21dc0f89
MM
2726 HFA384x_TX_MACPORT_SET(0) | HFA384x_TX_STRUCTYPE_SET(1) |
2727 HFA384x_TX_TXEX_SET(0) | HFA384x_TX_TXOK_SET(0);
00b3ed16
GKH
2728#endif
2729 hw->txbuff.txfrm.desc.tx_control =
18c7f792 2730 cpu_to_le16(hw->txbuff.txfrm.desc.tx_control);
00b3ed16
GKH
2731
2732 /* copy the header over to the txdesc */
21dc0f89 2733 memcpy(&(hw->txbuff.txfrm.desc.frame_control), p80211_hdr,
93df38e5 2734 sizeof(union p80211_hdr));
00b3ed16
GKH
2735
2736 /* if we're using host WEP, increase size by IV+ICV */
2737 if (p80211_wep->data) {
18c7f792 2738 hw->txbuff.txfrm.desc.data_len = cpu_to_le16(skb->len + 8);
21dc0f89 2739 usbpktlen += 8;
00b3ed16 2740 } else {
18c7f792 2741 hw->txbuff.txfrm.desc.data_len = cpu_to_le16(skb->len);
00b3ed16
GKH
2742 }
2743
2744 usbpktlen += skb->len;
2745
2746 /* copy over the WEP IV if we are using host WEP */
2747 ptr = hw->txbuff.txfrm.data;
2748 if (p80211_wep->data) {
2749 memcpy(ptr, p80211_wep->iv, sizeof(p80211_wep->iv));
21dc0f89 2750 ptr += sizeof(p80211_wep->iv);
00b3ed16
GKH
2751 memcpy(ptr, p80211_wep->data, skb->len);
2752 } else {
2753 memcpy(ptr, skb->data, skb->len);
2754 }
2755 /* copy over the packet data */
21dc0f89 2756 ptr += skb->len;
00b3ed16
GKH
2757
2758 /* copy over the WEP ICV if we are using host WEP */
21dc0f89 2759 if (p80211_wep->data)
00b3ed16 2760 memcpy(ptr, p80211_wep->icv, sizeof(p80211_wep->icv));
00b3ed16
GKH
2761
2762 /* Send the USB packet */
21dc0f89
MM
2763 usb_fill_bulk_urb(&(hw->tx_urb), hw->usb,
2764 hw->endp_out,
2765 &(hw->txbuff), ROUNDUP64(usbpktlen),
2766 hfa384x_usbout_callback, hw->wlandev);
00b3ed16
GKH
2767 hw->tx_urb.transfer_flags |= USB_QUEUE_BULK;
2768
2769 result = 1;
2770 ret = submit_tx_urb(hw, &hw->tx_urb, GFP_ATOMIC);
21dc0f89 2771 if (ret != 0) {
a2120136
SSA
2772 netdev_err(hw->wlandev->netdev,
2773 "submit_tx_urb() failed, error=%d\n", ret);
00b3ed16
GKH
2774 result = 3;
2775 }
2776
21dc0f89 2777exit:
00b3ed16
GKH
2778 return result;
2779}
2780
297f06ce 2781void hfa384x_tx_timeout(wlandevice_t *wlandev)
00b3ed16 2782{
21dc0f89 2783 hfa384x_t *hw = wlandev->priv;
00b3ed16
GKH
2784 unsigned long flags;
2785
00b3ed16
GKH
2786 spin_lock_irqsave(&hw->ctlxq.lock, flags);
2787
59457897
DC
2788 if (!hw->wlandev->hwremoved) {
2789 int sched;
2790
2791 sched = !test_and_set_bit(WORK_TX_HALT, &hw->usb_flags);
2792 sched |= !test_and_set_bit(WORK_RX_HALT, &hw->usb_flags);
2793 if (sched)
2794 schedule_work(&hw->usb_work);
00b3ed16
GKH
2795 }
2796
2797 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
00b3ed16
GKH
2798}
2799
2800/*----------------------------------------------------------------
2801* hfa384x_usbctlx_reaper_task
2802*
2803* Tasklet to delete dead CTLX objects
2804*
2805* Arguments:
2806* data ptr to a hfa384x_t
2807*
2808* Returns:
2809*
2810* Call context:
2811* Interrupt
2812----------------------------------------------------------------*/
2813static void hfa384x_usbctlx_reaper_task(unsigned long data)
2814{
5d85fe34 2815 hfa384x_t *hw = (hfa384x_t *)data;
00b3ed16
GKH
2816 struct list_head *entry;
2817 struct list_head *temp;
21dc0f89 2818 unsigned long flags;
00b3ed16 2819
00b3ed16
GKH
2820 spin_lock_irqsave(&hw->ctlxq.lock, flags);
2821
2822 /* This list is guaranteed to be empty if someone
2823 * has unplugged the adapter.
2824 */
2825 list_for_each_safe(entry, temp, &hw->ctlxq.reapable) {
21dc0f89 2826 hfa384x_usbctlx_t *ctlx;
00b3ed16
GKH
2827
2828 ctlx = list_entry(entry, hfa384x_usbctlx_t, list);
2829 list_del(&ctlx->list);
2830 kfree(ctlx);
2831 }
2832
2833 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
00b3ed16
GKH
2834}
2835
2836/*----------------------------------------------------------------
2837* hfa384x_usbctlx_completion_task
2838*
2839* Tasklet to call completion handlers for returned CTLXs
2840*
2841* Arguments:
2842* data ptr to hfa384x_t
2843*
2844* Returns:
2845* Nothing
2846*
2847* Call context:
2848* Interrupt
2849----------------------------------------------------------------*/
2850static void hfa384x_usbctlx_completion_task(unsigned long data)
2851{
5d85fe34 2852 hfa384x_t *hw = (hfa384x_t *)data;
00b3ed16
GKH
2853 struct list_head *entry;
2854 struct list_head *temp;
2855 unsigned long flags;
2856
2857 int reap = 0;
2858
00b3ed16
GKH
2859 spin_lock_irqsave(&hw->ctlxq.lock, flags);
2860
2861 /* This list is guaranteed to be empty if someone
2862 * has unplugged the adapter ...
2863 */
2864 list_for_each_safe(entry, temp, &hw->ctlxq.completing) {
2865 hfa384x_usbctlx_t *ctlx;
2866
2867 ctlx = list_entry(entry, hfa384x_usbctlx_t, list);
2868
2869 /* Call the completion function that this
2870 * command was assigned, assuming it has one.
2871 */
21dc0f89 2872 if (ctlx->cmdcb != NULL) {
00b3ed16
GKH
2873 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
2874 ctlx->cmdcb(hw, ctlx);
2875 spin_lock_irqsave(&hw->ctlxq.lock, flags);
2876
2877 /* Make sure we don't try and complete
2878 * this CTLX more than once!
2879 */
2880 ctlx->cmdcb = NULL;
2881
2882 /* Did someone yank the adapter out
2883 * while our list was (briefly) unlocked?
2884 */
21dc0f89 2885 if (hw->wlandev->hwremoved) {
00b3ed16
GKH
2886 reap = 0;
2887 break;
2888 }
2889 }
2890
2891 /*
2892 * "Reapable" CTLXs are ones which don't have any
2893 * threads waiting for them to die. Hence they must
2894 * be delivered to The Reaper!
2895 */
21dc0f89 2896 if (ctlx->reapable) {
00b3ed16
GKH
2897 /* Move the CTLX off the "completing" list (hopefully)
2898 * on to the "reapable" list where the reaper task
2899 * can find it. And "reapable" means that this CTLX
2900 * isn't sitting on a wait-queue somewhere.
2901 */
2902 list_move_tail(&ctlx->list, &hw->ctlxq.reapable);
2903 reap = 1;
2904 }
2905
2906 complete(&ctlx->done);
2907 }
2908 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
2909
2910 if (reap)
2911 tasklet_schedule(&hw->reaper_bh);
00b3ed16
GKH
2912}
2913
2914/*----------------------------------------------------------------
2915* unlocked_usbctlx_cancel_async
2916*
2917* Mark the CTLX dead asynchronously, and ensure that the
2918* next command on the queue is run afterwards.
2919*
2920* Arguments:
2921* hw ptr to the hfa384x_t structure
2922* ctlx ptr to a CTLX structure
2923*
2924* Returns:
2925* 0 the CTLX's URB is inactive
2926* -EINPROGRESS the URB is currently being unlinked
2927*
2928* Call context:
2929* Either process or interrupt, but presumably interrupt
2930----------------------------------------------------------------*/
297f06ce
MT
2931static int unlocked_usbctlx_cancel_async(hfa384x_t *hw,
2932 hfa384x_usbctlx_t *ctlx)
00b3ed16
GKH
2933{
2934 int ret;
2935
00b3ed16
GKH
2936 /*
2937 * Try to delete the URB containing our request packet.
2938 * If we succeed, then its completion handler will be
2939 * called with a status of -ECONNRESET.
2940 */
2941 hw->ctlx_urb.transfer_flags |= URB_ASYNC_UNLINK;
2942 ret = usb_unlink_urb(&hw->ctlx_urb);
2943
2944 if (ret != -EINPROGRESS) {
2945 /*
2946 * The OUT URB had either already completed
2947 * or was still in the pending queue, so the
2948 * URB's completion function will not be called.
2949 * We will have to complete the CTLX ourselves.
2950 */
2951 ctlx->state = CTLX_REQ_FAILED;
2952 unlocked_usbctlx_complete(hw, ctlx);
2953 ret = 0;
2954 }
2955
00b3ed16
GKH
2956 return ret;
2957}
2958
2959/*----------------------------------------------------------------
2960* unlocked_usbctlx_complete
2961*
2962* A CTLX has completed. It may have been successful, it may not
2963* have been. At this point, the CTLX should be quiescent. The URBs
2964* aren't active and the timers should have been stopped.
2965*
2966* The CTLX is migrated to the "completing" queue, and the completing
2967* tasklet is scheduled.
2968*
2969* Arguments:
2970* hw ptr to a hfa384x_t structure
2971* ctlx ptr to a ctlx structure
2972*
2973* Returns:
2974* nothing
2975*
2976* Side effects:
2977*
2978* Call context:
2979* Either, assume interrupt
2980----------------------------------------------------------------*/
297f06ce 2981static void unlocked_usbctlx_complete(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx)
00b3ed16 2982{
00b3ed16
GKH
2983 /* Timers have been stopped, and ctlx should be in
2984 * a terminal state. Retire it from the "active"
2985 * queue.
2986 */
2987 list_move_tail(&ctlx->list, &hw->ctlxq.completing);
2988 tasklet_schedule(&hw->completion_bh);
2989
2990 switch (ctlx->state) {
2991 case CTLX_COMPLETE:
2992 case CTLX_REQ_FAILED:
2993 /* This are the correct terminating states. */
2994 break;
2995
2996 default:
263b8bb9 2997 netdev_err(hw->wlandev->netdev, "CTLX[%d] not in a terminating state(%s)\n",
3f2d6564
SSA
2998 le16_to_cpu(ctlx->outbuf.type),
2999 ctlxstr(ctlx->state));
00b3ed16 3000 break;
21dc0f89 3001 } /* switch */
00b3ed16
GKH
3002}
3003
3004/*----------------------------------------------------------------
3005* hfa384x_usbctlxq_run
3006*
3007* Checks to see if the head item is running. If not, starts it.
3008*
3009* Arguments:
3010* hw ptr to hfa384x_t
3011*
3012* Returns:
3013* nothing
3014*
3015* Side effects:
3016*
3017* Call context:
3018* any
3019----------------------------------------------------------------*/
297f06ce 3020static void hfa384x_usbctlxq_run(hfa384x_t *hw)
00b3ed16 3021{
21dc0f89 3022 unsigned long flags;
00b3ed16
GKH
3023
3024 /* acquire lock */
3025 spin_lock_irqsave(&hw->ctlxq.lock, flags);
3026
3027 /* Only one active CTLX at any one time, because there's no
3028 * other (reliable) way to match the response URB to the
3029 * correct CTLX.
3030 *
3031 * Don't touch any of these CTLXs if the hardware
3032 * has been removed or the USB subsystem is stalled.
3033 */
21dc0f89
MM
3034 if (!list_empty(&hw->ctlxq.active) ||
3035 test_bit(WORK_TX_HALT, &hw->usb_flags) || hw->wlandev->hwremoved)
00b3ed16
GKH
3036 goto unlock;
3037
21dc0f89
MM
3038 while (!list_empty(&hw->ctlxq.pending)) {
3039 hfa384x_usbctlx_t *head;
3040 int result;
00b3ed16
GKH
3041
3042 /* This is the first pending command */
3043 head = list_entry(hw->ctlxq.pending.next,
21dc0f89 3044 hfa384x_usbctlx_t, list);
00b3ed16
GKH
3045
3046 /* We need to split this off to avoid a race condition */
3047 list_move_tail(&head->list, &hw->ctlxq.active);
3048
3049 /* Fill the out packet */
21dc0f89
MM
3050 usb_fill_bulk_urb(&(hw->ctlx_urb), hw->usb,
3051 hw->endp_out,
3052 &(head->outbuf), ROUNDUP64(head->outbufsize),
3053 hfa384x_ctlxout_callback, hw);
00b3ed16
GKH
3054 hw->ctlx_urb.transfer_flags |= USB_QUEUE_BULK;
3055
3f4b4e77 3056 /* Now submit the URB and update the CTLX's state */
46800b22
SK
3057 result = SUBMIT_URB(&hw->ctlx_urb, GFP_ATOMIC);
3058 if (result == 0) {
00b3ed16
GKH
3059 /* This CTLX is now running on the active queue */
3060 head->state = CTLX_REQ_SUBMITTED;
3061
3062 /* Start the OUT wait timer */
3063 hw->req_timer_done = 0;
3064 hw->reqtimer.expires = jiffies + HZ;
3065 add_timer(&hw->reqtimer);
3066
3067 /* Start the IN wait timer */
3068 hw->resp_timer_done = 0;
21dc0f89 3069 hw->resptimer.expires = jiffies + 2 * HZ;
00b3ed16
GKH
3070 add_timer(&hw->resptimer);
3071
3072 break;
3073 }
3074
3075 if (result == -EPIPE) {
3076 /* The OUT pipe needs resetting, so put
3077 * this CTLX back in the "pending" queue
3078 * and schedule a reset ...
3079 */
263b8bb9 3080 netdev_warn(hw->wlandev->netdev,
3f2d6564
SSA
3081 "%s tx pipe stalled: requesting reset\n",
3082 hw->wlandev->netdev->name);
00b3ed16
GKH
3083 list_move(&head->list, &hw->ctlxq.pending);
3084 set_bit(WORK_TX_HALT, &hw->usb_flags);
3085 schedule_work(&hw->usb_work);
3086 break;
3087 }
3088
3089 if (result == -ESHUTDOWN) {
263b8bb9 3090 netdev_warn(hw->wlandev->netdev, "%s urb shutdown!\n",
3f2d6564 3091 hw->wlandev->netdev->name);
00b3ed16
GKH
3092 break;
3093 }
3094
263b8bb9 3095 netdev_err(hw->wlandev->netdev, "Failed to submit CTLX[%d]: error=%d\n",
3f2d6564 3096 le16_to_cpu(head->outbuf.type), result);
00b3ed16 3097 unlocked_usbctlx_complete(hw, head);
21dc0f89 3098 } /* while */
00b3ed16 3099
21dc0f89 3100unlock:
00b3ed16 3101 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
00b3ed16
GKH
3102}
3103
00b3ed16
GKH
3104/*----------------------------------------------------------------
3105* hfa384x_usbin_callback
3106*
3107* Callback for URBs on the BULKIN endpoint.
3108*
3109* Arguments:
3110* urb ptr to the completed urb
3111*
3112* Returns:
3113* nothing
3114*
3115* Side effects:
3116*
3117* Call context:
3118* interrupt
3119----------------------------------------------------------------*/
00b3ed16 3120static void hfa384x_usbin_callback(struct urb *urb)
00b3ed16 3121{
21dc0f89
MM
3122 wlandevice_t *wlandev = urb->context;
3123 hfa384x_t *hw;
5d85fe34 3124 hfa384x_usbin_t *usbin = (hfa384x_usbin_t *)urb->transfer_buffer;
21dc0f89
MM
3125 struct sk_buff *skb = NULL;
3126 int result;
3127 int urb_status;
3128 u16 type;
00b3ed16
GKH
3129
3130 enum USBIN_ACTION {
3131 HANDLE,
3132 RESUBMIT,
3133 ABORT
3134 } action;
3135
21dc0f89 3136 if (!wlandev || !wlandev->netdev || wlandev->hwremoved)
00b3ed16
GKH
3137 goto exit;
3138
3139 hw = wlandev->priv;
3140 if (!hw)
3141 goto exit;
3142
3143 skb = hw->rx_urb_skb;
2961f24f 3144 BUG_ON(!skb || (skb->data != urb->transfer_buffer));
21dc0f89 3145
00b3ed16
GKH
3146 hw->rx_urb_skb = NULL;
3147
3148 /* Check for error conditions within the URB */
3149 switch (urb->status) {
3150 case 0:
3151 action = HANDLE;
3152
3153 /* Check for short packet */
21dc0f89 3154 if (urb->actual_length == 0) {
9630f6b9
TK
3155 wlandev->netdev->stats.rx_errors++;
3156 wlandev->netdev->stats.rx_length_errors++;
00b3ed16
GKH
3157 action = RESUBMIT;
3158 }
3159 break;
3160
3161 case -EPIPE:
263b8bb9 3162 netdev_warn(hw->wlandev->netdev, "%s rx pipe stalled: requesting reset\n",
3f2d6564 3163 wlandev->netdev->name);
21dc0f89 3164 if (!test_and_set_bit(WORK_RX_HALT, &hw->usb_flags))
00b3ed16 3165 schedule_work(&hw->usb_work);
9630f6b9 3166 wlandev->netdev->stats.rx_errors++;
00b3ed16
GKH
3167 action = ABORT;
3168 break;
3169
3170 case -EILSEQ:
3171 case -ETIMEDOUT:
3172 case -EPROTO:
21dc0f89
MM
3173 if (!test_and_set_bit(THROTTLE_RX, &hw->usb_flags) &&
3174 !timer_pending(&hw->throttle)) {
00b3ed16
GKH
3175 mod_timer(&hw->throttle, jiffies + THROTTLE_JIFFIES);
3176 }
9630f6b9 3177 wlandev->netdev->stats.rx_errors++;
00b3ed16
GKH
3178 action = ABORT;
3179 break;
3180
3181 case -EOVERFLOW:
9630f6b9 3182 wlandev->netdev->stats.rx_over_errors++;
00b3ed16
GKH
3183 action = RESUBMIT;
3184 break;
3185
3186 case -ENODEV:
3187 case -ESHUTDOWN:
a7cf7bae 3188 pr_debug("status=%d, device removed.\n", urb->status);
00b3ed16
GKH
3189 action = ABORT;
3190 break;
3191
3192 case -ENOENT:
3193 case -ECONNRESET:
75f49e07 3194 pr_debug("status=%d, urb explicitly unlinked.\n", urb->status);
00b3ed16
GKH
3195 action = ABORT;
3196 break;
3197
3198 default:
a7cf7bae 3199 pr_debug("urb status=%d, transfer flags=0x%x\n",
75f49e07 3200 urb->status, urb->transfer_flags);
9630f6b9 3201 wlandev->netdev->stats.rx_errors++;
00b3ed16
GKH
3202 action = RESUBMIT;
3203 break;
3204 }
3205
3206 urb_status = urb->status;
3207
3208 if (action != ABORT) {
3209 /* Repost the RX URB */
3210 result = submit_rx_urb(hw, GFP_ATOMIC);
3211
3212 if (result != 0) {
263b8bb9 3213 netdev_err(hw->wlandev->netdev,
3f2d6564
SSA
3214 "Fatal, failed to resubmit rx_urb. error=%d\n",
3215 result);
00b3ed16
GKH
3216 }
3217 }
3218
3219 /* Handle any USB-IN packet */
3220 /* Note: the check of the sw_support field, the type field doesn't
3221 * have bit 12 set like the docs suggest.
3222 */
18c7f792 3223 type = le16_to_cpu(usbin->type);
00b3ed16
GKH
3224 if (HFA384x_USB_ISRXFRM(type)) {
3225 if (action == HANDLE) {
3226 if (usbin->txfrm.desc.sw_support == 0x0123) {
3227 hfa384x_usbin_txcompl(wlandev, usbin);
3228 } else {
3229 skb_put(skb, sizeof(*usbin));
3230 hfa384x_usbin_rx(wlandev, skb);
3231 skb = NULL;
3232 }
3233 }
3234 goto exit;
3235 }
3236 if (HFA384x_USB_ISTXFRM(type)) {
3237 if (action == HANDLE)
3238 hfa384x_usbin_txcompl(wlandev, usbin);
3239 goto exit;
3240 }
3241 switch (type) {
3242 case HFA384x_USB_INFOFRM:
3243 if (action == ABORT)
3244 goto exit;
3245 if (action == HANDLE)
3246 hfa384x_usbin_info(wlandev, usbin);
3247 break;
3248
3249 case HFA384x_USB_CMDRESP:
3250 case HFA384x_USB_WRIDRESP:
3251 case HFA384x_USB_RRIDRESP:
3252 case HFA384x_USB_WMEMRESP:
3253 case HFA384x_USB_RMEMRESP:
3254 /* ALWAYS, ALWAYS, ALWAYS handle this CTLX!!!! */
3255 hfa384x_usbin_ctlx(hw, usbin, urb_status);
3256 break;
3257
3258 case HFA384x_USB_BUFAVAIL:
a7cf7bae 3259 pr_debug("Received BUFAVAIL packet, frmlen=%d\n",
75f49e07 3260 usbin->bufavail.frmlen);
00b3ed16
GKH
3261 break;
3262
3263 case HFA384x_USB_ERROR:
a7cf7bae 3264 pr_debug("Received USB_ERROR packet, errortype=%d\n",
75f49e07 3265 usbin->usberror.errortype);
00b3ed16
GKH
3266 break;
3267
3268 default:
75f49e07
MT
3269 pr_debug("Unrecognized USBIN packet, type=%x, status=%d\n",
3270 usbin->type, urb_status);
00b3ed16 3271 break;
21dc0f89 3272 } /* switch */
00b3ed16
GKH
3273
3274exit:
3275
3276 if (skb)
3277 dev_kfree_skb(skb);
00b3ed16
GKH
3278}
3279
00b3ed16
GKH
3280/*----------------------------------------------------------------
3281* hfa384x_usbin_ctlx
3282*
3283* We've received a URB containing a Prism2 "response" message.
3284* This message needs to be matched up with a CTLX on the active
3285* queue and our state updated accordingly.
3286*
3287* Arguments:
3288* hw ptr to hfa384x_t
3289* usbin ptr to USB IN packet
3290* urb_status status of this Bulk-In URB
3291*
3292* Returns:
3293* nothing
3294*
3295* Side effects:
3296*
3297* Call context:
3298* interrupt
3299----------------------------------------------------------------*/
297f06ce 3300static void hfa384x_usbin_ctlx(hfa384x_t *hw, hfa384x_usbin_t *usbin,
00b3ed16
GKH
3301 int urb_status)
3302{
21dc0f89
MM
3303 hfa384x_usbctlx_t *ctlx;
3304 int run_queue = 0;
3305 unsigned long flags;
00b3ed16 3306
00b3ed16
GKH
3307retry:
3308 spin_lock_irqsave(&hw->ctlxq.lock, flags);
3309
3310 /* There can be only one CTLX on the active queue
3311 * at any one time, and this is the CTLX that the
3312 * timers are waiting for.
3313 */
21dc0f89 3314 if (list_empty(&hw->ctlxq.active))
00b3ed16 3315 goto unlock;
00b3ed16
GKH
3316
3317 /* Remove the "response timeout". It's possible that
3318 * we are already too late, and that the timeout is
3319 * already running. And that's just too bad for us,
3320 * because we could lose our CTLX from the active
3321 * queue here ...
3322 */
3323 if (del_timer(&hw->resptimer) == 0) {
3324 if (hw->resp_timer_done == 0) {
3325 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
3326 goto retry;
3327 }
21dc0f89 3328 } else {
00b3ed16
GKH
3329 hw->resp_timer_done = 1;
3330 }
3331
3332 ctlx = get_active_ctlx(hw);
3333
3334 if (urb_status != 0) {
3335 /*
3336 * Bad CTLX, so get rid of it. But we only
3337 * remove it from the active queue if we're no
3338 * longer expecting the OUT URB to complete.
3339 */
3340 if (unlocked_usbctlx_cancel_async(hw, ctlx) == 0)
3341 run_queue = 1;
3342 } else {
a78d1312 3343 const __le16 intype = (usbin->type & ~cpu_to_le16(0x8000));
00b3ed16
GKH
3344
3345 /*
3346 * Check that our message is what we're expecting ...
3347 */
3348 if (ctlx->outbuf.type != intype) {
263b8bb9 3349 netdev_warn(hw->wlandev->netdev,
3f2d6564
SSA
3350 "Expected IN[%d], received IN[%d] - ignored.\n",
3351 le16_to_cpu(ctlx->outbuf.type),
3352 le16_to_cpu(intype));
00b3ed16
GKH
3353 goto unlock;
3354 }
3355
3356 /* This URB has succeeded, so grab the data ... */
3357 memcpy(&ctlx->inbuf, usbin, sizeof(ctlx->inbuf));
3358
3359 switch (ctlx->state) {
3360 case CTLX_REQ_SUBMITTED:
3361 /*
3362 * We have received our response URB before
3363 * our request has been acknowledged. Odd,
3364 * but our OUT URB is still alive...
3365 */
4ffab688 3366 pr_debug("Causality violation: please reboot Universe\n");
00b3ed16
GKH
3367 ctlx->state = CTLX_RESP_COMPLETE;
3368 break;
3369
3370 case CTLX_REQ_COMPLETE:
3371 /*
3372 * This is the usual path: our request
3373 * has already been acknowledged, and
3374 * now we have received the reply too.
3375 */
3376 ctlx->state = CTLX_COMPLETE;
3377 unlocked_usbctlx_complete(hw, ctlx);
3378 run_queue = 1;
3379 break;
3380
3381 default:
3382 /*
3383 * Throw this CTLX away ...
3384 */
263b8bb9 3385 netdev_err(hw->wlandev->netdev,
3f2d6564
SSA
3386 "Matched IN URB, CTLX[%d] in invalid state(%s). Discarded.\n",
3387 le16_to_cpu(ctlx->outbuf.type),
3388 ctlxstr(ctlx->state));
00b3ed16
GKH
3389 if (unlocked_usbctlx_cancel_async(hw, ctlx) == 0)
3390 run_queue = 1;
3391 break;
21dc0f89 3392 } /* switch */
00b3ed16
GKH
3393 }
3394
3395unlock:
3396 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
3397
3398 if (run_queue)
3399 hfa384x_usbctlxq_run(hw);
00b3ed16
GKH
3400}
3401
00b3ed16
GKH
3402/*----------------------------------------------------------------
3403* hfa384x_usbin_txcompl
3404*
3405* At this point we have the results of a previous transmit.
3406*
3407* Arguments:
3408* wlandev wlan device
3409* usbin ptr to the usb transfer buffer
3410*
3411* Returns:
3412* nothing
3413*
3414* Side effects:
3415*
3416* Call context:
3417* interrupt
3418----------------------------------------------------------------*/
297f06ce
MT
3419static void hfa384x_usbin_txcompl(wlandevice_t *wlandev,
3420 hfa384x_usbin_t *usbin)
00b3ed16 3421{
21dc0f89 3422 u16 status;
00b3ed16 3423
631c8dec 3424 status = le16_to_cpu(usbin->type); /* yeah I know it says type... */
00b3ed16
GKH
3425
3426 /* Was there an error? */
21dc0f89 3427 if (HFA384x_TXSTATUS_ISERROR(status))
00b3ed16 3428 prism2sta_ev_txexc(wlandev, status);
21dc0f89 3429 else
00b3ed16 3430 prism2sta_ev_tx(wlandev, status);
00b3ed16
GKH
3431}
3432
00b3ed16
GKH
3433/*----------------------------------------------------------------
3434* hfa384x_usbin_rx
3435*
3436* At this point we have a successful received a rx frame packet.
3437*
3438* Arguments:
3439* wlandev wlan device
3440* usbin ptr to the usb transfer buffer
3441*
3442* Returns:
3443* nothing
3444*
3445* Side effects:
3446*
3447* Call context:
3448* interrupt
3449----------------------------------------------------------------*/
297f06ce 3450static void hfa384x_usbin_rx(wlandevice_t *wlandev, struct sk_buff *skb)
00b3ed16 3451{
5d85fe34 3452 hfa384x_usbin_t *usbin = (hfa384x_usbin_t *)skb->data;
21dc0f89
MM
3453 hfa384x_t *hw = wlandev->priv;
3454 int hdrlen;
51e4896a 3455 struct p80211_rxmeta *rxmeta;
21dc0f89
MM
3456 u16 data_len;
3457 u16 fc;
00b3ed16 3458
00b3ed16 3459 /* Byte order convert once up front. */
18c7f792
MM
3460 usbin->rxfrm.desc.status = le16_to_cpu(usbin->rxfrm.desc.status);
3461 usbin->rxfrm.desc.time = le32_to_cpu(usbin->rxfrm.desc.time);
00b3ed16
GKH
3462
3463 /* Now handle frame based on port# */
21dc0f89 3464 switch (HFA384x_RXSTATUS_MACPORT_GET(usbin->rxfrm.desc.status)) {
00b3ed16 3465 case 0:
ae26230b 3466 fc = le16_to_cpu(usbin->rxfrm.desc.frame_control);
00b3ed16
GKH
3467
3468 /* If exclude and we receive an unencrypted, drop it */
21dc0f89
MM
3469 if ((wlandev->hostwep & HOSTWEP_EXCLUDEUNENCRYPTED) &&
3470 !WLAN_GET_FC_ISWEP(fc)) {
cc5bcbbd 3471 break;
00b3ed16
GKH
3472 }
3473
18c7f792 3474 data_len = le16_to_cpu(usbin->rxfrm.desc.data_len);
00b3ed16
GKH
3475
3476 /* How much header data do we have? */
3477 hdrlen = p80211_headerlen(fc);
3478
3479 /* Pull off the descriptor */
3480 skb_pull(skb, sizeof(hfa384x_rx_frame_t));
3481
3482 /* Now shunt the header block up against the data block
3483 * with an "overlapping" copy
3484 */
3485 memmove(skb_push(skb, hdrlen),
21dc0f89 3486 &usbin->rxfrm.desc.frame_control, hdrlen);
00b3ed16
GKH
3487
3488 skb->dev = wlandev->netdev;
3489 skb->dev->last_rx = jiffies;
3490
3491 /* And set the frame length properly */
3492 skb_trim(skb, data_len + hdrlen);
3493
3494 /* The prism2 series does not return the CRC */
3495 memset(skb_put(skb, WLAN_CRC_LEN), 0xff, WLAN_CRC_LEN);
3496
3497 skb_reset_mac_header(skb);
3498
3499 /* Attach the rxmeta, set some stuff */
3500 p80211skb_rxmeta_attach(wlandev, skb);
3501 rxmeta = P80211SKB_RXMETA(skb);
3502 rxmeta->mactime = usbin->rxfrm.desc.time;
3503 rxmeta->rxrate = usbin->rxfrm.desc.rate;
3504 rxmeta->signal = usbin->rxfrm.desc.signal - hw->dbmadjust;
3505 rxmeta->noise = usbin->rxfrm.desc.silence - hw->dbmadjust;
3506
4e2cdf93 3507 p80211netdev_rx(wlandev, skb);
00b3ed16
GKH
3508
3509 break;
3510
3511 case 7:
21dc0f89 3512 if (!HFA384x_RXSTATUS_ISFCSERR(usbin->rxfrm.desc.status)) {
00b3ed16 3513 /* Copy to wlansnif skb */
21dc0f89 3514 hfa384x_int_rxmonitor(wlandev, &usbin->rxfrm);
00b3ed16
GKH
3515 dev_kfree_skb(skb);
3516 } else {
75f49e07 3517 pr_debug("Received monitor frame: FCSerr set\n");
00b3ed16
GKH
3518 }
3519 break;
3520
3521 default:
263b8bb9 3522 netdev_warn(hw->wlandev->netdev, "Received frame on unsupported port=%d\n",
3f2d6564
SSA
3523 HFA384x_RXSTATUS_MACPORT_GET(
3524 usbin->rxfrm.desc.status));
00b3ed16
GKH
3525 break;
3526 }
00b3ed16
GKH
3527}
3528
3529/*----------------------------------------------------------------
3530* hfa384x_int_rxmonitor
3531*
3532* Helper function for int_rx. Handles monitor frames.
3533* Note that this function allocates space for the FCS and sets it
3534* to 0xffffffff. The hfa384x doesn't give us the FCS value but the
3535* higher layers expect it. 0xffffffff is used as a flag to indicate
3536* the FCS is bogus.
3537*
3538* Arguments:
3539* wlandev wlan device structure
3540* rxfrm rx descriptor read from card in int_rx
3541*
3542* Returns:
3543* nothing
3544*
3545* Side effects:
3546* Allocates an skb and passes it up via the PF_PACKET interface.
3547* Call context:
3548* interrupt
3549----------------------------------------------------------------*/
297f06ce
MT
3550static void hfa384x_int_rxmonitor(wlandevice_t *wlandev,
3551 hfa384x_usb_rxfrm_t *rxfrm)
00b3ed16 3552{
21dc0f89
MM
3553 hfa384x_rx_frame_t *rxdesc = &(rxfrm->desc);
3554 unsigned int hdrlen = 0;
3555 unsigned int datalen = 0;
3556 unsigned int skblen = 0;
3557 u8 *datap;
3558 u16 fc;
3559 struct sk_buff *skb;
3560 hfa384x_t *hw = wlandev->priv;
00b3ed16 3561
631c8dec 3562 /* Remember the status, time, and data_len fields are in host order */
00b3ed16 3563 /* Figure out how big the frame is */
ae26230b 3564 fc = le16_to_cpu(rxdesc->frame_control);
00b3ed16 3565 hdrlen = p80211_headerlen(fc);
18c7f792 3566 datalen = le16_to_cpu(rxdesc->data_len);
00b3ed16
GKH
3567
3568 /* Allocate an ind message+framesize skb */
51e4896a 3569 skblen = sizeof(struct p80211_caphdr) + hdrlen + datalen + WLAN_CRC_LEN;
00b3ed16
GKH
3570
3571 /* sanity check the length */
21dc0f89 3572 if (skblen >
51e4896a 3573 (sizeof(struct p80211_caphdr) +
21dc0f89 3574 WLAN_HDR_A4_LEN + WLAN_DATA_MAXLEN + WLAN_CRC_LEN)) {
a7cf7bae 3575 pr_debug("overlen frm: len=%zd\n",
51e4896a 3576 skblen - sizeof(struct p80211_caphdr));
00b3ed16
GKH
3577 }
3578
46800b22 3579 skb = dev_alloc_skb(skblen);
fb282bcd 3580 if (skb == NULL)
00b3ed16 3581 return;
00b3ed16
GKH
3582
3583 /* only prepend the prism header if in the right mode */
3584 if ((wlandev->netdev->type == ARPHRD_IEEE80211_PRISM) &&
cbec30c4 3585 (hw->sniffhdr != 0)) {
51e4896a 3586 struct p80211_caphdr *caphdr;
00b3ed16 3587 /* The NEW header format! */
51e4896a 3588 datap = skb_put(skb, sizeof(struct p80211_caphdr));
5d85fe34 3589 caphdr = (struct p80211_caphdr *)datap;
21dc0f89
MM
3590
3591 caphdr->version = htonl(P80211CAPTURE_VERSION);
51e4896a 3592 caphdr->length = htonl(sizeof(struct p80211_caphdr));
21dc0f89
MM
3593 caphdr->mactime = __cpu_to_be64(rxdesc->time) * 1000;
3594 caphdr->hosttime = __cpu_to_be64(jiffies);
3595 caphdr->phytype = htonl(4); /* dss_dot11_b */
3596 caphdr->channel = htonl(hw->sniff_channel);
3597 caphdr->datarate = htonl(rxdesc->rate);
3598 caphdr->antenna = htonl(0); /* unknown */
3599 caphdr->priority = htonl(0); /* unknown */
3600 caphdr->ssi_type = htonl(3); /* rssi_raw */
3601 caphdr->ssi_signal = htonl(rxdesc->signal);
3602 caphdr->ssi_noise = htonl(rxdesc->silence);
3603 caphdr->preamble = htonl(0); /* unknown */
3604 caphdr->encoding = htonl(1); /* cck */
00b3ed16
GKH
3605 }
3606
631c8dec
EH
3607 /* Copy the 802.11 header to the skb
3608 (ctl frames may be less than a full header) */
00b3ed16 3609 datap = skb_put(skb, hdrlen);
21dc0f89 3610 memcpy(datap, &(rxdesc->frame_control), hdrlen);
00b3ed16
GKH
3611
3612 /* If any, copy the data from the card to the skb */
21dc0f89 3613 if (datalen > 0) {
00b3ed16
GKH
3614 datap = skb_put(skb, datalen);
3615 memcpy(datap, rxfrm->data, datalen);
3616
3617 /* check for unencrypted stuff if WEP bit set. */
21dc0f89
MM
3618 if (*(datap - hdrlen + 1) & 0x40) /* wep set */
3619 if ((*(datap) == 0xaa) && (*(datap + 1) == 0xaa))
631c8dec
EH
3620 /* clear wep; it's the 802.2 header! */
3621 *(datap - hdrlen + 1) &= 0xbf;
00b3ed16
GKH
3622 }
3623
3624 if (hw->sniff_fcs) {
3625 /* Set the FCS */
3626 datap = skb_put(skb, WLAN_CRC_LEN);
21dc0f89 3627 memset(datap, 0xff, WLAN_CRC_LEN);
00b3ed16
GKH
3628 }
3629
3630 /* pass it back up */
4e2cdf93 3631 p80211netdev_rx(wlandev, skb);
00b3ed16
GKH
3632}
3633
00b3ed16
GKH
3634/*----------------------------------------------------------------
3635* hfa384x_usbin_info
3636*
3637* At this point we have a successful received a Prism2 info frame.
3638*
3639* Arguments:
3640* wlandev wlan device
3641* usbin ptr to the usb transfer buffer
3642*
3643* Returns:
3644* nothing
3645*
3646* Side effects:
3647*
3648* Call context:
3649* interrupt
3650----------------------------------------------------------------*/
297f06ce 3651static void hfa384x_usbin_info(wlandevice_t *wlandev, hfa384x_usbin_t *usbin)
00b3ed16 3652{
21dc0f89 3653 usbin->infofrm.info.framelen =
18c7f792 3654 le16_to_cpu(usbin->infofrm.info.framelen);
00b3ed16 3655 prism2sta_ev_info(wlandev, &usbin->infofrm.info);
00b3ed16
GKH
3656}
3657
00b3ed16
GKH
3658/*----------------------------------------------------------------
3659* hfa384x_usbout_callback
3660*
3661* Callback for URBs on the BULKOUT endpoint.
3662*
3663* Arguments:
3664* urb ptr to the completed urb
3665*
3666* Returns:
3667* nothing
3668*
3669* Side effects:
3670*
3671* Call context:
3672* interrupt
3673----------------------------------------------------------------*/
00b3ed16 3674static void hfa384x_usbout_callback(struct urb *urb)
00b3ed16 3675{
21dc0f89
MM
3676 wlandevice_t *wlandev = urb->context;
3677 hfa384x_usbout_t *usbout = urb->transfer_buffer;
00b3ed16
GKH
3678
3679#ifdef DEBUG_USB
3680 dbprint_urb(urb);
3681#endif
3682
21dc0f89 3683 if (wlandev && wlandev->netdev) {
21dc0f89 3684 switch (urb->status) {
00b3ed16
GKH
3685 case 0:
3686 hfa384x_usbout_tx(wlandev, usbout);
3687 break;
3688
3689 case -EPIPE:
21dc0f89
MM
3690 {
3691 hfa384x_t *hw = wlandev->priv;
4d525ef6 3692
263b8bb9 3693 netdev_warn(hw->wlandev->netdev,
3f2d6564
SSA
3694 "%s tx pipe stalled: requesting reset\n",
3695 wlandev->netdev->name);
21dc0f89
MM
3696 if (!test_and_set_bit
3697 (WORK_TX_HALT, &hw->usb_flags))
3698 schedule_work(&hw->usb_work);
9630f6b9 3699 wlandev->netdev->stats.tx_errors++;
21dc0f89
MM
3700 break;
3701 }
00b3ed16
GKH
3702
3703 case -EPROTO:
3704 case -ETIMEDOUT:
3705 case -EILSEQ:
21dc0f89
MM
3706 {
3707 hfa384x_t *hw = wlandev->priv;
3708
3709 if (!test_and_set_bit
a3542e66
SSA
3710 (THROTTLE_TX, &hw->usb_flags) &&
3711 !timer_pending(&hw->throttle)) {
21dc0f89
MM
3712 mod_timer(&hw->throttle,
3713 jiffies + THROTTLE_JIFFIES);
3714 }
9630f6b9 3715 wlandev->netdev->stats.tx_errors++;
21dc0f89
MM
3716 netif_stop_queue(wlandev->netdev);
3717 break;
00b3ed16 3718 }
00b3ed16
GKH
3719
3720 case -ENOENT:
3721 case -ESHUTDOWN:
3722 /* Ignorable errors */
3723 break;
3724
3725 default:
263b8bb9 3726 netdev_info(wlandev->netdev, "unknown urb->status=%d\n",
3f2d6564 3727 urb->status);
9630f6b9 3728 wlandev->netdev->stats.tx_errors++;
00b3ed16 3729 break;
21dc0f89 3730 } /* switch */
00b3ed16 3731 }
00b3ed16
GKH
3732}
3733
00b3ed16
GKH
3734/*----------------------------------------------------------------
3735* hfa384x_ctlxout_callback
3736*
3737* Callback for control data on the BULKOUT endpoint.
3738*
3739* Arguments:
3740* urb ptr to the completed urb
3741*
3742* Returns:
3743* nothing
3744*
3745* Side effects:
3746*
3747* Call context:
3748* interrupt
3749----------------------------------------------------------------*/
00b3ed16 3750static void hfa384x_ctlxout_callback(struct urb *urb)
00b3ed16 3751{
21dc0f89
MM
3752 hfa384x_t *hw = urb->context;
3753 int delete_resptimer = 0;
3754 int timer_ok = 1;
3755 int run_queue = 0;
3756 hfa384x_usbctlx_t *ctlx;
3757 unsigned long flags;
00b3ed16 3758
a7cf7bae 3759 pr_debug("urb->status=%d\n", urb->status);
00b3ed16
GKH
3760#ifdef DEBUG_USB
3761 dbprint_urb(urb);
3762#endif
21dc0f89
MM
3763 if ((urb->status == -ESHUTDOWN) ||
3764 (urb->status == -ENODEV) || (hw == NULL))
89e6302c 3765 return;
00b3ed16
GKH
3766
3767retry:
3768 spin_lock_irqsave(&hw->ctlxq.lock, flags);
3769
3770 /*
3771 * Only one CTLX at a time on the "active" list, and
3772 * none at all if we are unplugged. However, we can
3773 * rely on the disconnect function to clean everything
3774 * up if someone unplugged the adapter.
3775 */
21dc0f89 3776 if (list_empty(&hw->ctlxq.active)) {
00b3ed16 3777 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
89e6302c 3778 return;
00b3ed16
GKH
3779 }
3780
3781 /*
3782 * Having something on the "active" queue means
3783 * that we have timers to worry about ...
3784 */
3785 if (del_timer(&hw->reqtimer) == 0) {
3786 if (hw->req_timer_done == 0) {
3787 /*
3788 * This timer was actually running while we
3789 * were trying to delete it. Let it terminate
3790 * gracefully instead.
3791 */
3792 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
3793 goto retry;
3794 }
21dc0f89 3795 } else {
00b3ed16
GKH
3796 hw->req_timer_done = 1;
3797 }
3798
3799 ctlx = get_active_ctlx(hw);
3800
21dc0f89 3801 if (urb->status == 0) {
00b3ed16 3802 /* Request portion of a CTLX is successful */
21dc0f89 3803 switch (ctlx->state) {
00b3ed16
GKH
3804 case CTLX_REQ_SUBMITTED:
3805 /* This OUT-ACK received before IN */
3806 ctlx->state = CTLX_REQ_COMPLETE;
3807 break;
3808
3809 case CTLX_RESP_COMPLETE:
3810 /* IN already received before this OUT-ACK,
3811 * so this command must now be complete.
3812 */
3813 ctlx->state = CTLX_COMPLETE;
3814 unlocked_usbctlx_complete(hw, ctlx);
3815 run_queue = 1;
3816 break;
3817
3818 default:
3819 /* This is NOT a valid CTLX "success" state! */
263b8bb9 3820 netdev_err(hw->wlandev->netdev,
3f2d6564
SSA
3821 "Illegal CTLX[%d] success state(%s, %d) in OUT URB\n",
3822 le16_to_cpu(ctlx->outbuf.type),
3823 ctlxstr(ctlx->state), urb->status);
00b3ed16 3824 break;
21dc0f89 3825 } /* switch */
00b3ed16
GKH
3826 } else {
3827 /* If the pipe has stalled then we need to reset it */
21dc0f89
MM
3828 if ((urb->status == -EPIPE) &&
3829 !test_and_set_bit(WORK_TX_HALT, &hw->usb_flags)) {
263b8bb9 3830 netdev_warn(hw->wlandev->netdev,
3f2d6564
SSA
3831 "%s tx pipe stalled: requesting reset\n",
3832 hw->wlandev->netdev->name);
00b3ed16
GKH
3833 schedule_work(&hw->usb_work);
3834 }
3835
3836 /* If someone cancels the OUT URB then its status
3837 * should be either -ECONNRESET or -ENOENT.
3838 */
3839 ctlx->state = CTLX_REQ_FAILED;
3840 unlocked_usbctlx_complete(hw, ctlx);
3841 delete_resptimer = 1;
3842 run_queue = 1;
3843 }
3844
21dc0f89 3845delresp:
00b3ed16 3846 if (delete_resptimer) {
46800b22 3847 timer_ok = del_timer(&hw->resptimer);
3f4b4e77 3848 if (timer_ok != 0)
00b3ed16 3849 hw->resp_timer_done = 1;
00b3ed16
GKH
3850 }
3851
3852 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
3853
21dc0f89 3854 if (!timer_ok && (hw->resp_timer_done == 0)) {
00b3ed16
GKH
3855 spin_lock_irqsave(&hw->ctlxq.lock, flags);
3856 goto delresp;
3857 }
3858
3859 if (run_queue)
3860 hfa384x_usbctlxq_run(hw);
00b3ed16
GKH
3861}
3862
00b3ed16
GKH
3863/*----------------------------------------------------------------
3864* hfa384x_usbctlx_reqtimerfn
3865*
3866* Timer response function for CTLX request timeouts. If this
3867* function is called, it means that the callback for the OUT
3868* URB containing a Prism2.x XXX_Request was never called.
3869*
3870* Arguments:
3871* data a ptr to the hfa384x_t
3872*
3873* Returns:
3874* nothing
3875*
3876* Side effects:
3877*
3878* Call context:
3879* interrupt
3880----------------------------------------------------------------*/
21dc0f89 3881static void hfa384x_usbctlx_reqtimerfn(unsigned long data)
00b3ed16 3882{
5d85fe34 3883 hfa384x_t *hw = (hfa384x_t *)data;
21dc0f89 3884 unsigned long flags;
00b3ed16
GKH
3885
3886 spin_lock_irqsave(&hw->ctlxq.lock, flags);
3887
3888 hw->req_timer_done = 1;
3889
3890 /* Removing the hardware automatically empties
3891 * the active list ...
3892 */
21dc0f89 3893 if (!list_empty(&hw->ctlxq.active)) {
00b3ed16
GKH
3894 /*
3895 * We must ensure that our URB is removed from
3896 * the system, if it hasn't already expired.
3897 */
3898 hw->ctlx_urb.transfer_flags |= URB_ASYNC_UNLINK;
21dc0f89 3899 if (usb_unlink_urb(&hw->ctlx_urb) == -EINPROGRESS) {
00b3ed16
GKH
3900 hfa384x_usbctlx_t *ctlx = get_active_ctlx(hw);
3901
3902 ctlx->state = CTLX_REQ_FAILED;
3903
3904 /* This URB was active, but has now been
3905 * cancelled. It will now have a status of
3906 * -ECONNRESET in the callback function.
3907 *
3908 * We are cancelling this CTLX, so we're
3909 * not going to need to wait for a response.
3910 * The URB's callback function will check
3911 * that this timer is truly dead.
3912 */
3913 if (del_timer(&hw->resptimer) != 0)
3914 hw->resp_timer_done = 1;
3915 }
3916 }
3917
3918 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
00b3ed16
GKH
3919}
3920
00b3ed16
GKH
3921/*----------------------------------------------------------------
3922* hfa384x_usbctlx_resptimerfn
3923*
3924* Timer response function for CTLX response timeouts. If this
3925* function is called, it means that the callback for the IN
3926* URB containing a Prism2.x XXX_Response was never called.
3927*
3928* Arguments:
3929* data a ptr to the hfa384x_t
3930*
3931* Returns:
3932* nothing
3933*
3934* Side effects:
3935*
3936* Call context:
3937* interrupt
3938----------------------------------------------------------------*/
21dc0f89 3939static void hfa384x_usbctlx_resptimerfn(unsigned long data)
00b3ed16 3940{
5d85fe34 3941 hfa384x_t *hw = (hfa384x_t *)data;
21dc0f89 3942 unsigned long flags;
00b3ed16 3943
00b3ed16
GKH
3944 spin_lock_irqsave(&hw->ctlxq.lock, flags);
3945
3946 hw->resp_timer_done = 1;
3947
3948 /* The active list will be empty if the
3949 * adapter has been unplugged ...
3950 */
21dc0f89 3951 if (!list_empty(&hw->ctlxq.active)) {
00b3ed16
GKH
3952 hfa384x_usbctlx_t *ctlx = get_active_ctlx(hw);
3953
21dc0f89 3954 if (unlocked_usbctlx_cancel_async(hw, ctlx) == 0) {
00b3ed16
GKH
3955 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
3956 hfa384x_usbctlxq_run(hw);
3f514258 3957 return;
00b3ed16
GKH
3958 }
3959 }
00b3ed16 3960 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
00b3ed16
GKH
3961}
3962
3963/*----------------------------------------------------------------
3964* hfa384x_usb_throttlefn
3965*
3966*
3967* Arguments:
3968* data ptr to hw
3969*
3970* Returns:
3971* Nothing
3972*
3973* Side effects:
3974*
3975* Call context:
3976* Interrupt
3977----------------------------------------------------------------*/
21dc0f89 3978static void hfa384x_usb_throttlefn(unsigned long data)
00b3ed16 3979{
5d85fe34 3980 hfa384x_t *hw = (hfa384x_t *)data;
21dc0f89 3981 unsigned long flags;
00b3ed16 3982
00b3ed16
GKH
3983 spin_lock_irqsave(&hw->ctlxq.lock, flags);
3984
3985 /*
3986 * We need to check BOTH the RX and the TX throttle controls,
3987 * so we use the bitwise OR instead of the logical OR.
3988 */
a7cf7bae 3989 pr_debug("flags=0x%lx\n", hw->usb_flags);
21dc0f89
MM
3990 if (!hw->wlandev->hwremoved &&
3991 ((test_and_clear_bit(THROTTLE_RX, &hw->usb_flags) &&
3992 !test_and_set_bit(WORK_RX_RESUME, &hw->usb_flags))
3993 |
3994 (test_and_clear_bit(THROTTLE_TX, &hw->usb_flags) &&
3995 !test_and_set_bit(WORK_TX_RESUME, &hw->usb_flags))
3996 )) {
00b3ed16
GKH
3997 schedule_work(&hw->usb_work);
3998 }
3999
4000 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
00b3ed16
GKH
4001}
4002
00b3ed16
GKH
4003/*----------------------------------------------------------------
4004* hfa384x_usbctlx_submit
4005*
4006* Called from the doxxx functions to submit a CTLX to the queue
4007*
4008* Arguments:
4009* hw ptr to the hw struct
4010* ctlx ctlx structure to enqueue
4011*
4012* Returns:
4013* -ENODEV if the adapter is unplugged
4014* 0
4015*
4016* Side effects:
4017*
4018* Call context:
4019* process or interrupt
4020----------------------------------------------------------------*/
297f06ce 4021static int hfa384x_usbctlx_submit(hfa384x_t *hw, hfa384x_usbctlx_t *ctlx)
00b3ed16
GKH
4022{
4023 unsigned long flags;
00b3ed16 4024
00b3ed16
GKH
4025 spin_lock_irqsave(&hw->ctlxq.lock, flags);
4026
4027 if (hw->wlandev->hwremoved) {
4028 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
675be12f 4029 return -ENODEV;
00b3ed16
GKH
4030 }
4031
675be12f
DN
4032 ctlx->state = CTLX_PENDING;
4033 list_add_tail(&ctlx->list, &hw->ctlxq.pending);
4034 spin_unlock_irqrestore(&hw->ctlxq.lock, flags);
4035 hfa384x_usbctlxq_run(hw);
4036
4037 return 0;
00b3ed16
GKH
4038}
4039
00b3ed16
GKH
4040/*----------------------------------------------------------------
4041* hfa384x_usbout_tx
4042*
4043* At this point we have finished a send of a frame. Mark the URB
4044* as available and call ev_alloc to notify higher layers we're
4045* ready for more.
4046*
4047* Arguments:
4048* wlandev wlan device
4049* usbout ptr to the usb transfer buffer
4050*
4051* Returns:
4052* nothing
4053*
4054* Side effects:
4055*
4056* Call context:
4057* interrupt
4058----------------------------------------------------------------*/
297f06ce 4059static void hfa384x_usbout_tx(wlandevice_t *wlandev, hfa384x_usbout_t *usbout)
00b3ed16 4060{
00b3ed16 4061 prism2sta_ev_alloc(wlandev);
00b3ed16
GKH
4062}
4063
4064/*----------------------------------------------------------------
4065* hfa384x_isgood_pdrcore
4066*
4067* Quick check of PDR codes.
4068*
4069* Arguments:
4070* pdrcode PDR code number (host order)
4071*
4072* Returns:
4073* zero not good.
4074* one is good.
4075*
4076* Side effects:
4077*
4078* Call context:
4079----------------------------------------------------------------*/
21dc0f89 4080static int hfa384x_isgood_pdrcode(u16 pdrcode)
00b3ed16 4081{
21dc0f89 4082 switch (pdrcode) {
00b3ed16
GKH
4083 case HFA384x_PDR_END_OF_PDA:
4084 case HFA384x_PDR_PCB_PARTNUM:
4085 case HFA384x_PDR_PDAVER:
4086 case HFA384x_PDR_NIC_SERIAL:
4087 case HFA384x_PDR_MKK_MEASUREMENTS:
4088 case HFA384x_PDR_NIC_RAMSIZE:
4089 case HFA384x_PDR_MFISUPRANGE:
4090 case HFA384x_PDR_CFISUPRANGE:
4091 case HFA384x_PDR_NICID:
4092 case HFA384x_PDR_MAC_ADDRESS:
4093 case HFA384x_PDR_REGDOMAIN:
4094 case HFA384x_PDR_ALLOWED_CHANNEL:
4095 case HFA384x_PDR_DEFAULT_CHANNEL:
4096 case HFA384x_PDR_TEMPTYPE:
4097 case HFA384x_PDR_IFR_SETTING:
4098 case HFA384x_PDR_RFR_SETTING:
4099 case HFA384x_PDR_HFA3861_BASELINE:
4100 case HFA384x_PDR_HFA3861_SHADOW:
4101 case HFA384x_PDR_HFA3861_IFRF:
4102 case HFA384x_PDR_HFA3861_CHCALSP:
4103 case HFA384x_PDR_HFA3861_CHCALI:
4104 case HFA384x_PDR_3842_NIC_CONFIG:
4105 case HFA384x_PDR_USB_ID:
4106 case HFA384x_PDR_PCI_ID:
4107 case HFA384x_PDR_PCI_IFCONF:
4108 case HFA384x_PDR_PCI_PMCONF:
4109 case HFA384x_PDR_RFENRGY:
4110 case HFA384x_PDR_HFA3861_MANF_TESTSP:
4111 case HFA384x_PDR_HFA3861_MANF_TESTI:
4112 /* code is OK */
4113 return 1;
00b3ed16 4114 default:
21dc0f89 4115 if (pdrcode < 0x1000) {
00b3ed16 4116 /* code is OK, but we don't know exactly what it is */
a2120136
SSA
4117 pr_debug("Encountered unknown PDR#=0x%04x, assuming it's ok.\n",
4118 pdrcode);
00b3ed16 4119 return 1;
00b3ed16 4120 }
81980c16 4121 break;
00b3ed16 4122 }
81980c16
EB
4123 /* bad code */
4124 pr_debug("Encountered unknown PDR#=0x%04x, (>=0x1000), assuming it's bad.\n",
4125 pdrcode);
4126 return 0;
00b3ed16 4127}