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Merge branch 'core-objtool-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-block.git] / drivers / staging / vt6656 / baseband.c
CommitLineData
6b4c6ce8 1// SPDX-License-Identifier: GPL-2.0+
92b96797
FB		 2/*
3 * Copyright (c) 1996, 2003 VIA Networking Technologies, Inc.
4 * All rights reserved.
5 *
92b96797
FB		 6 * File: baseband.c
7 *
8 * Purpose: Implement functions to access baseband
9 *
10 * Author: Jerry Chen
11 *
12 * Date: Jun. 5, 2002
13 *
14 * Functions:
618d7d07
PST		 15 * vnt_get_frame_time - Calculate data frame transmitting time
16 * vnt_get_phy_field - Calculate PhyLength, PhyService and Phy
17 * Signal parameter for baseband Tx
7534180c 18 * vnt_vt3184_init - VIA VT3184 baseband chip init code
92b96797
FB		 19 *
20 * Revision History:
21 *
22 *
23 */
24
3017e587 25#include <linux/bits.h>
e681bb28 26#include <linux/kernel.h>
92b96797 27#include "mac.h"
92b96797 28#include "baseband.h"
92b96797 29#include "rf.h"
62c8526d 30#include "usbpipe.h"
92b96797 31
170ce6d2 32static u8 vnt_vt3184_agc[] = {
4fd6e9f2
MP		 33 0x00, 0x00, 0x02, 0x02, 0x04, 0x04, 0x06, 0x06,
34 0x08, 0x08, 0x0a, 0x0a, 0x0c, 0x0c, 0x0e, 0x0e, /* 0x0f */
35 0x10, 0x10, 0x12, 0x12, 0x14, 0x14, 0x16, 0x16,
36 0x18, 0x18, 0x1a, 0x1a, 0x1c, 0x1c, 0x1e, 0x1e, /* 0x1f */
37 0x20, 0x20, 0x22, 0x22, 0x24, 0x24, 0x26, 0x26,
38 0x28, 0x28, 0x2a, 0x2a, 0x2c, 0x2c, 0x2e, 0x2e, /* 0x2f */
39 0x30, 0x30, 0x32, 0x32, 0x34, 0x34, 0x36, 0x36,
40 0x38, 0x38, 0x3a, 0x3a, 0x3c, 0x3c, 0x3e, 0x3e /* 0x3f */
92b96797
FB		 41};
42
ab48ab22 43static u8 vnt_vt3184_al2230[] = {
4fd6e9f2
MP		 44 0x31, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
45 0x70, 0x45, 0x2a, 0x76, 0x00, 0x00, 0x80, 0x00, /* 0x0f */
46 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
47 0x00, 0x00, 0x00, 0x8e, 0x0a, 0x00, 0x00, 0x00, /* 0x1f */
48 0x00, 0x00, 0x00, 0x00, 0x00, 0x4a, 0x00, 0x00,
49 0x00, 0x00, 0x00, 0x00, 0x00, 0x4a, 0x00, 0x0c, /* 0x2f */
50 0x26, 0x5b, 0x00, 0x00, 0x00, 0x00, 0xaa, 0xaa,
51 0xff, 0xff, 0x79, 0x00, 0x00, 0x0b, 0x48, 0x04, /* 0x3f */
52 0x00, 0x08, 0x00, 0x08, 0x08, 0x14, 0x05, 0x09,
53 0x00, 0x00, 0x00, 0x00, 0x09, 0x73, 0x00, 0xc5, /* 0x4f */
54 0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
55 0x00, 0xd0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x5f */
56 0xe4, 0x80, 0x00, 0x00, 0x00, 0x00, 0x98, 0x0a,
57 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x01, 0x00, /* 0x6f */
58 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
59 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x7f */
60 0x8c, 0x01, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00,
61 0x08, 0x00, 0x1f, 0xb7, 0x88, 0x47, 0xaa, 0x00, /* 0x8f */
62 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xeb,
63 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* 0x9f */
64 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
65 0x18, 0x00, 0x00, 0x00, 0x00, 0x15, 0x00, 0x18, /* 0xaf */
66 0x38, 0x30, 0x00, 0x00, 0xff, 0x0f, 0xe4, 0xe2,
67 0x00, 0x00, 0x00, 0x03, 0x01, 0x00, 0x00, 0x00, /* 0xbf */
68 0x18, 0x20, 0x07, 0x18, 0xff, 0xff, 0x0e, 0x0a,
69 0x0e, 0x00, 0x82, 0xa7, 0x3c, 0x10, 0x30, 0x05, /* 0xcf */
70 0x40, 0x12, 0x00, 0x00, 0x10, 0x28, 0x80, 0x2a,
71 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0xdf */
72 0x00, 0xf3, 0x00, 0x00, 0x00, 0x10, 0x00, 0x12,
73 0x00, 0xf4, 0x00, 0xff, 0x79, 0x20, 0x30, 0x05, /* 0xef */
74 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
75 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* 0xff */
92b96797
FB		 76};
77
618d7d07 78/* {{RobertYu:20060515, new BB setting for VT3226D0 */
0a16b63d 79static u8 vnt_vt3184_vt3226d0[] = {
4fd6e9f2
MP		 80 0x31, 0x00, 0x00, 0x00, 0x00, 0x80, 0x00, 0x00,
81 0x70, 0x45, 0x2a, 0x76, 0x00, 0x00, 0x80, 0x00, /* 0x0f */
82 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
83 0x00, 0x00, 0x00, 0x8e, 0x0a, 0x00, 0x00, 0x00, /* 0x1f */
84 0x00, 0x00, 0x00, 0x00, 0x00, 0x4a, 0x00, 0x00,
85 0x00, 0x00, 0x00, 0x00, 0x00, 0x4a, 0x00, 0x0c, /* 0x2f */
86 0x26, 0x5b, 0x00, 0x00, 0x00, 0x00, 0xaa, 0xaa,
87 0xff, 0xff, 0x79, 0x00, 0x00, 0x0b, 0x48, 0x04, /* 0x3f */
88 0x00, 0x08, 0x00, 0x08, 0x08, 0x14, 0x05, 0x09,
89 0x00, 0x00, 0x00, 0x00, 0x09, 0x73, 0x00, 0xc5, /* 0x4f */
90 0x00, 0x19, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
91 0x00, 0xd0, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x5f */
92 0xe4, 0x80, 0x00, 0x00, 0x00, 0x00, 0x98, 0x0a,
93 0x00, 0x00, 0x00, 0x00, 0x00, 0x03, 0x01, 0x00, /* 0x6f */
94 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
95 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0x7f */
96 0x8c, 0x01, 0x09, 0x00, 0x00, 0x00, 0x00, 0x00,
97 0x08, 0x00, 0x1f, 0xb7, 0x88, 0x47, 0xaa, 0x00, /* 0x8f */
98 0x20, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0xeb,
99 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x01, /* 0x9f */
100 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x00,
101 0x18, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x18, /* 0xaf */
102 0x38, 0x30, 0x00, 0x00, 0xff, 0x0f, 0xe4, 0xe2,
103 0x00, 0x00, 0x00, 0x03, 0x01, 0x00, 0x00, 0x00, /* 0xbf */
104 0x18, 0x20, 0x07, 0x18, 0xff, 0xff, 0x10, 0x0a,
105 0x0e, 0x00, 0x84, 0xa7, 0x3c, 0x10, 0x24, 0x05, /* 0xcf */
106 0x40, 0x12, 0x00, 0x00, 0x10, 0x28, 0x80, 0x2a,
107 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 0xdf */
108 0x00, 0xf3, 0x00, 0x00, 0x00, 0x10, 0x00, 0x10,
109 0x00, 0xf4, 0x00, 0xff, 0x79, 0x20, 0x30, 0x08, /* 0xef */
110 0x00, 0x3e, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
111 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 /* 0xff */
92b96797
FB		 112};
113
231c6f13 114static const u16 vnt_frame_time[MAX_RATE] = {
42b138d9
PST		 115 10, 20, 55, 110, 24, 36, 48, 72, 96, 144, 192, 216
116};
92b96797 117
92b96797
FB		 118/*
119 * Description: Calculate data frame transmitting time
120 *
121 * Parameters:
122 * In:
030ede1e
MP		 123 * preamble_type - Preamble Type
124 * pkt_type - PK_TYPE_11A, PK_TYPE_11B, PK_TYPE_11GB, PK_TYPE_11GA
125 * frame_length - Baseband Type
3b5a89ca 126 * tx_rate - Tx Rate
92b96797
FB		 127 * Out:
128 *
129 * Return Value: FrameTime
130 *
131 */
d38ee5b2 132unsigned int vnt_get_frame_time(u8 preamble_type, u8 pkt_type,
56788240 133 unsigned int frame_length, u16 tx_rate)
92b96797 134{
030ede1e
MP		 135 unsigned int frame_time;
136 unsigned int preamble;
030ede1e 137 unsigned int rate = 0;
92b96797 138
3b5a89ca 139 if (tx_rate > RATE_54M)
4d99952d 140 return 0;
92b96797 141
231c6f13 142 rate = (unsigned int)vnt_frame_time[tx_rate];
92b96797 143
3b5a89ca 144 if (tx_rate <= 3) {
030ede1e
MP		 145 if (preamble_type == 1)
146 preamble = 96;
4d99952d 147 else
030ede1e 148 preamble = 192;
92b96797 149
e681bb28 150 frame_time = DIV_ROUND_UP(frame_length * 80, rate);
030ede1e 151 return preamble + frame_time;
b377ed4c 152 }
4d99952d 153
e681bb28 154 frame_time = DIV_ROUND_UP(frame_length * 8 + 22, rate);
b377ed4c 155 frame_time = frame_time * 4;
4d99952d 156
b377ed4c
RB		 157 if (pkt_type != PK_TYPE_11A)
158 frame_time += 6;
159 return 20 + frame_time;
92b96797
FB		 160}
161
162/*
a0a1f61a 163 * Description: Calculate Length, Service, and Signal fields of Phy for Tx
92b96797
FB		 164 *
165 * Parameters:
166 * In:
a1ff5435
MP		 167 * priv - Device Structure
168 * frame_length - Tx Frame Length
169 * tx_rate - Tx Rate
92b96797 170 * Out:
aed387c7 171 * struct vnt_phy_field *phy
618d7d07
PST		 172 * - pointer to Phy Length field
173 * - pointer to Phy Service field
174 * - pointer to Phy Signal field
92b96797
FB		 175 *
176 * Return Value: none
177 *
178 */
205056f3 179void vnt_get_phy_field(struct vnt_private *priv, u32 frame_length,
56788240 180 u16 tx_rate, u8 pkt_type, struct vnt_phy_field *phy)
92b96797 181{
a1ff5435
MP		 182 u32 bit_count;
183 u32 count = 0;
184 u32 tmp;
185 int ext_bit;
98e93fe5 186 u8 preamble_type = priv->preamble_type;
92b96797 187
a1ff5435
MP		 188 bit_count = frame_length * 8;
189 ext_bit = false;
a4fb3e78 190
a1ff5435 191 switch (tx_rate) {
a4fb3e78 192 case RATE_1M:
a1ff5435 193 count = bit_count;
a4fb3e78
MP		 194
195 phy->signal = 0x00;
196
197 break;
198 case RATE_2M:
a1ff5435 199 count = bit_count / 2;
a4fb3e78 200
a1ff5435 201 if (preamble_type == 1)
a4fb3e78
MP		 202 phy->signal = 0x09;
203 else
204 phy->signal = 0x01;
205
206 break;
207 case RATE_5M:
e681bb28 208 count = DIV_ROUND_UP(bit_count * 10, 55);
a4fb3e78 209
a1ff5435 210 if (preamble_type == 1)
a4fb3e78
MP		 211 phy->signal = 0x0a;
212 else
213 phy->signal = 0x02;
214
215 break;
216 case RATE_11M:
a1ff5435
MP		 217 count = bit_count / 11;
218 tmp = count * 11;
a4fb3e78 219
a1ff5435
MP		 220 if (tmp != bit_count) {
221 count++;
a4fb3e78 222
a1ff5435
MP		 223 if ((bit_count - tmp) <= 3)
224 ext_bit = true;
a4fb3e78
MP		 225 }
226
a1ff5435 227 if (preamble_type == 1)
a4fb3e78
MP		 228 phy->signal = 0x0b;
229 else
230 phy->signal = 0x03;
231
232 break;
233 case RATE_6M:
a1ff5435 234 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP		 235 phy->signal = 0x9b;
236 else
237 phy->signal = 0x8b;
238
239 break;
240 case RATE_9M:
a1ff5435 241 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP		 242 phy->signal = 0x9f;
243 else
244 phy->signal = 0x8f;
245
246 break;
247 case RATE_12M:
a1ff5435 248 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP		 249 phy->signal = 0x9a;
250 else
251 phy->signal = 0x8a;
252
253 break;
254 case RATE_18M:
a1ff5435 255 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP		 256 phy->signal = 0x9e;
257 else
258 phy->signal = 0x8e;
259
260 break;
261 case RATE_24M:
a1ff5435 262 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP		 263 phy->signal = 0x99;
264 else
265 phy->signal = 0x89;
266
267 break;
268 case RATE_36M:
a1ff5435 269 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP		 270 phy->signal = 0x9d;
271 else
272 phy->signal = 0x8d;
273
274 break;
275 case RATE_48M:
a1ff5435 276 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP		 277 phy->signal = 0x98;
278 else
279 phy->signal = 0x88;
280
281 break;
282 case RATE_54M:
a1ff5435 283 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP		 284 phy->signal = 0x9c;
285 else
286 phy->signal = 0x8c;
287 break;
288 default:
a1ff5435 289 if (pkt_type == PK_TYPE_11A)
a4fb3e78
MP		 290 phy->signal = 0x9c;
291 else
292 phy->signal = 0x8c;
293 break;
294 }
92b96797 295
a1ff5435 296 if (pkt_type == PK_TYPE_11B) {
aed387c7 297 phy->service = 0x00;
a1ff5435 298 if (ext_bit)
aed387c7 299 phy->service |= 0x80;
a1ff5435 300 phy->len = cpu_to_le16((u16)count);
4ac306e0 301 } else {
aed387c7 302 phy->service = 0x00;
a1ff5435 303 phy->len = cpu_to_le16((u16)frame_length);
4ac306e0 304 }
92b96797
FB		 305}
306
92b96797
FB		 307/*
308 * Description: Set Antenna mode
309 *
310 * Parameters:
311 * In:
53dab328
MP		 312 * priv - Device Structure
313 * antenna_mode - Antenna Mode
92b96797
FB		 314 * Out:
315 * none
316 *
317 * Return Value: none
318 *
319 */
7156f7d9 320int vnt_set_antenna_mode(struct vnt_private *priv, u8 antenna_mode)
92b96797 321{
53dab328 322 switch (antenna_mode) {
efe40c09
MP		 323 case ANT_TXA:
324 case ANT_TXB:
325 break;
326 case ANT_RXA:
cd5856ae 327 priv->bb_rx_conf &= 0xFC;
efe40c09
MP		 328 break;
329 case ANT_RXB:
cd5856ae
MP		 330 priv->bb_rx_conf &= 0xFE;
331 priv->bb_rx_conf |= 0x02;
efe40c09
MP		 332 break;
333 }
334
7156f7d9
QD		 335 return vnt_control_out(priv, MESSAGE_TYPE_SET_ANTMD,
336 (u16)antenna_mode, 0, 0, NULL);
92b96797
FB		 337}
338
339/*
340 * Description: Set Antenna mode
341 *
342 * Parameters:
343 * In:
344 * pDevice - Device Structure
345 * byAntennaMode - Antenna Mode
346 * Out:
347 * none
348 *
349 * Return Value: none
350 *
351 */
6487c49e 352
7534180c 353int vnt_vt3184_init(struct vnt_private *priv)
92b96797 354{
7156f7d9 355 int ret = 0;
4237fe4f 356 u16 length;
9b89b049 357 u8 *addr;
9df68292 358 u8 data;
92b96797 359
7156f7d9
QD		 360 ret = vnt_control_in(priv, MESSAGE_TYPE_READ, 0, MESSAGE_REQUEST_EEPROM,
361 EEP_MAX_CONTEXT_SIZE, priv->eeprom);
362 if (ret)
363 goto end;
9b89b049 364
bbb11263 365 priv->rf_type = priv->eeprom[EEP_OFS_RFTYPE];
9b89b049 366
6242ecae 367 dev_dbg(&priv->usb->dev, "RF Type %d\n", priv->rf_type);
9b89b049 368
97806d36
AMG		 369 if (priv->rf_type == RF_AL2230 ||
370 priv->rf_type == RF_AL2230S) {
cd5856ae 371 priv->bb_rx_conf = vnt_vt3184_al2230[10];
ab48ab22
MP		 372 length = sizeof(vnt_vt3184_al2230);
373 addr = vnt_vt3184_al2230;
9b89b049 374
c37cbd37
MP		 375 priv->bb_vga[0] = 0x1C;
376 priv->bb_vga[1] = 0x10;
377 priv->bb_vga[2] = 0x0;
378 priv->bb_vga[3] = 0x0;
975c89f3 379
6242ecae 380 } else if (priv->rf_type == RF_AIROHA7230) {
cd5856ae 381 priv->bb_rx_conf = vnt_vt3184_al2230[10];
ab48ab22
MP		 382 length = sizeof(vnt_vt3184_al2230);
383 addr = vnt_vt3184_al2230;
9b89b049
MP		 384
385 addr[0xd7] = 0x06;
386
c37cbd37
MP		 387 priv->bb_vga[0] = 0x1c;
388 priv->bb_vga[1] = 0x10;
389 priv->bb_vga[2] = 0x0;
390 priv->bb_vga[3] = 0x0;
975c89f3 391
6242ecae
MP		 392 } else if ((priv->rf_type == RF_VT3226) ||
393 (priv->rf_type == RF_VT3226D0)) {
cd5856ae 394 priv->bb_rx_conf = vnt_vt3184_vt3226d0[10];
0a16b63d
MP		 395 length = sizeof(vnt_vt3184_vt3226d0);
396 addr = vnt_vt3184_vt3226d0;
9b89b049 397
c37cbd37
MP		 398 priv->bb_vga[0] = 0x20;
399 priv->bb_vga[1] = 0x10;
400 priv->bb_vga[2] = 0x0;
401 priv->bb_vga[3] = 0x0;
975c89f3 402
9b89b049 403 /* Fix VT3226 DFC system timing issue */
7156f7d9
QD		 404 ret = vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL2,
405 SOFTPWRCTL_RFLEOPT);
406 if (ret)
407 goto end;
6242ecae 408 } else if (priv->rf_type == RF_VT3342A0) {
cd5856ae 409 priv->bb_rx_conf = vnt_vt3184_vt3226d0[10];
0a16b63d
MP		 410 length = sizeof(vnt_vt3184_vt3226d0);
411 addr = vnt_vt3184_vt3226d0;
9b89b049 412
c37cbd37
MP		 413 priv->bb_vga[0] = 0x20;
414 priv->bb_vga[1] = 0x10;
415 priv->bb_vga[2] = 0x0;
416 priv->bb_vga[3] = 0x0;
975c89f3 417
9b89b049 418 /* Fix VT3226 DFC system timing issue */
7156f7d9
QD		 419 ret = vnt_mac_reg_bits_on(priv, MAC_REG_SOFTPWRCTL2,
420 SOFTPWRCTL_RFLEOPT);
421 if (ret)
422 goto end;
9b89b049 423 } else {
7156f7d9 424 goto end;
9b89b049 425 }
92b96797 426
69cc1f92 427 ret = vnt_control_out_blocks(priv, VNT_REG_BLOCK_SIZE,
f75bb88f 428 MESSAGE_REQUEST_BBREG, length, addr);
7156f7d9
QD		 429 if (ret)
430 goto end;
9b89b049 431
7156f7d9 432 ret = vnt_control_out(priv, MESSAGE_TYPE_WRITE, 0,
c3aee662
MP		 433 MESSAGE_REQUEST_BBAGC,
434 sizeof(vnt_vt3184_agc), vnt_vt3184_agc);
7156f7d9
QD		 435 if (ret)
436 goto end;
9b89b049 437
97806d36
AMG		 438 if (priv->rf_type == RF_VT3226 ||
439 priv->rf_type == RF_VT3342A0) {
7156f7d9
QD		 440 ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
441 MAC_REG_ITRTMSET, 0x23);
442 if (ret)
443 goto end;
444
3017e587 445 ret = vnt_mac_reg_bits_on(priv, MAC_REG_PAPEDELAY, BIT(0));
7156f7d9
QD		 446 if (ret)
447 goto end;
6242ecae 448 } else if (priv->rf_type == RF_VT3226D0) {
7156f7d9
QD		 449 ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_MACREG,
450 MAC_REG_ITRTMSET, 0x11);
451 if (ret)
452 goto end;
453
3017e587 454 ret = vnt_mac_reg_bits_on(priv, MAC_REG_PAPEDELAY, BIT(0));
7156f7d9
QD		 455 if (ret)
456 goto end;
9b89b049
MP		 457 }
458
7156f7d9
QD		 459 ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x04, 0x7f);
460 if (ret)
461 goto end;
92b96797 462
7156f7d9
QD		 463 ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);
464 if (ret)
465 goto end;
466
467 ret = vnt_rf_table_download(priv);
468 if (ret)
469 goto end;
9df68292
MP		 470
471 /* Fix for TX USB resets from vendors driver */
7156f7d9
QD		 472 ret = vnt_control_in(priv, MESSAGE_TYPE_READ, USB_REG4,
473 MESSAGE_REQUEST_MEM, sizeof(data), &data);
474 if (ret)
475 goto end;
9df68292
MP		 476
477 data |= 0x2;
478
7156f7d9
QD		 479 ret = vnt_control_out(priv, MESSAGE_TYPE_WRITE, USB_REG4,
480 MESSAGE_REQUEST_MEM, sizeof(data), &data);
9df68292 481
7156f7d9
QD		 482end:
483 return ret;
92b96797
FB		 484}
485
92b96797
FB		 486/*
487 * Description: Set ShortSlotTime mode
488 *
489 * Parameters:
490 * In:
4bdb3120 491 * priv - Device Structure
92b96797
FB		 492 * Out:
493 * none
494 *
495 * Return Value: none
496 *
497 */
7156f7d9 498int vnt_set_short_slot_time(struct vnt_private *priv)
92b96797 499{
7156f7d9 500 int ret = 0;
4bdb3120 501 u8 bb_vga = 0;
92b96797 502
a641c9ec 503 if (priv->short_slot_time)
cd5856ae 504 priv->bb_rx_conf &= 0xdf;
f001d7e2 505 else
cd5856ae 506 priv->bb_rx_conf |= 0x20;
4bdb3120 507
7156f7d9
QD		 508 ret = vnt_control_in_u8(priv, MESSAGE_REQUEST_BBREG, 0xe7, &bb_vga);
509 if (ret)
510 goto end;
92b96797 511
c37cbd37 512 if (bb_vga == priv->bb_vga[0])
cd5856ae 513 priv->bb_rx_conf |= 0x20;
92b96797 514
7156f7d9
QD		 515 ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a,
516 priv->bb_rx_conf);
517
518end:
519 return ret;
92b96797
FB		 520}
521
de8690a2 522void vnt_set_vga_gain_offset(struct vnt_private *priv, u8 data)
92b96797 523{
285d58c4 524 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xE7, data);
92b96797 525
15897f67 526 /* patch for 3253B0 Baseband with Cardbus module */
a641c9ec 527 if (priv->short_slot_time)
cd5856ae 528 priv->bb_rx_conf &= 0xdf; /* 1101 1111 */
f001d7e2 529 else
cd5856ae 530 priv->bb_rx_conf |= 0x20; /* 0010 0000 */
f001d7e2 531
cd5856ae 532 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0a, priv->bb_rx_conf);
92b96797
FB		 533}
534
92b96797 535/*
e8e072da 536 * Description: vnt_set_deep_sleep
92b96797
FB		 537 *
538 * Parameters:
539 * In:
07c116f2 540 * priv - Device Structure
92b96797
FB		 541 * Out:
542 * none
543 *
544 * Return Value: none
545 *
546 */
7156f7d9 547int vnt_set_deep_sleep(struct vnt_private *priv)
92b96797 548{
7156f7d9
QD		 549 int ret = 0;
550
551 /* CR12 */
552 ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x17);
553 if (ret)
554 return ret;
555
556 /* CR13 */
557 return vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0xB9);
92b96797
FB		 558}
559
7156f7d9 560int vnt_exit_deep_sleep(struct vnt_private *priv)
92b96797 561{
7156f7d9
QD		 562 int ret = 0;
563
564 /* CR12 */
565 ret = vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0c, 0x00);
566 if (ret)
567 return ret;
568
569 /* CR13 */
570 return vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0x0d, 0x01);
92b96797
FB		 571}
572
80dcc0ae 573void vnt_update_pre_ed_threshold(struct vnt_private *priv, int scanning)
92b96797 574{
7794dad6 575 u8 cr_201 = 0x0, cr_206 = 0x0;
43fd1924 576 u8 ed_inx = priv->bb_pre_ed_index;
19440266 577
6242ecae 578 switch (priv->rf_type) {
19440266
MP		 579 case RF_AL2230:
580 case RF_AL2230S:
581 case RF_AIROHA7230:
582 if (scanning) { /* Max sensitivity */
583 ed_inx = 0;
584 cr_206 = 0x30;
585 break;
586 }
92b96797 587
12687222 588 if (priv->bb_pre_ed_rssi <= 45) {
19440266
MP		 589 ed_inx = 20;
590 cr_201 = 0xff;
12687222 591 } else if (priv->bb_pre_ed_rssi <= 46) {
19440266
MP		 592 ed_inx = 19;
593 cr_201 = 0x1a;
12687222 594 } else if (priv->bb_pre_ed_rssi <= 47) {
19440266
MP		 595 ed_inx = 18;
596 cr_201 = 0x15;
12687222 597 } else if (priv->bb_pre_ed_rssi <= 49) {
19440266
MP		 598 ed_inx = 17;
599 cr_201 = 0xe;
12687222 600 } else if (priv->bb_pre_ed_rssi <= 51) {
19440266
MP		 601 ed_inx = 16;
602 cr_201 = 0x9;
12687222 603 } else if (priv->bb_pre_ed_rssi <= 53) {
19440266
MP		 604 ed_inx = 15;
605 cr_201 = 0x6;
12687222 606 } else if (priv->bb_pre_ed_rssi <= 55) {
19440266
MP		 607 ed_inx = 14;
608 cr_201 = 0x3;
12687222 609 } else if (priv->bb_pre_ed_rssi <= 56) {
19440266
MP		 610 ed_inx = 13;
611 cr_201 = 0x2;
612 cr_206 = 0xa0;
12687222 613 } else if (priv->bb_pre_ed_rssi <= 57) {
19440266
MP		 614 ed_inx = 12;
615 cr_201 = 0x2;
616 cr_206 = 0x20;
12687222 617 } else if (priv->bb_pre_ed_rssi <= 58) {
19440266
MP		 618 ed_inx = 11;
619 cr_201 = 0x1;
620 cr_206 = 0xa0;
12687222 621 } else if (priv->bb_pre_ed_rssi <= 59) {
19440266
MP		 622 ed_inx = 10;
623 cr_201 = 0x1;
624 cr_206 = 0x54;
12687222 625 } else if (priv->bb_pre_ed_rssi <= 60) {
19440266
MP		 626 ed_inx = 9;
627 cr_201 = 0x1;
628 cr_206 = 0x18;
12687222 629 } else if (priv->bb_pre_ed_rssi <= 61) {
19440266
MP		 630 ed_inx = 8;
631 cr_206 = 0xe3;
12687222 632 } else if (priv->bb_pre_ed_rssi <= 62) {
19440266
MP		 633 ed_inx = 7;
634 cr_206 = 0xb9;
12687222 635 } else if (priv->bb_pre_ed_rssi <= 63) {
19440266
MP		 636 ed_inx = 6;
637 cr_206 = 0x93;
12687222 638 } else if (priv->bb_pre_ed_rssi <= 64) {
19440266
MP		 639 ed_inx = 5;
640 cr_206 = 0x79;
12687222 641 } else if (priv->bb_pre_ed_rssi <= 65) {
19440266
MP		 642 ed_inx = 4;
643 cr_206 = 0x62;
12687222 644 } else if (priv->bb_pre_ed_rssi <= 66) {
19440266
MP		 645 ed_inx = 3;
646 cr_206 = 0x51;
12687222 647 } else if (priv->bb_pre_ed_rssi <= 67) {
19440266
MP		 648 ed_inx = 2;
649 cr_206 = 0x43;
12687222 650 } else if (priv->bb_pre_ed_rssi <= 68) {
19440266
MP		 651 ed_inx = 1;
652 cr_206 = 0x36;
653 } else {
654 ed_inx = 0;
655 cr_206 = 0x30;
656 }
657 break;
92b96797 658
19440266
MP		 659 case RF_VT3226:
660 case RF_VT3226D0:
661 if (scanning) { /* Max sensitivity */
662 ed_inx = 0;
663 cr_206 = 0x24;
664 break;
665 }
92b96797 666
12687222 667 if (priv->bb_pre_ed_rssi <= 41) {
19440266
MP		 668 ed_inx = 22;
669 cr_201 = 0xff;
12687222 670 } else if (priv->bb_pre_ed_rssi <= 42) {
19440266
MP		 671 ed_inx = 21;
672 cr_201 = 0x36;
12687222 673 } else if (priv->bb_pre_ed_rssi <= 43) {
19440266
MP		 674 ed_inx = 20;
675 cr_201 = 0x26;
12687222 676 } else if (priv->bb_pre_ed_rssi <= 45) {
19440266
MP		 677 ed_inx = 19;
678 cr_201 = 0x18;
12687222 679 } else if (priv->bb_pre_ed_rssi <= 47) {
19440266
MP		 680 ed_inx = 18;
681 cr_201 = 0x11;
12687222 682 } else if (priv->bb_pre_ed_rssi <= 49) {
19440266
MP		 683 ed_inx = 17;
684 cr_201 = 0xa;
12687222 685 } else if (priv->bb_pre_ed_rssi <= 51) {
19440266
MP		 686 ed_inx = 16;
687 cr_201 = 0x7;
12687222 688 } else if (priv->bb_pre_ed_rssi <= 53) {
19440266
MP		 689 ed_inx = 15;
690 cr_201 = 0x4;
12687222 691 } else if (priv->bb_pre_ed_rssi <= 55) {
19440266
MP		 692 ed_inx = 14;
693 cr_201 = 0x2;
694 cr_206 = 0xc0;
12687222 695 } else if (priv->bb_pre_ed_rssi <= 56) {
19440266
MP		 696 ed_inx = 13;
697 cr_201 = 0x2;
698 cr_206 = 0x30;
12687222 699 } else if (priv->bb_pre_ed_rssi <= 57) {
19440266
MP		 700 ed_inx = 12;
701 cr_201 = 0x1;
702 cr_206 = 0xb0;
12687222 703 } else if (priv->bb_pre_ed_rssi <= 58) {
19440266
MP		 704 ed_inx = 11;
705 cr_201 = 0x1;
706 cr_206 = 0x70;
12687222 707 } else if (priv->bb_pre_ed_rssi <= 59) {
19440266
MP		 708 ed_inx = 10;
709 cr_201 = 0x1;
710 cr_206 = 0x30;
12687222 711 } else if (priv->bb_pre_ed_rssi <= 60) {
19440266
MP		 712 ed_inx = 9;
713 cr_206 = 0xea;
12687222 714 } else if (priv->bb_pre_ed_rssi <= 61) {
19440266
MP		 715 ed_inx = 8;
716 cr_206 = 0xc0;
12687222 717 } else if (priv->bb_pre_ed_rssi <= 62) {
19440266
MP		 718 ed_inx = 7;
719 cr_206 = 0x9c;
12687222 720 } else if (priv->bb_pre_ed_rssi <= 63) {
19440266
MP		 721 ed_inx = 6;
722 cr_206 = 0x80;
12687222 723 } else if (priv->bb_pre_ed_rssi <= 64) {
19440266
MP		 724 ed_inx = 5;
725 cr_206 = 0x68;
12687222 726 } else if (priv->bb_pre_ed_rssi <= 65) {
19440266
MP		 727 ed_inx = 4;
728 cr_206 = 0x52;
12687222 729 } else if (priv->bb_pre_ed_rssi <= 66) {
19440266
MP		 730 ed_inx = 3;
731 cr_206 = 0x43;
12687222 732 } else if (priv->bb_pre_ed_rssi <= 67) {
19440266
MP		 733 ed_inx = 2;
734 cr_206 = 0x36;
12687222 735 } else if (priv->bb_pre_ed_rssi <= 68) {
19440266
MP		 736 ed_inx = 1;
737 cr_206 = 0x2d;
738 } else {
739 ed_inx = 0;
740 cr_206 = 0x24;
741 }
742 break;
92b96797 743
19440266
MP		 744 case RF_VT3342A0:
745 if (scanning) { /* need Max sensitivity */
746 ed_inx = 0;
747 cr_206 = 0x38;
748 break;
749 }
92b96797 750
12687222 751 if (priv->bb_pre_ed_rssi <= 41) {
19440266
MP		 752 ed_inx = 20;
753 cr_201 = 0xff;
12687222 754 } else if (priv->bb_pre_ed_rssi <= 42) {
19440266
MP		 755 ed_inx = 19;
756 cr_201 = 0x36;
12687222 757 } else if (priv->bb_pre_ed_rssi <= 43) {
19440266
MP		 758 ed_inx = 18;
759 cr_201 = 0x26;
12687222 760 } else if (priv->bb_pre_ed_rssi <= 45) {
19440266
MP		 761 ed_inx = 17;
762 cr_201 = 0x18;
12687222 763 } else if (priv->bb_pre_ed_rssi <= 47) {
19440266
MP		 764 ed_inx = 16;
765 cr_201 = 0x11;
12687222 766 } else if (priv->bb_pre_ed_rssi <= 49) {
19440266
MP		 767 ed_inx = 15;
768 cr_201 = 0xa;
12687222 769 } else if (priv->bb_pre_ed_rssi <= 51) {
19440266
MP		 770 ed_inx = 14;
771 cr_201 = 0x7;
12687222 772 } else if (priv->bb_pre_ed_rssi <= 53) {
19440266
MP		 773 ed_inx = 13;
774 cr_201 = 0x4;
12687222 775 } else if (priv->bb_pre_ed_rssi <= 55) {
19440266
MP		 776 ed_inx = 12;
777 cr_201 = 0x2;
778 cr_206 = 0xc0;
12687222 779 } else if (priv->bb_pre_ed_rssi <= 56) {
19440266
MP		 780 ed_inx = 11;
781 cr_201 = 0x2;
782 cr_206 = 0x30;
12687222 783 } else if (priv->bb_pre_ed_rssi <= 57) {
19440266
MP		 784 ed_inx = 10;
785 cr_201 = 0x1;
786 cr_206 = 0xb0;
12687222 787 } else if (priv->bb_pre_ed_rssi <= 58) {
19440266
MP		 788 ed_inx = 9;
789 cr_201 = 0x1;
790 cr_206 = 0x70;
12687222 791 } else if (priv->bb_pre_ed_rssi <= 59) {
19440266
MP		 792 ed_inx = 8;
793 cr_201 = 0x1;
794 cr_206 = 0x30;
12687222 795 } else if (priv->bb_pre_ed_rssi <= 60) {
19440266
MP		 796 ed_inx = 7;
797 cr_206 = 0xea;
12687222 798 } else if (priv->bb_pre_ed_rssi <= 61) {
19440266
MP		 799 ed_inx = 6;
800 cr_206 = 0xc0;
12687222 801 } else if (priv->bb_pre_ed_rssi <= 62) {
19440266
MP		 802 ed_inx = 5;
803 cr_206 = 0x9c;
12687222 804 } else if (priv->bb_pre_ed_rssi <= 63) {
19440266
MP		 805 ed_inx = 4;
806 cr_206 = 0x80;
12687222 807 } else if (priv->bb_pre_ed_rssi <= 64) {
19440266
MP		 808 ed_inx = 3;
809 cr_206 = 0x68;
12687222 810 } else if (priv->bb_pre_ed_rssi <= 65) {
19440266
MP		 811 ed_inx = 2;
812 cr_206 = 0x52;
12687222 813 } else if (priv->bb_pre_ed_rssi <= 66) {
19440266
MP		 814 ed_inx = 1;
815 cr_206 = 0x43;
816 } else {
817 ed_inx = 0;
818 cr_206 = 0x38;
819 }
820 break;
19440266 821 }
92b96797 822
43fd1924 823 if (ed_inx == priv->bb_pre_ed_index && !scanning)
6d5485af
MP		 824 return;
825
43fd1924 826 priv->bb_pre_ed_index = ed_inx;
6d5485af 827
12687222 828 dev_dbg(&priv->usb->dev, "%s bb_pre_ed_rssi %d\n",
56788240 829 __func__, priv->bb_pre_ed_rssi);
0b7021f5 830
7794dad6
MP		 831 if (!cr_201 && !cr_206)
832 return;
833
285d58c4
MP		 834 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xc9, cr_201);
835 vnt_control_out_u8(priv, MESSAGE_REQUEST_BBREG, 0xce, cr_206);
92b96797
FB		 836}
837
Linux 6.x block layer and io_uring tree(s)