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b2441318 | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
81dee67e SM |
2 | #ifndef DDK750_CHIP_H__ |
3 | #define DDK750_CHIP_H__ | |
4 | #define DEFAULT_INPUT_CLOCK 14318181 /* Default reference clock */ | |
62fa8e10 SM |
5 | #ifndef SM750LE_REVISION_ID |
6 | #define SM750LE_REVISION_ID ((unsigned char)0xfe) | |
7 | #endif | |
81dee67e | 8 | |
f8b0dced | 9 | #include <linux/io.h> |
efe9bc08 EL |
10 | #include <linux/ioport.h> |
11 | #include <linux/uaccess.h> | |
12 | ||
c075b6f2 MS |
13 | extern void __iomem *mmio750; |
14 | ||
efe9bc08 | 15 | /* software control endianness */ |
c075b6f2 MS |
16 | static inline u32 peek32(u32 addr) |
17 | { | |
18 | return readl(addr + mmio750); | |
19 | } | |
efe9bc08 | 20 | |
c075b6f2 MS |
21 | static inline void poke32(u32 data, u32 addr) |
22 | { | |
23 | writel(data, addr + mmio750); | |
24 | } | |
f8b0dced | 25 | |
81dee67e | 26 | /* This is all the chips recognized by this library */ |
259fef35 | 27 | typedef enum _logical_chip_type_t { |
63de0eb0 IA |
28 | SM_UNKNOWN, |
29 | SM718, | |
30 | SM750, | |
31 | SM750LE, | |
81dee67e SM |
32 | } |
33 | logical_chip_type_t; | |
34 | ||
259fef35 | 35 | typedef enum _clock_type_t { |
81dee67e SM |
36 | MXCLK_PLL, |
37 | PRIMARY_PLL, | |
38 | SECONDARY_PLL, | |
39 | VGA0_PLL, | |
40 | VGA1_PLL, | |
41 | } | |
42 | clock_type_t; | |
43 | ||
9872fa75 | 44 | struct pll_value { |
63de0eb0 IA |
45 | clock_type_t clockType; |
46 | unsigned long inputFreq; /* Input clock frequency to the PLL */ | |
81dee67e | 47 | |
63de0eb0 IA |
48 | /* Use this when clockType = PANEL_PLL */ |
49 | unsigned long M; | |
50 | unsigned long N; | |
51 | unsigned long OD; | |
52 | unsigned long POD; | |
9872fa75 | 53 | }; |
81dee67e SM |
54 | |
55 | /* input struct to initChipParam() function */ | |
9872fa75 | 56 | struct initchip_param { |
f5016082 ES |
57 | /* Use power mode 0 or 1 */ |
58 | unsigned short powerMode; | |
59 | ||
60 | /* | |
61 | * Speed of main chip clock in MHz unit | |
62 | * 0 = keep the current clock setting | |
63 | * Others = the new main chip clock | |
64 | */ | |
65 | unsigned short chipClock; | |
66 | ||
67 | /* | |
68 | * Speed of memory clock in MHz unit | |
69 | * 0 = keep the current clock setting | |
70 | * Others = the new memory clock | |
71 | */ | |
72 | unsigned short memClock; | |
73 | ||
74 | /* | |
75 | * Speed of master clock in MHz unit | |
76 | * 0 = keep the current clock setting | |
77 | * Others = the new master clock | |
78 | */ | |
79 | unsigned short masterClock; | |
80 | ||
81 | /* | |
82 | * 0 = leave all engine state untouched. | |
83 | * 1 = make sure they are off: 2D, Overlay, | |
84 | * video alpha, alpha, hardware cursors | |
85 | */ | |
86 | unsigned short setAllEngOff; | |
87 | ||
88 | /* | |
89 | * 0 = Do not reset the memory controller | |
90 | * 1 = Reset the memory controller | |
91 | */ | |
92 | unsigned char resetMemory; | |
81dee67e | 93 | |
63de0eb0 | 94 | /* More initialization parameter can be added if needed */ |
9872fa75 | 95 | }; |
81dee67e | 96 | |
06a4f429 | 97 | logical_chip_type_t sm750_get_chip_type(void); |
d28fb1ff | 98 | void sm750_set_chip_type(unsigned short devId, u8 revId); |
52d0744d AB |
99 | unsigned int sm750_calc_pll_value(unsigned int request, struct pll_value *pll); |
100 | unsigned int sm750_format_pll_reg(struct pll_value *pPLL); | |
3fcb465f | 101 | unsigned int ddk750_get_vm_size(void); |
47c565ea | 102 | int ddk750_init_hw(struct initchip_param *pinit_param); |
81dee67e | 103 | |
81dee67e | 104 | #endif |