[linux-block.git] / drivers / staging / rtl8723bs / include / rtw_xmit.h

/* SPDX-License-Identifier: GPL-2.0 */
/******************************************************************************
 *
 * Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
 *
 ******************************************************************************/
#ifndef _RTW_XMIT_H_
#define _RTW_XMIT_H_

#include <linux/completion.h>

#define MAX_XMITBUF_SZ	(20480)	/*  20k */

#define NR_XMITBUFF	(16)

#define XMITBUF_ALIGN_SZ 512

/*  xmit extension buff defination */
#define MAX_XMIT_EXTBUF_SZ	(1536)
#define NR_XMIT_EXTBUFF	(32)

#define MAX_CMDBUF_SZ	(5120)	/* 4096) */

#define MAX_NUMBLKS		(1)

#define XMIT_VO_QUEUE (0)
#define XMIT_VI_QUEUE (1)
#define XMIT_BE_QUEUE (2)
#define XMIT_BK_QUEUE (3)

#define VO_QUEUE_INX		0
#define VI_QUEUE_INX		1
#define BE_QUEUE_INX		2
#define BK_QUEUE_INX		3
#define BCN_QUEUE_INX		4
#define MGT_QUEUE_INX		5
#define HIGH_QUEUE_INX		6
#define TXCMD_QUEUE_INX	7

#define HW_QUEUE_ENTRY	8

#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\
do {\
	pattrib_iv[0] = dot11txpn._byte_.TSC0;\
	pattrib_iv[1] = dot11txpn._byte_.TSC1;\
	pattrib_iv[2] = dot11txpn._byte_.TSC2;\
	pattrib_iv[3] = ((keyidx & 0x3)<<6);\
	dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0 : (dot11txpn.val + 1);\
} while (0)


#define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\
do {\
	pattrib_iv[0] = dot11txpn._byte_.TSC1;\
	pattrib_iv[1] = (dot11txpn._byte_.TSC1 | 0x20) & 0x7f;\
	pattrib_iv[2] = dot11txpn._byte_.TSC0;\
	pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\
	pattrib_iv[4] = dot11txpn._byte_.TSC2;\
	pattrib_iv[5] = dot11txpn._byte_.TSC3;\
	pattrib_iv[6] = dot11txpn._byte_.TSC4;\
	pattrib_iv[7] = dot11txpn._byte_.TSC5;\
	dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\
} while (0)

#define AES_IV(pattrib_iv, dot11txpn, keyidx)\
do {\
	pattrib_iv[0] = dot11txpn._byte_.TSC0;\
	pattrib_iv[1] = dot11txpn._byte_.TSC1;\
	pattrib_iv[2] = 0;\
	pattrib_iv[3] = BIT(5) | ((keyidx & 0x3)<<6);\
	pattrib_iv[4] = dot11txpn._byte_.TSC2;\
	pattrib_iv[5] = dot11txpn._byte_.TSC3;\
	pattrib_iv[6] = dot11txpn._byte_.TSC4;\
	pattrib_iv[7] = dot11txpn._byte_.TSC5;\
	dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\
} while (0)


#define HWXMIT_ENTRY	4

/*  For Buffer Descriptor ring architecture */
#define TXDESC_SIZE 40

#define TXDESC_OFFSET TXDESC_SIZE

enum TXDESC_SC {
	SC_DONT_CARE = 0x00,
	SC_UPPER = 0x01,
	SC_LOWER = 0x02,
	SC_DUPLICATE = 0x03
};

#define TXDESC_40_BYTES

struct tx_desc {
	__le32 txdw0;
	__le32 txdw1;
	__le32 txdw2;
	__le32 txdw3;
	__le32 txdw4;
	__le32 txdw5;
	__le32 txdw6;
	__le32 txdw7;

#if defined(TXDESC_40_BYTES) || defined(TXDESC_64_BYTES)
	__le32 txdw8;
	__le32 txdw9;
#endif /*  TXDESC_40_BYTES */

#ifdef TXDESC_64_BYTES
	__le32 txdw10;
	__le32 txdw11;

	/*  2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now,  our descriptor */
	/*  size is 40 bytes. If you use more than 102 descriptor(103*40>4096), HW will execute */
	/*  memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor */
	/*  number or enlarge descriptor size as 64 bytes. */
	__le32 txdw12;
	__le32 txdw13;
	__le32 txdw14;
	__le32 txdw15;
#endif
};

union txdesc {
	struct tx_desc txdesc;
	unsigned int value[TXDESC_SIZE>>2];
};

struct	hw_xmit	{
	/* _lock xmit_lock; */
	/* struct list_head	pending; */
	struct __queue *sta_queue;
	/* struct hw_txqueue *phwtxqueue; */
	/* sint	txcmdcnt; */
	int	accnt;
};

/* reduce size */
struct pkt_attrib
{
	u8 type;
	u8 subtype;
	u8 bswenc;
	u8 dhcp_pkt;
	u16 ether_type;
	u16 seqnum;
	u16 pkt_hdrlen;	/* the original 802.3 pkt header len */
	u16 hdrlen;		/* the WLAN Header Len */
	u32 pktlen;		/* the original 802.3 pkt raw_data len (not include ether_hdr data) */
	u32 last_txcmdsz;
	u8 nr_frags;
	u8 encrypt;	/* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */
	u8 iv_len;
	u8 icv_len;
	u8 iv[18];
	u8 icv[16];
	u8 priority;
	u8 ack_policy;
	u8 mac_id;
	u8 vcs_mode;	/* virtual carrier sense method */
	u8 dst[ETH_ALEN];
	u8 src[ETH_ALEN];
	u8 ta[ETH_ALEN];
	u8 ra[ETH_ALEN];
	u8 key_idx;
	u8 qos_en;
	u8 ht_en;
	u8 raid;/* rate adpative id */
	u8 bwmode;
	u8 ch_offset;/* PRIME_CHNL_OFFSET */
	u8 sgi;/* short GI */
	u8 ampdu_en;/* tx ampdu enable */
	u8 ampdu_spacing; /* ampdu_min_spacing for peer sta's rx */
	u8 mdata;/* more data bit */
	u8 pctrl;/* per packet txdesc control enable */
	u8 triggered;/* for ap mode handling Power Saving sta */
	u8 qsel;
	u8 order;/* order bit */
	u8 eosp;
	u8 rate;
	u8 intel_proxim;
	u8 retry_ctrl;
	u8   mbssid;
	u8 ldpc;
	u8 stbc;
	struct sta_info * psta;

	u8 rtsen;
	u8 cts2self;
	union Keytype	dot11tkiptxmickey;
	/* union Keytype	dot11tkiprxmickey; */
	union Keytype	dot118021x_UncstKey;

	u8 icmp_pkt;

};

#define WLANHDR_OFFSET	64

#define NULL_FRAMETAG		(0x0)
#define DATA_FRAMETAG		0x01
#define L2_FRAMETAG		0x02
#define MGNT_FRAMETAG		0x03
#define AMSDU_FRAMETAG	0x04

#define EII_FRAMETAG		0x05
#define IEEE8023_FRAMETAG  0x06

#define MP_FRAMETAG		0x07

#define TXAGG_FRAMETAG	0x08

enum {
	XMITBUF_DATA = 0,
	XMITBUF_MGNT = 1,
	XMITBUF_CMD = 2,
};

struct  submit_ctx {
	unsigned long submit_time; /* */
	u32 timeout_ms; /* <0: not synchronous, 0: wait forever, >0: up to ms waiting */
	int status; /* status for operation */
	struct completion done;
};

enum {
	RTW_SCTX_SUBMITTED = -1,
	RTW_SCTX_DONE_SUCCESS = 0,
	RTW_SCTX_DONE_UNKNOWN,
	RTW_SCTX_DONE_TIMEOUT,
	RTW_SCTX_DONE_BUF_ALLOC,
	RTW_SCTX_DONE_BUF_FREE,
	RTW_SCTX_DONE_WRITE_PORT_ERR,
	RTW_SCTX_DONE_TX_DESC_NA,
	RTW_SCTX_DONE_TX_DENY,
	RTW_SCTX_DONE_CCX_PKT_FAIL,
	RTW_SCTX_DONE_DRV_STOP,
	RTW_SCTX_DONE_DEV_REMOVE,
	RTW_SCTX_DONE_CMD_ERROR,
};


void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms);
int rtw_sctx_wait(struct submit_ctx *sctx, const char *msg);
void rtw_sctx_done_err(struct submit_ctx **sctx, int status);
void rtw_sctx_done(struct submit_ctx **sctx);

struct xmit_buf
{
	struct list_head	list;

	struct adapter *padapter;

	u8 *pallocated_buf;

	u8 *pbuf;

	void *priv_data;

	u16 buf_tag; /*  0: Normal xmitbuf, 1: extension xmitbuf, 2:cmd xmitbuf */
	u16 flags;
	u32 alloc_sz;

	u32  len;

	struct submit_ctx *sctx;

	u8 *phead;
	u8 *pdata;
	u8 *ptail;
	u8 *pend;
	u32 ff_hwaddr;
	u8 pg_num;
	u8 agg_num;

#if defined(DBG_XMIT_BUF) || defined(DBG_XMIT_BUF_EXT)
	u8 no;
#endif

};


struct xmit_frame
{
	struct list_head	list;

	struct pkt_attrib attrib;

	_pkt *pkt;

	int	frame_tag;

	struct adapter *padapter;

	u8 *buf_addr;

	struct xmit_buf *pxmitbuf;

	u8 pg_num;
	u8 agg_num;

	u8 ack_report;

	u8 *alloc_addr; /* the actual address this xmitframe allocated */
	u8 ext_tag; /* 0:data, 1:mgmt */

};

struct tx_servq {
	struct list_head	tx_pending;
	struct __queue	sta_pending;
	int qcnt;
};


struct sta_xmit_priv
{
	_lock	lock;
	sint	option;
	sint	apsd_setting;	/* When bit mask is on, the associated edca queue supports APSD. */


	/* struct tx_servq blk_q[MAX_NUMBLKS]; */
	struct tx_servq	be_q;			/* priority == 0, 3 */
	struct tx_servq	bk_q;			/* priority == 1, 2 */
	struct tx_servq	vi_q;			/* priority == 4, 5 */
	struct tx_servq	vo_q;			/* priority == 6, 7 */
	struct list_head	legacy_dz;
	struct list_head  apsd;

	u16 txseq_tid[16];

	/* uint	sta_tx_bytes; */
	/* u64	sta_tx_pkts; */
	/* uint	sta_tx_fail; */


};


struct	hw_txqueue	{
	volatile sint	head;
	volatile sint	tail;
	volatile sint	free_sz;	/* in units of 64 bytes */
	volatile sint      free_cmdsz;
	volatile sint	 txsz[8];
	uint	ff_hwaddr;
	uint	cmd_hwaddr;
	sint	ac_tag;
};

struct agg_pkt_info {
	u16 offset;
	u16 pkt_len;
};

enum cmdbuf_type {
	CMDBUF_BEACON = 0x00,
	CMDBUF_RSVD,
	CMDBUF_MAX
};

struct	xmit_priv {

	_lock	lock;

	struct completion xmit_comp;
	struct completion terminate_xmitthread_comp;

	/* struct __queue	blk_strms[MAX_NUMBLKS]; */
	struct __queue	be_pending;
	struct __queue	bk_pending;
	struct __queue	vi_pending;
	struct __queue	vo_pending;
	struct __queue	bm_pending;

	/* struct __queue	legacy_dz_queue; */
	/* struct __queue	apsd_queue; */

	u8 *pallocated_frame_buf;
	u8 *pxmit_frame_buf;
	uint free_xmitframe_cnt;
	struct __queue	free_xmit_queue;

	/* uint mapping_addr; */
	/* uint pkt_sz; */

	u8 *xframe_ext_alloc_addr;
	u8 *xframe_ext;
	uint free_xframe_ext_cnt;
	struct __queue free_xframe_ext_queue;

	/* struct	hw_txqueue	be_txqueue; */
	/* struct	hw_txqueue	bk_txqueue; */
	/* struct	hw_txqueue	vi_txqueue; */
	/* struct	hw_txqueue	vo_txqueue; */
	/* struct	hw_txqueue	bmc_txqueue; */

	uint	frag_len;

	struct adapter	*adapter;

	u8   vcs_setting;
	u8 vcs;
	u8 vcs_type;
	/* u16  rts_thresh; */

	u64	tx_bytes;
	u64	tx_pkts;
	u64	tx_drop;
	u64	last_tx_pkts;

	struct hw_xmit *hwxmits;
	u8 hwxmit_entry;

	u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk. */

#ifdef CONFIG_SDIO_TX_TASKLET
	struct tasklet_struct xmit_tasklet;
#else
	void *SdioXmitThread;
	struct completion SdioXmitStart;
	struct completion SdioXmitTerminate;
#endif /* CONFIG_SDIO_TX_TASKLET */

	struct __queue free_xmitbuf_queue;
	struct __queue pending_xmitbuf_queue;
	u8 *pallocated_xmitbuf;
	u8 *pxmitbuf;
	uint free_xmitbuf_cnt;

	struct __queue free_xmit_extbuf_queue;
	u8 *pallocated_xmit_extbuf;
	u8 *pxmit_extbuf;
	uint free_xmit_extbuf_cnt;

	struct xmit_buf	pcmd_xmitbuf[CMDBUF_MAX];

	u16 nqos_ssn;

	int	ack_tx;
	_mutex ack_tx_mutex;
	struct submit_ctx ack_tx_ops;
	u8 seq_no;
	_lock lock_sctx;
};

extern struct xmit_frame *__rtw_alloc_cmdxmitframe(struct xmit_priv *pxmitpriv,
		enum cmdbuf_type buf_type);
#define rtw_alloc_cmdxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_RSVD)
#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON)

extern struct xmit_buf *rtw_alloc_xmitbuf_ext(struct xmit_priv *pxmitpriv);
extern s32 rtw_free_xmitbuf_ext(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);

extern struct xmit_buf *rtw_alloc_xmitbuf(struct xmit_priv *pxmitpriv);
extern s32 rtw_free_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);

void rtw_count_tx_stats(struct adapter *padapter, struct xmit_frame *pxmitframe, int sz);
extern void rtw_update_protection(struct adapter *padapter, u8 *ie, uint ie_len);
extern s32 rtw_make_wlanhdr(struct adapter *padapter, u8 *hdr, struct pkt_attrib *pattrib);
extern s32 rtw_put_snap(u8 *data, u16 h_proto);

extern struct xmit_frame *rtw_alloc_xmitframe(struct xmit_priv *pxmitpriv);
struct xmit_frame *rtw_alloc_xmitframe_ext(struct xmit_priv *pxmitpriv);
struct xmit_frame *rtw_alloc_xmitframe_once(struct xmit_priv *pxmitpriv);
extern s32 rtw_free_xmitframe(struct xmit_priv *pxmitpriv, struct xmit_frame *pxmitframe);
extern void rtw_free_xmitframe_queue(struct xmit_priv *pxmitpriv, struct __queue *pframequeue);
struct tx_servq *rtw_get_sta_pending(struct adapter *padapter, struct sta_info *psta, sint up, u8 *ac);
extern s32 rtw_xmitframe_enqueue(struct adapter *padapter, struct xmit_frame *pxmitframe);

extern s32 rtw_xmit_classifier(struct adapter *padapter, struct xmit_frame *pxmitframe);
extern u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib);
#define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue(&f->attrib)
extern s32 rtw_xmitframe_coalesce(struct adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe);
extern s32 rtw_mgmt_xmitframe_coalesce(struct adapter *padapter, _pkt *pkt, struct xmit_frame *pxmitframe);
s32 _rtw_init_hw_txqueue(struct hw_txqueue* phw_txqueue, u8 ac_tag);
void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv);


s32 rtw_txframes_pending(struct adapter *padapter);
void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry);


s32 _rtw_init_xmit_priv(struct xmit_priv *pxmitpriv, struct adapter *padapter);
void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv);


s32 rtw_alloc_hwxmits(struct adapter *padapter);
void rtw_free_hwxmits(struct adapter *padapter);


s32 rtw_xmit(struct adapter *padapter, _pkt **pkt);
bool xmitframe_hiq_filter(struct xmit_frame *xmitframe);

sint xmitframe_enqueue_for_sleeping_sta(struct adapter *padapter, struct xmit_frame *pxmitframe);
void stop_sta_xmit(struct adapter *padapter, struct sta_info *psta);
void wakeup_sta_to_xmit(struct adapter *padapter, struct sta_info *psta);
void xmit_delivery_enabled_frames(struct adapter *padapter, struct sta_info *psta);

u8 query_ra_short_GI(struct sta_info *psta);

u8 qos_acm(u8 acm_mask, u8 priority);

void enqueue_pending_xmitbuf(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
void enqueue_pending_xmitbuf_to_head(struct xmit_priv *pxmitpriv, struct xmit_buf *pxmitbuf);
struct xmit_buf*dequeue_pending_xmitbuf(struct xmit_priv *pxmitpriv);
struct xmit_buf*dequeue_pending_xmitbuf_under_survey(struct xmit_priv *pxmitpriv);
sint	check_pending_xmitbuf(struct xmit_priv *pxmitpriv);
int	rtw_xmit_thread(void *context);

u32 rtw_get_ff_hwaddr(struct xmit_frame	*pxmitframe);

int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms);
void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status);

/* include after declaring struct xmit_buf, in order to avoid warning */
#include <xmit_osdep.h>

#endif	/* _RTL871X_XMIT_H_ */
Commit	Line	Data
58391efd	1	/* SPDX-License-Identifier: GPL-2.0 */
554c0a3a HG	2	/******************************************************************************
	3	*
	4	* Copyright(c) 2007 - 2011 Realtek Corporation. All rights reserved.
	5	*
554c0a3a HG	6	******************************************************************************/
	7	#ifndef _RTW_XMIT_H_
	8	#define _RTW_XMIT_H_
	9
09a8ea34	10	#include <linux/completion.h>
554c0a3a HG	11
	12	#define MAX_XMITBUF_SZ (20480) /* 20k */
	13
	14	#define NR_XMITBUFF (16)
	15
	16	#define XMITBUF_ALIGN_SZ 512
	17
	18	/* xmit extension buff defination */
	19	#define MAX_XMIT_EXTBUF_SZ (1536)
	20	#define NR_XMIT_EXTBUFF (32)
	21
	22	#define MAX_CMDBUF_SZ (5120) /* 4096) */
	23
	24	#define MAX_NUMBLKS (1)
	25
	26	#define XMIT_VO_QUEUE (0)
	27	#define XMIT_VI_QUEUE (1)
	28	#define XMIT_BE_QUEUE (2)
	29	#define XMIT_BK_QUEUE (3)
	30
	31	#define VO_QUEUE_INX 0
	32	#define VI_QUEUE_INX 1
	33	#define BE_QUEUE_INX 2
	34	#define BK_QUEUE_INX 3
	35	#define BCN_QUEUE_INX 4
	36	#define MGT_QUEUE_INX 5
	37	#define HIGH_QUEUE_INX 6
	38	#define TXCMD_QUEUE_INX 7
	39
	40	#define HW_QUEUE_ENTRY 8
	41
	42	#define WEP_IV(pattrib_iv, dot11txpn, keyidx)\
c77761d6	43	do {\
554c0a3a HG	44	pattrib_iv[0] = dot11txpn._byte_.TSC0;\
	45	pattrib_iv[1] = dot11txpn._byte_.TSC1;\
	46	pattrib_iv[2] = dot11txpn._byte_.TSC2;\
	47	pattrib_iv[3] = ((keyidx & 0x3)<<6);\
c77761d6 LS	48	dot11txpn.val = (dot11txpn.val == 0xffffff) ? 0 : (dot11txpn.val + 1);\
c77761d6 LS	49	} while (0)
554c0a3a HG	50
	51
	52	#define TKIP_IV(pattrib_iv, dot11txpn, keyidx)\
c77761d6	53	do {\
554c0a3a HG	54	pattrib_iv[0] = dot11txpn._byte_.TSC1;\
	55	pattrib_iv[1] = (dot11txpn._byte_.TSC1 \| 0x20) & 0x7f;\
	56	pattrib_iv[2] = dot11txpn._byte_.TSC0;\
	57	pattrib_iv[3] = BIT(5) \| ((keyidx & 0x3)<<6);\
	58	pattrib_iv[4] = dot11txpn._byte_.TSC2;\
	59	pattrib_iv[5] = dot11txpn._byte_.TSC3;\
	60	pattrib_iv[6] = dot11txpn._byte_.TSC4;\
	61	pattrib_iv[7] = dot11txpn._byte_.TSC5;\
c77761d6 LS	62	dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\
c77761d6 LS	63	} while (0)
554c0a3a HG	64
554c0a3a HG	65	#define AES_IV(pattrib_iv, dot11txpn, keyidx)\
c77761d6	66	do {\
554c0a3a HG	67	pattrib_iv[0] = dot11txpn._byte_.TSC0;\
	68	pattrib_iv[1] = dot11txpn._byte_.TSC1;\
	69	pattrib_iv[2] = 0;\
	70	pattrib_iv[3] = BIT(5) \| ((keyidx & 0x3)<<6);\
	71	pattrib_iv[4] = dot11txpn._byte_.TSC2;\
	72	pattrib_iv[5] = dot11txpn._byte_.TSC3;\
	73	pattrib_iv[6] = dot11txpn._byte_.TSC4;\
	74	pattrib_iv[7] = dot11txpn._byte_.TSC5;\
c77761d6 LS	75	dot11txpn.val = dot11txpn.val == 0xffffffffffffULL ? 0 : (dot11txpn.val + 1);\
c77761d6 LS	76	} while (0)
554c0a3a HG	77
	78
	79	#define HWXMIT_ENTRY 4
	80
	81	/* For Buffer Descriptor ring architecture */
	82	#define TXDESC_SIZE 40
	83
	84	#define TXDESC_OFFSET TXDESC_SIZE
	85
c8ab348d	86	enum TXDESC_SC {
554c0a3a HG	87	SC_DONT_CARE = 0x00,
	88	SC_UPPER = 0x01,
	89	SC_LOWER = 0x02,
	90	SC_DUPLICATE = 0x03
	91	};
	92
	93	#define TXDESC_40_BYTES
	94
	95	struct tx_desc {
	96	__le32 txdw0;
	97	__le32 txdw1;
	98	__le32 txdw2;
	99	__le32 txdw3;
	100	__le32 txdw4;
	101	__le32 txdw5;
	102	__le32 txdw6;
	103	__le32 txdw7;
	104
	105	#if defined(TXDESC_40_BYTES) \|\| defined(TXDESC_64_BYTES)
	106	__le32 txdw8;
	107	__le32 txdw9;
	108	#endif /* TXDESC_40_BYTES */
	109
	110	#ifdef TXDESC_64_BYTES
	111	__le32 txdw10;
	112	__le32 txdw11;
	113
	114	/* 2008/05/15 MH Because PCIE HW memory R/W 4K limit. And now, our descriptor */
	115	/* size is 40 bytes. If you use more than 102 descriptor(10340>4096), HW will execute /
	116	/* memoryR/W CRC error. And then all DMA fetch will fail. We must decrease descriptor */
	117	/* number or enlarge descriptor size as 64 bytes. */
	118	__le32 txdw12;
	119	__le32 txdw13;
	120	__le32 txdw14;
	121	__le32 txdw15;
	122	#endif
	123	};
	124
	125	union txdesc {
	126	struct tx_desc txdesc;
	127	unsigned int value[TXDESC_SIZE>>2];
	128	};
	129
	130	struct hw_xmit {
	131	/* _lock xmit_lock; */
	132	/* struct list_head pending; */
	133	struct __queue *sta_queue;
	134	/* struct hw_txqueue phwtxqueue; /
	135	/* sint txcmdcnt; */
	136	int accnt;
	137	};
	138
	139	/* reduce size */
	140	struct pkt_attrib
	141	{
	142	u8 type;
	143	u8 subtype;
	144	u8 bswenc;
	145	u8 dhcp_pkt;
	146	u16 ether_type;
	147	u16 seqnum;
	148	u16 pkt_hdrlen; /* the original 802.3 pkt header len */
	149	u16 hdrlen; /* the WLAN Header Len */
	150	u32 pktlen; /* the original 802.3 pkt raw_data len (not include ether_hdr data) */
151	u32 last_txcmdsz;
152	u8 nr_frags;
153	u8 encrypt; /* when 0 indicate no encrypt. when non-zero, indicate the encrypt algorith */
154	u8 iv_len;
155	u8 icv_len;
156	u8 iv[18];
157	u8 icv[16];
158	u8 priority;
159	u8 ack_policy;
160	u8 mac_id;
161	u8 vcs_mode; /* virtual carrier sense method */
162	u8 dst[ETH_ALEN];
163	u8 src[ETH_ALEN];
164	u8 ta[ETH_ALEN];
165	u8 ra[ETH_ALEN];
166	u8 key_idx;
167	u8 qos_en;
168	u8 ht_en;
169	u8 raid;/* rate adpative id */
170	u8 bwmode;
171	u8 ch_offset;/* PRIME_CHNL_OFFSET */
172	u8 sgi;/* short GI */
173	u8 ampdu_en;/* tx ampdu enable */
174	u8 ampdu_spacing; /* ampdu_min_spacing for peer sta's rx */
175	u8 mdata;/* more data bit */
176	u8 pctrl;/* per packet txdesc control enable */
177	u8 triggered;/* for ap mode handling Power Saving sta */
178	u8 qsel;
179	u8 order;/* order bit */
180	u8 eosp;
181	u8 rate;
182	u8 intel_proxim;
183	u8 retry_ctrl;
184	u8 mbssid;
185	u8 ldpc;
186	u8 stbc;
187	struct sta_info * psta;
188
189	u8 rtsen;
190	u8 cts2self;
191	union Keytype dot11tkiptxmickey;
192	/* union Keytype dot11tkiprxmickey; */
193	union Keytype dot118021x_UncstKey;
194
195	u8 icmp_pkt;
196
197	};
198
199	#define WLANHDR_OFFSET 64
200
201	#define NULL_FRAMETAG (0x0)
202	#define DATA_FRAMETAG 0x01
203	#define L2_FRAMETAG 0x02
204	#define MGNT_FRAMETAG 0x03
205	#define AMSDU_FRAMETAG 0x04
206
207	#define EII_FRAMETAG 0x05
208	#define IEEE8023_FRAMETAG 0x06
209
210	#define MP_FRAMETAG 0x07
211
212	#define TXAGG_FRAMETAG 0x08
213
214	enum {
215	XMITBUF_DATA = 0,
216	XMITBUF_MGNT = 1,
217	XMITBUF_CMD = 2,
218	};
219
c77761d6	220	struct submit_ctx {
554c0a3a HG	221	unsigned long submit_time; /* */
	222	u32 timeout_ms; /* <0: not synchronous, 0: wait forever, >0: up to ms waiting */
	223	int status; /* status for operation */
	224	struct completion done;
	225	};
	226
	227	enum {
	228	RTW_SCTX_SUBMITTED = -1,
	229	RTW_SCTX_DONE_SUCCESS = 0,
	230	RTW_SCTX_DONE_UNKNOWN,
	231	RTW_SCTX_DONE_TIMEOUT,
	232	RTW_SCTX_DONE_BUF_ALLOC,
	233	RTW_SCTX_DONE_BUF_FREE,
	234	RTW_SCTX_DONE_WRITE_PORT_ERR,
	235	RTW_SCTX_DONE_TX_DESC_NA,
	236	RTW_SCTX_DONE_TX_DENY,
	237	RTW_SCTX_DONE_CCX_PKT_FAIL,
	238	RTW_SCTX_DONE_DRV_STOP,
	239	RTW_SCTX_DONE_DEV_REMOVE,
	240	RTW_SCTX_DONE_CMD_ERROR,
	241	};
	242
	243
	244	void rtw_sctx_init(struct submit_ctx *sctx, int timeout_ms);
	245	int rtw_sctx_wait(struct submit_ctx sctx, const char msg);
	246	void rtw_sctx_done_err(struct submit_ctx **sctx, int status);
	247	void rtw_sctx_done(struct submit_ctx **sctx);
	248
	249	struct xmit_buf
	250	{
	251	struct list_head list;
	252
	253	struct adapter *padapter;
	254
	255	u8 *pallocated_buf;
	256
	257	u8 *pbuf;
	258
	259	void *priv_data;
	260
	261	u16 buf_tag; /* 0: Normal xmitbuf, 1: extension xmitbuf, 2:cmd xmitbuf */
	262	u16 flags;
	263	u32 alloc_sz;
	264
	265	u32 len;
	266
	267	struct submit_ctx *sctx;
	268
	269	u8 *phead;
	270	u8 *pdata;
	271	u8 *ptail;
	272	u8 *pend;
	273	u32 ff_hwaddr;
	274	u8 pg_num;
	275	u8 agg_num;
	276
c77761d6	277	#if defined(DBG_XMIT_BUF) \|\| defined(DBG_XMIT_BUF_EXT)
554c0a3a HG	278	u8 no;
	279	#endif
	280
	281	};
	282
	283
	284	struct xmit_frame
	285	{
	286	struct list_head list;
	287
	288	struct pkt_attrib attrib;
	289
	290	_pkt *pkt;
	291
	292	int frame_tag;
	293
	294	struct adapter *padapter;
	295
	296	u8 *buf_addr;
	297
	298	struct xmit_buf *pxmitbuf;
	299
	300	u8 pg_num;
	301	u8 agg_num;
	302
	303	u8 ack_report;
	304
	305	u8 alloc_addr; / the actual address this xmitframe allocated */
	306	u8 ext_tag; /* 0:data, 1:mgmt */
	307
	308	};
	309
	310	struct tx_servq {
	311	struct list_head tx_pending;
	312	struct __queue sta_pending;
	313	int qcnt;
	314	};
	315
	316
	317	struct sta_xmit_priv
	318	{
	319	_lock lock;
	320	sint option;
	321	sint apsd_setting; /* When bit mask is on, the associated edca queue supports APSD. */
	322
	323
	324	/* struct tx_servq blk_q[MAX_NUMBLKS]; */
	325	struct tx_servq be_q; /* priority == 0, 3 */
	326	struct tx_servq bk_q; /* priority == 1, 2 */
	327	struct tx_servq vi_q; /* priority == 4, 5 */
	328	struct tx_servq vo_q; /* priority == 6, 7 */
	329	struct list_head legacy_dz;
	330	struct list_head apsd;
	331
	332	u16 txseq_tid[16];
	333
	334	/* uint sta_tx_bytes; */
	335	/* u64 sta_tx_pkts; */
	336	/* uint sta_tx_fail; */
	337
	338
	339	};
	340
	341
342	struct hw_txqueue {
343	volatile sint head;
344	volatile sint tail;
345	volatile sint free_sz; /* in units of 64 bytes */
346	volatile sint free_cmdsz;
347	volatile sint txsz[8];
348	uint ff_hwaddr;
349	uint cmd_hwaddr;
350	sint ac_tag;
351	};
352
c77761d6	353	struct agg_pkt_info {
554c0a3a HG	354	u16 offset;
	355	u16 pkt_len;
	356	};
	357
	358	enum cmdbuf_type {
	359	CMDBUF_BEACON = 0x00,
	360	CMDBUF_RSVD,
	361	CMDBUF_MAX
	362	};
	363
	364	struct xmit_priv {
	365
	366	_lock lock;
	367
09a8ea34 AB	368	struct completion xmit_comp;
09a8ea34 AB	369	struct completion terminate_xmitthread_comp;
554c0a3a HG	370
	371	/* struct __queue blk_strms[MAX_NUMBLKS]; */
	372	struct __queue be_pending;
	373	struct __queue bk_pending;
	374	struct __queue vi_pending;
	375	struct __queue vo_pending;
	376	struct __queue bm_pending;
	377
	378	/* struct __queue legacy_dz_queue; */
	379	/* struct __queue apsd_queue; */
	380
	381	u8 *pallocated_frame_buf;
	382	u8 *pxmit_frame_buf;
	383	uint free_xmitframe_cnt;
	384	struct __queue free_xmit_queue;
	385
	386	/* uint mapping_addr; */
	387	/* uint pkt_sz; */
	388
	389	u8 *xframe_ext_alloc_addr;
	390	u8 *xframe_ext;
	391	uint free_xframe_ext_cnt;
	392	struct __queue free_xframe_ext_queue;
	393
	394	/* struct hw_txqueue be_txqueue; */
	395	/* struct hw_txqueue bk_txqueue; */
	396	/* struct hw_txqueue vi_txqueue; */
	397	/* struct hw_txqueue vo_txqueue; */
	398	/* struct hw_txqueue bmc_txqueue; */
	399
	400	uint frag_len;
	401
	402	struct adapter *adapter;
	403
	404	u8 vcs_setting;
	405	u8 vcs;
	406	u8 vcs_type;
	407	/* u16 rts_thresh; */
	408
	409	u64 tx_bytes;
	410	u64 tx_pkts;
	411	u64 tx_drop;
	412	u64 last_tx_pkts;
	413
	414	struct hw_xmit *hwxmits;
	415	u8 hwxmit_entry;
	416
	417	u8 wmm_para_seq[4];/* sequence for wmm ac parameter strength from large to small. it's value is 0->vo, 1->vi, 2->be, 3->bk. */
	418
	419	#ifdef CONFIG_SDIO_TX_TASKLET
	420	struct tasklet_struct xmit_tasklet;
	421	#else
	422	void *SdioXmitThread;
09a8ea34 AB	423	struct completion SdioXmitStart;
09a8ea34 AB	424	struct completion SdioXmitTerminate;
554c0a3a HG	425	#endif /* CONFIG_SDIO_TX_TASKLET */
	426
	427	struct __queue free_xmitbuf_queue;
	428	struct __queue pending_xmitbuf_queue;
	429	u8 *pallocated_xmitbuf;
	430	u8 *pxmitbuf;
	431	uint free_xmitbuf_cnt;
	432
	433	struct __queue free_xmit_extbuf_queue;
	434	u8 *pallocated_xmit_extbuf;
	435	u8 *pxmit_extbuf;
	436	uint free_xmit_extbuf_cnt;
	437
	438	struct xmit_buf pcmd_xmitbuf[CMDBUF_MAX];
	439
	440	u16 nqos_ssn;
	441
	442	int ack_tx;
	443	_mutex ack_tx_mutex;
	444	struct submit_ctx ack_tx_ops;
	445	u8 seq_no;
	446	_lock lock_sctx;
	447	};
	448
	449	extern struct xmit_frame __rtw_alloc_cmdxmitframe(struct xmit_priv pxmitpriv,
	450	enum cmdbuf_type buf_type);
	451	#define rtw_alloc_cmdxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_RSVD)
	452	#define rtw_alloc_bcnxmitframe(p) __rtw_alloc_cmdxmitframe(p, CMDBUF_BEACON)
	453
	454	extern struct xmit_buf rtw_alloc_xmitbuf_ext(struct xmit_priv pxmitpriv);
	455	extern s32 rtw_free_xmitbuf_ext(struct xmit_priv pxmitpriv, struct xmit_buf pxmitbuf);
	456
	457	extern struct xmit_buf rtw_alloc_xmitbuf(struct xmit_priv pxmitpriv);
	458	extern s32 rtw_free_xmitbuf(struct xmit_priv pxmitpriv, struct xmit_buf pxmitbuf);
	459
	460	void rtw_count_tx_stats(struct adapter padapter, struct xmit_frame pxmitframe, int sz);
	461	extern void rtw_update_protection(struct adapter padapter, u8 ie, uint ie_len);
	462	extern s32 rtw_make_wlanhdr(struct adapter padapter, u8 hdr, struct pkt_attrib *pattrib);
	463	extern s32 rtw_put_snap(u8 *data, u16 h_proto);
	464
	465	extern struct xmit_frame rtw_alloc_xmitframe(struct xmit_priv pxmitpriv);
	466	struct xmit_frame rtw_alloc_xmitframe_ext(struct xmit_priv pxmitpriv);
	467	struct xmit_frame rtw_alloc_xmitframe_once(struct xmit_priv pxmitpriv);
	468	extern s32 rtw_free_xmitframe(struct xmit_priv pxmitpriv, struct xmit_frame pxmitframe);
	469	extern void rtw_free_xmitframe_queue(struct xmit_priv pxmitpriv, struct __queue pframequeue);
	470	struct tx_servq rtw_get_sta_pending(struct adapter padapter, struct sta_info psta, sint up, u8 ac);
	471	extern s32 rtw_xmitframe_enqueue(struct adapter padapter, struct xmit_frame pxmitframe);
	472
	473	extern s32 rtw_xmit_classifier(struct adapter padapter, struct xmit_frame pxmitframe);
	474	extern u32 rtw_calculate_wlan_pkt_size_by_attribue(struct pkt_attrib *pattrib);
	475	#define rtw_wlan_pkt_size(f) rtw_calculate_wlan_pkt_size_by_attribue(&f->attrib)
	476	extern s32 rtw_xmitframe_coalesce(struct adapter padapter, _pkt pkt, struct xmit_frame *pxmitframe);
	477	extern s32 rtw_mgmt_xmitframe_coalesce(struct adapter padapter, _pkt pkt, struct xmit_frame *pxmitframe);
	478	s32 _rtw_init_hw_txqueue(struct hw_txqueue* phw_txqueue, u8 ac_tag);
	479	void _rtw_init_sta_xmit_priv(struct sta_xmit_priv *psta_xmitpriv);
	480
	481
	482	s32 rtw_txframes_pending(struct adapter *padapter);
	483	void rtw_init_hwxmits(struct hw_xmit *phwxmit, sint entry);
	484
	485
	486	s32 _rtw_init_xmit_priv(struct xmit_priv pxmitpriv, struct adapter padapter);
c77761d6	487	void _rtw_free_xmit_priv(struct xmit_priv *pxmitpriv);
554c0a3a HG	488
554c0a3a HG	489
7671ce0d	490	s32 rtw_alloc_hwxmits(struct adapter *padapter);
554c0a3a HG	491	void rtw_free_hwxmits(struct adapter *padapter);
	492
	493
	494	s32 rtw_xmit(struct adapter padapter, _pkt *pkt);
	495	bool xmitframe_hiq_filter(struct xmit_frame *xmitframe);
	496
	497	sint xmitframe_enqueue_for_sleeping_sta(struct adapter padapter, struct xmit_frame pxmitframe);
	498	void stop_sta_xmit(struct adapter padapter, struct sta_info psta);
	499	void wakeup_sta_to_xmit(struct adapter padapter, struct sta_info psta);
	500	void xmit_delivery_enabled_frames(struct adapter padapter, struct sta_info psta);
	501
	502	u8 query_ra_short_GI(struct sta_info *psta);
	503
	504	u8 qos_acm(u8 acm_mask, u8 priority);
	505
	506	void enqueue_pending_xmitbuf(struct xmit_priv pxmitpriv, struct xmit_buf pxmitbuf);
	507	void enqueue_pending_xmitbuf_to_head(struct xmit_priv pxmitpriv, struct xmit_buf pxmitbuf);
	508	struct xmit_bufdequeue_pending_xmitbuf(struct xmit_priv pxmitpriv);
	509	struct xmit_bufdequeue_pending_xmitbuf_under_survey(struct xmit_priv pxmitpriv);
	510	sint check_pending_xmitbuf(struct xmit_priv *pxmitpriv);
	511	int rtw_xmit_thread(void *context);
	512
	513	u32 rtw_get_ff_hwaddr(struct xmit_frame *pxmitframe);
	514
	515	int rtw_ack_tx_wait(struct xmit_priv *pxmitpriv, u32 timeout_ms);
	516	void rtw_ack_tx_done(struct xmit_priv *pxmitpriv, int status);
	517
	518	/* include after declaring struct xmit_buf, in order to avoid warning */
	519	#include <xmit_osdep.h>
	520
	521	#endif /* _RTL871X_XMIT_H_ */