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58391efd | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
554c0a3a HG |
2 | /****************************************************************************** |
3 | * | |
4 | * Copyright(c) 2007 - 2012 Realtek Corporation. All rights reserved. | |
5 | * | |
554c0a3a HG |
6 | ******************************************************************************/ |
7 | /*------------------------------------------------------------------------------- | |
8 | ||
9 | For type defines and data structure defines | |
10 | ||
11 | --------------------------------------------------------------------------------*/ | |
12 | ||
13 | ||
14 | #ifndef __DRV_TYPES_H__ | |
15 | #define __DRV_TYPES_H__ | |
16 | ||
17 | #include <linux/version.h> | |
18 | #include <linux/sched/signal.h> | |
19 | #include <autoconf.h> | |
20 | #include <basic_types.h> | |
21 | #include <osdep_service.h> | |
22 | #include <rtw_byteorder.h> | |
23 | #include <wlan_bssdef.h> | |
24 | #include <wifi.h> | |
25 | #include <ieee80211.h> | |
26 | ||
27 | enum _NIC_VERSION { | |
28 | ||
29 | RTL8711_NIC, | |
30 | RTL8712_NIC, | |
31 | RTL8713_NIC, | |
32 | RTL8716_NIC | |
33 | ||
34 | }; | |
35 | ||
36 | #include <rtw_rf.h> | |
37 | ||
38 | #include <rtw_ht.h> | |
39 | ||
554c0a3a HG |
40 | #include <rtw_cmd.h> |
41 | #include <cmd_osdep.h> | |
42 | #include <rtw_security.h> | |
43 | #include <rtw_xmit.h> | |
44 | #include <xmit_osdep.h> | |
45 | #include <rtw_recv.h> | |
46 | ||
47 | #include <recv_osdep.h> | |
48 | #include <rtw_efuse.h> | |
49 | #include <hal_intf.h> | |
50 | #include <hal_com.h> | |
51 | #include <rtw_qos.h> | |
52 | #include <rtw_pwrctrl.h> | |
53 | #include <rtw_mlme.h> | |
54 | #include <mlme_osdep.h> | |
55 | #include <rtw_io.h> | |
56 | #include <rtw_ioctl.h> | |
57 | #include <rtw_ioctl_set.h> | |
58 | #include <osdep_intf.h> | |
59 | #include <rtw_eeprom.h> | |
60 | #include <sta_info.h> | |
61 | #include <rtw_event.h> | |
62 | #include <rtw_mlme_ext.h> | |
63 | #include <rtw_ap.h> | |
554c0a3a HG |
64 | #include <rtw_version.h> |
65 | #include <rtw_odm.h> | |
66 | ||
67 | #include "ioctl_cfg80211.h" | |
68 | ||
69 | #include <linux/ip.h> | |
70 | #include <linux/if_ether.h> | |
71 | #include <ethernet.h> | |
72 | ||
73 | #define SPEC_DEV_ID_NONE BIT(0) | |
74 | #define SPEC_DEV_ID_DISABLE_HT BIT(1) | |
75 | #define SPEC_DEV_ID_ENABLE_PS BIT(2) | |
76 | #define SPEC_DEV_ID_RF_CONFIG_1T1R BIT(3) | |
77 | #define SPEC_DEV_ID_RF_CONFIG_2T2R BIT(4) | |
78 | #define SPEC_DEV_ID_ASSIGN_IFNAME BIT(5) | |
79 | ||
c77761d6 | 80 | struct specific_device_id { |
554c0a3a HG |
81 | |
82 | u32 flags; | |
83 | ||
84 | u16 idVendor; | |
85 | u16 idProduct; | |
86 | ||
87 | }; | |
88 | ||
89 | struct registry_priv | |
90 | { | |
91 | u8 chip_version; | |
92 | u8 rfintfs; | |
93 | u8 lbkmode; | |
94 | u8 hci; | |
95 | struct ndis_802_11_ssid ssid; | |
96 | u8 network_mode; /* infra, ad-hoc, auto */ | |
97 | u8 channel;/* ad-hoc support requirement */ | |
98 | u8 wireless_mode;/* A, B, G, auto */ | |
99 | u8 scan_mode;/* active, passive */ | |
100 | u8 radio_enable; | |
101 | u8 preamble;/* long, short, auto */ | |
102 | u8 vrtl_carrier_sense;/* Enable, Disable, Auto */ | |
103 | u8 vcs_type;/* RTS/CTS, CTS-to-self */ | |
104 | u16 rts_thresh; | |
105 | u16 frag_thresh; | |
106 | u8 adhoc_tx_pwr; | |
107 | u8 soft_ap; | |
108 | u8 power_mgnt; | |
109 | u8 ips_mode; | |
110 | u8 smart_ps; | |
111 | u8 usb_rxagg_mode; | |
112 | u8 long_retry_lmt; | |
113 | u8 short_retry_lmt; | |
114 | u16 busy_thresh; | |
115 | u8 ack_policy; | |
116 | u8 mp_dm; | |
117 | u8 software_encrypt; | |
118 | u8 software_decrypt; | |
119 | u8 acm_method; | |
120 | /* UAPSD */ | |
121 | u8 wmm_enable; | |
122 | u8 uapsd_enable; | |
123 | u8 uapsd_max_sp; | |
124 | u8 uapsd_acbk_en; | |
125 | u8 uapsd_acbe_en; | |
126 | u8 uapsd_acvi_en; | |
127 | u8 uapsd_acvo_en; | |
128 | ||
129 | struct wlan_bssid_ex dev_network; | |
130 | ||
131 | u8 ht_enable; | |
132 | /* 0: 20 MHz, 1: 40 MHz, 2: 80 MHz, 3: 160MHz */ | |
133 | /* 2.4G use bit 0 ~ 3, 5G use bit 4 ~ 7 */ | |
134 | /* 0x21 means enable 2.4G 40MHz & 5G 80MHz */ | |
135 | u8 bw_mode; | |
136 | u8 ampdu_enable;/* for tx */ | |
137 | u8 rx_stbc; | |
138 | u8 ampdu_amsdu;/* A-MPDU Supports A-MSDU is permitted */ | |
139 | /* Short GI support Bit Map */ | |
140 | /* BIT0 - 20MHz, 1: support, 0: non-support */ | |
141 | /* BIT1 - 40MHz, 1: support, 0: non-support */ | |
142 | /* BIT2 - 80MHz, 1: support, 0: non-support */ | |
143 | /* BIT3 - 160MHz, 1: support, 0: non-support */ | |
144 | u8 short_gi; | |
145 | /* BIT0: Enable VHT LDPC Rx, BIT1: Enable VHT LDPC Tx, BIT4: Enable HT LDPC Rx, BIT5: Enable HT LDPC Tx */ | |
146 | u8 ldpc_cap; | |
147 | /* BIT0: Enable VHT STBC Rx, BIT1: Enable VHT STBC Tx, BIT4: Enable HT STBC Rx, BIT5: Enable HT STBC Tx */ | |
148 | u8 stbc_cap; | |
149 | /* BIT0: Enable VHT Beamformer, BIT1: Enable VHT Beamformee, BIT4: Enable HT Beamformer, BIT5: Enable HT Beamformee */ | |
150 | u8 beamform_cap; | |
151 | ||
152 | u8 lowrate_two_xmit; | |
153 | ||
c77761d6 LS |
154 | u8 rf_config; |
155 | u8 low_power; | |
554c0a3a HG |
156 | |
157 | u8 wifi_spec;/* !turbo_mode */ | |
158 | ||
159 | u8 channel_plan; | |
160 | ||
161 | u8 btcoex; | |
162 | u8 bt_iso; | |
163 | u8 bt_sco; | |
164 | u8 bt_ampdu; | |
165 | s8 ant_num; | |
166 | ||
b739ea41 | 167 | /* false:Reject AP's Add BA req, true:accept AP's Add BA req */ |
2646633f | 168 | bool accept_addba_req; |
554c0a3a HG |
169 | |
170 | u8 antdiv_cfg; | |
171 | u8 antdiv_type; | |
172 | ||
173 | u8 usbss_enable;/* 0:disable, 1:enable */ | |
174 | u8 hwpdn_mode;/* 0:disable, 1:enable, 2:decide by EFUSE config */ | |
175 | u8 hwpwrp_detect;/* 0:disable, 1:enable */ | |
176 | ||
177 | u8 hw_wps_pbc;/* 0:disable, 1:enable */ | |
178 | ||
179 | u8 max_roaming_times; /* the max number driver will try to roaming */ | |
180 | ||
181 | u8 enable80211d; | |
182 | ||
183 | u8 ifname[16]; | |
184 | ||
185 | u8 notch_filter; | |
186 | ||
187 | /* define for tx power adjust */ | |
188 | u8 RegEnableTxPowerLimit; | |
189 | u8 RegEnableTxPowerByRate; | |
190 | u8 RegPowerBase; | |
191 | u8 RegPwrTblSel; | |
192 | s8 TxBBSwing_2G; | |
193 | s8 TxBBSwing_5G; | |
194 | u8 AmplifierType_2G; | |
195 | u8 AmplifierType_5G; | |
196 | u8 bEn_RFE; | |
197 | u8 RFE_Type; | |
198 | u8 check_fw_ps; | |
199 | ||
554c0a3a HG |
200 | #ifdef CONFIG_MULTI_VIR_IFACES |
201 | u8 ext_iface_num;/* primary/secondary iface is excluded */ | |
202 | #endif | |
203 | u8 qos_opt_enable; | |
204 | ||
205 | u8 hiq_filter; | |
206 | }; | |
207 | ||
208 | ||
209 | /* For registry parameters */ | |
210 | #define RGTRY_OFT(field) ((u32)FIELD_OFFSET(struct registry_priv, field)) | |
211 | #define RGTRY_SZ(field) sizeof(((struct registry_priv*) 0)->field) | |
212 | #define BSSID_OFT(field) ((u32)FIELD_OFFSET(struct wlan_bssid_ex, field)) | |
213 | #define BSSID_SZ(field) sizeof(((struct wlan_bssid_ex *) 0)->field) | |
214 | ||
215 | #include <drv_types_sdio.h> | |
554c0a3a HG |
216 | |
217 | #define is_primary_adapter(adapter) (1) | |
218 | #define get_iface_type(adapter) (IFACE_PORT0) | |
219 | #define GET_PRIMARY_ADAPTER(padapter) (((struct adapter *)padapter)->dvobj->if1) | |
220 | #define GET_IFACE_NUMS(padapter) (((struct adapter *)padapter)->dvobj->iface_nums) | |
221 | #define GET_ADAPTER(padapter, iface_id) (((struct adapter *)padapter)->dvobj->padapters[iface_id]) | |
222 | ||
223 | #ifdef CONFIG_DBG_COUNTER | |
224 | ||
225 | struct rx_logs { | |
226 | u32 intf_rx; | |
227 | u32 intf_rx_err_recvframe; | |
228 | u32 intf_rx_err_skb; | |
229 | u32 intf_rx_report; | |
230 | u32 core_rx; | |
231 | u32 core_rx_pre; | |
232 | u32 core_rx_pre_ver_err; | |
233 | u32 core_rx_pre_mgmt; | |
234 | u32 core_rx_pre_mgmt_err_80211w; | |
235 | u32 core_rx_pre_mgmt_err; | |
236 | u32 core_rx_pre_ctrl; | |
237 | u32 core_rx_pre_ctrl_err; | |
238 | u32 core_rx_pre_data; | |
239 | u32 core_rx_pre_data_wapi_seq_err; | |
240 | u32 core_rx_pre_data_wapi_key_err; | |
241 | u32 core_rx_pre_data_handled; | |
242 | u32 core_rx_pre_data_err; | |
243 | u32 core_rx_pre_data_unknown; | |
244 | u32 core_rx_pre_unknown; | |
245 | u32 core_rx_enqueue; | |
246 | u32 core_rx_dequeue; | |
247 | u32 core_rx_post; | |
248 | u32 core_rx_post_decrypt; | |
249 | u32 core_rx_post_decrypt_wep; | |
250 | u32 core_rx_post_decrypt_tkip; | |
251 | u32 core_rx_post_decrypt_aes; | |
252 | u32 core_rx_post_decrypt_wapi; | |
253 | u32 core_rx_post_decrypt_hw; | |
254 | u32 core_rx_post_decrypt_unknown; | |
255 | u32 core_rx_post_decrypt_err; | |
256 | u32 core_rx_post_defrag_err; | |
257 | u32 core_rx_post_portctrl_err; | |
258 | u32 core_rx_post_indicate; | |
259 | u32 core_rx_post_indicate_in_oder; | |
260 | u32 core_rx_post_indicate_reoder; | |
261 | u32 core_rx_post_indicate_err; | |
262 | u32 os_indicate; | |
263 | u32 os_indicate_ap_mcast; | |
264 | u32 os_indicate_ap_forward; | |
265 | u32 os_indicate_ap_self; | |
266 | u32 os_indicate_err; | |
267 | u32 os_netif_ok; | |
268 | u32 os_netif_err; | |
269 | }; | |
270 | ||
271 | struct tx_logs { | |
272 | u32 os_tx; | |
273 | u32 os_tx_err_up; | |
274 | u32 os_tx_err_xmit; | |
275 | u32 os_tx_m2u; | |
276 | u32 os_tx_m2u_ignore_fw_linked; | |
277 | u32 os_tx_m2u_ignore_self; | |
278 | u32 os_tx_m2u_entry; | |
279 | u32 os_tx_m2u_entry_err_xmit; | |
280 | u32 os_tx_m2u_entry_err_skb; | |
281 | u32 os_tx_m2u_stop; | |
282 | u32 core_tx; | |
283 | u32 core_tx_err_pxmitframe; | |
284 | u32 core_tx_err_brtx; | |
285 | u32 core_tx_upd_attrib; | |
286 | u32 core_tx_upd_attrib_adhoc; | |
287 | u32 core_tx_upd_attrib_sta; | |
288 | u32 core_tx_upd_attrib_ap; | |
289 | u32 core_tx_upd_attrib_unknown; | |
290 | u32 core_tx_upd_attrib_dhcp; | |
291 | u32 core_tx_upd_attrib_icmp; | |
292 | u32 core_tx_upd_attrib_active; | |
293 | u32 core_tx_upd_attrib_err_ucast_sta; | |
294 | u32 core_tx_upd_attrib_err_ucast_ap_link; | |
295 | u32 core_tx_upd_attrib_err_sta; | |
296 | u32 core_tx_upd_attrib_err_link; | |
297 | u32 core_tx_upd_attrib_err_sec; | |
298 | u32 core_tx_ap_enqueue_warn_fwstate; | |
299 | u32 core_tx_ap_enqueue_warn_sta; | |
300 | u32 core_tx_ap_enqueue_warn_nosta; | |
301 | u32 core_tx_ap_enqueue_warn_link; | |
302 | u32 core_tx_ap_enqueue_warn_trigger; | |
303 | u32 core_tx_ap_enqueue_mcast; | |
304 | u32 core_tx_ap_enqueue_ucast; | |
305 | u32 core_tx_ap_enqueue; | |
306 | u32 intf_tx; | |
307 | u32 intf_tx_pending_ac; | |
308 | u32 intf_tx_pending_fw_under_survey; | |
309 | u32 intf_tx_pending_fw_under_linking; | |
310 | u32 intf_tx_pending_xmitbuf; | |
311 | u32 intf_tx_enqueue; | |
312 | u32 core_tx_enqueue; | |
313 | u32 core_tx_enqueue_class; | |
314 | u32 core_tx_enqueue_class_err_sta; | |
315 | u32 core_tx_enqueue_class_err_nosta; | |
316 | u32 core_tx_enqueue_class_err_fwlink; | |
317 | u32 intf_tx_direct; | |
318 | u32 intf_tx_direct_err_coalesce; | |
319 | u32 intf_tx_dequeue; | |
320 | u32 intf_tx_dequeue_err_coalesce; | |
321 | u32 intf_tx_dump_xframe; | |
322 | u32 intf_tx_dump_xframe_err_txdesc; | |
323 | u32 intf_tx_dump_xframe_err_port; | |
324 | }; | |
325 | ||
326 | struct int_logs { | |
327 | u32 all; | |
328 | u32 err; | |
329 | u32 tbdok; | |
330 | u32 tbder; | |
331 | u32 bcnderr; | |
332 | u32 bcndma; | |
333 | u32 bcndma_e; | |
334 | u32 rx; | |
335 | u32 rx_rdu; | |
336 | u32 rx_fovw; | |
337 | u32 txfovw; | |
338 | u32 mgntok; | |
339 | u32 highdok; | |
340 | u32 bkdok; | |
341 | u32 bedok; | |
342 | u32 vidok; | |
343 | u32 vodok; | |
344 | }; | |
345 | ||
346 | #endif /* CONFIG_DBG_COUNTER */ | |
347 | ||
348 | struct debug_priv { | |
349 | u32 dbg_sdio_free_irq_error_cnt; | |
350 | u32 dbg_sdio_alloc_irq_error_cnt; | |
351 | u32 dbg_sdio_free_irq_cnt; | |
352 | u32 dbg_sdio_alloc_irq_cnt; | |
353 | u32 dbg_sdio_deinit_error_cnt; | |
354 | u32 dbg_sdio_init_error_cnt; | |
355 | u32 dbg_suspend_error_cnt; | |
356 | u32 dbg_suspend_cnt; | |
357 | u32 dbg_resume_cnt; | |
358 | u32 dbg_resume_error_cnt; | |
359 | u32 dbg_deinit_fail_cnt; | |
360 | u32 dbg_carddisable_cnt; | |
361 | u32 dbg_carddisable_error_cnt; | |
362 | u32 dbg_ps_insuspend_cnt; | |
363 | u32 dbg_dev_unload_inIPS_cnt; | |
364 | u32 dbg_wow_leave_ps_fail_cnt; | |
365 | u32 dbg_scan_pwr_state_cnt; | |
366 | u32 dbg_downloadfw_pwr_state_cnt; | |
367 | u32 dbg_fw_read_ps_state_fail_cnt; | |
368 | u32 dbg_leave_ips_fail_cnt; | |
369 | u32 dbg_leave_lps_fail_cnt; | |
370 | u32 dbg_h2c_leave32k_fail_cnt; | |
371 | u32 dbg_diswow_dload_fw_fail_cnt; | |
372 | u32 dbg_enwow_dload_fw_fail_cnt; | |
373 | u32 dbg_ips_drvopen_fail_cnt; | |
374 | u32 dbg_poll_fail_cnt; | |
b4a6d916 | 375 | u32 dbg_rpwm_toggle_cnt; |
554c0a3a HG |
376 | u32 dbg_rpwm_timeout_fail_cnt; |
377 | u64 dbg_rx_fifo_last_overflow; | |
378 | u64 dbg_rx_fifo_curr_overflow; | |
379 | u64 dbg_rx_fifo_diff_overflow; | |
380 | u64 dbg_rx_ampdu_drop_count; | |
381 | u64 dbg_rx_ampdu_forced_indicate_count; | |
382 | u64 dbg_rx_ampdu_loss_count; | |
383 | u64 dbg_rx_dup_mgt_frame_drop_count; | |
384 | u64 dbg_rx_ampdu_window_shift_cnt; | |
385 | }; | |
386 | ||
387 | struct rtw_traffic_statistics { | |
388 | /* tx statistics */ | |
389 | u64 tx_bytes; | |
390 | u64 tx_pkts; | |
391 | u64 tx_drop; | |
392 | u64 cur_tx_bytes; | |
393 | u64 last_tx_bytes; | |
394 | u32 cur_tx_tp; /* Tx throughput in MBps. */ | |
395 | ||
396 | /* rx statistics */ | |
397 | u64 rx_bytes; | |
398 | u64 rx_pkts; | |
399 | u64 rx_drop; | |
400 | u64 cur_rx_bytes; | |
401 | u64 last_rx_bytes; | |
402 | u32 cur_rx_tp; /* Rx throughput in MBps. */ | |
403 | }; | |
404 | ||
405 | struct cam_ctl_t { | |
406 | _lock lock; | |
407 | u64 bitmap; | |
408 | }; | |
409 | ||
410 | struct cam_entry_cache { | |
411 | u16 ctrl; | |
412 | u8 mac[ETH_ALEN]; | |
413 | u8 key[16]; | |
414 | }; | |
415 | ||
416 | #define KEY_FMT "%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x%02x" | |
417 | #define KEY_ARG(x) ((u8 *)(x))[0], ((u8 *)(x))[1], ((u8 *)(x))[2], ((u8 *)(x))[3], ((u8 *)(x))[4], ((u8 *)(x))[5], \ | |
418 | ((u8 *)(x))[6], ((u8 *)(x))[7], ((u8 *)(x))[8], ((u8 *)(x))[9], ((u8 *)(x))[10], ((u8 *)(x))[11], \ | |
419 | ((u8 *)(x))[12], ((u8 *)(x))[13], ((u8 *)(x))[14], ((u8 *)(x))[15] | |
420 | ||
421 | struct dvobj_priv | |
422 | { | |
423 | /*-------- below is common data --------*/ | |
424 | struct adapter *if1; /* PRIMARY_ADAPTER */ | |
425 | struct adapter *if2; /* SECONDARY_ADAPTER */ | |
426 | ||
427 | s32 processing_dev_remove; | |
428 | ||
429 | struct debug_priv drv_dbg; | |
430 | ||
431 | /* for local/global synchronization */ | |
432 | /* */ | |
433 | _lock lock; | |
434 | int macid[NUM_STA]; | |
435 | ||
436 | _mutex hw_init_mutex; | |
437 | _mutex h2c_fwcmd_mutex; | |
438 | _mutex setch_mutex; | |
439 | _mutex setbw_mutex; | |
440 | ||
441 | unsigned char oper_channel; /* saved channel info when call set_channel_bw */ | |
442 | unsigned char oper_bwmode; | |
443 | unsigned char oper_ch_offset;/* PRIME_CHNL_OFFSET */ | |
444 | unsigned long on_oper_ch_time; | |
445 | ||
446 | struct adapter *padapters; | |
447 | ||
448 | struct cam_ctl_t cam_ctl; | |
449 | struct cam_entry_cache cam_cache[TOTAL_CAM_ENTRY]; | |
450 | ||
451 | /* For 92D, DMDP have 2 interface. */ | |
452 | u8 InterfaceNumber; | |
453 | u8 NumInterfaces; | |
454 | ||
455 | /* In /Out Pipe information */ | |
456 | int RtInPipe[2]; | |
457 | int RtOutPipe[4]; | |
458 | u8 Queue2Pipe[HW_QUEUE_ENTRY];/* for out pipe mapping */ | |
459 | ||
460 | u8 irq_alloc; | |
461 | atomic_t continual_io_error; | |
462 | ||
463 | atomic_t disable_func; | |
464 | ||
465 | struct pwrctrl_priv pwrctl_priv; | |
466 | ||
467 | struct rtw_traffic_statistics traffic_stat; | |
468 | ||
469 | /*-------- below is for SDIO INTERFACE --------*/ | |
470 | ||
affbeba3 MP |
471 | struct sdio_data intf_data; |
472 | ||
554c0a3a HG |
473 | }; |
474 | ||
475 | #define dvobj_to_pwrctl(dvobj) (&(dvobj->pwrctl_priv)) | |
476 | #define pwrctl_to_dvobj(pwrctl) container_of(pwrctl, struct dvobj_priv, pwrctl_priv) | |
477 | ||
4a397521 | 478 | static inline struct device *dvobj_to_dev(struct dvobj_priv *dvobj) |
554c0a3a HG |
479 | { |
480 | /* todo: get interface type from dvobj and the return the dev accordingly */ | |
481 | #ifdef RTW_DVOBJ_CHIP_HW_TYPE | |
482 | #endif | |
483 | ||
484 | return &dvobj->intf_data.func->dev; | |
485 | } | |
486 | ||
487 | struct adapter *dvobj_get_port0_adapter(struct dvobj_priv *dvobj); | |
488 | ||
489 | enum _IFACE_TYPE { | |
490 | IFACE_PORT0, /* mapping to port0 for C/D series chips */ | |
491 | IFACE_PORT1, /* mapping to port1 for C/D series chip */ | |
492 | MAX_IFACE_PORT, | |
493 | }; | |
494 | ||
495 | enum ADAPTER_TYPE { | |
496 | PRIMARY_ADAPTER, | |
497 | SECONDARY_ADAPTER, | |
498 | MAX_ADAPTER = 0xFF, | |
499 | }; | |
500 | ||
c77761d6 | 501 | typedef enum _DRIVER_STATE { |
554c0a3a HG |
502 | DRIVER_NORMAL = 0, |
503 | DRIVER_DISAPPEAR = 1, | |
504 | DRIVER_REPLACE_DONGLE = 2, | |
c77761d6 | 505 | } DRIVER_STATE; |
554c0a3a HG |
506 | |
507 | struct adapter { | |
508 | int DriverState;/* for disable driver using module, use dongle to replace module. */ | |
509 | int pid[3];/* process id from UI, 0:wps, 1:hostapd, 2:dhcpcd */ | |
510 | int bDongle;/* build-in module or external dongle */ | |
511 | ||
512 | struct dvobj_priv *dvobj; | |
513 | struct mlme_priv mlmepriv; | |
514 | struct mlme_ext_priv mlmeextpriv; | |
515 | struct cmd_priv cmdpriv; | |
516 | struct evt_priv evtpriv; | |
517 | /* struct io_queue *pio_queue; */ | |
518 | struct io_priv iopriv; | |
519 | struct xmit_priv xmitpriv; | |
520 | struct recv_priv recvpriv; | |
521 | struct sta_priv stapriv; | |
522 | struct security_priv securitypriv; | |
523 | _lock security_key_mutex; /* add for CONFIG_IEEE80211W, none 11w also can use */ | |
524 | struct registry_priv registrypriv; | |
525 | struct eeprom_priv eeprompriv; | |
526 | ||
527 | struct hostapd_priv *phostapdpriv; | |
528 | ||
529 | u32 setband; | |
530 | ||
531 | void * HalData; | |
532 | u32 hal_data_sz; | |
533 | struct hal_ops HalFunc; | |
534 | ||
535 | s32 bDriverStopped; | |
536 | s32 bSurpriseRemoved; | |
537 | s32 bCardDisableWOHSM; | |
538 | ||
539 | u32 IsrContent; | |
540 | u32 ImrContent; | |
541 | ||
542 | u8 EepromAddressSize; | |
543 | u8 hw_init_completed; | |
544 | u8 bDriverIsGoingToUnload; | |
545 | u8 init_adpt_in_progress; | |
546 | u8 bHaltInProgress; | |
547 | ||
548 | void *cmdThread; | |
549 | void *evtThread; | |
550 | void *xmitThread; | |
551 | void *recvThread; | |
552 | ||
553 | u32 (*intf_init)(struct dvobj_priv *dvobj); | |
554 | void (*intf_deinit)(struct dvobj_priv *dvobj); | |
555 | int (*intf_alloc_irq)(struct dvobj_priv *dvobj); | |
556 | void (*intf_free_irq)(struct dvobj_priv *dvobj); | |
557 | ||
558 | ||
559 | void (*intf_start)(struct adapter * adapter); | |
560 | void (*intf_stop)(struct adapter * adapter); | |
561 | ||
562 | _nic_hdl pnetdev; | |
563 | char old_ifname[IFNAMSIZ]; | |
564 | ||
565 | /* used by rtw_rereg_nd_name related function */ | |
566 | struct rereg_nd_name_data { | |
567 | _nic_hdl old_pnetdev; | |
568 | char old_ifname[IFNAMSIZ]; | |
569 | u8 old_ips_mode; | |
570 | u8 old_bRegUseLed; | |
571 | } rereg_nd_name_priv; | |
572 | ||
573 | int bup; | |
574 | struct net_device_stats stats; | |
575 | struct iw_statistics iwstats; | |
554c0a3a HG |
576 | |
577 | struct wireless_dev *rtw_wdev; | |
578 | struct rtw_wdev_priv wdev_data; | |
579 | ||
580 | int net_closed; | |
581 | ||
582 | u8 netif_up; | |
583 | ||
584 | u8 bFWReady; | |
585 | u8 bBTFWReady; | |
586 | u8 bLinkInfoDump; | |
587 | u8 bRxRSSIDisplay; | |
588 | /* Added by Albert 2012/10/26 */ | |
589 | /* The driver will show up the desired channel number when this flag is 1. */ | |
590 | u8 bNotifyChannelChange; | |
591 | ||
592 | /* pbuddystruct adapter is used only in two inteface case, (iface_nums =2 in struct dvobj_priv) */ | |
593 | /* PRIMARY ADAPTER's buddy is SECONDARY_ADAPTER */ | |
594 | /* SECONDARY_ADAPTER's buddy is PRIMARY_ADAPTER */ | |
595 | /* for iface_id > SECONDARY_ADAPTER(IFACE_ID1), refer to padapters[iface_id] in struct dvobj_priv */ | |
596 | /* and their pbuddystruct adapter is PRIMARY_ADAPTER. */ | |
597 | /* for PRIMARY_ADAPTER(IFACE_ID0) can directly refer to if1 in struct dvobj_priv */ | |
598 | struct adapter *pbuddy_adapter; | |
599 | ||
600 | /* extend to support multi interface */ | |
601 | /* IFACE_ID0 is equals to PRIMARY_ADAPTER */ | |
602 | /* IFACE_ID1 is equals to SECONDARY_ADAPTER */ | |
603 | u8 iface_id; | |
604 | ||
605 | /* for debug purpose */ | |
606 | u8 fix_rate; | |
607 | u8 driver_vcs_en; /* Enable = 1, Disable = 0 driver control vrtl_carrier_sense for tx */ | |
608 | u8 driver_vcs_type;/* force 0:disable VCS, 1:RTS-CTS, 2:CTS-to-self when vcs_en = 1. */ | |
609 | u8 driver_ampdu_spacing;/* driver control AMPDU Density for peer sta's rx */ | |
610 | u8 driver_rx_ampdu_factor;/* 0xff: disable drv ctrl, 0:8k, 1:16k, 2:32k, 3:64k; */ | |
611 | ||
612 | unsigned char in_cta_test; | |
613 | ||
614 | #ifdef CONFIG_DBG_COUNTER | |
615 | struct rx_logs rx_logs; | |
616 | struct tx_logs tx_logs; | |
617 | struct int_logs int_logs; | |
618 | #endif | |
619 | }; | |
620 | ||
621 | #define adapter_to_dvobj(adapter) (adapter->dvobj) | |
622 | #define adapter_to_pwrctl(adapter) (dvobj_to_pwrctl(adapter->dvobj)) | |
623 | #define adapter_wdev_data(adapter) (&((adapter)->wdev_data)) | |
624 | ||
625 | /* */ | |
626 | /* Function disabled. */ | |
627 | /* */ | |
628 | #define DF_TX_BIT BIT0 | |
629 | #define DF_RX_BIT BIT1 | |
630 | #define DF_IO_BIT BIT2 | |
631 | ||
632 | /* define RTW_DISABLE_FUNC(padapter, func) (atomic_add(&adapter_to_dvobj(padapter)->disable_func, (func))) */ | |
633 | /* define RTW_ENABLE_FUNC(padapter, func) (atomic_sub(&adapter_to_dvobj(padapter)->disable_func, (func))) */ | |
4a397521 | 634 | static inline void RTW_DISABLE_FUNC(struct adapter *padapter, int func_bit) |
554c0a3a HG |
635 | { |
636 | int df = atomic_read(&adapter_to_dvobj(padapter)->disable_func); | |
637 | df |= func_bit; | |
638 | atomic_set(&adapter_to_dvobj(padapter)->disable_func, df); | |
639 | } | |
640 | ||
4a397521 | 641 | static inline void RTW_ENABLE_FUNC(struct adapter *padapter, int func_bit) |
554c0a3a HG |
642 | { |
643 | int df = atomic_read(&adapter_to_dvobj(padapter)->disable_func); | |
644 | df &= ~(func_bit); | |
645 | atomic_set(&adapter_to_dvobj(padapter)->disable_func, df); | |
646 | } | |
647 | ||
648 | #define RTW_IS_FUNC_DISABLED(padapter, func_bit) (atomic_read(&adapter_to_dvobj(padapter)->disable_func) & (func_bit)) | |
649 | ||
650 | #define RTW_CANNOT_IO(padapter) \ | |
651 | ((padapter)->bSurpriseRemoved || \ | |
652 | RTW_IS_FUNC_DISABLED((padapter), DF_IO_BIT)) | |
653 | ||
654 | #define RTW_CANNOT_RX(padapter) \ | |
655 | ((padapter)->bDriverStopped || \ | |
656 | (padapter)->bSurpriseRemoved || \ | |
657 | RTW_IS_FUNC_DISABLED((padapter), DF_RX_BIT)) | |
658 | ||
659 | #define RTW_CANNOT_TX(padapter) \ | |
660 | ((padapter)->bDriverStopped || \ | |
661 | (padapter)->bSurpriseRemoved || \ | |
662 | RTW_IS_FUNC_DISABLED((padapter), DF_TX_BIT)) | |
663 | ||
664 | #ifdef CONFIG_GPIO_API | |
665 | int rtw_get_gpio(struct net_device *netdev, int gpio_num); | |
666 | int rtw_set_gpio_output_value(struct net_device *netdev, int gpio_num, bool isHigh); | |
667 | int rtw_config_gpio(struct net_device *netdev, int gpio_num, bool isOutput); | |
668 | #endif | |
669 | ||
670 | #ifdef CONFIG_WOWLAN | |
1e42a887 | 671 | void rtw_suspend_wow(struct adapter *padapter); |
554c0a3a HG |
672 | int rtw_resume_process_wow(struct adapter *padapter); |
673 | #endif | |
674 | ||
77ab45a4 | 675 | static inline u8 *myid(struct eeprom_priv *peepriv) |
554c0a3a | 676 | { |
77ab45a4 | 677 | return peepriv->mac_addr; |
554c0a3a HG |
678 | } |
679 | ||
680 | /* HCI Related header file */ | |
681 | #include <sdio_osintf.h> | |
682 | #include <sdio_ops.h> | |
683 | #include <sdio_hal.h> | |
684 | ||
685 | #include <rtw_btcoex.h> | |
686 | ||
687 | void rtw_indicate_wx_disassoc_event(struct adapter *padapter); | |
688 | void rtw_indicate_wx_assoc_event(struct adapter *padapter); | |
689 | void rtw_indicate_wx_disassoc_event(struct adapter *padapter); | |
690 | void indicate_wx_scan_complete_event(struct adapter *padapter); | |
691 | int rtw_change_ifname(struct adapter *padapter, const char *ifname); | |
692 | ||
554c0a3a HG |
693 | extern char *rtw_initmac; |
694 | extern int rtw_mc2u_disable; | |
695 | extern int rtw_ht_enable; | |
696 | extern u32 g_wait_hiq_empty; | |
697 | extern u8 g_fwdl_wintint_rdy_fail; | |
698 | extern u8 g_fwdl_chksum_fail; | |
699 | ||
700 | #endif /* __DRV_TYPES_H__ */ |