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staging: rtl8192e: Convert typedef nic_t to enum nic_t
[linux-2.6-block.git] / drivers / staging / rtl8192e / rtl_core.h
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94a79942
LF		 1/******************************************************************************
2 * Copyright(c) 2008 - 2010 Realtek Corporation. All rights reserved.
3 *
4 * Based on the r8180 driver, which is:
5 * Copyright 2004-2005 Andrea Merello <andreamrl@tiscali.it>, et al.
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of version 2 of the GNU General Public License as
8 * published by the Free Software Foundation.
9 *
10 * This program is distributed in the hope that it will be useful, but WITHOUT
11 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
12 * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
13 * more details.
14 *
15 * You should have received a copy of the GNU General Public License along with
16 * this program; if not, write to the Free Software Foundation, Inc.,
17 * 51 Franklin Street, Fifth Floor, Boston, MA 02110, USA
18 *
19 * The full GNU General Public License is included in this distribution in the
20 * file called LICENSE.
21 *
22 * Contact Information:
23 * wlanfae <wlanfae@realtek.com>
24******************************************************************************/
25
26#ifndef _RTL_CORE_H
27#define _RTL_CORE_H
28
29#include <linux/module.h>
30#include <linux/kernel.h>
31#include <linux/init.h>
32#include <linux/ioport.h>
33#include <linux/sched.h>
34#include <linux/types.h>
35#include <linux/interrupt.h>
36#include <linux/slab.h>
37#include <linux/netdevice.h>
38#include <linux/pci.h>
39#include <linux/etherdevice.h>
40#include <linux/delay.h>
41#include <linux/rtnetlink.h>
42#include <linux/wireless.h>
43#include <linux/timer.h>
44#include <linux/proc_fs.h>
45#include <linux/if_arp.h>
46#include <linux/random.h>
47#include <linux/version.h>
48#include <asm/io.h>
94a79942
LF		 49#include "rtllib.h"
50
94a79942 51#include "dot11d.h"
94a79942
LF		 52
53#include "r8192E_firmware.h"
54#include "r8192E_hw.h"
55
56#include "r8190P_def.h"
57#include "r8192E_dev.h"
58
94a79942
LF		 59#include "rtl_debug.h"
60#include "rtl_eeprom.h"
61#include "rtl_ps.h"
62#include "rtl_pci.h"
63#include "rtl_cam.h"
64
65#define DRV_COPYRIGHT "Copyright(c) 2008 - 2010 Realsil Semiconductor Corporation"
66#define DRV_AUTHOR "<wlanfae@realtek.com>"
67#define DRV_VERSION "0014.0401.2010"
68
69#define DRV_NAME "rtl819xE"
70
e3e37629
LF		 71#define IS_HARDWARE_TYPE_819xP(_priv) ((((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8190P)||\
72 (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192E))
73#define IS_HARDWARE_TYPE_8192SE(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192SE)
74#define IS_HARDWARE_TYPE_8192CE(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192CE)
75#define IS_HARDWARE_TYPE_8192CU(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192CU)
76#define IS_HARDWARE_TYPE_8192DE(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192DE)
77#define IS_HARDWARE_TYPE_8192DU(_priv) (((struct r8192_priv *)rtllib_priv(dev))->card_8192==NIC_8192DU)
94a79942
LF		 78
79#define RTL_PCI_DEVICE(vend, dev, cfg) \
80 .vendor = (vend), .device = (dev), \
81 .subvendor = PCI_ANY_ID, .subdevice =PCI_ANY_ID , \
82 .driver_data = (kernel_ulong_t)&(cfg)
83 typedef irqreturn_t irqreturn_type;
84
94a79942 85
cb762154 86#define rtl8192_interrupt(x,y,z) rtl8192_interrupt_rsl(x,y)
94a79942
LF		 87
88#define RTL_MAX_SCAN_SIZE 128
89
90#define RTL_RATE_MAX 30
91
92#define TOTAL_CAM_ENTRY 32
93#define CAM_CONTENT_COUNT 8
94
95#ifndef BIT
96#define BIT(_i) (1<<(_i))
97#endif
98
99#define IS_NIC_DOWN(priv) (!(priv)->up)
100
101#define IS_ADAPTER_SENDS_BEACON(dev) 0
102
103#define IS_UNDER_11N_AES_MODE(_rtllib) ((_rtllib->pHTInfo->bCurrentHTSupport == true) &&\
104 (_rtllib->pairwise_key_type == KEY_TYPE_CCMP))
105
106#define HAL_MEMORY_MAPPED_IO_RANGE_8190PCI 0x1000
107#define HAL_HW_PCI_REVISION_ID_8190PCI 0x00
108#define HAL_MEMORY_MAPPED_IO_RANGE_8192PCIE 0x4000
109#define HAL_HW_PCI_REVISION_ID_8192PCIE 0x01
110#define HAL_MEMORY_MAPPED_IO_RANGE_8192SE 0x4000
111#define HAL_HW_PCI_REVISION_ID_8192SE 0x10
112#define HAL_HW_PCI_REVISION_ID_8192CE 0x1
113#define HAL_MEMORY_MAPPED_IO_RANGE_8192CE 0x4000
114#define HAL_HW_PCI_REVISION_ID_8192DE 0x0
115#define HAL_MEMORY_MAPPED_IO_RANGE_8192DE 0x4000
116
117#define HAL_HW_PCI_8180_DEVICE_ID 0x8180
118#define HAL_HW_PCI_8185_DEVICE_ID 0x8185
119#define HAL_HW_PCI_8188_DEVICE_ID 0x8188
120#define HAL_HW_PCI_8198_DEVICE_ID 0x8198
121#define HAL_HW_PCI_8190_DEVICE_ID 0x8190
122#define HAL_HW_PCI_8192_DEVICE_ID 0x8192
123#define HAL_HW_PCI_8192SE_DEVICE_ID 0x8192
124#define HAL_HW_PCI_8174_DEVICE_ID 0x8174
125#define HAL_HW_PCI_8173_DEVICE_ID 0x8173
126#define HAL_HW_PCI_8172_DEVICE_ID 0x8172
127#define HAL_HW_PCI_8171_DEVICE_ID 0x8171
128#define HAL_HW_PCI_0045_DEVICE_ID 0x0045
129#define HAL_HW_PCI_0046_DEVICE_ID 0x0046
130#define HAL_HW_PCI_0044_DEVICE_ID 0x0044
131#define HAL_HW_PCI_0047_DEVICE_ID 0x0047
132#define HAL_HW_PCI_700F_DEVICE_ID 0x700F
133#define HAL_HW_PCI_701F_DEVICE_ID 0x701F
134#define HAL_HW_PCI_DLINK_DEVICE_ID 0x3304
135#define HAL_HW_PCI_8192CET_DEVICE_ID 0x8191
136#define HAL_HW_PCI_8192CE_DEVICE_ID 0x8178
137#define HAL_HW_PCI_8191CE_DEVICE_ID 0x8177
138#define HAL_HW_PCI_8188CE_DEVICE_ID 0x8176
139#define HAL_HW_PCI_8192CU_DEVICE_ID 0x8191
140#define HAL_HW_PCI_8192DE_DEVICE_ID 0x092D
141#define HAL_HW_PCI_8192DU_DEVICE_ID 0x092D
142
143#define RTL819X_DEFAULT_RF_TYPE RF_1T2R
144
145#define RTLLIB_WATCH_DOG_TIME 2000
146
147#define MAX_DEV_ADDR_SIZE 8 /* support till 64 bit bus width OS */
148#define MAX_FIRMWARE_INFORMATION_SIZE 32
149#define MAX_802_11_HEADER_LENGTH (40 + MAX_FIRMWARE_INFORMATION_SIZE)
150#define ENCRYPTION_MAX_OVERHEAD 128
151#define MAX_FRAGMENT_COUNT 8
152#define MAX_TRANSMIT_BUFFER_SIZE (1600+(MAX_802_11_HEADER_LENGTH+ENCRYPTION_MAX_OVERHEAD)*MAX_FRAGMENT_COUNT)
153
154#define scrclng 4
155
156#define DEFAULT_FRAG_THRESHOLD 2342U
157#define MIN_FRAG_THRESHOLD 256U
158#define DEFAULT_BEACONINTERVAL 0x64U
159
160#define DEFAULT_SSID ""
161#define DEFAULT_RETRY_RTS 7
162#define DEFAULT_RETRY_DATA 7
163#define PRISM_HDR_SIZE 64
164
165#define PHY_RSSI_SLID_WIN_MAX 100
166
167#define RTL_IOCTL_WPA_SUPPLICANT SIOCIWFIRSTPRIV+30
168
169#define TxBBGainTableLength 37
170#define CCKTxBBGainTableLength 23
171
172#define CHANNEL_PLAN_LEN 10
173#define sCrcLng 4
174
175#define NIC_SEND_HANG_THRESHOLD_NORMAL 4
176#define NIC_SEND_HANG_THRESHOLD_POWERSAVE 8
177
178#define MAX_TX_QUEUE 9
179
180#define MAX_RX_QUEUE 1
181
182#define MAX_RX_COUNT 64
183#define MAX_TX_QUEUE_COUNT 9
184
185enum RTL819x_PHY_PARAM {
186 RTL819X_PHY_MACPHY_REG = 0,
187 RTL819X_PHY_MACPHY_REG_PG = 1,
188 RTL8188C_PHY_MACREG =2,
189 RTL8192C_PHY_MACREG =3,
190 RTL819X_PHY_REG = 4,
191 RTL819X_PHY_REG_1T2R = 5,
192 RTL819X_PHY_REG_to1T1R = 6,
193 RTL819X_PHY_REG_to1T2R = 7,
194 RTL819X_PHY_REG_to2T2R = 8,
195 RTL819X_PHY_REG_PG = 9,
196 RTL819X_AGC_TAB = 10,
197 RTL819X_PHY_RADIO_A =11,
198 RTL819X_PHY_RADIO_A_1T =12,
199 RTL819X_PHY_RADIO_A_2T =13,
200 RTL819X_PHY_RADIO_B =14,
201 RTL819X_PHY_RADIO_B_GM =15,
202 RTL819X_PHY_RADIO_C =16,
203 RTL819X_PHY_RADIO_D =17,
204 RTL819X_EEPROM_MAP =18,
205 RTL819X_EFUSE_MAP =19,
206};
207
208enum RTL_DEBUG {
209 COMP_TRACE = BIT0,
210 COMP_DBG = BIT1,
211 COMP_INIT = BIT2,
212 COMP_RECV = BIT3,
213 COMP_SEND = BIT4,
214 COMP_CMD = BIT5,
215 COMP_POWER = BIT6,
216 COMP_EPROM = BIT7,
217 COMP_SWBW = BIT8,
218 COMP_SEC = BIT9,
219 COMP_LPS = BIT10,
220 COMP_QOS = BIT11,
221 COMP_RATE = BIT12,
222 COMP_RXDESC = BIT13,
223 COMP_PHY = BIT14,
224 COMP_DIG = BIT15,
225 COMP_TXAGC = BIT16,
226 COMP_HALDM = BIT17,
227 COMP_POWER_TRACKING = BIT18,
228 COMP_CH = BIT19,
229 COMP_RF = BIT20,
230 COMP_FIRMWARE = BIT21,
231 COMP_HT = BIT22,
232 COMP_RESET = BIT23,
233 COMP_CMDPKT = BIT24,
234 COMP_SCAN = BIT25,
235 COMP_PS = BIT26,
236 COMP_DOWN = BIT27,
237 COMP_INTR = BIT28,
238 COMP_LED = BIT29,
239 COMP_MLME = BIT30,
240 COMP_ERR = BIT31
241};
242
b55941af 243enum nic_t {
94a79942
LF		 244 NIC_UNKNOWN = 0,
245 NIC_8192E = 1,
246 NIC_8190P = 2,
247 NIC_8192SE = 4,
248 NIC_8192CE = 5,
249 NIC_8192CU = 6,
250 NIC_8192DE = 7,
251 NIC_8192DU = 8,
b55941af 252 };
94a79942
LF		 253
254typedef enum _RT_EEPROM_TYPE{
255 EEPROM_93C46,
256 EEPROM_93C56,
257 EEPROM_BOOT_EFUSE,
d3b2c172 258} RT_EEPROM_TYPE,*PRT_EEPROM_TYPE;
94a79942 259
d3b2c172 260typedef enum _DCMD_TXCMD_OP{
94a79942
LF		 261 TXCMD_TXRA_HISTORY_CTRL = 0xFF900000,
262 TXCMD_RESET_TX_PKT_BUFF = 0xFF900001,
263 TXCMD_RESET_RX_PKT_BUFF = 0xFF900002,
264 TXCMD_SET_TX_DURATION = 0xFF900003,
265 TXCMD_SET_RX_RSSI = 0xFF900004,
266 TXCMD_SET_TX_PWR_TRACKING = 0xFF900005,
267 TXCMD_XXXX_CTRL,
d3b2c172 268} DCMD_TXCMD_OP;
94a79942
LF		 269
270typedef enum _RT_RF_TYPE_819xU{
271 RF_TYPE_MIN = 0,
272 RF_8225,
273 RF_8256,
274 RF_8258,
275 RF_6052=4,
276 RF_PSEUDO_11N = 5,
d3b2c172 277} RT_RF_TYPE_819xU, *PRT_RF_TYPE_819xU;
94a79942 278
d3b2c172 279typedef enum _RF_STEP_E
94a79942
LF		 280{
281 RF_STEP_INIT = 0,
282 RF_STEP_NORMAL,
283 RF_STEP_MAX
d3b2c172 284} RF_STEP_E;
94a79942
LF		 285
286typedef enum _RT_STATUS{
287 RT_STATUS_SUCCESS,
288 RT_STATUS_FAILURE,
289 RT_STATUS_PENDING,
290 RT_STATUS_RESOURCE
d3b2c172 291} RT_STATUS,*PRT_STATUS;
94a79942
LF		 292
293typedef enum _RT_CUSTOMER_ID
294{
295 RT_CID_DEFAULT = 0,
296 RT_CID_8187_ALPHA0 = 1,
297 RT_CID_8187_SERCOMM_PS = 2,
298 RT_CID_8187_HW_LED = 3,
299 RT_CID_8187_NETGEAR = 4,
300 RT_CID_WHQL = 5,
301 RT_CID_819x_CAMEO = 6,
302 RT_CID_819x_RUNTOP = 7,
303 RT_CID_819x_Senao = 8,
304 RT_CID_TOSHIBA = 9,
305 RT_CID_819x_Netcore = 10,
306 RT_CID_Nettronix = 11,
307 RT_CID_DLINK = 12,
308 RT_CID_PRONET = 13,
309 RT_CID_COREGA = 14,
310 RT_CID_819x_ALPHA = 15,
311 RT_CID_819x_Sitecom = 16,
312 RT_CID_CCX = 17,
313 RT_CID_819x_Lenovo = 18,
314 RT_CID_819x_QMI = 19,
315 RT_CID_819x_Edimax_Belkin = 20,
316 RT_CID_819x_Sercomm_Belkin = 21,
317 RT_CID_819x_CAMEO1 = 22,
318 RT_CID_819x_MSI = 23,
319 RT_CID_819x_Acer = 24,
320 RT_CID_819x_HP =27,
321 RT_CID_819x_CLEVO = 28,
322 RT_CID_819x_Arcadyan_Belkin = 29,
323 RT_CID_819x_SAMSUNG = 30,
324 RT_CID_819x_WNC_COREGA = 31,
d3b2c172 325} RT_CUSTOMER_ID, *PRT_CUSTOMER_ID;
94a79942
LF		 326
327typedef enum _RESET_TYPE {
328 RESET_TYPE_NORESET = 0x00,
329 RESET_TYPE_NORMAL = 0x01,
330 RESET_TYPE_SILENT = 0x02
331} RESET_TYPE;
332
333typedef enum _IC_INFERIORITY_8192S{
334 IC_INFERIORITY_A = 0,
335 IC_INFERIORITY_B = 1,
d3b2c172 336} IC_INFERIORITY_8192S, *PIC_INFERIORITY_8192S;
94a79942
LF		 337
338typedef enum _PCI_BRIDGE_VENDOR {
339 PCI_BRIDGE_VENDOR_INTEL = 0x0,
340 PCI_BRIDGE_VENDOR_ATI,
341 PCI_BRIDGE_VENDOR_AMD,
342 PCI_BRIDGE_VENDOR_SIS ,
343 PCI_BRIDGE_VENDOR_UNKNOWN,
344 PCI_BRIDGE_VENDOR_MAX ,
345} PCI_BRIDGE_VENDOR;
346
fc22c052 347struct buffer {
94a79942
LF		 348 struct buffer *next;
349 u32 *buf;
350 dma_addr_t dma;
351
fc22c052 352};
94a79942 353
ebbef649 354struct rtl_reg_debug {
94a79942
LF		 355 unsigned int cmd;
356 struct {
357 unsigned char type;
358 unsigned char addr;
359 unsigned char page;
360 unsigned char length;
361 } head;
362 unsigned char buf[0xff];
d3b2c172 363};
94a79942 364
9c109856 365struct rt_tx_rahis {
94a79942
LF		 366 u32 cck[4];
367 u32 ofdm[8];
368 u32 ht_mcs[4][16];
d3b2c172 369};
94a79942 370
9d94bbb8 371struct rt_smooth_data_4rf {
94a79942
LF		 372 char elements[4][100];
373 u32 index;
374 u32 TotalNum;
375 u32 TotalVal[4];
d3b2c172 376};
94a79942 377
2fac6fc4 378struct rt_stats {
94a79942
LF		 379 unsigned long txrdu;
380 unsigned long rxrdu;
381 unsigned long rxok;
382 unsigned long rxframgment;
383 unsigned long rxcmdpkt[4];
384 unsigned long rxurberr;
385 unsigned long rxstaterr;
386 unsigned long rxdatacrcerr;
387 unsigned long rxmgmtcrcerr;
388 unsigned long rxcrcerrmin;
389 unsigned long rxcrcerrmid;
390 unsigned long rxcrcerrmax;
391 unsigned long received_rate_histogram[4][32];
392 unsigned long received_preamble_GI[2][32];
393 unsigned long rx_AMPDUsize_histogram[5];
394 unsigned long rx_AMPDUnum_histogram[5];
395 unsigned long numpacket_matchbssid;
396 unsigned long numpacket_toself;
397 unsigned long num_process_phyinfo;
398 unsigned long numqry_phystatus;
399 unsigned long numqry_phystatusCCK;
400 unsigned long numqry_phystatusHT;
401 unsigned long received_bwtype[5];
402 unsigned long txnperr;
403 unsigned long txnpdrop;
404 unsigned long txresumed;
405 unsigned long rxoverflow;
406 unsigned long rxint;
407 unsigned long txnpokint;
408 unsigned long ints;
409 unsigned long shints;
410 unsigned long txoverflow;
411 unsigned long txlpokint;
412 unsigned long txlpdrop;
413 unsigned long txlperr;
414 unsigned long txbeokint;
415 unsigned long txbedrop;
416 unsigned long txbeerr;
417 unsigned long txbkokint;
418 unsigned long txbkdrop;
419 unsigned long txbkerr;
420 unsigned long txviokint;
421 unsigned long txvidrop;
422 unsigned long txvierr;
423 unsigned long txvookint;
424 unsigned long txvodrop;
425 unsigned long txvoerr;
426 unsigned long txbeaconokint;
427 unsigned long txbeacondrop;
428 unsigned long txbeaconerr;
429 unsigned long txmanageokint;
430 unsigned long txmanagedrop;
431 unsigned long txmanageerr;
432 unsigned long txcmdpktokint;
433 unsigned long txdatapkt;
434 unsigned long txfeedback;
435 unsigned long txfeedbackok;
436 unsigned long txoktotal;
437 unsigned long txokbytestotal;
438 unsigned long txokinperiod;
439 unsigned long txmulticast;
440 unsigned long txbytesmulticast;
441 unsigned long txbroadcast;
442 unsigned long txbytesbroadcast;
443 unsigned long txunicast;
444 unsigned long txbytesunicast;
445 unsigned long rxbytesunicast;
446 unsigned long txfeedbackfail;
447 unsigned long txerrtotal;
448 unsigned long txerrbytestotal;
449 unsigned long txerrmulticast;
450 unsigned long txerrbroadcast;
451 unsigned long txerrunicast;
452 unsigned long txretrycount;
453 unsigned long txfeedbackretry;
454 u8 last_packet_rate;
455 unsigned long slide_signal_strength[100];
456 unsigned long slide_evm[100];
457 unsigned long slide_rssi_total;
458 unsigned long slide_evm_total;
459 long signal_strength;
460 long signal_quality;
461 long last_signal_strength_inpercent;
462 long recv_signal_power;
463 u8 rx_rssi_percentage[4];
464 u8 rx_evm_percentage[2];
465 long rxSNRdB[4];
9c109856 466 struct rt_tx_rahis txrate;
94a79942
LF		 467 u32 Slide_Beacon_pwdb[100];
468 u32 Slide_Beacon_Total;
9d94bbb8 469 struct rt_smooth_data_4rf cck_adc_pwdb;
94a79942 470 u32 CurrentShowTxate;
2fac6fc4 471};
94a79942 472
e91dbf03 473struct channel_access_setting {
94a79942
LF		 474 u16 SIFS_Timer;
475 u16 DIFS_Timer;
476 u16 SlotTimeTimer;
477 u16 EIFS_Timer;
478 u16 CWminIndex;
479 u16 CWmaxIndex;
e91dbf03 480};
94a79942
LF		 481
482typedef enum _TWO_PORT_STATUS
483{
484 TWO_PORT_STATUS__DEFAULT_ONLY,
485 TWO_PORT_STATUS__EXTENSION_ONLY,
486 TWO_PORT_STATUS__EXTENSION_FOLLOW_DEFAULT,
487 TWO_PORT_STATUS__DEFAULT_G_EXTENSION_N20,
488 TWO_PORT_STATUS__ADHOC,
489 TWO_PORT_STATUS__WITHOUT_ANY_ASSOCIATE
d3b2c172 490} TWO_PORT_STATUS;
94a79942 491
031189ec 492struct txbbgain_struct {
94a79942
LF		 493 long txbb_iq_amplifygain;
494 u32 txbbgain_value;
031189ec 495};
94a79942 496
d514e345 497struct ccktxbbgain {
94a79942 498 u8 ccktxbb_valuearray[8];
d514e345 499};
94a79942 500
43267fef 501struct init_gain {
94a79942
LF		 502 u8 xaagccore1;
503 u8 xbagccore1;
504 u8 xcagccore1;
505 u8 xdagccore1;
506 u8 cca;
507
43267fef 508};
94a79942 509
b7a14040 510struct tx_ring {
94a79942
LF		 511 u32 * desc;
512 u8 nStuckCount;
b7a14040
LF		 513 struct tx_ring * next;
514} __packed;
94a79942
LF		 515
516struct rtl8192_tx_ring {
bc27e89b 517 struct tx_desc *desc;
94a79942
LF		 518 dma_addr_t dma;
519 unsigned int idx;
520 unsigned int entries;
521 struct sk_buff_head queue;
522};
523
524
525
526struct rtl819x_ops{
b55941af 527 enum nic_t nic_type;
94a79942
LF		 528 void (* get_eeprom_size)(struct net_device* dev);
529 void (* init_adapter_variable)(struct net_device* dev);
530 void (* init_before_adapter_start)(struct net_device* dev);
531 bool (* initialize_adapter)(struct net_device* dev);
532 void (*link_change)(struct net_device* dev);
3b83db43
LF		 533 void (* tx_fill_descriptor)(struct net_device* dev, struct tx_desc *tx_desc, struct cb_desc *cb_desc, struct sk_buff *skb);
534 void (* tx_fill_cmd_descriptor)(struct net_device* dev, struct tx_desc_cmd * entry, struct cb_desc *cb_desc, struct sk_buff *skb);
4f534b36
LF		 535 bool (* rx_query_status_descriptor)(struct net_device* dev, struct rtllib_rx_stats* stats, struct rx_desc *pdesc, struct sk_buff* skb);
536 bool (* rx_command_packet_handler)(struct net_device *dev, struct sk_buff* skb, struct rx_desc *pdesc);
94a79942
LF		 537 void (* stop_adapter)(struct net_device *dev, bool reset);
538 void (* update_ratr_table)(struct net_device* dev);
539 void (* irq_enable)(struct net_device* dev);
540 void (* irq_disable)(struct net_device* dev);
541 void (* irq_clear)(struct net_device* dev);
542 void (* rx_enable)(struct net_device* dev);
543 void (* tx_enable)(struct net_device* dev);
544 void (* interrupt_recognized)(struct net_device *dev, u32 *p_inta, u32 *p_intb);
545 bool (* TxCheckStuckHandler)(struct net_device* dev);
546 bool (* RxCheckStuckHandler)(struct net_device* dev);
547};
548
e3e37629 549struct r8192_priv {
94a79942
LF		 550 struct pci_dev *pdev;
551 struct pci_dev *bridge_pdev;
552
94a79942
LF		 553 bool bfirst_init;
554 bool bfirst_after_down;
555 bool initialized_at_probe;
556 bool being_init_adapter;
557 bool bDriverIsGoingToUnload;
558
559 int irq;
560 short irq_enabled;
561
562 short up;
563 short up_first_time;
edc4b2c5
LF		 564 struct delayed_work update_beacon_wq;
565 struct delayed_work watch_dog_wq;
566 struct delayed_work txpower_tracking_wq;
567 struct delayed_work rfpath_check_wq;
568 struct delayed_work gpio_change_rf_wq;
569 struct delayed_work initialgain_operate_wq;
570 struct delayed_work check_hw_scan_wq;
571 struct delayed_work hw_scan_simu_wq;
572 struct delayed_work start_hw_scan_wq;
94a79942
LF		 573
574 struct workqueue_struct *priv_wq;
575
e91dbf03 576 struct channel_access_setting ChannelAccessSetting;
94a79942 577
1897a50c 578 struct mp_adapter NdisAdapter;
94a79942
LF		 579
580 struct rtl819x_ops *ops;
581 struct rtllib_device *rtllib;
582
edc4b2c5 583 struct work_struct reset_wq;
94a79942 584
c13ac63b 585 struct log_int_8190 InterruptLog;
94a79942
LF		 586
587 RT_CUSTOMER_ID CustomerID;
588
589
590 RT_RF_TYPE_819xU rf_chip;
591 IC_INFERIORITY_8192S IC_Class;
6e579119 592 enum ht_channel_width CurrentChannelBW;
9bf6e4c1 593 struct bb_reg_definition PHYRegDef[4];
9be6f10e 594 struct rate_adaptive rate_adaptive;
94a79942 595
d514e345
LF		 596 struct ccktxbbgain cck_txbbgain_table[CCKTxBBGainTableLength];
597 struct ccktxbbgain cck_txbbgain_ch14_table[CCKTxBBGainTableLength];
94a79942 598
031189ec 599 struct txbbgain_struct txbbgain_table[TxBBGainTableLength];
94a79942 600
379a20fb 601 enum acm_method AcmMethod;
94a79942 602
5aca114d 603 struct rt_firmware *pFirmware;
70f9f79c 604 enum rtl819x_loopback LoopbackMode;
9659e7f5 605 enum firmware_source firmware_source;
94a79942
LF		 606
607 struct timer_list watch_dog_timer;
608 struct timer_list fsync_timer;
609 struct timer_list gpio_polling_timer;
610
611 spinlock_t fw_scan_lock;
612 spinlock_t irq_lock;
613 spinlock_t irq_th_lock;
614 spinlock_t tx_lock;
615 spinlock_t rf_ps_lock;
616 spinlock_t rw_lock;
617 spinlock_t rt_h2c_lock;
94a79942
LF		 618 spinlock_t rf_lock;
619 spinlock_t ps_lock;
620
621 struct sk_buff_head rx_queue;
622 struct sk_buff_head skb_queue;
623
624 struct tasklet_struct irq_rx_tasklet;
625 struct tasklet_struct irq_tx_tasklet;
626 struct tasklet_struct irq_prepare_beacon_tasklet;
627
628 struct semaphore wx_sem;
629 struct semaphore rf_sem;
94a79942 630 struct mutex mutex;
94a79942 631
2fac6fc4 632 struct rt_stats stats;
94a79942
LF		 633 struct iw_statistics wstats;
634 struct proc_dir_entry *dir_dev;
635
636 short (*rf_set_sens)(struct net_device *dev,short sens);
637 u8 (*rf_set_chan)(struct net_device *dev,u8 ch);
638 void (*rf_close)(struct net_device *dev);
639 void (*rf_init)(struct net_device *dev);
640
4f534b36 641 struct rx_desc *rx_ring[MAX_RX_QUEUE];
94a79942
LF		 642 struct sk_buff *rx_buf[MAX_RX_QUEUE][MAX_RX_COUNT];
643 dma_addr_t rx_ring_dma[MAX_RX_QUEUE];
644 unsigned int rx_idx[MAX_RX_QUEUE];
645 int rxringcount;
646 u16 rxbuffersize;
647
648 u32 LastRxDescTSFHigh;
649 u32 LastRxDescTSFLow;
650
651 u16 EarlyRxThreshold;
652 u32 ReceiveConfig;
653 u8 AcmControl;
654 u8 RFProgType;
655 u8 retry_data;
656 u8 retry_rts;
657 u16 rts;
658
659 struct rtl8192_tx_ring tx_ring[MAX_TX_QUEUE_COUNT];
660 int txringcount;
661 int txbuffsize;
662 int txfwbuffersize;
663 atomic_t tx_pending[0x10];
664
665 u16 ShortRetryLimit;
666 u16 LongRetryLimit;
667 u32 TransmitConfig;
668 u8 RegCWinMin;
669 u8 keepAliveLevel;
670
94a79942
LF		 671 bool sw_radio_on;
672 bool bHwRadioOff;
673 bool pwrdown;
674 bool blinked_ingpio;
675 u8 polling_timer_on;
676
677 /**********************************************************/
678
679 enum card_type {PCI,MINIPCI,CARDBUS,USB}card_type;
680
edc4b2c5 681 struct work_struct qos_activate;
94a79942
LF		 682
683 u8 bIbssCoordinator;
684
685 short promisc;
686 short crcmon;
687
688 int txbeaconcount;
689
690 short chan;
691 short sens;
692 short max_sens;
693 u32 rx_prevlen;
694
695 u8 ScanDelay;
696 bool ps_force;
697
698 u32 irq_mask[2];
699
700 u8 Rf_Mode;
b55941af 701 enum nic_t card_8192;
94a79942
LF		 702 u8 card_8192_version;
703
704 short enable_gpio0;
705
706 u8 rf_type;
707 u8 IC_Cut;
708 char nick[IW_ESSID_MAX_SIZE + 1];
709
710 u8 RegBcnCtrlVal;
711 bool bHwAntDiv;
712
713 bool bTKIPinNmodeFromReg;
714 bool bWEPinNmodeFromReg;
715
716 bool bLedOpenDrain;
717
718 u8 check_roaming_cnt;
719
720 bool bIgnoreSilentReset;
721 u32 SilentResetRxSoltNum;
722 u32 SilentResetRxSlotIndex;
723 u32 SilentResetRxStuckEvent[MAX_SILENT_RESET_RX_SLOT_NUM];
724
725 void *scan_cmd;
726 u8 hwscan_bw_40;
727
728 u16 nrxAMPDU_size;
729 u8 nrxAMPDU_aggr_num;
730
731 u32 last_rxdesc_tsf_high;
732 u32 last_rxdesc_tsf_low;
733
734
735 u16 basic_rate;
736 u8 short_preamble;
737 u8 dot11CurrentPreambleMode;
738 u8 slot_time;
739 u16 SifsTime;
740
741 u8 RegWirelessMode;
742
743 u8 firmware_version;
744 u16 FirmwareSubVersion;
745 u16 rf_pathmap;
746 bool AutoloadFailFlag;
747
748 u8 RegPciASPM;
749 u8 RegAMDPciASPM;
750 u8 RegHwSwRfOffD3;
751 u8 RegSupportPciASPM;
752 bool bSupportASPM;
753
754 u32 RfRegChnlVal[2];
755
756 u8 ShowRateMode;
757 u8 RATRTableBitmap;
758
759 u8 EfuseMap[2][HWSET_MAX_SIZE_92S];
760 u16 EfuseUsedBytes;
761 u8 EfuseUsedPercentage;
762
94a79942
LF		 763 short epromtype;
764 u16 eeprom_vid;
765 u16 eeprom_did;
766 u16 eeprom_svid;
767 u16 eeprom_smid;
768 u8 eeprom_CustomerID;
769 u16 eeprom_ChannelPlan;
770 u8 eeprom_version;
771
772 u8 EEPROMRegulatory;
773 u8 EEPROMPwrGroup[2][3];
774 u8 EEPROMOptional;
775
94a79942
LF		 776 u8 EEPROMTxPowerLevelCCK[14];
777 u8 EEPROMTxPowerLevelOFDM24G[14];
778 u8 EEPROMTxPowerLevelOFDM5G[24];
94a79942
LF		 779 u8 EEPROMRfACCKChnl1TxPwLevel[3];
780 u8 EEPROMRfAOfdmChnlTxPwLevel[3];
781 u8 EEPROMRfCCCKChnl1TxPwLevel[3];
782 u8 EEPROMRfCOfdmChnlTxPwLevel[3];
783 u16 EEPROMTxPowerDiff;
784 u16 EEPROMAntPwDiff;
785 u8 EEPROMThermalMeter;
786 u8 EEPROMPwDiff;
787 u8 EEPROMCrystalCap;
788
789 u8 EEPROMBluetoothCoexist;
790 u8 EEPROMBluetoothType;
791 u8 EEPROMBluetoothAntNum;
792 u8 EEPROMBluetoothAntIsolation;
793 u8 EEPROMBluetoothRadioShared;
794
795
796 u8 EEPROMSupportWoWLAN;
797 u8 EEPROMBoardType;
798 u8 EEPROM_Def_Ver;
799 u8 EEPROMHT2T_TxPwr[6];
800 u8 EEPROMTSSI_A;
801 u8 EEPROMTSSI_B;
802 u8 EEPROMTxPowerLevelCCK_V1[3];
803 u8 EEPROMLegacyHTTxPowerDiff;
804
805 u8 BluetoothCoexist;
806
807 u8 CrystalCap;
808 u8 ThermalMeter[2];
809
810 u16 FwCmdIOMap;
811 u32 FwCmdIOParam;
812
813 u8 SwChnlInProgress;
814 u8 SwChnlStage;
815 u8 SwChnlStep;
816 u8 SetBWModeInProgress;
817
818 u8 nCur40MhzPrimeSC;
819
820 u32 RfReg0Value[4];
821 u8 NumTotalRFPath;
822 bool brfpath_rxenable[4];
823
824 bool bTXPowerDataReadFromEEPORM;
825
826 u16 RegChannelPlan;
827 u16 ChannelPlan;
828 bool bChnlPlanFromHW;
829
830 bool RegRfOff;
831 bool isRFOff;
832 bool bInPowerSaveMode;
833 u8 bHwRfOffAction;
834
835 bool aspm_clkreq_enable;
836 u32 pci_bridge_vendor;
837 u8 RegHostPciASPMSetting;
838 u8 RegDevicePciASPMSetting;
839
840 bool RFChangeInProgress;
841 bool SetRFPowerStateInProgress;
842 bool bdisable_nic;
843
844 u8 pwrGroupCnt;
845
846 u8 ThermalValue_LCK;
847 u8 ThermalValue_IQK;
848 bool bRfPiEnable;
849
850 u32 APKoutput[2][2];
851 bool bAPKdone;
852
853 long RegE94;
854 long RegE9C;
855 long RegEB4;
856 long RegEBC;
857
858 u32 RegC04;
859 u32 Reg874;
860 u32 RegC08;
861 u32 ADDA_backup[16];
862 u32 IQK_MAC_backup[3];
863
864 bool SetFwCmdInProgress;
865 u8 CurrentFwCmdIO;
866
867 u8 rssi_level;
868
869 bool bInformFWDriverControlDM;
870 u8 PwrGroupHT20[2][14];
871 u8 PwrGroupHT40[2][14];
872
873 u8 ThermalValue;
874 long EntryMinUndecoratedSmoothedPWDB;
875 long EntryMaxUndecoratedSmoothedPWDB;
876 u8 DynamicTxHighPowerLvl;
877 u8 LastDTPLvl;
878 u32 CurrentRATR0;
38b1f67d 879 struct false_alarm_stats FalseAlmCnt;
94a79942
LF		 880
881 u8 DMFlag;
882 u8 DM_Type;
883
884 u8 CckPwEnl;
885 u16 TSSI_13dBm;
886 u32 Pwr_Track;
887 u8 CCKPresentAttentuation_20Mdefault;
888 u8 CCKPresentAttentuation_40Mdefault;
889 char CCKPresentAttentuation_difference;
890 char CCKPresentAttentuation;
891 u8 bCckHighPower;
892 long undecorated_smoothed_pwdb;
893 long undecorated_smoothed_cck_adc_pwdb[4];
894
895 u32 MCSTxPowerLevelOriginalOffset[6];
896 u32 CCKTxPowerLevelOriginalOffset;
897 u8 TxPowerLevelCCK[14];
898 u8 TxPowerLevelCCK_A[14];
899 u8 TxPowerLevelCCK_C[14];
900 u8 TxPowerLevelOFDM24G[14];
901 u8 TxPowerLevelOFDM5G[14];
902 u8 TxPowerLevelOFDM24G_A[14];
903 u8 TxPowerLevelOFDM24G_C[14];
904 u8 LegacyHTTxPowerDiff;
905 u8 TxPowerDiff;
906 s8 RF_C_TxPwDiff;
907 s8 RF_B_TxPwDiff;
908 u8 RfTxPwrLevelCck[2][14];
909 u8 RfTxPwrLevelOfdm1T[2][14];
910 u8 RfTxPwrLevelOfdm2T[2][14];
911 u8 AntennaTxPwDiff[3];
912 u8 TxPwrHt20Diff[2][14];
913 u8 TxPwrLegacyHtDiff[2][14];
914 u8 TxPwrSafetyFlag;
915 u8 HT2T_TxPwr_A[14];
916 u8 HT2T_TxPwr_B[14];
917 u8 CurrentCckTxPwrIdx;
918 u8 CurrentOfdm24GTxPwrIdx;
919
920 bool bdynamic_txpower;
921 bool bDynamicTxHighPower;
922 bool bDynamicTxLowPower;
923 bool bLastDTPFlag_High;
924 bool bLastDTPFlag_Low;
925
926 bool bstore_last_dtpflag;
927 bool bstart_txctrl_bydtp;
928
929 u8 rfa_txpowertrackingindex;
930 u8 rfa_txpowertrackingindex_real;
931 u8 rfa_txpowertracking_default;
932 u8 rfc_txpowertrackingindex;
933 u8 rfc_txpowertrackingindex_real;
934 u8 rfc_txpowertracking_default;
935 bool btxpower_tracking;
936 bool bcck_in_ch14;
937
938 u8 TxPowerTrackControl;
939 u8 txpower_count;
940 bool btxpower_trackingInit;
941
942 u8 OFDM_index[2];
943 u8 CCK_index;
944
945 u8 Record_CCK_20Mindex;
946 u8 Record_CCK_40Mindex;
947
43267fef 948 struct init_gain initgain_backup;
94a79942
LF		 949 u8 DefaultInitialGain[4];
950 bool bis_any_nonbepkts;
951 bool bcurrent_turbo_EDCA;
952 bool bis_cur_rdlstate;
953
954 bool bCCKinCH14;
955
956 u8 MidHighPwrTHR_L1;
957 u8 MidHighPwrTHR_L2;
958
959 bool bfsync_processing;
960 u32 rate_record;
961 u32 rateCountDiffRecord;
962 u32 ContiuneDiffCount;
963 bool bswitch_fsync;
964 u8 framesync;
965 u32 framesyncC34;
966 u8 framesyncMonitor;
967
968 bool bDMInitialGainEnable;
969 bool MutualAuthenticationFail;
970
971 bool bDisableFrameBursting;
972
973 u32 reset_count;
974 bool bpbc_pressed;
975
976 u32 txpower_checkcnt;
977 u32 txpower_tracking_callback_cnt;
978 u8 thermal_read_val[40];
979 u8 thermal_readback_index;
980 u32 ccktxpower_adjustcnt_not_ch14;
981 u32 ccktxpower_adjustcnt_ch14;
982
983 RESET_TYPE ResetProgress;
984 bool bForcedSilentReset;
985 bool bDisableNormalResetCheck;
986 u16 TxCounter;
987 u16 RxCounter;
988 int IrpPendingCount;
989 bool bResetInProgress;
990 bool force_reset;
991 bool force_lps;
992 u8 InitialGainOperateType;
993
994 bool chan_forced;
995 bool bSingleCarrier;
996 bool RegBoard;
997 bool bCckContTx;
998 bool bOfdmContTx;
999 bool bStartContTx;
1000 u8 RegPaModel;
1001 u8 btMpCckTxPower;
1002 u8 btMpOfdmTxPower;
1003
1004 u32 MptActType;
1005 u32 MptIoOffset;
1006 u32 MptIoValue;
1007 u32 MptRfPath;
1008
1009 u32 MptBandWidth;
1010 u32 MptRateIndex;
1011 u8 MptChannelToSw;
1012 u32 MptRCR;
1013
1014 u8 PwrDomainProtect;
1015 u8 H2CTxCmdSeq;
1016
1017
d3b2c172 1018};
94a79942
LF		 1019
1020extern const struct ethtool_ops rtl819x_ethtool_ops;
1021
1022void rtl8192_tx_cmd(struct net_device *dev, struct sk_buff *skb);
1023short rtl8192_tx(struct net_device *dev, struct sk_buff* skb);
1024
1025u8 read_nic_io_byte(struct net_device *dev, int x);
1026u32 read_nic_io_dword(struct net_device *dev, int x);
1027u16 read_nic_io_word(struct net_device *dev, int x) ;
1028void write_nic_io_byte(struct net_device *dev, int x,u8 y);
1029void write_nic_io_word(struct net_device *dev, int x,u16 y);
1030void write_nic_io_dword(struct net_device *dev, int x,u32 y);
1031
1032u8 read_nic_byte(struct net_device *dev, int x);
1033u32 read_nic_dword(struct net_device *dev, int x);
1034u16 read_nic_word(struct net_device *dev, int x) ;
1035void write_nic_byte(struct net_device *dev, int x,u8 y);
1036void write_nic_word(struct net_device *dev, int x,u16 y);
1037void write_nic_dword(struct net_device *dev, int x,u32 y);
1038
1039void force_pci_posting(struct net_device *dev);
1040
1041void rtl8192_rx_enable(struct net_device *);
1042void rtl8192_tx_enable(struct net_device *);
1043
1044int rtl8192_hard_start_xmit(struct sk_buff *skb,struct net_device *dev);
1045void rtl8192_hard_data_xmit(struct sk_buff *skb, struct net_device *dev, int rate);
1046void rtl8192_data_hard_stop(struct net_device *dev);
1047void rtl8192_data_hard_resume(struct net_device *dev);
1048void rtl8192_restart(void *data);
1049void rtl819x_watchdog_wqcallback(void *data);
1050void rtl8192_hw_sleep_wq (void *data);
1051void watch_dog_timer_callback(unsigned long data);
1052void rtl8192_irq_rx_tasklet(struct r8192_priv *priv);
1053void rtl8192_irq_tx_tasklet(struct r8192_priv *priv);
1054int rtl8192_down(struct net_device *dev,bool shutdownrf);
1055int rtl8192_up(struct net_device *dev);
1056void rtl8192_commit(struct net_device *dev);
1057void rtl8192_set_chan(struct net_device *dev,short ch);
1058
1059void check_rfctrl_gpio_timer(unsigned long data);
1060
1061void rtl8192_hw_wakeup_wq(void *data);
1062irqreturn_type rtl8192_interrupt(int irq, void *netdev, struct pt_regs *regs);
1063
1064short rtl8192_pci_initdescring(struct net_device *dev);
1065
e3e37629 1066void rtl8192_cancel_deferred_work(struct r8192_priv * priv);
94a79942
LF		 1067
1068int _rtl8192_up(struct net_device *dev,bool is_silent_reset);
1069
1070short rtl8192_is_tx_queue_empty(struct net_device *dev);
1071void rtl8192_irq_disable(struct net_device *dev);
1072
1073void rtl8192_tx_timeout(struct net_device *dev);
1074void rtl8192_pci_resetdescring(struct net_device *dev);
1075void rtl8192_SetWirelessMode(struct net_device* dev, u8 wireless_mode);
1076void rtl8192_irq_enable(struct net_device *dev);
1077void rtl8192_config_rate(struct net_device* dev, u16* rate_config);
1078void rtl8192_update_cap(struct net_device* dev, u16 cap);
1079void rtl8192_irq_disable(struct net_device *dev);
1080
1081void rtl819x_UpdateRxPktTimeStamp (struct net_device *dev, struct rtllib_rx_stats *stats);
1082long rtl819x_translate_todbm(struct r8192_priv * priv, u8 signal_strength_index );
1083void rtl819x_update_rxsignalstatistics8190pci(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1084u8 rtl819x_evm_dbtopercentage(char value);
1085void rtl819x_process_cck_rxpathsel(struct r8192_priv * priv,struct rtllib_rx_stats * pprevious_stats);
1086u8 rtl819x_query_rxpwrpercentage( char antpower );
1087void rtl8192_record_rxdesc_forlateruse(struct rtllib_rx_stats * psrc_stats,struct rtllib_rx_stats * ptarget_stats);
1088
1089bool NicIFEnableNIC(struct net_device* dev);
1090bool NicIFDisableNIC(struct net_device* dev);
1091
1092bool
1093MgntActSet_RF_State(
1094 struct net_device* dev,
1095 RT_RF_POWER_STATE StateToSet,
1096 RT_RF_CHANGE_SOURCE ChangeSource,
1097 bool ProtectOrNot
1098 );
1099void
1100ActUpdateChannelAccessSetting(
1101 struct net_device* dev,
1102 WIRELESS_MODE WirelessMode,
e91dbf03 1103 struct channel_access_setting *ChnlAccessSetting
94a79942
LF		 1104 );
1105
94a79942 1106#endif
Linux 6.x block layer and io_uring tree(s)