staging/rdma/hfi1: Split last 8 bytes of copy to user buffer
[linux-2.6-block.git] / drivers / staging / rdma / hfi1 / driver.c
CommitLineData
77241056
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1/*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2015 Intel Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
21 * Copyright(c) 2015 Intel Corporation.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50
51#include <linux/spinlock.h>
52#include <linux/pci.h>
53#include <linux/io.h>
54#include <linux/delay.h>
55#include <linux/netdevice.h>
56#include <linux/vmalloc.h>
57#include <linux/module.h>
58#include <linux/prefetch.h>
8859b4a6 59#include <rdma/ib_verbs.h>
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60
61#include "hfi.h"
62#include "trace.h"
63#include "qp.h"
64#include "sdma.h"
65
66#undef pr_fmt
67#define pr_fmt(fmt) DRIVER_NAME ": " fmt
68
69/*
70 * The size has to be longer than this string, so we can append
71 * board/chip information to it in the initialization code.
72 */
73const char ib_hfi1_version[] = HFI1_DRIVER_VERSION "\n";
74
75DEFINE_SPINLOCK(hfi1_devs_lock);
76LIST_HEAD(hfi1_dev_list);
77DEFINE_MUTEX(hfi1_mutex); /* general driver use */
78
79unsigned int hfi1_max_mtu = HFI1_DEFAULT_MAX_MTU;
80module_param_named(max_mtu, hfi1_max_mtu, uint, S_IRUGO);
81MODULE_PARM_DESC(max_mtu, "Set max MTU bytes, default is 8192");
82
83unsigned int hfi1_cu = 1;
84module_param_named(cu, hfi1_cu, uint, S_IRUGO);
85MODULE_PARM_DESC(cu, "Credit return units");
86
87unsigned long hfi1_cap_mask = HFI1_CAP_MASK_DEFAULT;
88static int hfi1_caps_set(const char *, const struct kernel_param *);
89static int hfi1_caps_get(char *, const struct kernel_param *);
90static const struct kernel_param_ops cap_ops = {
91 .set = hfi1_caps_set,
92 .get = hfi1_caps_get
93};
94module_param_cb(cap_mask, &cap_ops, &hfi1_cap_mask, S_IWUSR | S_IRUGO);
95MODULE_PARM_DESC(cap_mask, "Bit mask of enabled/disabled HW features");
96
97MODULE_LICENSE("Dual BSD/GPL");
98MODULE_DESCRIPTION("Intel Omni-Path Architecture driver");
99MODULE_VERSION(HFI1_DRIVER_VERSION);
100
101/*
102 * MAX_PKT_RCV is the max # if packets processed per receive interrupt.
103 */
104#define MAX_PKT_RECV 64
105#define EGR_HEAD_UPDATE_THRESHOLD 16
106
107struct hfi1_ib_stats hfi1_stats;
108
109static int hfi1_caps_set(const char *val, const struct kernel_param *kp)
110{
111 int ret = 0;
112 unsigned long *cap_mask_ptr = (unsigned long *)kp->arg,
113 cap_mask = *cap_mask_ptr, value, diff,
114 write_mask = ((HFI1_CAP_WRITABLE_MASK << HFI1_CAP_USER_SHIFT) |
115 HFI1_CAP_WRITABLE_MASK);
116
117 ret = kstrtoul(val, 0, &value);
118 if (ret) {
119 pr_warn("Invalid module parameter value for 'cap_mask'\n");
120 goto done;
121 }
122 /* Get the changed bits (except the locked bit) */
123 diff = value ^ (cap_mask & ~HFI1_CAP_LOCKED_SMASK);
124
125 /* Remove any bits that are not allowed to change after driver load */
126 if (HFI1_CAP_LOCKED() && (diff & ~write_mask)) {
127 pr_warn("Ignoring non-writable capability bits %#lx\n",
128 diff & ~write_mask);
129 diff &= write_mask;
130 }
131
132 /* Mask off any reserved bits */
133 diff &= ~HFI1_CAP_RESERVED_MASK;
134 /* Clear any previously set and changing bits */
135 cap_mask &= ~diff;
136 /* Update the bits with the new capability */
137 cap_mask |= (value & diff);
138 /* Check for any kernel/user restrictions */
139 diff = (cap_mask & (HFI1_CAP_MUST_HAVE_KERN << HFI1_CAP_USER_SHIFT)) ^
140 ((cap_mask & HFI1_CAP_MUST_HAVE_KERN) << HFI1_CAP_USER_SHIFT);
141 cap_mask &= ~diff;
142 /* Set the bitmask to the final set */
143 *cap_mask_ptr = cap_mask;
144done:
145 return ret;
146}
147
148static int hfi1_caps_get(char *buffer, const struct kernel_param *kp)
149{
150 unsigned long cap_mask = *(unsigned long *)kp->arg;
151
152 cap_mask &= ~HFI1_CAP_LOCKED_SMASK;
153 cap_mask |= ((cap_mask & HFI1_CAP_K2U) << HFI1_CAP_USER_SHIFT);
154
155 return scnprintf(buffer, PAGE_SIZE, "0x%lx", cap_mask);
156}
157
158const char *get_unit_name(int unit)
159{
160 static char iname[16];
161
9805071e 162 snprintf(iname, sizeof(iname), DRIVER_NAME "_%u", unit);
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163 return iname;
164}
165
49dbb6cf
DD
166const char *get_card_name(struct rvt_dev_info *rdi)
167{
168 struct hfi1_ibdev *ibdev = container_of(rdi, struct hfi1_ibdev, rdi);
169 struct hfi1_devdata *dd = container_of(ibdev,
170 struct hfi1_devdata, verbs_dev);
171 return get_unit_name(dd->unit);
172}
173
174struct pci_dev *get_pci_dev(struct rvt_dev_info *rdi)
175{
176 struct hfi1_ibdev *ibdev = container_of(rdi, struct hfi1_ibdev, rdi);
177 struct hfi1_devdata *dd = container_of(ibdev,
178 struct hfi1_devdata, verbs_dev);
179 return dd->pcidev;
180}
181
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182/*
183 * Return count of units with at least one port ACTIVE.
184 */
185int hfi1_count_active_units(void)
186{
187 struct hfi1_devdata *dd;
188 struct hfi1_pportdata *ppd;
189 unsigned long flags;
190 int pidx, nunits_active = 0;
191
192 spin_lock_irqsave(&hfi1_devs_lock, flags);
193 list_for_each_entry(dd, &hfi1_dev_list, list) {
194 if (!(dd->flags & HFI1_PRESENT) || !dd->kregbase)
195 continue;
196 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
197 ppd = dd->pport + pidx;
198 if (ppd->lid && ppd->linkup) {
199 nunits_active++;
200 break;
201 }
202 }
203 }
204 spin_unlock_irqrestore(&hfi1_devs_lock, flags);
205 return nunits_active;
206}
207
208/*
209 * Return count of all units, optionally return in arguments
210 * the number of usable (present) units, and the number of
211 * ports that are up.
212 */
213int hfi1_count_units(int *npresentp, int *nupp)
214{
215 int nunits = 0, npresent = 0, nup = 0;
216 struct hfi1_devdata *dd;
217 unsigned long flags;
218 int pidx;
219 struct hfi1_pportdata *ppd;
220
221 spin_lock_irqsave(&hfi1_devs_lock, flags);
222
223 list_for_each_entry(dd, &hfi1_dev_list, list) {
224 nunits++;
225 if ((dd->flags & HFI1_PRESENT) && dd->kregbase)
226 npresent++;
227 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
228 ppd = dd->pport + pidx;
229 if (ppd->lid && ppd->linkup)
230 nup++;
231 }
232 }
233
234 spin_unlock_irqrestore(&hfi1_devs_lock, flags);
235
236 if (npresentp)
237 *npresentp = npresent;
238 if (nupp)
239 *nupp = nup;
240
241 return nunits;
242}
243
244/*
245 * Get address of eager buffer from it's index (allocated in chunks, not
246 * contiguous).
247 */
248static inline void *get_egrbuf(const struct hfi1_ctxtdata *rcd, u64 rhf,
249 u8 *update)
250{
251 u32 idx = rhf_egr_index(rhf), offset = rhf_egr_buf_offset(rhf);
252
253 *update |= !(idx & (rcd->egrbufs.threshold - 1)) && !offset;
254 return (void *)(((u64)(rcd->egrbufs.rcvtids[idx].addr)) +
255 (offset * RCV_BUF_BLOCK_SIZE));
256}
257
258/*
259 * Validate and encode the a given RcvArray Buffer size.
260 * The function will check whether the given size falls within
261 * allowed size ranges for the respective type and, optionally,
262 * return the proper encoding.
263 */
264inline int hfi1_rcvbuf_validate(u32 size, u8 type, u16 *encoded)
265{
266 if (unlikely(!IS_ALIGNED(size, PAGE_SIZE)))
267 return 0;
268 if (unlikely(size < MIN_EAGER_BUFFER))
269 return 0;
270 if (size >
271 (type == PT_EAGER ? MAX_EAGER_BUFFER : MAX_EXPECTED_BUFFER))
272 return 0;
273 if (encoded)
274 *encoded = ilog2(size / PAGE_SIZE) + 1;
275 return 1;
276}
277
278static void rcv_hdrerr(struct hfi1_ctxtdata *rcd, struct hfi1_pportdata *ppd,
279 struct hfi1_packet *packet)
280{
281 struct hfi1_message_header *rhdr = packet->hdr;
282 u32 rte = rhf_rcv_type_err(packet->rhf);
283 int lnh = be16_to_cpu(rhdr->lrh[0]) & 3;
284 struct hfi1_ibport *ibp = &ppd->ibport_data;
ec4274f1
DD
285 struct hfi1_devdata *dd = ppd->dd;
286 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
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287
288 if (packet->rhf & (RHF_VCRC_ERR | RHF_ICRC_ERR))
289 return;
290
291 if (packet->rhf & RHF_TID_ERR) {
292 /* For TIDERR and RC QPs preemptively schedule a NAK */
293 struct hfi1_ib_header *hdr = (struct hfi1_ib_header *)rhdr;
294 struct hfi1_other_headers *ohdr = NULL;
295 u32 tlen = rhf_pkt_len(packet->rhf); /* in bytes */
296 u16 lid = be16_to_cpu(hdr->lrh[1]);
297 u32 qp_num;
298 u32 rcv_flags = 0;
299
300 /* Sanity check packet */
301 if (tlen < 24)
302 goto drop;
303
304 /* Check for GRH */
305 if (lnh == HFI1_LRH_BTH)
306 ohdr = &hdr->u.oth;
307 else if (lnh == HFI1_LRH_GRH) {
308 u32 vtf;
309
310 ohdr = &hdr->u.l.oth;
311 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
312 goto drop;
313 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
314 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
315 goto drop;
316 rcv_flags |= HFI1_HAS_GRH;
317 } else
318 goto drop;
319
320 /* Get the destination QP number. */
ec4274f1 321 qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
8859b4a6 322 if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) {
895420dd 323 struct rvt_qp *qp;
b77d713a 324 unsigned long flags;
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325
326 rcu_read_lock();
ec4274f1 327 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
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328 if (!qp) {
329 rcu_read_unlock();
330 goto drop;
331 }
332
333 /*
334 * Handle only RC QPs - for other QP types drop error
335 * packet.
336 */
b77d713a 337 spin_lock_irqsave(&qp->r_lock, flags);
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338
339 /* Check for valid receive state. */
83693bd1
DD
340 if (!(ib_rvt_state_ops[qp->state] &
341 RVT_PROCESS_RECV_OK)) {
4eb06882 342 ibp->rvp.n_pkt_drops++;
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MM
343 }
344
345 switch (qp->ibqp.qp_type) {
346 case IB_QPT_RC:
347 hfi1_rc_hdrerr(
348 rcd,
349 hdr,
350 rcv_flags,
351 qp);
352 break;
353 default:
354 /* For now don't handle any other QP types */
355 break;
356 }
357
b77d713a 358 spin_unlock_irqrestore(&qp->r_lock, flags);
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MM
359 rcu_read_unlock();
360 } /* Unicast QP */
361 } /* Valid packet with TIDErr */
362
363 /* handle "RcvTypeErr" flags */
364 switch (rte) {
365 case RHF_RTE_ERROR_OP_CODE_ERR:
366 {
367 u32 opcode;
368 void *ebuf = NULL;
369 __be32 *bth = NULL;
370
371 if (rhf_use_egr_bfr(packet->rhf))
372 ebuf = packet->ebuf;
373
374 if (ebuf == NULL)
375 goto drop; /* this should never happen */
376
377 if (lnh == HFI1_LRH_BTH)
378 bth = (__be32 *)ebuf;
379 else if (lnh == HFI1_LRH_GRH)
380 bth = (__be32 *)((char *)ebuf + sizeof(struct ib_grh));
381 else
382 goto drop;
383
384 opcode = be32_to_cpu(bth[0]) >> 24;
385 opcode &= 0xff;
386
387 if (opcode == IB_OPCODE_CNP) {
388 /*
389 * Only in pre-B0 h/w is the CNP_OPCODE handled
624be1db 390 * via this code path.
77241056 391 */
895420dd 392 struct rvt_qp *qp = NULL;
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MM
393 u32 lqpn, rqpn;
394 u16 rlid;
395 u8 svc_type, sl, sc5;
396
397 sc5 = (be16_to_cpu(rhdr->lrh[0]) >> 12) & 0xf;
398 if (rhf_dc_info(packet->rhf))
399 sc5 |= 0x10;
400 sl = ibp->sc_to_sl[sc5];
401
ec4274f1 402 lqpn = be32_to_cpu(bth[1]) & RVT_QPN_MASK;
77241056 403 rcu_read_lock();
ec4274f1 404 qp = rvt_lookup_qpn(rdi, &ibp->rvp, lqpn);
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MM
405 if (qp == NULL) {
406 rcu_read_unlock();
407 goto drop;
408 }
409
410 switch (qp->ibqp.qp_type) {
411 case IB_QPT_UD:
412 rlid = 0;
413 rqpn = 0;
414 svc_type = IB_CC_SVCTYPE_UD;
415 break;
416 case IB_QPT_UC:
417 rlid = be16_to_cpu(rhdr->lrh[3]);
418 rqpn = qp->remote_qpn;
419 svc_type = IB_CC_SVCTYPE_UC;
420 break;
421 default:
422 goto drop;
423 }
424
425 process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
426 rcu_read_unlock();
427 }
428
429 packet->rhf &= ~RHF_RCV_TYPE_ERR_SMASK;
430 break;
431 }
432 default:
433 break;
434 }
435
436drop:
437 return;
438}
439
440static inline void init_packet(struct hfi1_ctxtdata *rcd,
441 struct hfi1_packet *packet)
442{
443
444 packet->rsize = rcd->rcvhdrqentsize; /* words */
445 packet->maxcnt = rcd->rcvhdrq_cnt * packet->rsize; /* words */
446 packet->rcd = rcd;
447 packet->updegr = 0;
448 packet->etail = -1;
f4f30031 449 packet->rhf_addr = get_rhf_addr(rcd);
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MM
450 packet->rhf = rhf_to_cpu(packet->rhf_addr);
451 packet->rhqoff = rcd->head;
452 packet->numpkt = 0;
453 packet->rcv_flags = 0;
454}
455
895420dd 456static void process_ecn(struct rvt_qp *qp, struct hfi1_ib_header *hdr,
77241056 457 struct hfi1_other_headers *ohdr,
977940b8 458 u64 rhf, u32 bth1, struct ib_grh *grh)
77241056
MM
459{
460 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
977940b8
AK
461 u32 rqpn = 0;
462 u16 rlid;
77241056 463 u8 sc5, svc_type;
77241056
MM
464
465 switch (qp->ibqp.qp_type) {
977940b8
AK
466 case IB_QPT_SMI:
467 case IB_QPT_GSI:
77241056 468 case IB_QPT_UD:
977940b8 469 rlid = be16_to_cpu(hdr->lrh[3]);
ec4274f1 470 rqpn = be32_to_cpu(ohdr->u.ud.deth[1]) & RVT_QPN_MASK;
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MM
471 svc_type = IB_CC_SVCTYPE_UD;
472 break;
977940b8
AK
473 case IB_QPT_UC:
474 rlid = qp->remote_ah_attr.dlid;
475 rqpn = qp->remote_qpn;
476 svc_type = IB_CC_SVCTYPE_UC;
477 break;
478 case IB_QPT_RC:
479 rlid = qp->remote_ah_attr.dlid;
480 rqpn = qp->remote_qpn;
481 svc_type = IB_CC_SVCTYPE_RC;
482 break;
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MM
483 default:
484 return;
485 }
486
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MM
487 sc5 = (be16_to_cpu(hdr->lrh[0]) >> 12) & 0xf;
488 if (rhf_dc_info(rhf))
489 sc5 |= 0x10;
490
977940b8 491 if (bth1 & HFI1_FECN_SMASK) {
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MM
492 u16 pkey = (u16)be32_to_cpu(ohdr->bth[0]);
493 u16 dlid = be16_to_cpu(hdr->lrh[1]);
77241056 494
977940b8 495 return_cnp(ibp, qp, rqpn, pkey, dlid, rlid, sc5, grh);
77241056
MM
496 }
497
977940b8 498 if (bth1 & HFI1_BECN_SMASK) {
77241056 499 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
ec4274f1 500 u32 lqpn = bth1 & RVT_QPN_MASK;
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MM
501 u8 sl = ibp->sc_to_sl[sc5];
502
977940b8 503 process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
77241056 504 }
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MM
505}
506
507struct ps_mdata {
508 struct hfi1_ctxtdata *rcd;
509 u32 rsize;
510 u32 maxcnt;
511 u32 ps_head;
512 u32 ps_tail;
513 u32 ps_seq;
514};
515
516static inline void init_ps_mdata(struct ps_mdata *mdata,
517 struct hfi1_packet *packet)
518{
519 struct hfi1_ctxtdata *rcd = packet->rcd;
520
521 mdata->rcd = rcd;
522 mdata->rsize = packet->rsize;
523 mdata->maxcnt = packet->maxcnt;
3e7ccca0 524 mdata->ps_head = packet->rhqoff;
77241056 525
82c2611d 526 if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
3e7ccca0 527 mdata->ps_tail = get_rcvhdrtail(rcd);
82c2611d
NV
528 if (rcd->ctxt == HFI1_CTRL_CTXT)
529 mdata->ps_seq = rcd->seq_cnt;
530 else
531 mdata->ps_seq = 0; /* not used with DMA_RTAIL */
77241056
MM
532 } else {
533 mdata->ps_tail = 0; /* used only with DMA_RTAIL*/
534 mdata->ps_seq = rcd->seq_cnt;
535 }
536}
537
82c2611d
NV
538static inline int ps_done(struct ps_mdata *mdata, u64 rhf,
539 struct hfi1_ctxtdata *rcd)
77241056 540{
82c2611d 541 if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL))
77241056
MM
542 return mdata->ps_head == mdata->ps_tail;
543 return mdata->ps_seq != rhf_rcv_seq(rhf);
544}
545
82c2611d
NV
546static inline int ps_skip(struct ps_mdata *mdata, u64 rhf,
547 struct hfi1_ctxtdata *rcd)
548{
549 /*
550 * Control context can potentially receive an invalid rhf.
551 * Drop such packets.
552 */
553 if ((rcd->ctxt == HFI1_CTRL_CTXT) && (mdata->ps_head != mdata->ps_tail))
554 return mdata->ps_seq != rhf_rcv_seq(rhf);
555
556 return 0;
557}
558
559static inline void update_ps_mdata(struct ps_mdata *mdata,
560 struct hfi1_ctxtdata *rcd)
77241056 561{
77241056 562 mdata->ps_head += mdata->rsize;
3e7ccca0 563 if (mdata->ps_head >= mdata->maxcnt)
77241056 564 mdata->ps_head = 0;
82c2611d
NV
565
566 /* Control context must do seq counting */
567 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL) ||
568 (rcd->ctxt == HFI1_CTRL_CTXT)) {
77241056
MM
569 if (++mdata->ps_seq > 13)
570 mdata->ps_seq = 1;
571 }
572}
573
574/*
575 * prescan_rxq - search through the receive queue looking for packets
576 * containing Excplicit Congestion Notifications (FECNs, or BECNs).
577 * When an ECN is found, process the Congestion Notification, and toggle
578 * it off.
6c9e50f8
VM
579 * This is declared as a macro to allow quick checking of the port to avoid
580 * the overhead of a function call if not enabled.
77241056 581 */
6c9e50f8
VM
582#define prescan_rxq(rcd, packet) \
583 do { \
584 if (rcd->ppd->cc_prescan) \
585 __prescan_rxq(packet); \
586 } while (0)
587static void __prescan_rxq(struct hfi1_packet *packet)
77241056
MM
588{
589 struct hfi1_ctxtdata *rcd = packet->rcd;
590 struct ps_mdata mdata;
591
77241056
MM
592 init_ps_mdata(&mdata, packet);
593
594 while (1) {
595 struct hfi1_devdata *dd = rcd->dd;
596 struct hfi1_ibport *ibp = &rcd->ppd->ibport_data;
597 __le32 *rhf_addr = (__le32 *) rcd->rcvhdrq + mdata.ps_head +
598 dd->rhf_offset;
895420dd 599 struct rvt_qp *qp;
77241056
MM
600 struct hfi1_ib_header *hdr;
601 struct hfi1_other_headers *ohdr;
602 struct ib_grh *grh = NULL;
ec4274f1 603 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
77241056 604 u64 rhf = rhf_to_cpu(rhf_addr);
977940b8 605 u32 etype = rhf_rcv_type(rhf), qpn, bth1;
77241056
MM
606 int is_ecn = 0;
607 u8 lnh;
608
82c2611d 609 if (ps_done(&mdata, rhf, rcd))
77241056
MM
610 break;
611
82c2611d
NV
612 if (ps_skip(&mdata, rhf, rcd))
613 goto next;
614
77241056
MM
615 if (etype != RHF_RCV_TYPE_IB)
616 goto next;
617
618 hdr = (struct hfi1_ib_header *)
619 hfi1_get_msgheader(dd, rhf_addr);
620 lnh = be16_to_cpu(hdr->lrh[0]) & 3;
621
622 if (lnh == HFI1_LRH_BTH)
623 ohdr = &hdr->u.oth;
624 else if (lnh == HFI1_LRH_GRH) {
625 ohdr = &hdr->u.l.oth;
626 grh = &hdr->u.l.grh;
627 } else
628 goto next; /* just in case */
629
977940b8
AK
630 bth1 = be32_to_cpu(ohdr->bth[1]);
631 is_ecn = !!(bth1 & (HFI1_FECN_SMASK | HFI1_BECN_SMASK));
77241056
MM
632
633 if (!is_ecn)
634 goto next;
635
ec4274f1 636 qpn = bth1 & RVT_QPN_MASK;
77241056 637 rcu_read_lock();
ec4274f1 638 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qpn);
77241056
MM
639
640 if (qp == NULL) {
641 rcu_read_unlock();
642 goto next;
643 }
644
977940b8 645 process_ecn(qp, hdr, ohdr, rhf, bth1, grh);
77241056 646 rcu_read_unlock();
977940b8
AK
647
648 /* turn off BECN, FECN */
649 bth1 &= ~(HFI1_FECN_SMASK | HFI1_BECN_SMASK);
650 ohdr->bth[1] = cpu_to_be32(bth1);
77241056 651next:
82c2611d 652 update_ps_mdata(&mdata, rcd);
77241056
MM
653 }
654}
82c2611d
NV
655
656static inline int skip_rcv_packet(struct hfi1_packet *packet, int thread)
657{
658 int ret = RCV_PKT_OK;
659
660 /* Set up for the next packet */
661 packet->rhqoff += packet->rsize;
662 if (packet->rhqoff >= packet->maxcnt)
663 packet->rhqoff = 0;
664
665 packet->numpkt++;
666 if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) {
667 if (thread) {
668 cond_resched();
669 } else {
670 ret = RCV_PKT_LIMIT;
671 this_cpu_inc(*packet->rcd->dd->rcv_limit);
672 }
673 }
674
675 packet->rhf_addr = (__le32 *)packet->rcd->rcvhdrq + packet->rhqoff +
676 packet->rcd->dd->rhf_offset;
677 packet->rhf = rhf_to_cpu(packet->rhf_addr);
678
679 return ret;
680}
77241056 681
f4f30031 682static inline int process_rcv_packet(struct hfi1_packet *packet, int thread)
77241056
MM
683{
684 int ret = RCV_PKT_OK;
685
686 packet->hdr = hfi1_get_msgheader(packet->rcd->dd,
687 packet->rhf_addr);
688 packet->hlen = (u8 *)packet->rhf_addr - (u8 *)packet->hdr;
689 packet->etype = rhf_rcv_type(packet->rhf);
690 /* total length */
691 packet->tlen = rhf_pkt_len(packet->rhf); /* in bytes */
692 /* retrieve eager buffer details */
693 packet->ebuf = NULL;
694 if (rhf_use_egr_bfr(packet->rhf)) {
695 packet->etail = rhf_egr_index(packet->rhf);
696 packet->ebuf = get_egrbuf(packet->rcd, packet->rhf,
697 &packet->updegr);
698 /*
699 * Prefetch the contents of the eager buffer. It is
700 * OK to send a negative length to prefetch_range().
701 * The +2 is the size of the RHF.
702 */
703 prefetch_range(packet->ebuf,
704 packet->tlen - ((packet->rcd->rcvhdrqentsize -
705 (rhf_hdrq_offset(packet->rhf)+2)) * 4));
706 }
707
708 /*
709 * Call a type specific handler for the packet. We
710 * should be able to trust that etype won't be beyond
711 * the range of valid indexes. If so something is really
712 * wrong and we can probably just let things come
713 * crashing down. There is no need to eat another
714 * comparison in this performance critical code.
715 */
716 packet->rcd->dd->rhf_rcv_function_map[packet->etype](packet);
717 packet->numpkt++;
718
719 /* Set up for the next packet */
720 packet->rhqoff += packet->rsize;
721 if (packet->rhqoff >= packet->maxcnt)
722 packet->rhqoff = 0;
723
f4f30031
DL
724 if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) {
725 if (thread) {
726 cond_resched();
727 } else {
728 ret = RCV_PKT_LIMIT;
729 this_cpu_inc(*packet->rcd->dd->rcv_limit);
730 }
77241056
MM
731 }
732
733 packet->rhf_addr = (__le32 *) packet->rcd->rcvhdrq + packet->rhqoff +
734 packet->rcd->dd->rhf_offset;
735 packet->rhf = rhf_to_cpu(packet->rhf_addr);
736
737 return ret;
738}
739
740static inline void process_rcv_update(int last, struct hfi1_packet *packet)
741{
742 /*
743 * Update head regs etc., every 16 packets, if not last pkt,
744 * to help prevent rcvhdrq overflows, when many packets
745 * are processed and queue is nearly full.
746 * Don't request an interrupt for intermediate updates.
747 */
748 if (!last && !(packet->numpkt & 0xf)) {
749 update_usrhead(packet->rcd, packet->rhqoff, packet->updegr,
750 packet->etail, 0, 0);
751 packet->updegr = 0;
752 }
753 packet->rcv_flags = 0;
754}
755
756static inline void finish_packet(struct hfi1_packet *packet)
757{
758
759 /*
760 * Nothing we need to free for the packet.
761 *
762 * The only thing we need to do is a final update and call for an
763 * interrupt
764 */
765 update_usrhead(packet->rcd, packet->rcd->head, packet->updegr,
766 packet->etail, rcv_intr_dynamic, packet->numpkt);
767
768}
769
770static inline void process_rcv_qp_work(struct hfi1_packet *packet)
771{
772
773 struct hfi1_ctxtdata *rcd;
895420dd 774 struct rvt_qp *qp, *nqp;
77241056
MM
775
776 rcd = packet->rcd;
777 rcd->head = packet->rhqoff;
778
779 /*
780 * Iterate over all QPs waiting to respond.
781 * The list won't change since the IRQ is only run on one CPU.
782 */
783 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
784 list_del_init(&qp->rspwait);
54d10c1e
DD
785 if (qp->r_flags & RVT_R_RSP_NAK) {
786 qp->r_flags &= ~RVT_R_RSP_NAK;
77241056
MM
787 hfi1_send_rc_ack(rcd, qp, 0);
788 }
54d10c1e 789 if (qp->r_flags & RVT_R_RSP_SEND) {
77241056
MM
790 unsigned long flags;
791
54d10c1e 792 qp->r_flags &= ~RVT_R_RSP_SEND;
77241056 793 spin_lock_irqsave(&qp->s_lock, flags);
83693bd1
DD
794 if (ib_rvt_state_ops[qp->state] &
795 RVT_PROCESS_OR_FLUSH_SEND)
77241056
MM
796 hfi1_schedule_send(qp);
797 spin_unlock_irqrestore(&qp->s_lock, flags);
798 }
799 if (atomic_dec_and_test(&qp->refcount))
800 wake_up(&qp->wait);
801 }
802}
803
804/*
805 * Handle receive interrupts when using the no dma rtail option.
806 */
f4f30031 807int handle_receive_interrupt_nodma_rtail(struct hfi1_ctxtdata *rcd, int thread)
77241056
MM
808{
809 u32 seq;
f4f30031 810 int last = RCV_PKT_OK;
77241056
MM
811 struct hfi1_packet packet;
812
813 init_packet(rcd, &packet);
814 seq = rhf_rcv_seq(packet.rhf);
f4f30031
DL
815 if (seq != rcd->seq_cnt) {
816 last = RCV_PKT_DONE;
77241056 817 goto bail;
f4f30031 818 }
77241056 819
6c9e50f8 820 prescan_rxq(rcd, &packet);
77241056 821
f4f30031
DL
822 while (last == RCV_PKT_OK) {
823 last = process_rcv_packet(&packet, thread);
77241056
MM
824 seq = rhf_rcv_seq(packet.rhf);
825 if (++rcd->seq_cnt > 13)
826 rcd->seq_cnt = 1;
827 if (seq != rcd->seq_cnt)
f4f30031 828 last = RCV_PKT_DONE;
77241056
MM
829 process_rcv_update(last, &packet);
830 }
831 process_rcv_qp_work(&packet);
832bail:
833 finish_packet(&packet);
f4f30031 834 return last;
77241056
MM
835}
836
f4f30031 837int handle_receive_interrupt_dma_rtail(struct hfi1_ctxtdata *rcd, int thread)
77241056
MM
838{
839 u32 hdrqtail;
f4f30031 840 int last = RCV_PKT_OK;
77241056
MM
841 struct hfi1_packet packet;
842
843 init_packet(rcd, &packet);
844 hdrqtail = get_rcvhdrtail(rcd);
f4f30031
DL
845 if (packet.rhqoff == hdrqtail) {
846 last = RCV_PKT_DONE;
77241056 847 goto bail;
f4f30031 848 }
77241056
MM
849 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
850
6c9e50f8 851 prescan_rxq(rcd, &packet);
77241056 852
f4f30031
DL
853 while (last == RCV_PKT_OK) {
854 last = process_rcv_packet(&packet, thread);
77241056 855 if (packet.rhqoff == hdrqtail)
f4f30031 856 last = RCV_PKT_DONE;
77241056
MM
857 process_rcv_update(last, &packet);
858 }
859 process_rcv_qp_work(&packet);
860bail:
861 finish_packet(&packet);
f4f30031 862 return last;
77241056
MM
863}
864
865static inline void set_all_nodma_rtail(struct hfi1_devdata *dd)
866{
867 int i;
868
82c2611d 869 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
77241056
MM
870 dd->rcd[i]->do_interrupt =
871 &handle_receive_interrupt_nodma_rtail;
872}
873
874static inline void set_all_dma_rtail(struct hfi1_devdata *dd)
875{
876 int i;
877
82c2611d 878 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
77241056
MM
879 dd->rcd[i]->do_interrupt =
880 &handle_receive_interrupt_dma_rtail;
881}
882
fb9036dd
JS
883void set_all_slowpath(struct hfi1_devdata *dd)
884{
885 int i;
886
887 /* HFI1_CTRL_CTXT must always use the slow path interrupt handler */
888 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
889 dd->rcd[i]->do_interrupt = &handle_receive_interrupt;
890}
891
892static inline int set_armed_to_active(struct hfi1_ctxtdata *rcd,
893 struct hfi1_packet packet,
894 struct hfi1_devdata *dd)
895{
896 struct work_struct *lsaw = &rcd->ppd->linkstate_active_work;
897 struct hfi1_message_header *hdr = hfi1_get_msgheader(packet.rcd->dd,
898 packet.rhf_addr);
899
900 if (hdr2sc(hdr, packet.rhf) != 0xf) {
901 int hwstate = read_logical_state(dd);
902
903 if (hwstate != LSTATE_ACTIVE) {
904 dd_dev_info(dd, "Unexpected link state %d\n", hwstate);
905 return 0;
906 }
907
908 queue_work(rcd->ppd->hfi1_wq, lsaw);
909 return 1;
910 }
911 return 0;
912}
913
77241056
MM
914/*
915 * handle_receive_interrupt - receive a packet
916 * @rcd: the context
917 *
918 * Called from interrupt handler for errors or receive interrupt.
919 * This is the slow path interrupt handler.
920 */
f4f30031 921int handle_receive_interrupt(struct hfi1_ctxtdata *rcd, int thread)
77241056 922{
77241056
MM
923 struct hfi1_devdata *dd = rcd->dd;
924 u32 hdrqtail;
82c2611d 925 int needset, last = RCV_PKT_OK;
77241056 926 struct hfi1_packet packet;
82c2611d
NV
927 int skip_pkt = 0;
928
929 /* Control context will always use the slow path interrupt handler */
930 needset = (rcd->ctxt == HFI1_CTRL_CTXT) ? 0 : 1;
77241056
MM
931
932 init_packet(rcd, &packet);
933
82c2611d 934 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
77241056
MM
935 u32 seq = rhf_rcv_seq(packet.rhf);
936
f4f30031
DL
937 if (seq != rcd->seq_cnt) {
938 last = RCV_PKT_DONE;
77241056 939 goto bail;
f4f30031 940 }
77241056
MM
941 hdrqtail = 0;
942 } else {
943 hdrqtail = get_rcvhdrtail(rcd);
f4f30031
DL
944 if (packet.rhqoff == hdrqtail) {
945 last = RCV_PKT_DONE;
77241056 946 goto bail;
f4f30031 947 }
77241056 948 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
82c2611d
NV
949
950 /*
951 * Control context can potentially receive an invalid
952 * rhf. Drop such packets.
953 */
954 if (rcd->ctxt == HFI1_CTRL_CTXT) {
955 u32 seq = rhf_rcv_seq(packet.rhf);
956
957 if (seq != rcd->seq_cnt)
958 skip_pkt = 1;
959 }
77241056
MM
960 }
961
6c9e50f8 962 prescan_rxq(rcd, &packet);
77241056 963
f4f30031 964 while (last == RCV_PKT_OK) {
77241056
MM
965
966 if (unlikely(dd->do_drop && atomic_xchg(&dd->drop_packet,
967 DROP_PACKET_OFF) == DROP_PACKET_ON)) {
968 dd->do_drop = 0;
969
970 /* On to the next packet */
971 packet.rhqoff += packet.rsize;
972 packet.rhf_addr = (__le32 *) rcd->rcvhdrq +
973 packet.rhqoff +
974 dd->rhf_offset;
975 packet.rhf = rhf_to_cpu(packet.rhf_addr);
976
82c2611d
NV
977 } else if (skip_pkt) {
978 last = skip_rcv_packet(&packet, thread);
979 skip_pkt = 0;
77241056 980 } else {
fb9036dd
JS
981 /* Auto activate link on non-SC15 packet receive */
982 if (unlikely(rcd->ppd->host_link_state ==
983 HLS_UP_ARMED) &&
984 set_armed_to_active(rcd, packet, dd))
985 goto bail;
f4f30031 986 last = process_rcv_packet(&packet, thread);
77241056
MM
987 }
988
82c2611d 989 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
77241056
MM
990 u32 seq = rhf_rcv_seq(packet.rhf);
991
992 if (++rcd->seq_cnt > 13)
993 rcd->seq_cnt = 1;
994 if (seq != rcd->seq_cnt)
f4f30031 995 last = RCV_PKT_DONE;
77241056
MM
996 if (needset) {
997 dd_dev_info(dd,
998 "Switching to NO_DMA_RTAIL\n");
999 set_all_nodma_rtail(dd);
1000 needset = 0;
1001 }
1002 } else {
1003 if (packet.rhqoff == hdrqtail)
f4f30031 1004 last = RCV_PKT_DONE;
82c2611d
NV
1005 /*
1006 * Control context can potentially receive an invalid
1007 * rhf. Drop such packets.
1008 */
1009 if (rcd->ctxt == HFI1_CTRL_CTXT) {
1010 u32 seq = rhf_rcv_seq(packet.rhf);
1011
1012 if (++rcd->seq_cnt > 13)
1013 rcd->seq_cnt = 1;
1014 if (!last && (seq != rcd->seq_cnt))
1015 skip_pkt = 1;
1016 }
1017
77241056
MM
1018 if (needset) {
1019 dd_dev_info(dd,
1020 "Switching to DMA_RTAIL\n");
1021 set_all_dma_rtail(dd);
1022 needset = 0;
1023 }
1024 }
1025
1026 process_rcv_update(last, &packet);
1027 }
1028
1029 process_rcv_qp_work(&packet);
1030
1031bail:
1032 /*
1033 * Always write head at end, and setup rcv interrupt, even
1034 * if no packets were processed.
1035 */
1036 finish_packet(&packet);
f4f30031 1037 return last;
77241056
MM
1038}
1039
fb9036dd
JS
1040/*
1041 * We may discover in the interrupt that the hardware link state has
1042 * changed from ARMED to ACTIVE (due to the arrival of a non-SC15 packet),
1043 * and we need to update the driver's notion of the link state. We cannot
1044 * run set_link_state from interrupt context, so we queue this function on
1045 * a workqueue.
1046 *
1047 * We delay the regular interrupt processing until after the state changes
1048 * so that the link will be in the correct state by the time any application
1049 * we wake up attempts to send a reply to any message it received.
1050 * (Subsequent receive interrupts may possibly force the wakeup before we
1051 * update the link state.)
1052 *
1053 * The rcd is freed in hfi1_free_ctxtdata after hfi1_postinit_cleanup invokes
1054 * dd->f_cleanup(dd) to disable the interrupt handler and flush workqueues,
1055 * so we're safe from use-after-free of the rcd.
1056 */
1057void receive_interrupt_work(struct work_struct *work)
1058{
1059 struct hfi1_pportdata *ppd = container_of(work, struct hfi1_pportdata,
1060 linkstate_active_work);
1061 struct hfi1_devdata *dd = ppd->dd;
1062 int i;
1063
1064 /* Received non-SC15 packet implies neighbor_normal */
1065 ppd->neighbor_normal = 1;
1066 set_link_state(ppd, HLS_UP_ACTIVE);
1067
1068 /*
1069 * Interrupt all kernel contexts that could have had an
1070 * interrupt during auto activation.
1071 */
1072 for (i = HFI1_CTRL_CTXT; i < dd->first_user_ctxt; i++)
1073 force_recv_intr(dd->rcd[i]);
1074}
1075
77241056
MM
1076/*
1077 * Convert a given MTU size to the on-wire MAD packet enumeration.
1078 * Return -1 if the size is invalid.
1079 */
1080int mtu_to_enum(u32 mtu, int default_if_bad)
1081{
1082 switch (mtu) {
1083 case 0: return OPA_MTU_0;
1084 case 256: return OPA_MTU_256;
1085 case 512: return OPA_MTU_512;
1086 case 1024: return OPA_MTU_1024;
1087 case 2048: return OPA_MTU_2048;
1088 case 4096: return OPA_MTU_4096;
1089 case 8192: return OPA_MTU_8192;
1090 case 10240: return OPA_MTU_10240;
1091 }
1092 return default_if_bad;
1093}
1094
1095u16 enum_to_mtu(int mtu)
1096{
1097 switch (mtu) {
1098 case OPA_MTU_0: return 0;
1099 case OPA_MTU_256: return 256;
1100 case OPA_MTU_512: return 512;
1101 case OPA_MTU_1024: return 1024;
1102 case OPA_MTU_2048: return 2048;
1103 case OPA_MTU_4096: return 4096;
1104 case OPA_MTU_8192: return 8192;
1105 case OPA_MTU_10240: return 10240;
1106 default: return 0xffff;
1107 }
1108}
1109
1110/*
1111 * set_mtu - set the MTU
1112 * @ppd: the per port data
1113 *
1114 * We can handle "any" incoming size, the issue here is whether we
1115 * need to restrict our outgoing size. We do not deal with what happens
1116 * to programs that are already running when the size changes.
1117 */
1118int set_mtu(struct hfi1_pportdata *ppd)
1119{
1120 struct hfi1_devdata *dd = ppd->dd;
1121 int i, drain, ret = 0, is_up = 0;
1122
1123 ppd->ibmtu = 0;
1124 for (i = 0; i < ppd->vls_supported; i++)
1125 if (ppd->ibmtu < dd->vld[i].mtu)
1126 ppd->ibmtu = dd->vld[i].mtu;
1127 ppd->ibmaxlen = ppd->ibmtu + lrh_max_header_bytes(ppd->dd);
1128
1129 mutex_lock(&ppd->hls_lock);
1130 if (ppd->host_link_state == HLS_UP_INIT
1131 || ppd->host_link_state == HLS_UP_ARMED
1132 || ppd->host_link_state == HLS_UP_ACTIVE)
1133 is_up = 1;
1134
1135 drain = !is_ax(dd) && is_up;
1136
1137 if (drain)
1138 /*
1139 * MTU is specified per-VL. To ensure that no packet gets
1140 * stuck (due, e.g., to the MTU for the packet's VL being
1141 * reduced), empty the per-VL FIFOs before adjusting MTU.
1142 */
1143 ret = stop_drain_data_vls(dd);
1144
1145 if (ret) {
1146 dd_dev_err(dd, "%s: cannot stop/drain VLs - refusing to change per-VL MTUs\n",
1147 __func__);
1148 goto err;
1149 }
1150
1151 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_MTU, 0);
1152
1153 if (drain)
1154 open_fill_data_vls(dd); /* reopen all VLs */
1155
1156err:
1157 mutex_unlock(&ppd->hls_lock);
1158
1159 return ret;
1160}
1161
1162int hfi1_set_lid(struct hfi1_pportdata *ppd, u32 lid, u8 lmc)
1163{
1164 struct hfi1_devdata *dd = ppd->dd;
1165
1166 ppd->lid = lid;
1167 ppd->lmc = lmc;
1168 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_LIDLMC, 0);
1169
1170 dd_dev_info(dd, "IB%u:%u got a lid: 0x%x\n", dd->unit, ppd->port, lid);
1171
1172 return 0;
1173}
1174
1175/*
1176 * Following deal with the "obviously simple" task of overriding the state
1177 * of the LEDs, which normally indicate link physical and logical status.
1178 * The complications arise in dealing with different hardware mappings
1179 * and the board-dependent routine being called from interrupts.
1180 * and then there's the requirement to _flash_ them.
1181 */
1182#define LED_OVER_FREQ_SHIFT 8
1183#define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
1184/* Below is "non-zero" to force override, but both actual LEDs are off */
1185#define LED_OVER_BOTH_OFF (8)
1186
1187static void run_led_override(unsigned long opaque)
1188{
1189 struct hfi1_pportdata *ppd = (struct hfi1_pportdata *)opaque;
1190 struct hfi1_devdata *dd = ppd->dd;
1191 int timeoff;
1192 int ph_idx;
1193
1194 if (!(dd->flags & HFI1_INITTED))
1195 return;
1196
1197 ph_idx = ppd->led_override_phase++ & 1;
1198 ppd->led_override = ppd->led_override_vals[ph_idx];
1199 timeoff = ppd->led_override_timeoff;
1200
1201 /*
1202 * don't re-fire the timer if user asked for it to be off; we let
1203 * it fire one more time after they turn it off to simplify
1204 */
1205 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
1206 mod_timer(&ppd->led_override_timer, jiffies + timeoff);
1207}
1208
1209void hfi1_set_led_override(struct hfi1_pportdata *ppd, unsigned int val)
1210{
1211 struct hfi1_devdata *dd = ppd->dd;
1212 int timeoff, freq;
1213
1214 if (!(dd->flags & HFI1_INITTED))
1215 return;
1216
1217 /* First check if we are blinking. If not, use 1HZ polling */
1218 timeoff = HZ;
1219 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
1220
1221 if (freq) {
1222 /* For blink, set each phase from one nybble of val */
1223 ppd->led_override_vals[0] = val & 0xF;
1224 ppd->led_override_vals[1] = (val >> 4) & 0xF;
1225 timeoff = (HZ << 4)/freq;
1226 } else {
1227 /* Non-blink set both phases the same. */
1228 ppd->led_override_vals[0] = val & 0xF;
1229 ppd->led_override_vals[1] = val & 0xF;
1230 }
1231 ppd->led_override_timeoff = timeoff;
1232
1233 /*
1234 * If the timer has not already been started, do so. Use a "quick"
1235 * timeout so the function will be called soon, to look at our request.
1236 */
1237 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
1238 /* Need to start timer */
a3faf606
MFW
1239 setup_timer(&ppd->led_override_timer, run_led_override,
1240 (unsigned long)ppd);
1241
77241056
MM
1242 ppd->led_override_timer.expires = jiffies + 1;
1243 add_timer(&ppd->led_override_timer);
1244 } else {
1245 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
1246 mod_timer(&ppd->led_override_timer, jiffies + 1);
1247 atomic_dec(&ppd->led_override_timer_active);
1248 }
1249}
1250
1251/**
1252 * hfi1_reset_device - reset the chip if possible
1253 * @unit: the device to reset
1254 *
1255 * Whether or not reset is successful, we attempt to re-initialize the chip
1256 * (that is, much like a driver unload/reload). We clear the INITTED flag
1257 * so that the various entry points will fail until we reinitialize. For
1258 * now, we only allow this if no user contexts are open that use chip resources
1259 */
1260int hfi1_reset_device(int unit)
1261{
1262 int ret, i;
1263 struct hfi1_devdata *dd = hfi1_lookup(unit);
1264 struct hfi1_pportdata *ppd;
1265 unsigned long flags;
1266 int pidx;
1267
1268 if (!dd) {
1269 ret = -ENODEV;
1270 goto bail;
1271 }
1272
1273 dd_dev_info(dd, "Reset on unit %u requested\n", unit);
1274
1275 if (!dd->kregbase || !(dd->flags & HFI1_PRESENT)) {
1276 dd_dev_info(dd,
1277 "Invalid unit number %u or not initialized or not present\n",
1278 unit);
1279 ret = -ENXIO;
1280 goto bail;
1281 }
1282
1283 spin_lock_irqsave(&dd->uctxt_lock, flags);
1284 if (dd->rcd)
1285 for (i = dd->first_user_ctxt; i < dd->num_rcv_contexts; i++) {
1286 if (!dd->rcd[i] || !dd->rcd[i]->cnt)
1287 continue;
1288 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1289 ret = -EBUSY;
1290 goto bail;
1291 }
1292 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1293
1294 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1295 ppd = dd->pport + pidx;
1296 if (atomic_read(&ppd->led_override_timer_active)) {
1297 /* Need to stop LED timer, _then_ shut off LEDs */
1298 del_timer_sync(&ppd->led_override_timer);
1299 atomic_set(&ppd->led_override_timer_active, 0);
1300 }
1301
1302 /* Shut off LEDs after we are sure timer is not running */
1303 ppd->led_override = LED_OVER_BOTH_OFF;
1304 }
1305 if (dd->flags & HFI1_HAS_SEND_DMA)
1306 sdma_exit(dd);
1307
1308 hfi1_reset_cpu_counters(dd);
1309
1310 ret = hfi1_init(dd, 1);
1311
1312 if (ret)
1313 dd_dev_err(dd,
1314 "Reinitialize unit %u after reset failed with %d\n",
1315 unit, ret);
1316 else
1317 dd_dev_info(dd, "Reinitialized unit %u after resetting\n",
1318 unit);
1319
1320bail:
1321 return ret;
1322}
1323
1324void handle_eflags(struct hfi1_packet *packet)
1325{
1326 struct hfi1_ctxtdata *rcd = packet->rcd;
1327 u32 rte = rhf_rcv_type_err(packet->rhf);
1328
77241056 1329 rcv_hdrerr(rcd, rcd->ppd, packet);
a03a03e9
IH
1330 if (rhf_err_flags(packet->rhf))
1331 dd_dev_err(rcd->dd,
1332 "receive context %d: rhf 0x%016llx, errs [ %s%s%s%s%s%s%s%s] rte 0x%x\n",
1333 rcd->ctxt, packet->rhf,
1334 packet->rhf & RHF_K_HDR_LEN_ERR ? "k_hdr_len " : "",
1335 packet->rhf & RHF_DC_UNC_ERR ? "dc_unc " : "",
1336 packet->rhf & RHF_DC_ERR ? "dc " : "",
1337 packet->rhf & RHF_TID_ERR ? "tid " : "",
1338 packet->rhf & RHF_LEN_ERR ? "len " : "",
1339 packet->rhf & RHF_ECC_ERR ? "ecc " : "",
1340 packet->rhf & RHF_VCRC_ERR ? "vcrc " : "",
1341 packet->rhf & RHF_ICRC_ERR ? "icrc " : "",
1342 rte);
77241056
MM
1343}
1344
1345/*
1346 * The following functions are called by the interrupt handler. They are type
1347 * specific handlers for each packet type.
1348 */
1349int process_receive_ib(struct hfi1_packet *packet)
1350{
1351 trace_hfi1_rcvhdr(packet->rcd->ppd->dd,
1352 packet->rcd->ctxt,
1353 rhf_err_flags(packet->rhf),
1354 RHF_RCV_TYPE_IB,
1355 packet->hlen,
1356 packet->tlen,
1357 packet->updegr,
1358 rhf_egr_index(packet->rhf));
1359
1360 if (unlikely(rhf_err_flags(packet->rhf))) {
1361 handle_eflags(packet);
1362 return RHF_RCV_CONTINUE;
1363 }
1364
1365 hfi1_ib_rcv(packet);
1366 return RHF_RCV_CONTINUE;
1367}
1368
1369int process_receive_bypass(struct hfi1_packet *packet)
1370{
1371 if (unlikely(rhf_err_flags(packet->rhf)))
1372 handle_eflags(packet);
1373
1374 dd_dev_err(packet->rcd->dd,
1375 "Bypass packets are not supported in normal operation. Dropping\n");
1376 return RHF_RCV_CONTINUE;
1377}
1378
1379int process_receive_error(struct hfi1_packet *packet)
1380{
1381 handle_eflags(packet);
1382
1383 if (unlikely(rhf_err_flags(packet->rhf)))
1384 dd_dev_err(packet->rcd->dd,
1385 "Unhandled error packet received. Dropping.\n");
1386
1387 return RHF_RCV_CONTINUE;
1388}
1389
1390int kdeth_process_expected(struct hfi1_packet *packet)
1391{
1392 if (unlikely(rhf_err_flags(packet->rhf)))
1393 handle_eflags(packet);
1394
1395 dd_dev_err(packet->rcd->dd,
1396 "Unhandled expected packet received. Dropping.\n");
1397 return RHF_RCV_CONTINUE;
1398}
1399
1400int kdeth_process_eager(struct hfi1_packet *packet)
1401{
1402 if (unlikely(rhf_err_flags(packet->rhf)))
1403 handle_eflags(packet);
1404
1405 dd_dev_err(packet->rcd->dd,
1406 "Unhandled eager packet received. Dropping.\n");
1407 return RHF_RCV_CONTINUE;
1408}
1409
1410int process_receive_invalid(struct hfi1_packet *packet)
1411{
1412 dd_dev_err(packet->rcd->dd, "Invalid packet type %d. Dropping\n",
1413 rhf_rcv_type(packet->rhf));
1414 return RHF_RCV_CONTINUE;
1415}