staging/rdma/hfi1: Correctly set RcvCtxtCtrl register
[linux-block.git] / drivers / staging / rdma / hfi1 / driver.c
CommitLineData
77241056
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1/*
2 *
3 * This file is provided under a dual BSD/GPLv2 license. When using or
4 * redistributing this file, you may do so under either license.
5 *
6 * GPL LICENSE SUMMARY
7 *
8 * Copyright(c) 2015 Intel Corporation.
9 *
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of version 2 of the GNU General Public License as
12 * published by the Free Software Foundation.
13 *
14 * This program is distributed in the hope that it will be useful, but
15 * WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
17 * General Public License for more details.
18 *
19 * BSD LICENSE
20 *
21 * Copyright(c) 2015 Intel Corporation.
22 *
23 * Redistribution and use in source and binary forms, with or without
24 * modification, are permitted provided that the following conditions
25 * are met:
26 *
27 * - Redistributions of source code must retain the above copyright
28 * notice, this list of conditions and the following disclaimer.
29 * - Redistributions in binary form must reproduce the above copyright
30 * notice, this list of conditions and the following disclaimer in
31 * the documentation and/or other materials provided with the
32 * distribution.
33 * - Neither the name of Intel Corporation nor the names of its
34 * contributors may be used to endorse or promote products derived
35 * from this software without specific prior written permission.
36 *
37 * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
38 * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
39 * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
40 * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
41 * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
42 * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
43 * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
44 * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
45 * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
46 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
47 * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
48 *
49 */
50
51#include <linux/spinlock.h>
52#include <linux/pci.h>
53#include <linux/io.h>
54#include <linux/delay.h>
55#include <linux/netdevice.h>
56#include <linux/vmalloc.h>
57#include <linux/module.h>
58#include <linux/prefetch.h>
8859b4a6 59#include <rdma/ib_verbs.h>
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60
61#include "hfi.h"
62#include "trace.h"
63#include "qp.h"
64#include "sdma.h"
65
66#undef pr_fmt
67#define pr_fmt(fmt) DRIVER_NAME ": " fmt
68
69/*
70 * The size has to be longer than this string, so we can append
71 * board/chip information to it in the initialization code.
72 */
73const char ib_hfi1_version[] = HFI1_DRIVER_VERSION "\n";
74
75DEFINE_SPINLOCK(hfi1_devs_lock);
76LIST_HEAD(hfi1_dev_list);
77DEFINE_MUTEX(hfi1_mutex); /* general driver use */
78
79unsigned int hfi1_max_mtu = HFI1_DEFAULT_MAX_MTU;
80module_param_named(max_mtu, hfi1_max_mtu, uint, S_IRUGO);
81MODULE_PARM_DESC(max_mtu, "Set max MTU bytes, default is 8192");
82
83unsigned int hfi1_cu = 1;
84module_param_named(cu, hfi1_cu, uint, S_IRUGO);
85MODULE_PARM_DESC(cu, "Credit return units");
86
87unsigned long hfi1_cap_mask = HFI1_CAP_MASK_DEFAULT;
88static int hfi1_caps_set(const char *, const struct kernel_param *);
89static int hfi1_caps_get(char *, const struct kernel_param *);
90static const struct kernel_param_ops cap_ops = {
91 .set = hfi1_caps_set,
92 .get = hfi1_caps_get
93};
94module_param_cb(cap_mask, &cap_ops, &hfi1_cap_mask, S_IWUSR | S_IRUGO);
95MODULE_PARM_DESC(cap_mask, "Bit mask of enabled/disabled HW features");
96
97MODULE_LICENSE("Dual BSD/GPL");
98MODULE_DESCRIPTION("Intel Omni-Path Architecture driver");
99MODULE_VERSION(HFI1_DRIVER_VERSION);
100
101/*
102 * MAX_PKT_RCV is the max # if packets processed per receive interrupt.
103 */
104#define MAX_PKT_RECV 64
105#define EGR_HEAD_UPDATE_THRESHOLD 16
106
107struct hfi1_ib_stats hfi1_stats;
108
109static int hfi1_caps_set(const char *val, const struct kernel_param *kp)
110{
111 int ret = 0;
112 unsigned long *cap_mask_ptr = (unsigned long *)kp->arg,
113 cap_mask = *cap_mask_ptr, value, diff,
114 write_mask = ((HFI1_CAP_WRITABLE_MASK << HFI1_CAP_USER_SHIFT) |
115 HFI1_CAP_WRITABLE_MASK);
116
117 ret = kstrtoul(val, 0, &value);
118 if (ret) {
119 pr_warn("Invalid module parameter value for 'cap_mask'\n");
120 goto done;
121 }
122 /* Get the changed bits (except the locked bit) */
123 diff = value ^ (cap_mask & ~HFI1_CAP_LOCKED_SMASK);
124
125 /* Remove any bits that are not allowed to change after driver load */
126 if (HFI1_CAP_LOCKED() && (diff & ~write_mask)) {
127 pr_warn("Ignoring non-writable capability bits %#lx\n",
128 diff & ~write_mask);
129 diff &= write_mask;
130 }
131
132 /* Mask off any reserved bits */
133 diff &= ~HFI1_CAP_RESERVED_MASK;
134 /* Clear any previously set and changing bits */
135 cap_mask &= ~diff;
136 /* Update the bits with the new capability */
137 cap_mask |= (value & diff);
138 /* Check for any kernel/user restrictions */
139 diff = (cap_mask & (HFI1_CAP_MUST_HAVE_KERN << HFI1_CAP_USER_SHIFT)) ^
140 ((cap_mask & HFI1_CAP_MUST_HAVE_KERN) << HFI1_CAP_USER_SHIFT);
141 cap_mask &= ~diff;
142 /* Set the bitmask to the final set */
143 *cap_mask_ptr = cap_mask;
144done:
145 return ret;
146}
147
148static int hfi1_caps_get(char *buffer, const struct kernel_param *kp)
149{
150 unsigned long cap_mask = *(unsigned long *)kp->arg;
151
152 cap_mask &= ~HFI1_CAP_LOCKED_SMASK;
153 cap_mask |= ((cap_mask & HFI1_CAP_K2U) << HFI1_CAP_USER_SHIFT);
154
155 return scnprintf(buffer, PAGE_SIZE, "0x%lx", cap_mask);
156}
157
158const char *get_unit_name(int unit)
159{
160 static char iname[16];
161
9805071e 162 snprintf(iname, sizeof(iname), DRIVER_NAME "_%u", unit);
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163 return iname;
164}
165
49dbb6cf
DD
166const char *get_card_name(struct rvt_dev_info *rdi)
167{
168 struct hfi1_ibdev *ibdev = container_of(rdi, struct hfi1_ibdev, rdi);
169 struct hfi1_devdata *dd = container_of(ibdev,
170 struct hfi1_devdata, verbs_dev);
171 return get_unit_name(dd->unit);
172}
173
174struct pci_dev *get_pci_dev(struct rvt_dev_info *rdi)
175{
176 struct hfi1_ibdev *ibdev = container_of(rdi, struct hfi1_ibdev, rdi);
177 struct hfi1_devdata *dd = container_of(ibdev,
178 struct hfi1_devdata, verbs_dev);
179 return dd->pcidev;
180}
181
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182/*
183 * Return count of units with at least one port ACTIVE.
184 */
185int hfi1_count_active_units(void)
186{
187 struct hfi1_devdata *dd;
188 struct hfi1_pportdata *ppd;
189 unsigned long flags;
190 int pidx, nunits_active = 0;
191
192 spin_lock_irqsave(&hfi1_devs_lock, flags);
193 list_for_each_entry(dd, &hfi1_dev_list, list) {
194 if (!(dd->flags & HFI1_PRESENT) || !dd->kregbase)
195 continue;
196 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
197 ppd = dd->pport + pidx;
198 if (ppd->lid && ppd->linkup) {
199 nunits_active++;
200 break;
201 }
202 }
203 }
204 spin_unlock_irqrestore(&hfi1_devs_lock, flags);
205 return nunits_active;
206}
207
208/*
209 * Return count of all units, optionally return in arguments
210 * the number of usable (present) units, and the number of
211 * ports that are up.
212 */
213int hfi1_count_units(int *npresentp, int *nupp)
214{
215 int nunits = 0, npresent = 0, nup = 0;
216 struct hfi1_devdata *dd;
217 unsigned long flags;
218 int pidx;
219 struct hfi1_pportdata *ppd;
220
221 spin_lock_irqsave(&hfi1_devs_lock, flags);
222
223 list_for_each_entry(dd, &hfi1_dev_list, list) {
224 nunits++;
225 if ((dd->flags & HFI1_PRESENT) && dd->kregbase)
226 npresent++;
227 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
228 ppd = dd->pport + pidx;
229 if (ppd->lid && ppd->linkup)
230 nup++;
231 }
232 }
233
234 spin_unlock_irqrestore(&hfi1_devs_lock, flags);
235
236 if (npresentp)
237 *npresentp = npresent;
238 if (nupp)
239 *nupp = nup;
240
241 return nunits;
242}
243
244/*
245 * Get address of eager buffer from it's index (allocated in chunks, not
246 * contiguous).
247 */
248static inline void *get_egrbuf(const struct hfi1_ctxtdata *rcd, u64 rhf,
249 u8 *update)
250{
251 u32 idx = rhf_egr_index(rhf), offset = rhf_egr_buf_offset(rhf);
252
253 *update |= !(idx & (rcd->egrbufs.threshold - 1)) && !offset;
254 return (void *)(((u64)(rcd->egrbufs.rcvtids[idx].addr)) +
255 (offset * RCV_BUF_BLOCK_SIZE));
256}
257
258/*
259 * Validate and encode the a given RcvArray Buffer size.
260 * The function will check whether the given size falls within
261 * allowed size ranges for the respective type and, optionally,
262 * return the proper encoding.
263 */
264inline int hfi1_rcvbuf_validate(u32 size, u8 type, u16 *encoded)
265{
266 if (unlikely(!IS_ALIGNED(size, PAGE_SIZE)))
267 return 0;
268 if (unlikely(size < MIN_EAGER_BUFFER))
269 return 0;
270 if (size >
271 (type == PT_EAGER ? MAX_EAGER_BUFFER : MAX_EXPECTED_BUFFER))
272 return 0;
273 if (encoded)
274 *encoded = ilog2(size / PAGE_SIZE) + 1;
275 return 1;
276}
277
278static void rcv_hdrerr(struct hfi1_ctxtdata *rcd, struct hfi1_pportdata *ppd,
279 struct hfi1_packet *packet)
280{
281 struct hfi1_message_header *rhdr = packet->hdr;
282 u32 rte = rhf_rcv_type_err(packet->rhf);
283 int lnh = be16_to_cpu(rhdr->lrh[0]) & 3;
284 struct hfi1_ibport *ibp = &ppd->ibport_data;
ec4274f1
DD
285 struct hfi1_devdata *dd = ppd->dd;
286 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
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287
288 if (packet->rhf & (RHF_VCRC_ERR | RHF_ICRC_ERR))
289 return;
290
291 if (packet->rhf & RHF_TID_ERR) {
292 /* For TIDERR and RC QPs preemptively schedule a NAK */
293 struct hfi1_ib_header *hdr = (struct hfi1_ib_header *)rhdr;
294 struct hfi1_other_headers *ohdr = NULL;
295 u32 tlen = rhf_pkt_len(packet->rhf); /* in bytes */
296 u16 lid = be16_to_cpu(hdr->lrh[1]);
297 u32 qp_num;
298 u32 rcv_flags = 0;
299
300 /* Sanity check packet */
301 if (tlen < 24)
302 goto drop;
303
304 /* Check for GRH */
305 if (lnh == HFI1_LRH_BTH)
306 ohdr = &hdr->u.oth;
307 else if (lnh == HFI1_LRH_GRH) {
308 u32 vtf;
309
310 ohdr = &hdr->u.l.oth;
311 if (hdr->u.l.grh.next_hdr != IB_GRH_NEXT_HDR)
312 goto drop;
313 vtf = be32_to_cpu(hdr->u.l.grh.version_tclass_flow);
314 if ((vtf >> IB_GRH_VERSION_SHIFT) != IB_GRH_VERSION)
315 goto drop;
316 rcv_flags |= HFI1_HAS_GRH;
317 } else
318 goto drop;
319
320 /* Get the destination QP number. */
ec4274f1 321 qp_num = be32_to_cpu(ohdr->bth[1]) & RVT_QPN_MASK;
8859b4a6 322 if (lid < be16_to_cpu(IB_MULTICAST_LID_BASE)) {
895420dd 323 struct rvt_qp *qp;
b77d713a 324 unsigned long flags;
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325
326 rcu_read_lock();
ec4274f1 327 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qp_num);
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328 if (!qp) {
329 rcu_read_unlock();
330 goto drop;
331 }
332
333 /*
334 * Handle only RC QPs - for other QP types drop error
335 * packet.
336 */
b77d713a 337 spin_lock_irqsave(&qp->r_lock, flags);
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338
339 /* Check for valid receive state. */
83693bd1
DD
340 if (!(ib_rvt_state_ops[qp->state] &
341 RVT_PROCESS_RECV_OK)) {
4eb06882 342 ibp->rvp.n_pkt_drops++;
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MM
343 }
344
345 switch (qp->ibqp.qp_type) {
346 case IB_QPT_RC:
347 hfi1_rc_hdrerr(
348 rcd,
349 hdr,
350 rcv_flags,
351 qp);
352 break;
353 default:
354 /* For now don't handle any other QP types */
355 break;
356 }
357
b77d713a 358 spin_unlock_irqrestore(&qp->r_lock, flags);
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359 rcu_read_unlock();
360 } /* Unicast QP */
361 } /* Valid packet with TIDErr */
362
363 /* handle "RcvTypeErr" flags */
364 switch (rte) {
365 case RHF_RTE_ERROR_OP_CODE_ERR:
366 {
367 u32 opcode;
368 void *ebuf = NULL;
369 __be32 *bth = NULL;
370
371 if (rhf_use_egr_bfr(packet->rhf))
372 ebuf = packet->ebuf;
373
374 if (ebuf == NULL)
375 goto drop; /* this should never happen */
376
377 if (lnh == HFI1_LRH_BTH)
378 bth = (__be32 *)ebuf;
379 else if (lnh == HFI1_LRH_GRH)
380 bth = (__be32 *)((char *)ebuf + sizeof(struct ib_grh));
381 else
382 goto drop;
383
384 opcode = be32_to_cpu(bth[0]) >> 24;
385 opcode &= 0xff;
386
387 if (opcode == IB_OPCODE_CNP) {
388 /*
389 * Only in pre-B0 h/w is the CNP_OPCODE handled
624be1db 390 * via this code path.
77241056 391 */
895420dd 392 struct rvt_qp *qp = NULL;
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MM
393 u32 lqpn, rqpn;
394 u16 rlid;
395 u8 svc_type, sl, sc5;
396
397 sc5 = (be16_to_cpu(rhdr->lrh[0]) >> 12) & 0xf;
398 if (rhf_dc_info(packet->rhf))
399 sc5 |= 0x10;
400 sl = ibp->sc_to_sl[sc5];
401
ec4274f1 402 lqpn = be32_to_cpu(bth[1]) & RVT_QPN_MASK;
77241056 403 rcu_read_lock();
ec4274f1 404 qp = rvt_lookup_qpn(rdi, &ibp->rvp, lqpn);
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MM
405 if (qp == NULL) {
406 rcu_read_unlock();
407 goto drop;
408 }
409
410 switch (qp->ibqp.qp_type) {
411 case IB_QPT_UD:
412 rlid = 0;
413 rqpn = 0;
414 svc_type = IB_CC_SVCTYPE_UD;
415 break;
416 case IB_QPT_UC:
417 rlid = be16_to_cpu(rhdr->lrh[3]);
418 rqpn = qp->remote_qpn;
419 svc_type = IB_CC_SVCTYPE_UC;
420 break;
421 default:
422 goto drop;
423 }
424
425 process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
426 rcu_read_unlock();
427 }
428
429 packet->rhf &= ~RHF_RCV_TYPE_ERR_SMASK;
430 break;
431 }
432 default:
433 break;
434 }
435
436drop:
437 return;
438}
439
440static inline void init_packet(struct hfi1_ctxtdata *rcd,
441 struct hfi1_packet *packet)
442{
443
444 packet->rsize = rcd->rcvhdrqentsize; /* words */
445 packet->maxcnt = rcd->rcvhdrq_cnt * packet->rsize; /* words */
446 packet->rcd = rcd;
447 packet->updegr = 0;
448 packet->etail = -1;
f4f30031 449 packet->rhf_addr = get_rhf_addr(rcd);
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MM
450 packet->rhf = rhf_to_cpu(packet->rhf_addr);
451 packet->rhqoff = rcd->head;
452 packet->numpkt = 0;
453 packet->rcv_flags = 0;
454}
455
456#ifndef CONFIG_PRESCAN_RXQ
457static void prescan_rxq(struct hfi1_packet *packet) {}
977940b8 458#else /* !CONFIG_PRESCAN_RXQ */
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MM
459static int prescan_receive_queue;
460
895420dd 461static void process_ecn(struct rvt_qp *qp, struct hfi1_ib_header *hdr,
77241056 462 struct hfi1_other_headers *ohdr,
977940b8 463 u64 rhf, u32 bth1, struct ib_grh *grh)
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MM
464{
465 struct hfi1_ibport *ibp = to_iport(qp->ibqp.device, qp->port_num);
977940b8
AK
466 u32 rqpn = 0;
467 u16 rlid;
77241056 468 u8 sc5, svc_type;
77241056
MM
469
470 switch (qp->ibqp.qp_type) {
977940b8
AK
471 case IB_QPT_SMI:
472 case IB_QPT_GSI:
77241056 473 case IB_QPT_UD:
977940b8 474 rlid = be16_to_cpu(hdr->lrh[3]);
ec4274f1 475 rqpn = be32_to_cpu(ohdr->u.ud.deth[1]) & RVT_QPN_MASK;
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MM
476 svc_type = IB_CC_SVCTYPE_UD;
477 break;
977940b8
AK
478 case IB_QPT_UC:
479 rlid = qp->remote_ah_attr.dlid;
480 rqpn = qp->remote_qpn;
481 svc_type = IB_CC_SVCTYPE_UC;
482 break;
483 case IB_QPT_RC:
484 rlid = qp->remote_ah_attr.dlid;
485 rqpn = qp->remote_qpn;
486 svc_type = IB_CC_SVCTYPE_RC;
487 break;
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MM
488 default:
489 return;
490 }
491
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MM
492 sc5 = (be16_to_cpu(hdr->lrh[0]) >> 12) & 0xf;
493 if (rhf_dc_info(rhf))
494 sc5 |= 0x10;
495
977940b8 496 if (bth1 & HFI1_FECN_SMASK) {
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MM
497 u16 pkey = (u16)be32_to_cpu(ohdr->bth[0]);
498 u16 dlid = be16_to_cpu(hdr->lrh[1]);
77241056 499
977940b8 500 return_cnp(ibp, qp, rqpn, pkey, dlid, rlid, sc5, grh);
77241056
MM
501 }
502
977940b8 503 if (bth1 & HFI1_BECN_SMASK) {
77241056 504 struct hfi1_pportdata *ppd = ppd_from_ibp(ibp);
ec4274f1 505 u32 lqpn = bth1 & RVT_QPN_MASK;
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MM
506 u8 sl = ibp->sc_to_sl[sc5];
507
977940b8 508 process_becn(ppd, sl, rlid, lqpn, rqpn, svc_type);
77241056 509 }
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MM
510}
511
512struct ps_mdata {
513 struct hfi1_ctxtdata *rcd;
514 u32 rsize;
515 u32 maxcnt;
516 u32 ps_head;
517 u32 ps_tail;
518 u32 ps_seq;
519};
520
521static inline void init_ps_mdata(struct ps_mdata *mdata,
522 struct hfi1_packet *packet)
523{
524 struct hfi1_ctxtdata *rcd = packet->rcd;
525
526 mdata->rcd = rcd;
527 mdata->rsize = packet->rsize;
528 mdata->maxcnt = packet->maxcnt;
3e7ccca0 529 mdata->ps_head = packet->rhqoff;
77241056 530
82c2611d 531 if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
3e7ccca0 532 mdata->ps_tail = get_rcvhdrtail(rcd);
82c2611d
NV
533 if (rcd->ctxt == HFI1_CTRL_CTXT)
534 mdata->ps_seq = rcd->seq_cnt;
535 else
536 mdata->ps_seq = 0; /* not used with DMA_RTAIL */
77241056
MM
537 } else {
538 mdata->ps_tail = 0; /* used only with DMA_RTAIL*/
539 mdata->ps_seq = rcd->seq_cnt;
540 }
541}
542
82c2611d
NV
543static inline int ps_done(struct ps_mdata *mdata, u64 rhf,
544 struct hfi1_ctxtdata *rcd)
77241056 545{
82c2611d 546 if (HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL))
77241056
MM
547 return mdata->ps_head == mdata->ps_tail;
548 return mdata->ps_seq != rhf_rcv_seq(rhf);
549}
550
82c2611d
NV
551static inline int ps_skip(struct ps_mdata *mdata, u64 rhf,
552 struct hfi1_ctxtdata *rcd)
553{
554 /*
555 * Control context can potentially receive an invalid rhf.
556 * Drop such packets.
557 */
558 if ((rcd->ctxt == HFI1_CTRL_CTXT) && (mdata->ps_head != mdata->ps_tail))
559 return mdata->ps_seq != rhf_rcv_seq(rhf);
560
561 return 0;
562}
563
564static inline void update_ps_mdata(struct ps_mdata *mdata,
565 struct hfi1_ctxtdata *rcd)
77241056 566{
77241056 567 mdata->ps_head += mdata->rsize;
3e7ccca0 568 if (mdata->ps_head >= mdata->maxcnt)
77241056 569 mdata->ps_head = 0;
82c2611d
NV
570
571 /* Control context must do seq counting */
572 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL) ||
573 (rcd->ctxt == HFI1_CTRL_CTXT)) {
77241056
MM
574 if (++mdata->ps_seq > 13)
575 mdata->ps_seq = 1;
576 }
577}
578
579/*
580 * prescan_rxq - search through the receive queue looking for packets
581 * containing Excplicit Congestion Notifications (FECNs, or BECNs).
582 * When an ECN is found, process the Congestion Notification, and toggle
583 * it off.
584 */
585static void prescan_rxq(struct hfi1_packet *packet)
586{
587 struct hfi1_ctxtdata *rcd = packet->rcd;
588 struct ps_mdata mdata;
589
590 if (!prescan_receive_queue)
591 return;
592
593 init_ps_mdata(&mdata, packet);
594
595 while (1) {
596 struct hfi1_devdata *dd = rcd->dd;
597 struct hfi1_ibport *ibp = &rcd->ppd->ibport_data;
598 __le32 *rhf_addr = (__le32 *) rcd->rcvhdrq + mdata.ps_head +
599 dd->rhf_offset;
895420dd 600 struct rvt_qp *qp;
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MM
601 struct hfi1_ib_header *hdr;
602 struct hfi1_other_headers *ohdr;
603 struct ib_grh *grh = NULL;
ec4274f1 604 struct rvt_dev_info *rdi = &dd->verbs_dev.rdi;
77241056 605 u64 rhf = rhf_to_cpu(rhf_addr);
977940b8 606 u32 etype = rhf_rcv_type(rhf), qpn, bth1;
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MM
607 int is_ecn = 0;
608 u8 lnh;
609
82c2611d 610 if (ps_done(&mdata, rhf, rcd))
77241056
MM
611 break;
612
82c2611d
NV
613 if (ps_skip(&mdata, rhf, rcd))
614 goto next;
615
77241056
MM
616 if (etype != RHF_RCV_TYPE_IB)
617 goto next;
618
619 hdr = (struct hfi1_ib_header *)
620 hfi1_get_msgheader(dd, rhf_addr);
621 lnh = be16_to_cpu(hdr->lrh[0]) & 3;
622
623 if (lnh == HFI1_LRH_BTH)
624 ohdr = &hdr->u.oth;
625 else if (lnh == HFI1_LRH_GRH) {
626 ohdr = &hdr->u.l.oth;
627 grh = &hdr->u.l.grh;
628 } else
629 goto next; /* just in case */
630
977940b8
AK
631 bth1 = be32_to_cpu(ohdr->bth[1]);
632 is_ecn = !!(bth1 & (HFI1_FECN_SMASK | HFI1_BECN_SMASK));
77241056
MM
633
634 if (!is_ecn)
635 goto next;
636
ec4274f1 637 qpn = bth1 & RVT_QPN_MASK;
77241056 638 rcu_read_lock();
ec4274f1 639 qp = rvt_lookup_qpn(rdi, &ibp->rvp, qpn);
77241056
MM
640
641 if (qp == NULL) {
642 rcu_read_unlock();
643 goto next;
644 }
645
977940b8 646 process_ecn(qp, hdr, ohdr, rhf, bth1, grh);
77241056 647 rcu_read_unlock();
977940b8
AK
648
649 /* turn off BECN, FECN */
650 bth1 &= ~(HFI1_FECN_SMASK | HFI1_BECN_SMASK);
651 ohdr->bth[1] = cpu_to_be32(bth1);
77241056 652next:
82c2611d 653 update_ps_mdata(&mdata, rcd);
77241056
MM
654 }
655}
9d2f53ef 656#endif /* CONFIG_PRESCAN_RXQ */
82c2611d
NV
657
658static inline int skip_rcv_packet(struct hfi1_packet *packet, int thread)
659{
660 int ret = RCV_PKT_OK;
661
662 /* Set up for the next packet */
663 packet->rhqoff += packet->rsize;
664 if (packet->rhqoff >= packet->maxcnt)
665 packet->rhqoff = 0;
666
667 packet->numpkt++;
668 if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) {
669 if (thread) {
670 cond_resched();
671 } else {
672 ret = RCV_PKT_LIMIT;
673 this_cpu_inc(*packet->rcd->dd->rcv_limit);
674 }
675 }
676
677 packet->rhf_addr = (__le32 *)packet->rcd->rcvhdrq + packet->rhqoff +
678 packet->rcd->dd->rhf_offset;
679 packet->rhf = rhf_to_cpu(packet->rhf_addr);
680
681 return ret;
682}
77241056 683
f4f30031 684static inline int process_rcv_packet(struct hfi1_packet *packet, int thread)
77241056
MM
685{
686 int ret = RCV_PKT_OK;
687
688 packet->hdr = hfi1_get_msgheader(packet->rcd->dd,
689 packet->rhf_addr);
690 packet->hlen = (u8 *)packet->rhf_addr - (u8 *)packet->hdr;
691 packet->etype = rhf_rcv_type(packet->rhf);
692 /* total length */
693 packet->tlen = rhf_pkt_len(packet->rhf); /* in bytes */
694 /* retrieve eager buffer details */
695 packet->ebuf = NULL;
696 if (rhf_use_egr_bfr(packet->rhf)) {
697 packet->etail = rhf_egr_index(packet->rhf);
698 packet->ebuf = get_egrbuf(packet->rcd, packet->rhf,
699 &packet->updegr);
700 /*
701 * Prefetch the contents of the eager buffer. It is
702 * OK to send a negative length to prefetch_range().
703 * The +2 is the size of the RHF.
704 */
705 prefetch_range(packet->ebuf,
706 packet->tlen - ((packet->rcd->rcvhdrqentsize -
707 (rhf_hdrq_offset(packet->rhf)+2)) * 4));
708 }
709
710 /*
711 * Call a type specific handler for the packet. We
712 * should be able to trust that etype won't be beyond
713 * the range of valid indexes. If so something is really
714 * wrong and we can probably just let things come
715 * crashing down. There is no need to eat another
716 * comparison in this performance critical code.
717 */
718 packet->rcd->dd->rhf_rcv_function_map[packet->etype](packet);
719 packet->numpkt++;
720
721 /* Set up for the next packet */
722 packet->rhqoff += packet->rsize;
723 if (packet->rhqoff >= packet->maxcnt)
724 packet->rhqoff = 0;
725
f4f30031
DL
726 if (unlikely((packet->numpkt & (MAX_PKT_RECV - 1)) == 0)) {
727 if (thread) {
728 cond_resched();
729 } else {
730 ret = RCV_PKT_LIMIT;
731 this_cpu_inc(*packet->rcd->dd->rcv_limit);
732 }
77241056
MM
733 }
734
735 packet->rhf_addr = (__le32 *) packet->rcd->rcvhdrq + packet->rhqoff +
736 packet->rcd->dd->rhf_offset;
737 packet->rhf = rhf_to_cpu(packet->rhf_addr);
738
739 return ret;
740}
741
742static inline void process_rcv_update(int last, struct hfi1_packet *packet)
743{
744 /*
745 * Update head regs etc., every 16 packets, if not last pkt,
746 * to help prevent rcvhdrq overflows, when many packets
747 * are processed and queue is nearly full.
748 * Don't request an interrupt for intermediate updates.
749 */
750 if (!last && !(packet->numpkt & 0xf)) {
751 update_usrhead(packet->rcd, packet->rhqoff, packet->updegr,
752 packet->etail, 0, 0);
753 packet->updegr = 0;
754 }
755 packet->rcv_flags = 0;
756}
757
758static inline void finish_packet(struct hfi1_packet *packet)
759{
760
761 /*
762 * Nothing we need to free for the packet.
763 *
764 * The only thing we need to do is a final update and call for an
765 * interrupt
766 */
767 update_usrhead(packet->rcd, packet->rcd->head, packet->updegr,
768 packet->etail, rcv_intr_dynamic, packet->numpkt);
769
770}
771
772static inline void process_rcv_qp_work(struct hfi1_packet *packet)
773{
774
775 struct hfi1_ctxtdata *rcd;
895420dd 776 struct rvt_qp *qp, *nqp;
77241056
MM
777
778 rcd = packet->rcd;
779 rcd->head = packet->rhqoff;
780
781 /*
782 * Iterate over all QPs waiting to respond.
783 * The list won't change since the IRQ is only run on one CPU.
784 */
785 list_for_each_entry_safe(qp, nqp, &rcd->qp_wait_list, rspwait) {
786 list_del_init(&qp->rspwait);
54d10c1e
DD
787 if (qp->r_flags & RVT_R_RSP_NAK) {
788 qp->r_flags &= ~RVT_R_RSP_NAK;
77241056
MM
789 hfi1_send_rc_ack(rcd, qp, 0);
790 }
54d10c1e 791 if (qp->r_flags & RVT_R_RSP_SEND) {
77241056
MM
792 unsigned long flags;
793
54d10c1e 794 qp->r_flags &= ~RVT_R_RSP_SEND;
77241056 795 spin_lock_irqsave(&qp->s_lock, flags);
83693bd1
DD
796 if (ib_rvt_state_ops[qp->state] &
797 RVT_PROCESS_OR_FLUSH_SEND)
77241056
MM
798 hfi1_schedule_send(qp);
799 spin_unlock_irqrestore(&qp->s_lock, flags);
800 }
801 if (atomic_dec_and_test(&qp->refcount))
802 wake_up(&qp->wait);
803 }
804}
805
806/*
807 * Handle receive interrupts when using the no dma rtail option.
808 */
f4f30031 809int handle_receive_interrupt_nodma_rtail(struct hfi1_ctxtdata *rcd, int thread)
77241056
MM
810{
811 u32 seq;
f4f30031 812 int last = RCV_PKT_OK;
77241056
MM
813 struct hfi1_packet packet;
814
815 init_packet(rcd, &packet);
816 seq = rhf_rcv_seq(packet.rhf);
f4f30031
DL
817 if (seq != rcd->seq_cnt) {
818 last = RCV_PKT_DONE;
77241056 819 goto bail;
f4f30031 820 }
77241056
MM
821
822 prescan_rxq(&packet);
823
f4f30031
DL
824 while (last == RCV_PKT_OK) {
825 last = process_rcv_packet(&packet, thread);
77241056
MM
826 seq = rhf_rcv_seq(packet.rhf);
827 if (++rcd->seq_cnt > 13)
828 rcd->seq_cnt = 1;
829 if (seq != rcd->seq_cnt)
f4f30031 830 last = RCV_PKT_DONE;
77241056
MM
831 process_rcv_update(last, &packet);
832 }
833 process_rcv_qp_work(&packet);
834bail:
835 finish_packet(&packet);
f4f30031 836 return last;
77241056
MM
837}
838
f4f30031 839int handle_receive_interrupt_dma_rtail(struct hfi1_ctxtdata *rcd, int thread)
77241056
MM
840{
841 u32 hdrqtail;
f4f30031 842 int last = RCV_PKT_OK;
77241056
MM
843 struct hfi1_packet packet;
844
845 init_packet(rcd, &packet);
846 hdrqtail = get_rcvhdrtail(rcd);
f4f30031
DL
847 if (packet.rhqoff == hdrqtail) {
848 last = RCV_PKT_DONE;
77241056 849 goto bail;
f4f30031 850 }
77241056
MM
851 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
852
853 prescan_rxq(&packet);
854
f4f30031
DL
855 while (last == RCV_PKT_OK) {
856 last = process_rcv_packet(&packet, thread);
77241056 857 if (packet.rhqoff == hdrqtail)
f4f30031 858 last = RCV_PKT_DONE;
77241056
MM
859 process_rcv_update(last, &packet);
860 }
861 process_rcv_qp_work(&packet);
862bail:
863 finish_packet(&packet);
f4f30031 864 return last;
77241056
MM
865}
866
867static inline void set_all_nodma_rtail(struct hfi1_devdata *dd)
868{
869 int i;
870
82c2611d 871 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
77241056
MM
872 dd->rcd[i]->do_interrupt =
873 &handle_receive_interrupt_nodma_rtail;
874}
875
876static inline void set_all_dma_rtail(struct hfi1_devdata *dd)
877{
878 int i;
879
82c2611d 880 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
77241056
MM
881 dd->rcd[i]->do_interrupt =
882 &handle_receive_interrupt_dma_rtail;
883}
884
fb9036dd
JS
885void set_all_slowpath(struct hfi1_devdata *dd)
886{
887 int i;
888
889 /* HFI1_CTRL_CTXT must always use the slow path interrupt handler */
890 for (i = HFI1_CTRL_CTXT + 1; i < dd->first_user_ctxt; i++)
891 dd->rcd[i]->do_interrupt = &handle_receive_interrupt;
892}
893
894static inline int set_armed_to_active(struct hfi1_ctxtdata *rcd,
895 struct hfi1_packet packet,
896 struct hfi1_devdata *dd)
897{
898 struct work_struct *lsaw = &rcd->ppd->linkstate_active_work;
899 struct hfi1_message_header *hdr = hfi1_get_msgheader(packet.rcd->dd,
900 packet.rhf_addr);
901
902 if (hdr2sc(hdr, packet.rhf) != 0xf) {
903 int hwstate = read_logical_state(dd);
904
905 if (hwstate != LSTATE_ACTIVE) {
906 dd_dev_info(dd, "Unexpected link state %d\n", hwstate);
907 return 0;
908 }
909
910 queue_work(rcd->ppd->hfi1_wq, lsaw);
911 return 1;
912 }
913 return 0;
914}
915
77241056
MM
916/*
917 * handle_receive_interrupt - receive a packet
918 * @rcd: the context
919 *
920 * Called from interrupt handler for errors or receive interrupt.
921 * This is the slow path interrupt handler.
922 */
f4f30031 923int handle_receive_interrupt(struct hfi1_ctxtdata *rcd, int thread)
77241056 924{
77241056
MM
925 struct hfi1_devdata *dd = rcd->dd;
926 u32 hdrqtail;
82c2611d 927 int needset, last = RCV_PKT_OK;
77241056 928 struct hfi1_packet packet;
82c2611d
NV
929 int skip_pkt = 0;
930
931 /* Control context will always use the slow path interrupt handler */
932 needset = (rcd->ctxt == HFI1_CTRL_CTXT) ? 0 : 1;
77241056
MM
933
934 init_packet(rcd, &packet);
935
82c2611d 936 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
77241056
MM
937 u32 seq = rhf_rcv_seq(packet.rhf);
938
f4f30031
DL
939 if (seq != rcd->seq_cnt) {
940 last = RCV_PKT_DONE;
77241056 941 goto bail;
f4f30031 942 }
77241056
MM
943 hdrqtail = 0;
944 } else {
945 hdrqtail = get_rcvhdrtail(rcd);
f4f30031
DL
946 if (packet.rhqoff == hdrqtail) {
947 last = RCV_PKT_DONE;
77241056 948 goto bail;
f4f30031 949 }
77241056 950 smp_rmb(); /* prevent speculative reads of dma'ed hdrq */
82c2611d
NV
951
952 /*
953 * Control context can potentially receive an invalid
954 * rhf. Drop such packets.
955 */
956 if (rcd->ctxt == HFI1_CTRL_CTXT) {
957 u32 seq = rhf_rcv_seq(packet.rhf);
958
959 if (seq != rcd->seq_cnt)
960 skip_pkt = 1;
961 }
77241056
MM
962 }
963
964 prescan_rxq(&packet);
965
f4f30031 966 while (last == RCV_PKT_OK) {
77241056
MM
967
968 if (unlikely(dd->do_drop && atomic_xchg(&dd->drop_packet,
969 DROP_PACKET_OFF) == DROP_PACKET_ON)) {
970 dd->do_drop = 0;
971
972 /* On to the next packet */
973 packet.rhqoff += packet.rsize;
974 packet.rhf_addr = (__le32 *) rcd->rcvhdrq +
975 packet.rhqoff +
976 dd->rhf_offset;
977 packet.rhf = rhf_to_cpu(packet.rhf_addr);
978
82c2611d
NV
979 } else if (skip_pkt) {
980 last = skip_rcv_packet(&packet, thread);
981 skip_pkt = 0;
77241056 982 } else {
fb9036dd
JS
983 /* Auto activate link on non-SC15 packet receive */
984 if (unlikely(rcd->ppd->host_link_state ==
985 HLS_UP_ARMED) &&
986 set_armed_to_active(rcd, packet, dd))
987 goto bail;
f4f30031 988 last = process_rcv_packet(&packet, thread);
77241056
MM
989 }
990
82c2611d 991 if (!HFI1_CAP_KGET_MASK(rcd->flags, DMA_RTAIL)) {
77241056
MM
992 u32 seq = rhf_rcv_seq(packet.rhf);
993
994 if (++rcd->seq_cnt > 13)
995 rcd->seq_cnt = 1;
996 if (seq != rcd->seq_cnt)
f4f30031 997 last = RCV_PKT_DONE;
77241056
MM
998 if (needset) {
999 dd_dev_info(dd,
1000 "Switching to NO_DMA_RTAIL\n");
1001 set_all_nodma_rtail(dd);
1002 needset = 0;
1003 }
1004 } else {
1005 if (packet.rhqoff == hdrqtail)
f4f30031 1006 last = RCV_PKT_DONE;
82c2611d
NV
1007 /*
1008 * Control context can potentially receive an invalid
1009 * rhf. Drop such packets.
1010 */
1011 if (rcd->ctxt == HFI1_CTRL_CTXT) {
1012 u32 seq = rhf_rcv_seq(packet.rhf);
1013
1014 if (++rcd->seq_cnt > 13)
1015 rcd->seq_cnt = 1;
1016 if (!last && (seq != rcd->seq_cnt))
1017 skip_pkt = 1;
1018 }
1019
77241056
MM
1020 if (needset) {
1021 dd_dev_info(dd,
1022 "Switching to DMA_RTAIL\n");
1023 set_all_dma_rtail(dd);
1024 needset = 0;
1025 }
1026 }
1027
1028 process_rcv_update(last, &packet);
1029 }
1030
1031 process_rcv_qp_work(&packet);
1032
1033bail:
1034 /*
1035 * Always write head at end, and setup rcv interrupt, even
1036 * if no packets were processed.
1037 */
1038 finish_packet(&packet);
f4f30031 1039 return last;
77241056
MM
1040}
1041
fb9036dd
JS
1042/*
1043 * We may discover in the interrupt that the hardware link state has
1044 * changed from ARMED to ACTIVE (due to the arrival of a non-SC15 packet),
1045 * and we need to update the driver's notion of the link state. We cannot
1046 * run set_link_state from interrupt context, so we queue this function on
1047 * a workqueue.
1048 *
1049 * We delay the regular interrupt processing until after the state changes
1050 * so that the link will be in the correct state by the time any application
1051 * we wake up attempts to send a reply to any message it received.
1052 * (Subsequent receive interrupts may possibly force the wakeup before we
1053 * update the link state.)
1054 *
1055 * The rcd is freed in hfi1_free_ctxtdata after hfi1_postinit_cleanup invokes
1056 * dd->f_cleanup(dd) to disable the interrupt handler and flush workqueues,
1057 * so we're safe from use-after-free of the rcd.
1058 */
1059void receive_interrupt_work(struct work_struct *work)
1060{
1061 struct hfi1_pportdata *ppd = container_of(work, struct hfi1_pportdata,
1062 linkstate_active_work);
1063 struct hfi1_devdata *dd = ppd->dd;
1064 int i;
1065
1066 /* Received non-SC15 packet implies neighbor_normal */
1067 ppd->neighbor_normal = 1;
1068 set_link_state(ppd, HLS_UP_ACTIVE);
1069
1070 /*
1071 * Interrupt all kernel contexts that could have had an
1072 * interrupt during auto activation.
1073 */
1074 for (i = HFI1_CTRL_CTXT; i < dd->first_user_ctxt; i++)
1075 force_recv_intr(dd->rcd[i]);
1076}
1077
77241056
MM
1078/*
1079 * Convert a given MTU size to the on-wire MAD packet enumeration.
1080 * Return -1 if the size is invalid.
1081 */
1082int mtu_to_enum(u32 mtu, int default_if_bad)
1083{
1084 switch (mtu) {
1085 case 0: return OPA_MTU_0;
1086 case 256: return OPA_MTU_256;
1087 case 512: return OPA_MTU_512;
1088 case 1024: return OPA_MTU_1024;
1089 case 2048: return OPA_MTU_2048;
1090 case 4096: return OPA_MTU_4096;
1091 case 8192: return OPA_MTU_8192;
1092 case 10240: return OPA_MTU_10240;
1093 }
1094 return default_if_bad;
1095}
1096
1097u16 enum_to_mtu(int mtu)
1098{
1099 switch (mtu) {
1100 case OPA_MTU_0: return 0;
1101 case OPA_MTU_256: return 256;
1102 case OPA_MTU_512: return 512;
1103 case OPA_MTU_1024: return 1024;
1104 case OPA_MTU_2048: return 2048;
1105 case OPA_MTU_4096: return 4096;
1106 case OPA_MTU_8192: return 8192;
1107 case OPA_MTU_10240: return 10240;
1108 default: return 0xffff;
1109 }
1110}
1111
1112/*
1113 * set_mtu - set the MTU
1114 * @ppd: the per port data
1115 *
1116 * We can handle "any" incoming size, the issue here is whether we
1117 * need to restrict our outgoing size. We do not deal with what happens
1118 * to programs that are already running when the size changes.
1119 */
1120int set_mtu(struct hfi1_pportdata *ppd)
1121{
1122 struct hfi1_devdata *dd = ppd->dd;
1123 int i, drain, ret = 0, is_up = 0;
1124
1125 ppd->ibmtu = 0;
1126 for (i = 0; i < ppd->vls_supported; i++)
1127 if (ppd->ibmtu < dd->vld[i].mtu)
1128 ppd->ibmtu = dd->vld[i].mtu;
1129 ppd->ibmaxlen = ppd->ibmtu + lrh_max_header_bytes(ppd->dd);
1130
1131 mutex_lock(&ppd->hls_lock);
1132 if (ppd->host_link_state == HLS_UP_INIT
1133 || ppd->host_link_state == HLS_UP_ARMED
1134 || ppd->host_link_state == HLS_UP_ACTIVE)
1135 is_up = 1;
1136
1137 drain = !is_ax(dd) && is_up;
1138
1139 if (drain)
1140 /*
1141 * MTU is specified per-VL. To ensure that no packet gets
1142 * stuck (due, e.g., to the MTU for the packet's VL being
1143 * reduced), empty the per-VL FIFOs before adjusting MTU.
1144 */
1145 ret = stop_drain_data_vls(dd);
1146
1147 if (ret) {
1148 dd_dev_err(dd, "%s: cannot stop/drain VLs - refusing to change per-VL MTUs\n",
1149 __func__);
1150 goto err;
1151 }
1152
1153 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_MTU, 0);
1154
1155 if (drain)
1156 open_fill_data_vls(dd); /* reopen all VLs */
1157
1158err:
1159 mutex_unlock(&ppd->hls_lock);
1160
1161 return ret;
1162}
1163
1164int hfi1_set_lid(struct hfi1_pportdata *ppd, u32 lid, u8 lmc)
1165{
1166 struct hfi1_devdata *dd = ppd->dd;
1167
1168 ppd->lid = lid;
1169 ppd->lmc = lmc;
1170 hfi1_set_ib_cfg(ppd, HFI1_IB_CFG_LIDLMC, 0);
1171
1172 dd_dev_info(dd, "IB%u:%u got a lid: 0x%x\n", dd->unit, ppd->port, lid);
1173
1174 return 0;
1175}
1176
1177/*
1178 * Following deal with the "obviously simple" task of overriding the state
1179 * of the LEDs, which normally indicate link physical and logical status.
1180 * The complications arise in dealing with different hardware mappings
1181 * and the board-dependent routine being called from interrupts.
1182 * and then there's the requirement to _flash_ them.
1183 */
1184#define LED_OVER_FREQ_SHIFT 8
1185#define LED_OVER_FREQ_MASK (0xFF<<LED_OVER_FREQ_SHIFT)
1186/* Below is "non-zero" to force override, but both actual LEDs are off */
1187#define LED_OVER_BOTH_OFF (8)
1188
1189static void run_led_override(unsigned long opaque)
1190{
1191 struct hfi1_pportdata *ppd = (struct hfi1_pportdata *)opaque;
1192 struct hfi1_devdata *dd = ppd->dd;
1193 int timeoff;
1194 int ph_idx;
1195
1196 if (!(dd->flags & HFI1_INITTED))
1197 return;
1198
1199 ph_idx = ppd->led_override_phase++ & 1;
1200 ppd->led_override = ppd->led_override_vals[ph_idx];
1201 timeoff = ppd->led_override_timeoff;
1202
1203 /*
1204 * don't re-fire the timer if user asked for it to be off; we let
1205 * it fire one more time after they turn it off to simplify
1206 */
1207 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
1208 mod_timer(&ppd->led_override_timer, jiffies + timeoff);
1209}
1210
1211void hfi1_set_led_override(struct hfi1_pportdata *ppd, unsigned int val)
1212{
1213 struct hfi1_devdata *dd = ppd->dd;
1214 int timeoff, freq;
1215
1216 if (!(dd->flags & HFI1_INITTED))
1217 return;
1218
1219 /* First check if we are blinking. If not, use 1HZ polling */
1220 timeoff = HZ;
1221 freq = (val & LED_OVER_FREQ_MASK) >> LED_OVER_FREQ_SHIFT;
1222
1223 if (freq) {
1224 /* For blink, set each phase from one nybble of val */
1225 ppd->led_override_vals[0] = val & 0xF;
1226 ppd->led_override_vals[1] = (val >> 4) & 0xF;
1227 timeoff = (HZ << 4)/freq;
1228 } else {
1229 /* Non-blink set both phases the same. */
1230 ppd->led_override_vals[0] = val & 0xF;
1231 ppd->led_override_vals[1] = val & 0xF;
1232 }
1233 ppd->led_override_timeoff = timeoff;
1234
1235 /*
1236 * If the timer has not already been started, do so. Use a "quick"
1237 * timeout so the function will be called soon, to look at our request.
1238 */
1239 if (atomic_inc_return(&ppd->led_override_timer_active) == 1) {
1240 /* Need to start timer */
a3faf606
MFW
1241 setup_timer(&ppd->led_override_timer, run_led_override,
1242 (unsigned long)ppd);
1243
77241056
MM
1244 ppd->led_override_timer.expires = jiffies + 1;
1245 add_timer(&ppd->led_override_timer);
1246 } else {
1247 if (ppd->led_override_vals[0] || ppd->led_override_vals[1])
1248 mod_timer(&ppd->led_override_timer, jiffies + 1);
1249 atomic_dec(&ppd->led_override_timer_active);
1250 }
1251}
1252
1253/**
1254 * hfi1_reset_device - reset the chip if possible
1255 * @unit: the device to reset
1256 *
1257 * Whether or not reset is successful, we attempt to re-initialize the chip
1258 * (that is, much like a driver unload/reload). We clear the INITTED flag
1259 * so that the various entry points will fail until we reinitialize. For
1260 * now, we only allow this if no user contexts are open that use chip resources
1261 */
1262int hfi1_reset_device(int unit)
1263{
1264 int ret, i;
1265 struct hfi1_devdata *dd = hfi1_lookup(unit);
1266 struct hfi1_pportdata *ppd;
1267 unsigned long flags;
1268 int pidx;
1269
1270 if (!dd) {
1271 ret = -ENODEV;
1272 goto bail;
1273 }
1274
1275 dd_dev_info(dd, "Reset on unit %u requested\n", unit);
1276
1277 if (!dd->kregbase || !(dd->flags & HFI1_PRESENT)) {
1278 dd_dev_info(dd,
1279 "Invalid unit number %u or not initialized or not present\n",
1280 unit);
1281 ret = -ENXIO;
1282 goto bail;
1283 }
1284
1285 spin_lock_irqsave(&dd->uctxt_lock, flags);
1286 if (dd->rcd)
1287 for (i = dd->first_user_ctxt; i < dd->num_rcv_contexts; i++) {
1288 if (!dd->rcd[i] || !dd->rcd[i]->cnt)
1289 continue;
1290 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1291 ret = -EBUSY;
1292 goto bail;
1293 }
1294 spin_unlock_irqrestore(&dd->uctxt_lock, flags);
1295
1296 for (pidx = 0; pidx < dd->num_pports; ++pidx) {
1297 ppd = dd->pport + pidx;
1298 if (atomic_read(&ppd->led_override_timer_active)) {
1299 /* Need to stop LED timer, _then_ shut off LEDs */
1300 del_timer_sync(&ppd->led_override_timer);
1301 atomic_set(&ppd->led_override_timer_active, 0);
1302 }
1303
1304 /* Shut off LEDs after we are sure timer is not running */
1305 ppd->led_override = LED_OVER_BOTH_OFF;
1306 }
1307 if (dd->flags & HFI1_HAS_SEND_DMA)
1308 sdma_exit(dd);
1309
1310 hfi1_reset_cpu_counters(dd);
1311
1312 ret = hfi1_init(dd, 1);
1313
1314 if (ret)
1315 dd_dev_err(dd,
1316 "Reinitialize unit %u after reset failed with %d\n",
1317 unit, ret);
1318 else
1319 dd_dev_info(dd, "Reinitialized unit %u after resetting\n",
1320 unit);
1321
1322bail:
1323 return ret;
1324}
1325
1326void handle_eflags(struct hfi1_packet *packet)
1327{
1328 struct hfi1_ctxtdata *rcd = packet->rcd;
1329 u32 rte = rhf_rcv_type_err(packet->rhf);
1330
77241056 1331 rcv_hdrerr(rcd, rcd->ppd, packet);
a03a03e9
IH
1332 if (rhf_err_flags(packet->rhf))
1333 dd_dev_err(rcd->dd,
1334 "receive context %d: rhf 0x%016llx, errs [ %s%s%s%s%s%s%s%s] rte 0x%x\n",
1335 rcd->ctxt, packet->rhf,
1336 packet->rhf & RHF_K_HDR_LEN_ERR ? "k_hdr_len " : "",
1337 packet->rhf & RHF_DC_UNC_ERR ? "dc_unc " : "",
1338 packet->rhf & RHF_DC_ERR ? "dc " : "",
1339 packet->rhf & RHF_TID_ERR ? "tid " : "",
1340 packet->rhf & RHF_LEN_ERR ? "len " : "",
1341 packet->rhf & RHF_ECC_ERR ? "ecc " : "",
1342 packet->rhf & RHF_VCRC_ERR ? "vcrc " : "",
1343 packet->rhf & RHF_ICRC_ERR ? "icrc " : "",
1344 rte);
77241056
MM
1345}
1346
1347/*
1348 * The following functions are called by the interrupt handler. They are type
1349 * specific handlers for each packet type.
1350 */
1351int process_receive_ib(struct hfi1_packet *packet)
1352{
1353 trace_hfi1_rcvhdr(packet->rcd->ppd->dd,
1354 packet->rcd->ctxt,
1355 rhf_err_flags(packet->rhf),
1356 RHF_RCV_TYPE_IB,
1357 packet->hlen,
1358 packet->tlen,
1359 packet->updegr,
1360 rhf_egr_index(packet->rhf));
1361
1362 if (unlikely(rhf_err_flags(packet->rhf))) {
1363 handle_eflags(packet);
1364 return RHF_RCV_CONTINUE;
1365 }
1366
1367 hfi1_ib_rcv(packet);
1368 return RHF_RCV_CONTINUE;
1369}
1370
1371int process_receive_bypass(struct hfi1_packet *packet)
1372{
1373 if (unlikely(rhf_err_flags(packet->rhf)))
1374 handle_eflags(packet);
1375
1376 dd_dev_err(packet->rcd->dd,
1377 "Bypass packets are not supported in normal operation. Dropping\n");
1378 return RHF_RCV_CONTINUE;
1379}
1380
1381int process_receive_error(struct hfi1_packet *packet)
1382{
1383 handle_eflags(packet);
1384
1385 if (unlikely(rhf_err_flags(packet->rhf)))
1386 dd_dev_err(packet->rcd->dd,
1387 "Unhandled error packet received. Dropping.\n");
1388
1389 return RHF_RCV_CONTINUE;
1390}
1391
1392int kdeth_process_expected(struct hfi1_packet *packet)
1393{
1394 if (unlikely(rhf_err_flags(packet->rhf)))
1395 handle_eflags(packet);
1396
1397 dd_dev_err(packet->rcd->dd,
1398 "Unhandled expected packet received. Dropping.\n");
1399 return RHF_RCV_CONTINUE;
1400}
1401
1402int kdeth_process_eager(struct hfi1_packet *packet)
1403{
1404 if (unlikely(rhf_err_flags(packet->rhf)))
1405 handle_eflags(packet);
1406
1407 dd_dev_err(packet->rcd->dd,
1408 "Unhandled eager packet received. Dropping.\n");
1409 return RHF_RCV_CONTINUE;
1410}
1411
1412int process_receive_invalid(struct hfi1_packet *packet)
1413{
1414 dd_dev_err(packet->rcd->dd, "Invalid packet type %d. Dropping\n",
1415 rhf_rcv_type(packet->rhf));
1416 return RHF_RCV_CONTINUE;
1417}