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b164935b AK |
1 | /* |
2 | * This file is subject to the terms and conditions of the GNU General Public | |
3 | * License. See the file "COPYING" in the main directory of this archive | |
4 | * for more details. | |
5 | * | |
6 | * Copyright (C) 2008 Cavium Networks | |
6570b4a9 AK |
7 | * |
8 | * Some parts of the code were originally released under BSD license: | |
9 | * | |
10 | * Copyright (c) 2003-2010 Cavium Networks (support@cavium.com). All rights | |
11 | * reserved. | |
12 | * | |
13 | * Redistribution and use in source and binary forms, with or without | |
14 | * modification, are permitted provided that the following conditions are | |
15 | * met: | |
16 | * | |
17 | * * Redistributions of source code must retain the above copyright | |
18 | * notice, this list of conditions and the following disclaimer. | |
19 | * | |
20 | * * Redistributions in binary form must reproduce the above | |
21 | * copyright notice, this list of conditions and the following | |
22 | * disclaimer in the documentation and/or other materials provided | |
23 | * with the distribution. | |
24 | * | |
25 | * * Neither the name of Cavium Networks nor the names of | |
26 | * its contributors may be used to endorse or promote products | |
27 | * derived from this software without specific prior written | |
28 | * permission. | |
29 | * | |
30 | * This Software, including technical data, may be subject to U.S. export | |
31 | * control laws, including the U.S. Export Administration Act and its associated | |
32 | * regulations, and may be subject to export or import regulations in other | |
33 | * countries. | |
34 | * | |
35 | * TO THE MAXIMUM EXTENT PERMITTED BY LAW, THE SOFTWARE IS PROVIDED "AS IS" | |
36 | * AND WITH ALL FAULTS AND CAVIUM NETWORKS MAKES NO PROMISES, REPRESENTATIONS OR | |
37 | * WARRANTIES, EITHER EXPRESS, IMPLIED, STATUTORY, OR OTHERWISE, WITH RESPECT TO | |
38 | * THE SOFTWARE, INCLUDING ITS CONDITION, ITS CONFORMITY TO ANY REPRESENTATION | |
39 | * OR DESCRIPTION, OR THE EXISTENCE OF ANY LATENT OR PATENT DEFECTS, AND CAVIUM | |
40 | * SPECIFICALLY DISCLAIMS ALL IMPLIED (IF ANY) WARRANTIES OF TITLE, | |
41 | * MERCHANTABILITY, NONINFRINGEMENT, FITNESS FOR A PARTICULAR PURPOSE, LACK OF | |
42 | * VIRUSES, ACCURACY OR COMPLETENESS, QUIET ENJOYMENT, QUIET POSSESSION OR | |
43 | * CORRESPONDENCE TO DESCRIPTION. THE ENTIRE RISK ARISING OUT OF USE OR | |
44 | * PERFORMANCE OF THE SOFTWARE LIES WITH YOU. | |
b164935b AK |
45 | */ |
46 | #include <linux/kernel.h> | |
47 | #include <linux/module.h> | |
48 | #include <linux/init.h> | |
49 | #include <linux/pci.h> | |
50 | #include <linux/interrupt.h> | |
51 | #include <linux/platform_device.h> | |
b164935b AK |
52 | #include <linux/usb.h> |
53 | ||
2a81d2b0 AK |
54 | #include <linux/time.h> |
55 | #include <linux/delay.h> | |
b164935b AK |
56 | |
57 | #include <asm/octeon/cvmx.h> | |
b164935b AK |
58 | #include <asm/octeon/cvmx-iob-defs.h> |
59 | ||
60 | #include <linux/usb/hcd.h> | |
61 | ||
55fa328a DN |
62 | #include <linux/err.h> |
63 | ||
6570b4a9 AK |
64 | #include <asm/octeon/octeon.h> |
65 | #include <asm/octeon/cvmx-helper.h> | |
66 | #include <asm/octeon/cvmx-sysinfo.h> | |
67 | #include <asm/octeon/cvmx-helper-board.h> | |
68 | ||
69 | #include "cvmx-usbcx-defs.h" | |
70 | #include "cvmx-usbnx-defs.h" | |
71 | ||
72 | /** | |
73 | * enum cvmx_usb_speed - the possible USB device speeds | |
74 | * | |
75 | * @CVMX_USB_SPEED_HIGH: Device is operation at 480Mbps | |
76 | * @CVMX_USB_SPEED_FULL: Device is operation at 12Mbps | |
77 | * @CVMX_USB_SPEED_LOW: Device is operation at 1.5Mbps | |
78 | */ | |
79 | enum cvmx_usb_speed { | |
80 | CVMX_USB_SPEED_HIGH = 0, | |
81 | CVMX_USB_SPEED_FULL = 1, | |
82 | CVMX_USB_SPEED_LOW = 2, | |
83 | }; | |
84 | ||
85 | /** | |
86 | * enum cvmx_usb_transfer - the possible USB transfer types | |
87 | * | |
88 | * @CVMX_USB_TRANSFER_CONTROL: USB transfer type control for hub and status | |
89 | * transfers | |
90 | * @CVMX_USB_TRANSFER_ISOCHRONOUS: USB transfer type isochronous for low | |
91 | * priority periodic transfers | |
92 | * @CVMX_USB_TRANSFER_BULK: USB transfer type bulk for large low priority | |
93 | * transfers | |
94 | * @CVMX_USB_TRANSFER_INTERRUPT: USB transfer type interrupt for high priority | |
95 | * periodic transfers | |
96 | */ | |
97 | enum cvmx_usb_transfer { | |
98 | CVMX_USB_TRANSFER_CONTROL = 0, | |
99 | CVMX_USB_TRANSFER_ISOCHRONOUS = 1, | |
100 | CVMX_USB_TRANSFER_BULK = 2, | |
101 | CVMX_USB_TRANSFER_INTERRUPT = 3, | |
102 | }; | |
103 | ||
104 | /** | |
105 | * enum cvmx_usb_direction - the transfer directions | |
106 | * | |
107 | * @CVMX_USB_DIRECTION_OUT: Data is transferring from Octeon to the device/host | |
108 | * @CVMX_USB_DIRECTION_IN: Data is transferring from the device/host to Octeon | |
109 | */ | |
110 | enum cvmx_usb_direction { | |
111 | CVMX_USB_DIRECTION_OUT, | |
112 | CVMX_USB_DIRECTION_IN, | |
113 | }; | |
114 | ||
115 | /** | |
116 | * enum cvmx_usb_complete - possible callback function status codes | |
117 | * | |
118 | * @CVMX_USB_COMPLETE_SUCCESS: The transaction / operation finished without | |
119 | * any errors | |
120 | * @CVMX_USB_COMPLETE_SHORT: FIXME: This is currently not implemented | |
121 | * @CVMX_USB_COMPLETE_CANCEL: The transaction was canceled while in flight | |
122 | * by a user call to cvmx_usb_cancel | |
123 | * @CVMX_USB_COMPLETE_ERROR: The transaction aborted with an unexpected | |
124 | * error status | |
125 | * @CVMX_USB_COMPLETE_STALL: The transaction received a USB STALL response | |
126 | * from the device | |
127 | * @CVMX_USB_COMPLETE_XACTERR: The transaction failed with an error from the | |
128 | * device even after a number of retries | |
129 | * @CVMX_USB_COMPLETE_DATATGLERR: The transaction failed with a data toggle | |
130 | * error even after a number of retries | |
131 | * @CVMX_USB_COMPLETE_BABBLEERR: The transaction failed with a babble error | |
132 | * @CVMX_USB_COMPLETE_FRAMEERR: The transaction failed with a frame error | |
133 | * even after a number of retries | |
134 | */ | |
135 | enum cvmx_usb_complete { | |
136 | CVMX_USB_COMPLETE_SUCCESS, | |
137 | CVMX_USB_COMPLETE_SHORT, | |
138 | CVMX_USB_COMPLETE_CANCEL, | |
139 | CVMX_USB_COMPLETE_ERROR, | |
140 | CVMX_USB_COMPLETE_STALL, | |
141 | CVMX_USB_COMPLETE_XACTERR, | |
142 | CVMX_USB_COMPLETE_DATATGLERR, | |
143 | CVMX_USB_COMPLETE_BABBLEERR, | |
144 | CVMX_USB_COMPLETE_FRAMEERR, | |
145 | }; | |
146 | ||
147 | /** | |
148 | * struct cvmx_usb_port_status - the USB port status information | |
149 | * | |
150 | * @port_enabled: 1 = Usb port is enabled, 0 = disabled | |
151 | * @port_over_current: 1 = Over current detected, 0 = Over current not | |
152 | * detected. Octeon doesn't support over current detection. | |
153 | * @port_powered: 1 = Port power is being supplied to the device, 0 = | |
154 | * power is off. Octeon doesn't support turning port power | |
155 | * off. | |
156 | * @port_speed: Current port speed. | |
157 | * @connected: 1 = A device is connected to the port, 0 = No device is | |
158 | * connected. | |
159 | * @connect_change: 1 = Device connected state changed since the last set | |
160 | * status call. | |
161 | */ | |
162 | struct cvmx_usb_port_status { | |
163 | uint32_t reserved : 25; | |
164 | uint32_t port_enabled : 1; | |
165 | uint32_t port_over_current : 1; | |
166 | uint32_t port_powered : 1; | |
167 | enum cvmx_usb_speed port_speed : 2; | |
168 | uint32_t connected : 1; | |
169 | uint32_t connect_change : 1; | |
170 | }; | |
171 | ||
172 | /** | |
173 | * union cvmx_usb_control_header - the structure of a Control packet header | |
174 | * | |
175 | * @s.request_type: Bit 7 tells the direction: 1=IN, 0=OUT | |
176 | * @s.request The standard usb request to make | |
177 | * @s.value Value parameter for the request in little endian format | |
178 | * @s.index Index for the request in little endian format | |
179 | * @s.length Length of the data associated with this request in | |
180 | * little endian format | |
181 | */ | |
182 | union cvmx_usb_control_header { | |
183 | uint64_t u64; | |
184 | struct { | |
185 | uint64_t request_type : 8; | |
186 | uint64_t request : 8; | |
187 | uint64_t value : 16; | |
188 | uint64_t index : 16; | |
189 | uint64_t length : 16; | |
190 | } s; | |
191 | }; | |
192 | ||
193 | /** | |
194 | * struct cvmx_usb_iso_packet - descriptor for Isochronous packets | |
195 | * | |
196 | * @offset: This is the offset in bytes into the main buffer where this data | |
197 | * is stored. | |
198 | * @length: This is the length in bytes of the data. | |
199 | * @status: This is the status of this individual packet transfer. | |
200 | */ | |
201 | struct cvmx_usb_iso_packet { | |
202 | int offset; | |
203 | int length; | |
204 | enum cvmx_usb_complete status; | |
205 | }; | |
206 | ||
6570b4a9 AK |
207 | /** |
208 | * enum cvmx_usb_initialize_flags - flags used by the initialization function | |
209 | * | |
210 | * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI: The USB port uses a 12MHz crystal | |
211 | * as clock source at USB_XO and | |
212 | * USB_XI. | |
213 | * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND: The USB port uses 12/24/48MHz 2.5V | |
214 | * board clock source at USB_XO. | |
215 | * USB_XI should be tied to GND. | |
216 | * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK: Mask for clock speed field | |
217 | * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ: Speed of reference clock or | |
218 | * crystal | |
219 | * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ: Speed of reference clock | |
220 | * @CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ: Speed of reference clock | |
221 | * @CVMX_USB_INITIALIZE_FLAGS_NO_DMA: Disable DMA and used polled IO for | |
222 | * data transfer use for the USB | |
223 | */ | |
224 | enum cvmx_usb_initialize_flags { | |
225 | CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI = 1 << 0, | |
226 | CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND = 1 << 1, | |
227 | CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK = 3 << 3, | |
228 | CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ = 1 << 3, | |
229 | CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ = 2 << 3, | |
230 | CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ = 3 << 3, | |
231 | /* Bits 3-4 used to encode the clock frequency */ | |
232 | CVMX_USB_INITIALIZE_FLAGS_NO_DMA = 1 << 5, | |
233 | }; | |
234 | ||
235 | /** | |
236 | * enum cvmx_usb_pipe_flags - internal flags for a pipe. | |
237 | * | |
238 | * @__CVMX_USB_PIPE_FLAGS_OPEN: Used internally to determine if a pipe is | |
239 | * open. Do not use. | |
240 | * @__CVMX_USB_PIPE_FLAGS_SCHEDULED: Used internally to determine if a pipe is | |
241 | * actively using hardware. Do not use. | |
242 | * @__CVMX_USB_PIPE_FLAGS_NEED_PING: Used internally to determine if a high | |
243 | * speed pipe is in the ping state. Do not | |
244 | * use. | |
245 | */ | |
246 | enum cvmx_usb_pipe_flags { | |
247 | __CVMX_USB_PIPE_FLAGS_OPEN = 1 << 16, | |
248 | __CVMX_USB_PIPE_FLAGS_SCHEDULED = 1 << 17, | |
249 | __CVMX_USB_PIPE_FLAGS_NEED_PING = 1 << 18, | |
250 | }; | |
251 | ||
252 | /* Normal prefetch that use the pref instruction. */ | |
253 | #define CVMX_PREFETCH(address, offset) asm volatile ("pref %[type], %[off](%[rbase])" : : [rbase] "d" (address), [off] "I" (offset), [type] "n" (0)) | |
254 | ||
255 | /* Maximum number of times to retry failed transactions */ | |
256 | #define MAX_RETRIES 3 | |
257 | ||
258 | /* Maximum number of pipes that can be open at once */ | |
259 | #define MAX_PIPES 32 | |
260 | ||
261 | /* Maximum number of outstanding transactions across all pipes */ | |
262 | #define MAX_TRANSACTIONS 256 | |
263 | ||
264 | /* Maximum number of hardware channels supported by the USB block */ | |
265 | #define MAX_CHANNELS 8 | |
266 | ||
267 | /* The highest valid USB device address */ | |
268 | #define MAX_USB_ADDRESS 127 | |
269 | ||
270 | /* The highest valid USB endpoint number */ | |
271 | #define MAX_USB_ENDPOINT 15 | |
272 | ||
273 | /* The highest valid port number on a hub */ | |
274 | #define MAX_USB_HUB_PORT 15 | |
275 | ||
276 | /* | |
277 | * The low level hardware can transfer a maximum of this number of bytes in each | |
278 | * transfer. The field is 19 bits wide | |
279 | */ | |
280 | #define MAX_TRANSFER_BYTES ((1<<19)-1) | |
281 | ||
282 | /* | |
283 | * The low level hardware can transfer a maximum of this number of packets in | |
284 | * each transfer. The field is 10 bits wide | |
285 | */ | |
286 | #define MAX_TRANSFER_PACKETS ((1<<10)-1) | |
287 | ||
288 | enum cvmx_usb_transaction_flags { | |
289 | __CVMX_USB_TRANSACTION_FLAGS_IN_USE = 1<<16, | |
290 | }; | |
291 | ||
292 | enum { | |
293 | USB_CLOCK_TYPE_REF_12, | |
294 | USB_CLOCK_TYPE_REF_24, | |
295 | USB_CLOCK_TYPE_REF_48, | |
296 | USB_CLOCK_TYPE_CRYSTAL_12, | |
297 | }; | |
298 | ||
299 | /** | |
300 | * Logical transactions may take numerous low level | |
301 | * transactions, especially when splits are concerned. This | |
302 | * enum represents all of the possible stages a transaction can | |
303 | * be in. Note that split completes are always even. This is so | |
304 | * the NAK handler can backup to the previous low level | |
305 | * transaction with a simple clearing of bit 0. | |
306 | */ | |
307 | enum cvmx_usb_stage { | |
308 | CVMX_USB_STAGE_NON_CONTROL, | |
309 | CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE, | |
310 | CVMX_USB_STAGE_SETUP, | |
311 | CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE, | |
312 | CVMX_USB_STAGE_DATA, | |
313 | CVMX_USB_STAGE_DATA_SPLIT_COMPLETE, | |
314 | CVMX_USB_STAGE_STATUS, | |
315 | CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE, | |
316 | }; | |
317 | ||
318 | /** | |
319 | * struct cvmx_usb_transaction - describes each pending USB transaction | |
320 | * regardless of type. These are linked together | |
321 | * to form a list of pending requests for a pipe. | |
322 | * | |
323 | * @prev: Transaction before this one in the pipe. | |
324 | * @next: Transaction after this one in the pipe. | |
325 | * @type: Type of transaction, duplicated of the pipe. | |
326 | * @flags: State flags for this transaction. | |
327 | * @buffer: User's physical buffer address to read/write. | |
328 | * @buffer_length: Size of the user's buffer in bytes. | |
329 | * @control_header: For control transactions, physical address of the 8 | |
330 | * byte standard header. | |
331 | * @iso_start_frame: For ISO transactions, the starting frame number. | |
332 | * @iso_number_packets: For ISO transactions, the number of packets in the | |
333 | * request. | |
334 | * @iso_packets: For ISO transactions, the sub packets in the request. | |
335 | * @actual_bytes: Actual bytes transfer for this transaction. | |
336 | * @stage: For control transactions, the current stage. | |
0cce1004 | 337 | * @urb: URB. |
6570b4a9 AK |
338 | */ |
339 | struct cvmx_usb_transaction { | |
340 | struct cvmx_usb_transaction *prev; | |
341 | struct cvmx_usb_transaction *next; | |
342 | enum cvmx_usb_transfer type; | |
343 | enum cvmx_usb_transaction_flags flags; | |
344 | uint64_t buffer; | |
345 | int buffer_length; | |
346 | uint64_t control_header; | |
347 | int iso_start_frame; | |
348 | int iso_number_packets; | |
349 | struct cvmx_usb_iso_packet *iso_packets; | |
350 | int xfersize; | |
351 | int pktcnt; | |
352 | int retries; | |
353 | int actual_bytes; | |
354 | enum cvmx_usb_stage stage; | |
0cce1004 | 355 | struct urb *urb; |
6570b4a9 AK |
356 | }; |
357 | ||
358 | /** | |
359 | * struct cvmx_usb_pipe - a pipe represents a virtual connection between Octeon | |
360 | * and some USB device. It contains a list of pending | |
361 | * request to the device. | |
362 | * | |
363 | * @prev: Pipe before this one in the list | |
364 | * @next: Pipe after this one in the list | |
365 | * @head: The first pending transaction | |
366 | * @tail: The last pending transaction | |
367 | * @interval: For periodic pipes, the interval between packets in | |
368 | * frames | |
369 | * @next_tx_frame: The next frame this pipe is allowed to transmit on | |
370 | * @flags: State flags for this pipe | |
371 | * @device_speed: Speed of device connected to this pipe | |
372 | * @transfer_type: Type of transaction supported by this pipe | |
373 | * @transfer_dir: IN or OUT. Ignored for Control | |
374 | * @multi_count: Max packet in a row for the device | |
375 | * @max_packet: The device's maximum packet size in bytes | |
376 | * @device_addr: USB device address at other end of pipe | |
377 | * @endpoint_num: USB endpoint number at other end of pipe | |
378 | * @hub_device_addr: Hub address this device is connected to | |
379 | * @hub_port: Hub port this device is connected to | |
380 | * @pid_toggle: This toggles between 0/1 on every packet send to track | |
381 | * the data pid needed | |
382 | * @channel: Hardware DMA channel for this pipe | |
383 | * @split_sc_frame: The low order bits of the frame number the split | |
384 | * complete should be sent on | |
385 | */ | |
386 | struct cvmx_usb_pipe { | |
387 | struct cvmx_usb_pipe *prev; | |
388 | struct cvmx_usb_pipe *next; | |
389 | struct cvmx_usb_transaction *head; | |
390 | struct cvmx_usb_transaction *tail; | |
391 | uint64_t interval; | |
392 | uint64_t next_tx_frame; | |
393 | enum cvmx_usb_pipe_flags flags; | |
394 | enum cvmx_usb_speed device_speed; | |
395 | enum cvmx_usb_transfer transfer_type; | |
396 | enum cvmx_usb_direction transfer_dir; | |
397 | int multi_count; | |
398 | uint16_t max_packet; | |
399 | uint8_t device_addr; | |
400 | uint8_t endpoint_num; | |
401 | uint8_t hub_device_addr; | |
402 | uint8_t hub_port; | |
403 | uint8_t pid_toggle; | |
404 | uint8_t channel; | |
405 | int8_t split_sc_frame; | |
406 | }; | |
407 | ||
408 | /** | |
409 | * struct cvmx_usb_pipe_list | |
410 | * | |
411 | * @head: Head of the list, or NULL if empty. | |
412 | * @tail: Tail if the list, or NULL if empty. | |
413 | */ | |
414 | struct cvmx_usb_pipe_list { | |
415 | struct cvmx_usb_pipe *head; | |
416 | struct cvmx_usb_pipe *tail; | |
417 | }; | |
418 | ||
419 | struct cvmx_usb_tx_fifo { | |
420 | struct { | |
421 | int channel; | |
422 | int size; | |
423 | uint64_t address; | |
424 | } entry[MAX_CHANNELS+1]; | |
425 | int head; | |
426 | int tail; | |
427 | }; | |
428 | ||
429 | /** | |
cb61c600 | 430 | * struct cvmx_usb_state - the state of the USB block |
6570b4a9 AK |
431 | * |
432 | * init_flags: Flags passed to initialize. | |
433 | * index: Which USB block this is for. | |
434 | * idle_hardware_channels: Bit set for every idle hardware channel. | |
435 | * usbcx_hprt: Stored port status so we don't need to read a CSR to | |
436 | * determine splits. | |
437 | * pipe_for_channel: Map channels to pipes. | |
438 | * free_transaction_head: List of free transactions head. | |
439 | * free_transaction_tail: List of free transactions tail. | |
440 | * pipe: Storage for pipes. | |
441 | * transaction: Storage for transactions. | |
6570b4a9 AK |
442 | * indent: Used by debug output to indent functions. |
443 | * port_status: Last port status used for change notification. | |
444 | * free_pipes: List of all pipes that are currently closed. | |
445 | * idle_pipes: List of open pipes that have no transactions. | |
446 | * active_pipes: Active pipes indexed by transfer type. | |
447 | * frame_number: Increments every SOF interrupt for time keeping. | |
448 | * active_split: Points to the current active split, or NULL. | |
449 | */ | |
cb61c600 | 450 | struct cvmx_usb_state { |
6570b4a9 AK |
451 | int init_flags; |
452 | int index; | |
453 | int idle_hardware_channels; | |
454 | union cvmx_usbcx_hprt usbcx_hprt; | |
455 | struct cvmx_usb_pipe *pipe_for_channel[MAX_CHANNELS]; | |
456 | struct cvmx_usb_transaction *free_transaction_head; | |
457 | struct cvmx_usb_transaction *free_transaction_tail; | |
458 | struct cvmx_usb_pipe pipe[MAX_PIPES]; | |
459 | struct cvmx_usb_transaction transaction[MAX_TRANSACTIONS]; | |
6570b4a9 AK |
460 | int indent; |
461 | struct cvmx_usb_port_status port_status; | |
462 | struct cvmx_usb_pipe_list free_pipes; | |
463 | struct cvmx_usb_pipe_list idle_pipes; | |
464 | struct cvmx_usb_pipe_list active_pipes[4]; | |
465 | uint64_t frame_number; | |
466 | struct cvmx_usb_transaction *active_split; | |
467 | struct cvmx_usb_tx_fifo periodic; | |
468 | struct cvmx_usb_tx_fifo nonperiodic; | |
469 | }; | |
470 | ||
b164935b | 471 | struct octeon_hcd { |
771378bb | 472 | spinlock_t lock; |
a24ed35a | 473 | struct cvmx_usb_state usb; |
771378bb AK |
474 | struct tasklet_struct dequeue_tasklet; |
475 | struct list_head dequeue_list; | |
b164935b AK |
476 | }; |
477 | ||
6570b4a9 AK |
478 | /* This macro spins on a field waiting for it to reach a value */ |
479 | #define CVMX_WAIT_FOR_FIELD32(address, type, field, op, value, timeout_usec)\ | |
480 | ({int result; \ | |
481 | do { \ | |
482 | uint64_t done = cvmx_get_cycle() + (uint64_t)timeout_usec * \ | |
483 | octeon_get_clock_rate() / 1000000; \ | |
484 | type c; \ | |
485 | while (1) { \ | |
486 | c.u32 = __cvmx_usb_read_csr32(usb, address); \ | |
487 | if (c.s.field op (value)) { \ | |
488 | result = 0; \ | |
489 | break; \ | |
490 | } else if (cvmx_get_cycle() > done) { \ | |
491 | result = -1; \ | |
492 | break; \ | |
493 | } else \ | |
494 | cvmx_wait(100); \ | |
495 | } \ | |
496 | } while (0); \ | |
497 | result; }) | |
498 | ||
499 | /* | |
500 | * This macro logically sets a single field in a CSR. It does the sequence | |
501 | * read, modify, and write | |
502 | */ | |
503 | #define USB_SET_FIELD32(address, type, field, value) \ | |
504 | do { \ | |
505 | type c; \ | |
506 | c.u32 = __cvmx_usb_read_csr32(usb, address); \ | |
507 | c.s.field = value; \ | |
508 | __cvmx_usb_write_csr32(usb, address, c.u32); \ | |
509 | } while (0) | |
510 | ||
511 | /* Returns the IO address to push/pop stuff data from the FIFOs */ | |
512 | #define USB_FIFO_ADDRESS(channel, usb_index) (CVMX_USBCX_GOTGCTL(usb_index) + ((channel)+1)*0x1000) | |
513 | ||
514 | static int octeon_usb_get_clock_type(void) | |
515 | { | |
516 | switch (cvmx_sysinfo_get()->board_type) { | |
517 | case CVMX_BOARD_TYPE_BBGW_REF: | |
518 | case CVMX_BOARD_TYPE_LANAI2_A: | |
519 | case CVMX_BOARD_TYPE_LANAI2_U: | |
520 | case CVMX_BOARD_TYPE_LANAI2_G: | |
521 | case CVMX_BOARD_TYPE_UBNT_E100: | |
522 | return USB_CLOCK_TYPE_CRYSTAL_12; | |
523 | } | |
524 | return USB_CLOCK_TYPE_REF_48; | |
525 | } | |
526 | ||
527 | /** | |
528 | * Read a USB 32bit CSR. It performs the necessary address swizzle | |
529 | * for 32bit CSRs and logs the value in a readable format if | |
530 | * debugging is on. | |
531 | * | |
532 | * @usb: USB block this access is for | |
533 | * @address: 64bit address to read | |
534 | * | |
535 | * Returns: Result of the read | |
536 | */ | |
cb61c600 | 537 | static inline uint32_t __cvmx_usb_read_csr32(struct cvmx_usb_state *usb, |
6570b4a9 AK |
538 | uint64_t address) |
539 | { | |
540 | uint32_t result = cvmx_read64_uint32(address ^ 4); | |
541 | return result; | |
542 | } | |
543 | ||
544 | ||
545 | /** | |
546 | * Write a USB 32bit CSR. It performs the necessary address | |
547 | * swizzle for 32bit CSRs and logs the value in a readable format | |
548 | * if debugging is on. | |
549 | * | |
550 | * @usb: USB block this access is for | |
551 | * @address: 64bit address to write | |
552 | * @value: Value to write | |
553 | */ | |
cb61c600 | 554 | static inline void __cvmx_usb_write_csr32(struct cvmx_usb_state *usb, |
6570b4a9 AK |
555 | uint64_t address, uint32_t value) |
556 | { | |
557 | cvmx_write64_uint32(address ^ 4, value); | |
558 | cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index)); | |
559 | } | |
560 | ||
561 | ||
562 | /** | |
563 | * Read a USB 64bit CSR. It logs the value in a readable format if | |
564 | * debugging is on. | |
565 | * | |
566 | * @usb: USB block this access is for | |
567 | * @address: 64bit address to read | |
568 | * | |
569 | * Returns: Result of the read | |
570 | */ | |
cb61c600 | 571 | static inline uint64_t __cvmx_usb_read_csr64(struct cvmx_usb_state *usb, |
6570b4a9 AK |
572 | uint64_t address) |
573 | { | |
574 | uint64_t result = cvmx_read64_uint64(address); | |
575 | return result; | |
576 | } | |
577 | ||
578 | ||
579 | /** | |
580 | * Write a USB 64bit CSR. It logs the value in a readable format | |
581 | * if debugging is on. | |
582 | * | |
583 | * @usb: USB block this access is for | |
584 | * @address: 64bit address to write | |
585 | * @value: Value to write | |
586 | */ | |
cb61c600 | 587 | static inline void __cvmx_usb_write_csr64(struct cvmx_usb_state *usb, |
6570b4a9 AK |
588 | uint64_t address, uint64_t value) |
589 | { | |
590 | cvmx_write64_uint64(address, value); | |
591 | } | |
592 | ||
593 | /** | |
594 | * Return non zero if this pipe connects to a non HIGH speed | |
595 | * device through a high speed hub. | |
596 | * | |
597 | * @usb: USB block this access is for | |
598 | * @pipe: Pipe to check | |
599 | * | |
600 | * Returns: Non zero if we need to do split transactions | |
601 | */ | |
cb61c600 AK |
602 | static inline int __cvmx_usb_pipe_needs_split(struct cvmx_usb_state *usb, |
603 | struct cvmx_usb_pipe *pipe) | |
6570b4a9 AK |
604 | { |
605 | return ((pipe->device_speed != CVMX_USB_SPEED_HIGH) && (usb->usbcx_hprt.s.prtspd == CVMX_USB_SPEED_HIGH)); | |
606 | } | |
607 | ||
608 | ||
609 | /** | |
610 | * Trivial utility function to return the correct PID for a pipe | |
611 | * | |
612 | * @pipe: pipe to check | |
613 | * | |
614 | * Returns: PID for pipe | |
615 | */ | |
616 | static inline int __cvmx_usb_get_data_pid(struct cvmx_usb_pipe *pipe) | |
617 | { | |
618 | if (pipe->pid_toggle) | |
619 | return 2; /* Data1 */ | |
620 | else | |
621 | return 0; /* Data0 */ | |
622 | } | |
623 | ||
624 | ||
625 | /** | |
626 | * Return the number of USB ports supported by this Octeon | |
627 | * chip. If the chip doesn't support USB, or is not supported | |
628 | * by this API, a zero will be returned. Most Octeon chips | |
629 | * support one usb port, but some support two ports. | |
630 | * cvmx_usb_initialize() must be called on independent | |
631 | * struct cvmx_usb_state. | |
632 | * | |
633 | * Returns: Number of port, zero if usb isn't supported | |
634 | */ | |
635 | static int cvmx_usb_get_num_ports(void) | |
636 | { | |
637 | int arch_ports = 0; | |
638 | ||
639 | if (OCTEON_IS_MODEL(OCTEON_CN56XX)) | |
640 | arch_ports = 1; | |
641 | else if (OCTEON_IS_MODEL(OCTEON_CN52XX)) | |
642 | arch_ports = 2; | |
643 | else if (OCTEON_IS_MODEL(OCTEON_CN50XX)) | |
644 | arch_ports = 1; | |
645 | else if (OCTEON_IS_MODEL(OCTEON_CN31XX)) | |
646 | arch_ports = 1; | |
647 | else if (OCTEON_IS_MODEL(OCTEON_CN30XX)) | |
648 | arch_ports = 1; | |
649 | else | |
650 | arch_ports = 0; | |
651 | ||
652 | return arch_ports; | |
653 | } | |
654 | ||
655 | ||
656 | /** | |
657 | * Allocate a usb transaction for use | |
658 | * | |
659 | * @usb: USB device state populated by | |
660 | * cvmx_usb_initialize(). | |
661 | * | |
662 | * Returns: Transaction or NULL | |
663 | */ | |
cb61c600 | 664 | static inline struct cvmx_usb_transaction *__cvmx_usb_alloc_transaction(struct cvmx_usb_state *usb) |
6570b4a9 AK |
665 | { |
666 | struct cvmx_usb_transaction *t; | |
667 | t = usb->free_transaction_head; | |
668 | if (t) { | |
669 | usb->free_transaction_head = t->next; | |
670 | if (!usb->free_transaction_head) | |
671 | usb->free_transaction_tail = NULL; | |
672 | } | |
673 | if (t) { | |
674 | memset(t, 0, sizeof(*t)); | |
675 | t->flags = __CVMX_USB_TRANSACTION_FLAGS_IN_USE; | |
676 | } | |
677 | return t; | |
678 | } | |
679 | ||
680 | ||
681 | /** | |
682 | * Free a usb transaction | |
683 | * | |
684 | * @usb: USB device state populated by | |
685 | * cvmx_usb_initialize(). | |
686 | * @transaction: | |
687 | * Transaction to free | |
688 | */ | |
cb61c600 | 689 | static inline void __cvmx_usb_free_transaction(struct cvmx_usb_state *usb, |
6570b4a9 AK |
690 | struct cvmx_usb_transaction *transaction) |
691 | { | |
692 | transaction->flags = 0; | |
693 | transaction->prev = NULL; | |
694 | transaction->next = NULL; | |
695 | if (usb->free_transaction_tail) | |
696 | usb->free_transaction_tail->next = transaction; | |
697 | else | |
698 | usb->free_transaction_head = transaction; | |
699 | usb->free_transaction_tail = transaction; | |
700 | } | |
701 | ||
702 | ||
703 | /** | |
704 | * Add a pipe to the tail of a list | |
705 | * @list: List to add pipe to | |
706 | * @pipe: Pipe to add | |
707 | */ | |
708 | static inline void __cvmx_usb_append_pipe(struct cvmx_usb_pipe_list *list, struct cvmx_usb_pipe *pipe) | |
709 | { | |
710 | pipe->next = NULL; | |
711 | pipe->prev = list->tail; | |
712 | if (list->tail) | |
713 | list->tail->next = pipe; | |
714 | else | |
715 | list->head = pipe; | |
716 | list->tail = pipe; | |
717 | } | |
718 | ||
719 | ||
720 | /** | |
721 | * Remove a pipe from a list | |
722 | * @list: List to remove pipe from | |
723 | * @pipe: Pipe to remove | |
724 | */ | |
725 | static inline void __cvmx_usb_remove_pipe(struct cvmx_usb_pipe_list *list, struct cvmx_usb_pipe *pipe) | |
726 | { | |
727 | if (list->head == pipe) { | |
728 | list->head = pipe->next; | |
729 | pipe->next = NULL; | |
730 | if (list->head) | |
731 | list->head->prev = NULL; | |
732 | else | |
733 | list->tail = NULL; | |
734 | } else if (list->tail == pipe) { | |
735 | list->tail = pipe->prev; | |
736 | list->tail->next = NULL; | |
737 | pipe->prev = NULL; | |
738 | } else { | |
739 | pipe->prev->next = pipe->next; | |
740 | pipe->next->prev = pipe->prev; | |
741 | pipe->prev = NULL; | |
742 | pipe->next = NULL; | |
743 | } | |
744 | } | |
745 | ||
746 | ||
747 | /** | |
748 | * Initialize a USB port for use. This must be called before any | |
749 | * other access to the Octeon USB port is made. The port starts | |
750 | * off in the disabled state. | |
751 | * | |
cb61c600 | 752 | * @usb: Pointer to an empty struct cvmx_usb_state |
6570b4a9 AK |
753 | * that will be populated by the initialize call. |
754 | * This structure is then passed to all other USB | |
755 | * functions. | |
756 | * @usb_port_number: | |
757 | * Which Octeon USB port to initialize. | |
758 | * | |
759 | * Returns: 0 or a negative error code. | |
760 | */ | |
cb61c600 | 761 | static int cvmx_usb_initialize(struct cvmx_usb_state *usb, |
6570b4a9 AK |
762 | int usb_port_number) |
763 | { | |
764 | union cvmx_usbnx_clk_ctl usbn_clk_ctl; | |
765 | union cvmx_usbnx_usbp_ctl_status usbn_usbp_ctl_status; | |
6570b4a9 AK |
766 | enum cvmx_usb_initialize_flags flags = 0; |
767 | ||
6570b4a9 AK |
768 | /* At first allow 0-1 for the usb port number */ |
769 | if ((usb_port_number < 0) || (usb_port_number > 1)) | |
770 | return -EINVAL; | |
771 | /* For all chips except 52XX there is only one port */ | |
772 | if (!OCTEON_IS_MODEL(OCTEON_CN52XX) && (usb_port_number > 0)) | |
773 | return -EINVAL; | |
774 | /* Try to determine clock type automatically */ | |
775 | if (octeon_usb_get_clock_type() == USB_CLOCK_TYPE_CRYSTAL_12) { | |
776 | /* Only 12 MHZ crystals are supported */ | |
777 | flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_XI; | |
778 | } else { | |
779 | flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND; | |
780 | ||
781 | switch (octeon_usb_get_clock_type()) { | |
782 | case USB_CLOCK_TYPE_REF_12: | |
783 | flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ; | |
784 | break; | |
785 | case USB_CLOCK_TYPE_REF_24: | |
786 | flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ; | |
787 | break; | |
788 | case USB_CLOCK_TYPE_REF_48: | |
789 | flags |= CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ; | |
790 | break; | |
791 | default: | |
792 | return -EINVAL; | |
793 | break; | |
794 | } | |
795 | } | |
796 | ||
797 | memset(usb, 0, sizeof(*usb)); | |
798 | usb->init_flags = flags; | |
799 | ||
800 | /* Initialize the USB state structure */ | |
801 | { | |
802 | int i; | |
803 | usb->index = usb_port_number; | |
804 | ||
805 | /* Initialize the transaction double linked list */ | |
806 | usb->free_transaction_head = NULL; | |
807 | usb->free_transaction_tail = NULL; | |
808 | for (i = 0; i < MAX_TRANSACTIONS; i++) | |
809 | __cvmx_usb_free_transaction(usb, usb->transaction + i); | |
810 | for (i = 0; i < MAX_PIPES; i++) | |
811 | __cvmx_usb_append_pipe(&usb->free_pipes, usb->pipe + i); | |
812 | } | |
813 | ||
814 | /* | |
815 | * Power On Reset and PHY Initialization | |
816 | * | |
817 | * 1. Wait for DCOK to assert (nothing to do) | |
818 | * | |
819 | * 2a. Write USBN0/1_CLK_CTL[POR] = 1 and | |
820 | * USBN0/1_CLK_CTL[HRST,PRST,HCLK_RST] = 0 | |
821 | */ | |
822 | usbn_clk_ctl.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index)); | |
823 | usbn_clk_ctl.s.por = 1; | |
824 | usbn_clk_ctl.s.hrst = 0; | |
825 | usbn_clk_ctl.s.prst = 0; | |
826 | usbn_clk_ctl.s.hclk_rst = 0; | |
827 | usbn_clk_ctl.s.enable = 0; | |
828 | /* | |
829 | * 2b. Select the USB reference clock/crystal parameters by writing | |
830 | * appropriate values to USBN0/1_CLK_CTL[P_C_SEL, P_RTYPE, P_COM_ON] | |
831 | */ | |
832 | if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_XO_GND) { | |
833 | /* | |
834 | * The USB port uses 12/24/48MHz 2.5V board clock | |
835 | * source at USB_XO. USB_XI should be tied to GND. | |
836 | * Most Octeon evaluation boards require this setting | |
837 | */ | |
838 | if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) { | |
839 | /* From CN31XX,CN30XX manual */ | |
840 | usbn_clk_ctl.cn31xx.p_rclk = 1; | |
841 | usbn_clk_ctl.cn31xx.p_xenbn = 0; | |
842 | } else if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN50XX)) | |
843 | /* From CN56XX,CN50XX manual */ | |
844 | usbn_clk_ctl.cn56xx.p_rtype = 2; | |
845 | else | |
846 | /* From CN52XX manual */ | |
847 | usbn_clk_ctl.cn52xx.p_rtype = 1; | |
848 | ||
849 | switch (flags & CVMX_USB_INITIALIZE_FLAGS_CLOCK_MHZ_MASK) { | |
850 | case CVMX_USB_INITIALIZE_FLAGS_CLOCK_12MHZ: | |
851 | usbn_clk_ctl.s.p_c_sel = 0; | |
852 | break; | |
853 | case CVMX_USB_INITIALIZE_FLAGS_CLOCK_24MHZ: | |
854 | usbn_clk_ctl.s.p_c_sel = 1; | |
855 | break; | |
856 | case CVMX_USB_INITIALIZE_FLAGS_CLOCK_48MHZ: | |
857 | usbn_clk_ctl.s.p_c_sel = 2; | |
858 | break; | |
859 | } | |
860 | } else { | |
861 | /* | |
862 | * The USB port uses a 12MHz crystal as clock source | |
863 | * at USB_XO and USB_XI | |
864 | */ | |
865 | if (OCTEON_IS_MODEL(OCTEON_CN3XXX)) { | |
866 | /* From CN31XX,CN30XX manual */ | |
867 | usbn_clk_ctl.cn31xx.p_rclk = 1; | |
868 | usbn_clk_ctl.cn31xx.p_xenbn = 1; | |
869 | } else if (OCTEON_IS_MODEL(OCTEON_CN56XX) || OCTEON_IS_MODEL(OCTEON_CN50XX)) | |
870 | /* From CN56XX,CN50XX manual */ | |
871 | usbn_clk_ctl.cn56xx.p_rtype = 0; | |
872 | else | |
873 | /* From CN52XX manual */ | |
874 | usbn_clk_ctl.cn52xx.p_rtype = 0; | |
875 | ||
876 | usbn_clk_ctl.s.p_c_sel = 0; | |
877 | } | |
878 | /* | |
879 | * 2c. Select the HCLK via writing USBN0/1_CLK_CTL[DIVIDE, DIVIDE2] and | |
880 | * setting USBN0/1_CLK_CTL[ENABLE] = 1. Divide the core clock down | |
881 | * such that USB is as close as possible to 125Mhz | |
882 | */ | |
883 | { | |
884 | int divisor = (octeon_get_clock_rate()+125000000-1)/125000000; | |
885 | /* Lower than 4 doesn't seem to work properly */ | |
886 | if (divisor < 4) | |
887 | divisor = 4; | |
888 | usbn_clk_ctl.s.divide = divisor; | |
889 | usbn_clk_ctl.s.divide2 = 0; | |
890 | } | |
891 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index), | |
892 | usbn_clk_ctl.u64); | |
893 | /* 2d. Write USBN0/1_CLK_CTL[HCLK_RST] = 1 */ | |
894 | usbn_clk_ctl.s.hclk_rst = 1; | |
895 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index), | |
896 | usbn_clk_ctl.u64); | |
897 | /* 2e. Wait 64 core-clock cycles for HCLK to stabilize */ | |
898 | cvmx_wait(64); | |
899 | /* | |
900 | * 3. Program the power-on reset field in the USBN clock-control | |
901 | * register: | |
902 | * USBN_CLK_CTL[POR] = 0 | |
903 | */ | |
904 | usbn_clk_ctl.s.por = 0; | |
905 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index), | |
906 | usbn_clk_ctl.u64); | |
907 | /* 4. Wait 1 ms for PHY clock to start */ | |
908 | mdelay(1); | |
909 | /* | |
910 | * 5. Program the Reset input from automatic test equipment field in the | |
911 | * USBP control and status register: | |
912 | * USBN_USBP_CTL_STATUS[ATE_RESET] = 1 | |
913 | */ | |
914 | usbn_usbp_ctl_status.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index)); | |
915 | usbn_usbp_ctl_status.s.ate_reset = 1; | |
916 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index), | |
917 | usbn_usbp_ctl_status.u64); | |
918 | /* 6. Wait 10 cycles */ | |
919 | cvmx_wait(10); | |
920 | /* | |
921 | * 7. Clear ATE_RESET field in the USBN clock-control register: | |
922 | * USBN_USBP_CTL_STATUS[ATE_RESET] = 0 | |
923 | */ | |
924 | usbn_usbp_ctl_status.s.ate_reset = 0; | |
925 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index), | |
926 | usbn_usbp_ctl_status.u64); | |
927 | /* | |
928 | * 8. Program the PHY reset field in the USBN clock-control register: | |
929 | * USBN_CLK_CTL[PRST] = 1 | |
930 | */ | |
931 | usbn_clk_ctl.s.prst = 1; | |
932 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index), | |
933 | usbn_clk_ctl.u64); | |
934 | /* | |
935 | * 9. Program the USBP control and status register to select host or | |
936 | * device mode. USBN_USBP_CTL_STATUS[HST_MODE] = 0 for host, = 1 for | |
937 | * device | |
938 | */ | |
939 | usbn_usbp_ctl_status.s.hst_mode = 0; | |
940 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_USBP_CTL_STATUS(usb->index), | |
941 | usbn_usbp_ctl_status.u64); | |
942 | /* 10. Wait 1 us */ | |
943 | udelay(1); | |
944 | /* | |
945 | * 11. Program the hreset_n field in the USBN clock-control register: | |
946 | * USBN_CLK_CTL[HRST] = 1 | |
947 | */ | |
948 | usbn_clk_ctl.s.hrst = 1; | |
949 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index), | |
950 | usbn_clk_ctl.u64); | |
951 | /* 12. Proceed to USB core initialization */ | |
952 | usbn_clk_ctl.s.enable = 1; | |
953 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index), | |
954 | usbn_clk_ctl.u64); | |
955 | udelay(1); | |
956 | ||
957 | /* | |
958 | * USB Core Initialization | |
959 | * | |
960 | * 1. Read USBC_GHWCFG1, USBC_GHWCFG2, USBC_GHWCFG3, USBC_GHWCFG4 to | |
961 | * determine USB core configuration parameters. | |
962 | * | |
963 | * Nothing needed | |
964 | * | |
965 | * 2. Program the following fields in the global AHB configuration | |
966 | * register (USBC_GAHBCFG) | |
967 | * DMA mode, USBC_GAHBCFG[DMAEn]: 1 = DMA mode, 0 = slave mode | |
968 | * Burst length, USBC_GAHBCFG[HBSTLEN] = 0 | |
969 | * Nonperiodic TxFIFO empty level (slave mode only), | |
970 | * USBC_GAHBCFG[NPTXFEMPLVL] | |
971 | * Periodic TxFIFO empty level (slave mode only), | |
972 | * USBC_GAHBCFG[PTXFEMPLVL] | |
973 | * Global interrupt mask, USBC_GAHBCFG[GLBLINTRMSK] = 1 | |
974 | */ | |
975 | { | |
976 | union cvmx_usbcx_gahbcfg usbcx_gahbcfg; | |
977 | /* Due to an errata, CN31XX doesn't support DMA */ | |
978 | if (OCTEON_IS_MODEL(OCTEON_CN31XX)) | |
979 | usb->init_flags |= CVMX_USB_INITIALIZE_FLAGS_NO_DMA; | |
980 | usbcx_gahbcfg.u32 = 0; | |
981 | usbcx_gahbcfg.s.dmaen = !(usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA); | |
982 | if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) | |
983 | /* Only use one channel with non DMA */ | |
984 | usb->idle_hardware_channels = 0x1; | |
985 | else if (OCTEON_IS_MODEL(OCTEON_CN5XXX)) | |
986 | /* CN5XXX have an errata with channel 3 */ | |
987 | usb->idle_hardware_channels = 0xf7; | |
988 | else | |
989 | usb->idle_hardware_channels = 0xff; | |
990 | usbcx_gahbcfg.s.hbstlen = 0; | |
991 | usbcx_gahbcfg.s.nptxfemplvl = 1; | |
992 | usbcx_gahbcfg.s.ptxfemplvl = 1; | |
993 | usbcx_gahbcfg.s.glblintrmsk = 1; | |
994 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_GAHBCFG(usb->index), | |
995 | usbcx_gahbcfg.u32); | |
996 | } | |
997 | /* | |
998 | * 3. Program the following fields in USBC_GUSBCFG register. | |
999 | * HS/FS timeout calibration, USBC_GUSBCFG[TOUTCAL] = 0 | |
1000 | * ULPI DDR select, USBC_GUSBCFG[DDRSEL] = 0 | |
1001 | * USB turnaround time, USBC_GUSBCFG[USBTRDTIM] = 0x5 | |
1002 | * PHY low-power clock select, USBC_GUSBCFG[PHYLPWRCLKSEL] = 0 | |
1003 | */ | |
1004 | { | |
1005 | union cvmx_usbcx_gusbcfg usbcx_gusbcfg; | |
1006 | usbcx_gusbcfg.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index)); | |
1007 | usbcx_gusbcfg.s.toutcal = 0; | |
1008 | usbcx_gusbcfg.s.ddrsel = 0; | |
1009 | usbcx_gusbcfg.s.usbtrdtim = 0x5; | |
1010 | usbcx_gusbcfg.s.phylpwrclksel = 0; | |
1011 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_GUSBCFG(usb->index), | |
1012 | usbcx_gusbcfg.u32); | |
1013 | } | |
1014 | /* | |
1015 | * 4. The software must unmask the following bits in the USBC_GINTMSK | |
1016 | * register. | |
1017 | * OTG interrupt mask, USBC_GINTMSK[OTGINTMSK] = 1 | |
1018 | * Mode mismatch interrupt mask, USBC_GINTMSK[MODEMISMSK] = 1 | |
1019 | */ | |
1020 | { | |
1021 | union cvmx_usbcx_gintmsk usbcx_gintmsk; | |
1022 | int channel; | |
1023 | ||
1024 | usbcx_gintmsk.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GINTMSK(usb->index)); | |
1025 | usbcx_gintmsk.s.otgintmsk = 1; | |
1026 | usbcx_gintmsk.s.modemismsk = 1; | |
1027 | usbcx_gintmsk.s.hchintmsk = 1; | |
1028 | usbcx_gintmsk.s.sofmsk = 0; | |
1029 | /* We need RX FIFO interrupts if we don't have DMA */ | |
1030 | if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) | |
1031 | usbcx_gintmsk.s.rxflvlmsk = 1; | |
1032 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTMSK(usb->index), | |
1033 | usbcx_gintmsk.u32); | |
1034 | ||
1035 | /* | |
1036 | * Disable all channel interrupts. We'll enable them per channel | |
1037 | * later. | |
1038 | */ | |
1039 | for (channel = 0; channel < 8; channel++) | |
1040 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0); | |
1041 | } | |
1042 | ||
1043 | { | |
1044 | /* | |
1045 | * Host Port Initialization | |
1046 | * | |
1047 | * 1. Program the host-port interrupt-mask field to unmask, | |
1048 | * USBC_GINTMSK[PRTINT] = 1 | |
1049 | */ | |
1050 | USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, | |
1051 | prtintmsk, 1); | |
1052 | USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, | |
1053 | disconnintmsk, 1); | |
1054 | /* | |
1055 | * 2. Program the USBC_HCFG register to select full-speed host | |
1056 | * or high-speed host. | |
1057 | */ | |
1058 | { | |
1059 | union cvmx_usbcx_hcfg usbcx_hcfg; | |
1060 | usbcx_hcfg.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCFG(usb->index)); | |
1061 | usbcx_hcfg.s.fslssupp = 0; | |
1062 | usbcx_hcfg.s.fslspclksel = 0; | |
1063 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCFG(usb->index), usbcx_hcfg.u32); | |
1064 | } | |
1065 | /* | |
1066 | * 3. Program the port power bit to drive VBUS on the USB, | |
1067 | * USBC_HPRT[PRTPWR] = 1 | |
1068 | */ | |
1069 | USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtpwr, 1); | |
1070 | ||
1071 | /* | |
1072 | * Steps 4-15 from the manual are done later in the port enable | |
1073 | */ | |
1074 | } | |
1075 | ||
1076 | return 0; | |
1077 | } | |
1078 | ||
1079 | ||
1080 | /** | |
1081 | * Shutdown a USB port after a call to cvmx_usb_initialize(). | |
1082 | * The port should be disabled with all pipes closed when this | |
1083 | * function is called. | |
1084 | * | |
cb61c600 | 1085 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
1086 | * |
1087 | * Returns: 0 or a negative error code. | |
1088 | */ | |
cb61c600 | 1089 | static int cvmx_usb_shutdown(struct cvmx_usb_state *usb) |
6570b4a9 AK |
1090 | { |
1091 | union cvmx_usbnx_clk_ctl usbn_clk_ctl; | |
6570b4a9 AK |
1092 | |
1093 | /* Make sure all pipes are closed */ | |
1094 | if (usb->idle_pipes.head || | |
1095 | usb->active_pipes[CVMX_USB_TRANSFER_ISOCHRONOUS].head || | |
1096 | usb->active_pipes[CVMX_USB_TRANSFER_INTERRUPT].head || | |
1097 | usb->active_pipes[CVMX_USB_TRANSFER_CONTROL].head || | |
1098 | usb->active_pipes[CVMX_USB_TRANSFER_BULK].head) | |
1099 | return -EBUSY; | |
1100 | ||
1101 | /* Disable the clocks and put them in power on reset */ | |
1102 | usbn_clk_ctl.u64 = __cvmx_usb_read_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index)); | |
1103 | usbn_clk_ctl.s.enable = 1; | |
1104 | usbn_clk_ctl.s.por = 1; | |
1105 | usbn_clk_ctl.s.hclk_rst = 1; | |
1106 | usbn_clk_ctl.s.prst = 0; | |
1107 | usbn_clk_ctl.s.hrst = 0; | |
1108 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_CLK_CTL(usb->index), | |
1109 | usbn_clk_ctl.u64); | |
1110 | return 0; | |
1111 | } | |
1112 | ||
1113 | ||
1114 | /** | |
1115 | * Enable a USB port. After this call succeeds, the USB port is | |
1116 | * online and servicing requests. | |
1117 | * | |
cb61c600 | 1118 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
1119 | * |
1120 | * Returns: 0 or a negative error code. | |
1121 | */ | |
cb61c600 | 1122 | static int cvmx_usb_enable(struct cvmx_usb_state *usb) |
6570b4a9 AK |
1123 | { |
1124 | union cvmx_usbcx_ghwcfg3 usbcx_ghwcfg3; | |
6570b4a9 AK |
1125 | |
1126 | usb->usbcx_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index)); | |
1127 | ||
1128 | /* | |
1129 | * If the port is already enabled the just return. We don't need to do | |
1130 | * anything | |
1131 | */ | |
1132 | if (usb->usbcx_hprt.s.prtena) | |
1133 | return 0; | |
1134 | ||
1135 | /* If there is nothing plugged into the port then fail immediately */ | |
1136 | if (!usb->usbcx_hprt.s.prtconnsts) { | |
1137 | return -ETIMEDOUT; | |
1138 | } | |
1139 | ||
1140 | /* Program the port reset bit to start the reset process */ | |
1141 | USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtrst, 1); | |
1142 | ||
1143 | /* | |
1144 | * Wait at least 50ms (high speed), or 10ms (full speed) for the reset | |
1145 | * process to complete. | |
1146 | */ | |
1147 | mdelay(50); | |
1148 | ||
1149 | /* Program the port reset bit to 0, USBC_HPRT[PRTRST] = 0 */ | |
1150 | USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtrst, 0); | |
1151 | ||
1152 | /* Wait for the USBC_HPRT[PRTENA]. */ | |
1153 | if (CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, | |
1154 | prtena, ==, 1, 100000)) | |
1155 | return -ETIMEDOUT; | |
1156 | ||
1157 | /* | |
1158 | * Read the port speed field to get the enumerated speed, | |
1159 | * USBC_HPRT[PRTSPD]. | |
1160 | */ | |
1161 | usb->usbcx_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index)); | |
1162 | usbcx_ghwcfg3.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GHWCFG3(usb->index)); | |
1163 | ||
1164 | /* | |
1165 | * 13. Program the USBC_GRXFSIZ register to select the size of the | |
1166 | * receive FIFO (25%). | |
1167 | */ | |
1168 | USB_SET_FIELD32(CVMX_USBCX_GRXFSIZ(usb->index), union cvmx_usbcx_grxfsiz, | |
1169 | rxfdep, usbcx_ghwcfg3.s.dfifodepth / 4); | |
1170 | /* | |
1171 | * 14. Program the USBC_GNPTXFSIZ register to select the size and the | |
1172 | * start address of the non- periodic transmit FIFO for nonperiodic | |
1173 | * transactions (50%). | |
1174 | */ | |
1175 | { | |
1176 | union cvmx_usbcx_gnptxfsiz siz; | |
1177 | siz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index)); | |
1178 | siz.s.nptxfdep = usbcx_ghwcfg3.s.dfifodepth / 2; | |
1179 | siz.s.nptxfstaddr = usbcx_ghwcfg3.s.dfifodepth / 4; | |
1180 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_GNPTXFSIZ(usb->index), siz.u32); | |
1181 | } | |
1182 | /* | |
1183 | * 15. Program the USBC_HPTXFSIZ register to select the size and start | |
1184 | * address of the periodic transmit FIFO for periodic transactions | |
1185 | * (25%). | |
1186 | */ | |
1187 | { | |
1188 | union cvmx_usbcx_hptxfsiz siz; | |
1189 | siz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index)); | |
1190 | siz.s.ptxfsize = usbcx_ghwcfg3.s.dfifodepth / 4; | |
1191 | siz.s.ptxfstaddr = 3 * usbcx_ghwcfg3.s.dfifodepth / 4; | |
1192 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HPTXFSIZ(usb->index), siz.u32); | |
1193 | } | |
1194 | /* Flush all FIFOs */ | |
1195 | USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl, txfnum, 0x10); | |
1196 | USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl, txfflsh, 1); | |
1197 | CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl, | |
1198 | txfflsh, ==, 0, 100); | |
1199 | USB_SET_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl, rxfflsh, 1); | |
1200 | CVMX_WAIT_FOR_FIELD32(CVMX_USBCX_GRSTCTL(usb->index), union cvmx_usbcx_grstctl, | |
1201 | rxfflsh, ==, 0, 100); | |
1202 | ||
1203 | return 0; | |
1204 | } | |
1205 | ||
1206 | ||
1207 | /** | |
1208 | * Disable a USB port. After this call the USB port will not | |
1209 | * generate data transfers and will not generate events. | |
1210 | * Transactions in process will fail and call their | |
1211 | * associated callbacks. | |
1212 | * | |
cb61c600 | 1213 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
1214 | * |
1215 | * Returns: 0 or a negative error code. | |
1216 | */ | |
cb61c600 | 1217 | static int cvmx_usb_disable(struct cvmx_usb_state *usb) |
6570b4a9 | 1218 | { |
6570b4a9 AK |
1219 | /* Disable the port */ |
1220 | USB_SET_FIELD32(CVMX_USBCX_HPRT(usb->index), union cvmx_usbcx_hprt, prtena, 1); | |
1221 | return 0; | |
1222 | } | |
1223 | ||
1224 | ||
1225 | /** | |
1226 | * Get the current state of the USB port. Use this call to | |
1227 | * determine if the usb port has anything connected, is enabled, | |
1228 | * or has some sort of error condition. The return value of this | |
1229 | * call has "changed" bits to signal of the value of some fields | |
29a202fa | 1230 | * have changed between calls. |
6570b4a9 | 1231 | * |
cb61c600 | 1232 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
1233 | * |
1234 | * Returns: Port status information | |
1235 | */ | |
cb61c600 | 1236 | static struct cvmx_usb_port_status cvmx_usb_get_status(struct cvmx_usb_state *usb) |
6570b4a9 AK |
1237 | { |
1238 | union cvmx_usbcx_hprt usbc_hprt; | |
1239 | struct cvmx_usb_port_status result; | |
6570b4a9 AK |
1240 | |
1241 | memset(&result, 0, sizeof(result)); | |
1242 | ||
1243 | usbc_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index)); | |
1244 | result.port_enabled = usbc_hprt.s.prtena; | |
1245 | result.port_over_current = usbc_hprt.s.prtovrcurract; | |
1246 | result.port_powered = usbc_hprt.s.prtpwr; | |
1247 | result.port_speed = usbc_hprt.s.prtspd; | |
1248 | result.connected = usbc_hprt.s.prtconnsts; | |
1249 | result.connect_change = (result.connected != usb->port_status.connected); | |
1250 | ||
1251 | return result; | |
1252 | } | |
1253 | ||
6570b4a9 AK |
1254 | /** |
1255 | * Convert a USB transaction into a handle | |
1256 | * | |
cb61c600 | 1257 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
1258 | * @transaction: |
1259 | * Transaction to get handle for | |
1260 | * | |
1261 | * Returns: Handle | |
1262 | */ | |
cb61c600 | 1263 | static inline int __cvmx_usb_get_submit_handle(struct cvmx_usb_state *usb, |
6570b4a9 AK |
1264 | struct cvmx_usb_transaction *transaction) |
1265 | { | |
1266 | return ((unsigned long)transaction - (unsigned long)usb->transaction) / | |
1267 | sizeof(*transaction); | |
1268 | } | |
1269 | ||
1270 | ||
1271 | /** | |
1272 | * Convert a USB pipe into a handle | |
1273 | * | |
cb61c600 | 1274 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
1275 | * @pipe: Pipe to get handle for |
1276 | * | |
1277 | * Returns: Handle | |
1278 | */ | |
cb61c600 | 1279 | static inline int __cvmx_usb_get_pipe_handle(struct cvmx_usb_state *usb, |
6570b4a9 AK |
1280 | struct cvmx_usb_pipe *pipe) |
1281 | { | |
1282 | return ((unsigned long)pipe - (unsigned long)usb->pipe) / sizeof(*pipe); | |
1283 | } | |
1284 | ||
1285 | ||
1286 | /** | |
1287 | * Open a virtual pipe between the host and a USB device. A pipe | |
1288 | * must be opened before data can be transferred between a device | |
1289 | * and Octeon. | |
1290 | * | |
cb61c600 | 1291 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
1292 | * @device_addr: |
1293 | * USB device address to open the pipe to | |
1294 | * (0-127). | |
1295 | * @endpoint_num: | |
1296 | * USB endpoint number to open the pipe to | |
1297 | * (0-15). | |
1298 | * @device_speed: | |
1299 | * The speed of the device the pipe is going | |
1300 | * to. This must match the device's speed, | |
1301 | * which may be different than the port speed. | |
1302 | * @max_packet: The maximum packet length the device can | |
1303 | * transmit/receive (low speed=0-8, full | |
1304 | * speed=0-1023, high speed=0-1024). This value | |
1305 | * comes from the standard endpoint descriptor | |
1306 | * field wMaxPacketSize bits <10:0>. | |
1307 | * @transfer_type: | |
1308 | * The type of transfer this pipe is for. | |
1309 | * @transfer_dir: | |
1310 | * The direction the pipe is in. This is not | |
1311 | * used for control pipes. | |
1312 | * @interval: For ISOCHRONOUS and INTERRUPT transfers, | |
1313 | * this is how often the transfer is scheduled | |
1314 | * for. All other transfers should specify | |
1315 | * zero. The units are in frames (8000/sec at | |
1316 | * high speed, 1000/sec for full speed). | |
1317 | * @multi_count: | |
1318 | * For high speed devices, this is the maximum | |
1319 | * allowed number of packet per microframe. | |
1320 | * Specify zero for non high speed devices. This | |
1321 | * value comes from the standard endpoint descriptor | |
1322 | * field wMaxPacketSize bits <12:11>. | |
1323 | * @hub_device_addr: | |
1324 | * Hub device address this device is connected | |
1325 | * to. Devices connected directly to Octeon | |
1326 | * use zero. This is only used when the device | |
1327 | * is full/low speed behind a high speed hub. | |
1328 | * The address will be of the high speed hub, | |
1329 | * not and full speed hubs after it. | |
1330 | * @hub_port: Which port on the hub the device is | |
1331 | * connected. Use zero for devices connected | |
1332 | * directly to Octeon. Like hub_device_addr, | |
1333 | * this is only used for full/low speed | |
1334 | * devices behind a high speed hub. | |
1335 | * | |
1336 | * Returns: A non negative value is a pipe handle. Negative | |
1337 | * values are error codes. | |
1338 | */ | |
cb61c600 | 1339 | static int cvmx_usb_open_pipe(struct cvmx_usb_state *usb, |
6570b4a9 AK |
1340 | int device_addr, int endpoint_num, |
1341 | enum cvmx_usb_speed device_speed, int max_packet, | |
1342 | enum cvmx_usb_transfer transfer_type, | |
1343 | enum cvmx_usb_direction transfer_dir, | |
1344 | int interval, int multi_count, | |
1345 | int hub_device_addr, int hub_port) | |
1346 | { | |
1347 | struct cvmx_usb_pipe *pipe; | |
6570b4a9 AK |
1348 | |
1349 | if (unlikely((device_addr < 0) || (device_addr > MAX_USB_ADDRESS))) | |
1350 | return -EINVAL; | |
1351 | if (unlikely((endpoint_num < 0) || (endpoint_num > MAX_USB_ENDPOINT))) | |
1352 | return -EINVAL; | |
1353 | if (unlikely(device_speed > CVMX_USB_SPEED_LOW)) | |
1354 | return -EINVAL; | |
1355 | if (unlikely((max_packet <= 0) || (max_packet > 1024))) | |
1356 | return -EINVAL; | |
1357 | if (unlikely(transfer_type > CVMX_USB_TRANSFER_INTERRUPT)) | |
1358 | return -EINVAL; | |
1359 | if (unlikely((transfer_dir != CVMX_USB_DIRECTION_OUT) && | |
1360 | (transfer_dir != CVMX_USB_DIRECTION_IN))) | |
1361 | return -EINVAL; | |
1362 | if (unlikely(interval < 0)) | |
1363 | return -EINVAL; | |
1364 | if (unlikely((transfer_type == CVMX_USB_TRANSFER_CONTROL) && interval)) | |
1365 | return -EINVAL; | |
1366 | if (unlikely(multi_count < 0)) | |
1367 | return -EINVAL; | |
1368 | if (unlikely((device_speed != CVMX_USB_SPEED_HIGH) && | |
1369 | (multi_count != 0))) | |
1370 | return -EINVAL; | |
1371 | if (unlikely((hub_device_addr < 0) || (hub_device_addr > MAX_USB_ADDRESS))) | |
1372 | return -EINVAL; | |
1373 | if (unlikely((hub_port < 0) || (hub_port > MAX_USB_HUB_PORT))) | |
1374 | return -EINVAL; | |
1375 | ||
1376 | /* Find a free pipe */ | |
1377 | pipe = usb->free_pipes.head; | |
1378 | if (!pipe) | |
1379 | return -ENOMEM; | |
1380 | __cvmx_usb_remove_pipe(&usb->free_pipes, pipe); | |
1381 | pipe->flags = __CVMX_USB_PIPE_FLAGS_OPEN; | |
1382 | if ((device_speed == CVMX_USB_SPEED_HIGH) && | |
1383 | (transfer_dir == CVMX_USB_DIRECTION_OUT) && | |
1384 | (transfer_type == CVMX_USB_TRANSFER_BULK)) | |
1385 | pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING; | |
1386 | pipe->device_addr = device_addr; | |
1387 | pipe->endpoint_num = endpoint_num; | |
1388 | pipe->device_speed = device_speed; | |
1389 | pipe->max_packet = max_packet; | |
1390 | pipe->transfer_type = transfer_type; | |
1391 | pipe->transfer_dir = transfer_dir; | |
1392 | /* | |
1393 | * All pipes use interval to rate limit NAK processing. Force an | |
1394 | * interval if one wasn't supplied | |
1395 | */ | |
1396 | if (!interval) | |
1397 | interval = 1; | |
1398 | if (__cvmx_usb_pipe_needs_split(usb, pipe)) { | |
1399 | pipe->interval = interval*8; | |
1400 | /* Force start splits to be schedule on uFrame 0 */ | |
1401 | pipe->next_tx_frame = ((usb->frame_number+7)&~7) + pipe->interval; | |
1402 | } else { | |
1403 | pipe->interval = interval; | |
1404 | pipe->next_tx_frame = usb->frame_number + pipe->interval; | |
1405 | } | |
1406 | pipe->multi_count = multi_count; | |
1407 | pipe->hub_device_addr = hub_device_addr; | |
1408 | pipe->hub_port = hub_port; | |
1409 | pipe->pid_toggle = 0; | |
1410 | pipe->split_sc_frame = -1; | |
1411 | __cvmx_usb_append_pipe(&usb->idle_pipes, pipe); | |
1412 | ||
1413 | /* | |
1414 | * We don't need to tell the hardware about this pipe yet since | |
1415 | * it doesn't have any submitted requests | |
1416 | */ | |
1417 | ||
1418 | return __cvmx_usb_get_pipe_handle(usb, pipe); | |
1419 | } | |
1420 | ||
1421 | ||
1422 | /** | |
1423 | * Poll the RX FIFOs and remove data as needed. This function is only used | |
1424 | * in non DMA mode. It is very important that this function be called quickly | |
1425 | * enough to prevent FIFO overflow. | |
1426 | * | |
cb61c600 | 1427 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 | 1428 | */ |
cb61c600 | 1429 | static void __cvmx_usb_poll_rx_fifo(struct cvmx_usb_state *usb) |
6570b4a9 AK |
1430 | { |
1431 | union cvmx_usbcx_grxstsph rx_status; | |
1432 | int channel; | |
1433 | int bytes; | |
1434 | uint64_t address; | |
1435 | uint32_t *ptr; | |
1436 | ||
1437 | rx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GRXSTSPH(usb->index)); | |
1438 | /* Only read data if IN data is there */ | |
1439 | if (rx_status.s.pktsts != 2) | |
1440 | return; | |
1441 | /* Check if no data is available */ | |
1442 | if (!rx_status.s.bcnt) | |
1443 | return; | |
1444 | ||
1445 | channel = rx_status.s.chnum; | |
1446 | bytes = rx_status.s.bcnt; | |
1447 | if (!bytes) | |
1448 | return; | |
1449 | ||
1450 | /* Get where the DMA engine would have written this data */ | |
1451 | address = __cvmx_usb_read_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8); | |
1452 | ptr = cvmx_phys_to_ptr(address); | |
1453 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8, address + bytes); | |
1454 | ||
1455 | /* Loop writing the FIFO data for this packet into memory */ | |
1456 | while (bytes > 0) { | |
1457 | *ptr++ = __cvmx_usb_read_csr32(usb, USB_FIFO_ADDRESS(channel, usb->index)); | |
1458 | bytes -= 4; | |
1459 | } | |
1460 | CVMX_SYNCW; | |
1461 | ||
1462 | return; | |
1463 | } | |
1464 | ||
1465 | ||
1466 | /** | |
1467 | * Fill the TX hardware fifo with data out of the software | |
1468 | * fifos | |
1469 | * | |
cb61c600 | 1470 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
1471 | * @fifo: Software fifo to use |
1472 | * @available: Amount of space in the hardware fifo | |
1473 | * | |
1474 | * Returns: Non zero if the hardware fifo was too small and needs | |
1475 | * to be serviced again. | |
1476 | */ | |
cb61c600 AK |
1477 | static int __cvmx_usb_fill_tx_hw(struct cvmx_usb_state *usb, |
1478 | struct cvmx_usb_tx_fifo *fifo, int available) | |
6570b4a9 AK |
1479 | { |
1480 | /* | |
1481 | * We're done either when there isn't anymore space or the software FIFO | |
1482 | * is empty | |
1483 | */ | |
1484 | while (available && (fifo->head != fifo->tail)) { | |
1485 | int i = fifo->tail; | |
1486 | const uint32_t *ptr = cvmx_phys_to_ptr(fifo->entry[i].address); | |
1487 | uint64_t csr_address = USB_FIFO_ADDRESS(fifo->entry[i].channel, usb->index) ^ 4; | |
1488 | int words = available; | |
1489 | ||
1490 | /* Limit the amount of data to waht the SW fifo has */ | |
1491 | if (fifo->entry[i].size <= available) { | |
1492 | words = fifo->entry[i].size; | |
1493 | fifo->tail++; | |
1494 | if (fifo->tail > MAX_CHANNELS) | |
1495 | fifo->tail = 0; | |
1496 | } | |
1497 | ||
1498 | /* Update the next locations and counts */ | |
1499 | available -= words; | |
1500 | fifo->entry[i].address += words * 4; | |
1501 | fifo->entry[i].size -= words; | |
1502 | ||
1503 | /* | |
1504 | * Write the HW fifo data. The read every three writes is due | |
1505 | * to an errata on CN3XXX chips | |
1506 | */ | |
1507 | while (words > 3) { | |
1508 | cvmx_write64_uint32(csr_address, *ptr++); | |
1509 | cvmx_write64_uint32(csr_address, *ptr++); | |
1510 | cvmx_write64_uint32(csr_address, *ptr++); | |
1511 | cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index)); | |
1512 | words -= 3; | |
1513 | } | |
1514 | cvmx_write64_uint32(csr_address, *ptr++); | |
1515 | if (--words) { | |
1516 | cvmx_write64_uint32(csr_address, *ptr++); | |
1517 | if (--words) | |
1518 | cvmx_write64_uint32(csr_address, *ptr++); | |
1519 | } | |
1520 | cvmx_read64_uint64(CVMX_USBNX_DMA0_INB_CHN0(usb->index)); | |
1521 | } | |
1522 | return fifo->head != fifo->tail; | |
1523 | } | |
1524 | ||
1525 | ||
1526 | /** | |
1527 | * Check the hardware FIFOs and fill them as needed | |
1528 | * | |
cb61c600 | 1529 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 | 1530 | */ |
cb61c600 | 1531 | static void __cvmx_usb_poll_tx_fifo(struct cvmx_usb_state *usb) |
6570b4a9 AK |
1532 | { |
1533 | if (usb->periodic.head != usb->periodic.tail) { | |
1534 | union cvmx_usbcx_hptxsts tx_status; | |
1535 | tx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPTXSTS(usb->index)); | |
1536 | if (__cvmx_usb_fill_tx_hw(usb, &usb->periodic, tx_status.s.ptxfspcavail)) | |
1537 | USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, ptxfempmsk, 1); | |
1538 | else | |
1539 | USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, ptxfempmsk, 0); | |
1540 | } | |
1541 | ||
1542 | if (usb->nonperiodic.head != usb->nonperiodic.tail) { | |
1543 | union cvmx_usbcx_gnptxsts tx_status; | |
1544 | tx_status.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GNPTXSTS(usb->index)); | |
1545 | if (__cvmx_usb_fill_tx_hw(usb, &usb->nonperiodic, tx_status.s.nptxfspcavail)) | |
1546 | USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, nptxfempmsk, 1); | |
1547 | else | |
1548 | USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, nptxfempmsk, 0); | |
1549 | } | |
1550 | ||
1551 | return; | |
1552 | } | |
1553 | ||
1554 | ||
1555 | /** | |
1556 | * Fill the TX FIFO with an outgoing packet | |
1557 | * | |
cb61c600 | 1558 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
1559 | * @channel: Channel number to get packet from |
1560 | */ | |
cb61c600 | 1561 | static void __cvmx_usb_fill_tx_fifo(struct cvmx_usb_state *usb, int channel) |
6570b4a9 AK |
1562 | { |
1563 | union cvmx_usbcx_hccharx hcchar; | |
1564 | union cvmx_usbcx_hcspltx usbc_hcsplt; | |
1565 | union cvmx_usbcx_hctsizx usbc_hctsiz; | |
1566 | struct cvmx_usb_tx_fifo *fifo; | |
1567 | ||
1568 | /* We only need to fill data on outbound channels */ | |
1569 | hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index)); | |
1570 | if (hcchar.s.epdir != CVMX_USB_DIRECTION_OUT) | |
1571 | return; | |
1572 | ||
1573 | /* OUT Splits only have data on the start and not the complete */ | |
1574 | usbc_hcsplt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCSPLTX(channel, usb->index)); | |
1575 | if (usbc_hcsplt.s.spltena && usbc_hcsplt.s.compsplt) | |
1576 | return; | |
1577 | ||
1578 | /* | |
1579 | * Find out how many bytes we need to fill and convert it into 32bit | |
1580 | * words. | |
1581 | */ | |
1582 | usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index)); | |
1583 | if (!usbc_hctsiz.s.xfersize) | |
1584 | return; | |
1585 | ||
1586 | if ((hcchar.s.eptype == CVMX_USB_TRANSFER_INTERRUPT) || | |
1587 | (hcchar.s.eptype == CVMX_USB_TRANSFER_ISOCHRONOUS)) | |
1588 | fifo = &usb->periodic; | |
1589 | else | |
1590 | fifo = &usb->nonperiodic; | |
1591 | ||
1592 | fifo->entry[fifo->head].channel = channel; | |
1593 | fifo->entry[fifo->head].address = __cvmx_usb_read_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8); | |
1594 | fifo->entry[fifo->head].size = (usbc_hctsiz.s.xfersize+3)>>2; | |
1595 | fifo->head++; | |
1596 | if (fifo->head > MAX_CHANNELS) | |
1597 | fifo->head = 0; | |
1598 | ||
1599 | __cvmx_usb_poll_tx_fifo(usb); | |
1600 | ||
1601 | return; | |
1602 | } | |
1603 | ||
1604 | /** | |
1605 | * Perform channel specific setup for Control transactions. All | |
1606 | * the generic stuff will already have been done in | |
1607 | * __cvmx_usb_start_channel() | |
1608 | * | |
cb61c600 | 1609 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
1610 | * @channel: Channel to setup |
1611 | * @pipe: Pipe for control transaction | |
1612 | */ | |
cb61c600 | 1613 | static void __cvmx_usb_start_channel_control(struct cvmx_usb_state *usb, |
6570b4a9 AK |
1614 | int channel, |
1615 | struct cvmx_usb_pipe *pipe) | |
1616 | { | |
1617 | struct cvmx_usb_transaction *transaction = pipe->head; | |
1618 | union cvmx_usb_control_header *header = | |
1619 | cvmx_phys_to_ptr(transaction->control_header); | |
1620 | int bytes_to_transfer = transaction->buffer_length - transaction->actual_bytes; | |
1621 | int packets_to_transfer; | |
1622 | union cvmx_usbcx_hctsizx usbc_hctsiz; | |
1623 | ||
1624 | usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index)); | |
1625 | ||
1626 | switch (transaction->stage) { | |
1627 | case CVMX_USB_STAGE_NON_CONTROL: | |
1628 | case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE: | |
1629 | cvmx_dprintf("%s: ERROR - Non control stage\n", __FUNCTION__); | |
1630 | break; | |
1631 | case CVMX_USB_STAGE_SETUP: | |
1632 | usbc_hctsiz.s.pid = 3; /* Setup */ | |
1633 | bytes_to_transfer = sizeof(*header); | |
1634 | /* All Control operations start with a setup going OUT */ | |
1635 | USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir, CVMX_USB_DIRECTION_OUT); | |
1636 | /* | |
1637 | * Setup send the control header instead of the buffer data. The | |
1638 | * buffer data will be used in the next stage | |
1639 | */ | |
1640 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8, transaction->control_header); | |
1641 | break; | |
1642 | case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE: | |
1643 | usbc_hctsiz.s.pid = 3; /* Setup */ | |
1644 | bytes_to_transfer = 0; | |
1645 | /* All Control operations start with a setup going OUT */ | |
1646 | USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir, CVMX_USB_DIRECTION_OUT); | |
1647 | USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), union cvmx_usbcx_hcspltx, compsplt, 1); | |
1648 | break; | |
1649 | case CVMX_USB_STAGE_DATA: | |
1650 | usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe); | |
1651 | if (__cvmx_usb_pipe_needs_split(usb, pipe)) { | |
1652 | if (header->s.request_type & 0x80) | |
1653 | bytes_to_transfer = 0; | |
1654 | else if (bytes_to_transfer > pipe->max_packet) | |
1655 | bytes_to_transfer = pipe->max_packet; | |
1656 | } | |
1657 | USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), | |
1658 | union cvmx_usbcx_hccharx, epdir, | |
1659 | ((header->s.request_type & 0x80) ? | |
1660 | CVMX_USB_DIRECTION_IN : | |
1661 | CVMX_USB_DIRECTION_OUT)); | |
1662 | break; | |
1663 | case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE: | |
1664 | usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe); | |
1665 | if (!(header->s.request_type & 0x80)) | |
1666 | bytes_to_transfer = 0; | |
1667 | USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), | |
1668 | union cvmx_usbcx_hccharx, epdir, | |
1669 | ((header->s.request_type & 0x80) ? | |
1670 | CVMX_USB_DIRECTION_IN : | |
1671 | CVMX_USB_DIRECTION_OUT)); | |
1672 | USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), union cvmx_usbcx_hcspltx, compsplt, 1); | |
1673 | break; | |
1674 | case CVMX_USB_STAGE_STATUS: | |
1675 | usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe); | |
1676 | bytes_to_transfer = 0; | |
1677 | USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir, | |
1678 | ((header->s.request_type & 0x80) ? | |
1679 | CVMX_USB_DIRECTION_OUT : | |
1680 | CVMX_USB_DIRECTION_IN)); | |
1681 | break; | |
1682 | case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE: | |
1683 | usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe); | |
1684 | bytes_to_transfer = 0; | |
1685 | USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, epdir, | |
1686 | ((header->s.request_type & 0x80) ? | |
1687 | CVMX_USB_DIRECTION_OUT : | |
1688 | CVMX_USB_DIRECTION_IN)); | |
1689 | USB_SET_FIELD32(CVMX_USBCX_HCSPLTX(channel, usb->index), union cvmx_usbcx_hcspltx, compsplt, 1); | |
1690 | break; | |
1691 | } | |
1692 | ||
1693 | /* | |
1694 | * Make sure the transfer never exceeds the byte limit of the hardware. | |
1695 | * Further bytes will be sent as continued transactions | |
1696 | */ | |
1697 | if (bytes_to_transfer > MAX_TRANSFER_BYTES) { | |
1698 | /* Round MAX_TRANSFER_BYTES to a multiple of out packet size */ | |
1699 | bytes_to_transfer = MAX_TRANSFER_BYTES / pipe->max_packet; | |
1700 | bytes_to_transfer *= pipe->max_packet; | |
1701 | } | |
1702 | ||
1703 | /* | |
1704 | * Calculate the number of packets to transfer. If the length is zero | |
1705 | * we still need to transfer one packet | |
1706 | */ | |
1707 | packets_to_transfer = (bytes_to_transfer + pipe->max_packet - 1) / pipe->max_packet; | |
1708 | if (packets_to_transfer == 0) | |
1709 | packets_to_transfer = 1; | |
1710 | else if ((packets_to_transfer > 1) && (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)) { | |
1711 | /* | |
1712 | * Limit to one packet when not using DMA. Channels must be | |
1713 | * restarted between every packet for IN transactions, so there | |
1714 | * is no reason to do multiple packets in a row | |
1715 | */ | |
1716 | packets_to_transfer = 1; | |
1717 | bytes_to_transfer = packets_to_transfer * pipe->max_packet; | |
1718 | } else if (packets_to_transfer > MAX_TRANSFER_PACKETS) { | |
1719 | /* | |
1720 | * Limit the number of packet and data transferred to what the | |
1721 | * hardware can handle | |
1722 | */ | |
1723 | packets_to_transfer = MAX_TRANSFER_PACKETS; | |
1724 | bytes_to_transfer = packets_to_transfer * pipe->max_packet; | |
1725 | } | |
1726 | ||
1727 | usbc_hctsiz.s.xfersize = bytes_to_transfer; | |
1728 | usbc_hctsiz.s.pktcnt = packets_to_transfer; | |
1729 | ||
1730 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index), usbc_hctsiz.u32); | |
1731 | return; | |
1732 | } | |
1733 | ||
1734 | ||
1735 | /** | |
1736 | * Start a channel to perform the pipe's head transaction | |
1737 | * | |
cb61c600 | 1738 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
1739 | * @channel: Channel to setup |
1740 | * @pipe: Pipe to start | |
1741 | */ | |
cb61c600 | 1742 | static void __cvmx_usb_start_channel(struct cvmx_usb_state *usb, |
6570b4a9 AK |
1743 | int channel, |
1744 | struct cvmx_usb_pipe *pipe) | |
1745 | { | |
1746 | struct cvmx_usb_transaction *transaction = pipe->head; | |
1747 | ||
1748 | /* Make sure all writes to the DMA region get flushed */ | |
1749 | CVMX_SYNCW; | |
1750 | ||
1751 | /* Attach the channel to the pipe */ | |
1752 | usb->pipe_for_channel[channel] = pipe; | |
1753 | pipe->channel = channel; | |
1754 | pipe->flags |= __CVMX_USB_PIPE_FLAGS_SCHEDULED; | |
1755 | ||
1756 | /* Mark this channel as in use */ | |
1757 | usb->idle_hardware_channels &= ~(1<<channel); | |
1758 | ||
1759 | /* Enable the channel interrupt bits */ | |
1760 | { | |
1761 | union cvmx_usbcx_hcintx usbc_hcint; | |
1762 | union cvmx_usbcx_hcintmskx usbc_hcintmsk; | |
1763 | union cvmx_usbcx_haintmsk usbc_haintmsk; | |
1764 | ||
1765 | /* Clear all channel status bits */ | |
1766 | usbc_hcint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index)); | |
1767 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index), usbc_hcint.u32); | |
1768 | ||
1769 | usbc_hcintmsk.u32 = 0; | |
1770 | usbc_hcintmsk.s.chhltdmsk = 1; | |
1771 | if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) { | |
1772 | /* | |
1773 | * Channels need these extra interrupts when we aren't | |
1774 | * in DMA mode. | |
1775 | */ | |
1776 | usbc_hcintmsk.s.datatglerrmsk = 1; | |
1777 | usbc_hcintmsk.s.frmovrunmsk = 1; | |
1778 | usbc_hcintmsk.s.bblerrmsk = 1; | |
1779 | usbc_hcintmsk.s.xacterrmsk = 1; | |
1780 | if (__cvmx_usb_pipe_needs_split(usb, pipe)) { | |
1781 | /* | |
1782 | * Splits don't generate xfercompl, so we need | |
1783 | * ACK and NYET. | |
1784 | */ | |
1785 | usbc_hcintmsk.s.nyetmsk = 1; | |
1786 | usbc_hcintmsk.s.ackmsk = 1; | |
1787 | } | |
1788 | usbc_hcintmsk.s.nakmsk = 1; | |
1789 | usbc_hcintmsk.s.stallmsk = 1; | |
1790 | usbc_hcintmsk.s.xfercomplmsk = 1; | |
1791 | } | |
1792 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), usbc_hcintmsk.u32); | |
1793 | ||
1794 | /* Enable the channel interrupt to propagate */ | |
1795 | usbc_haintmsk.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index)); | |
1796 | usbc_haintmsk.s.haintmsk |= 1<<channel; | |
1797 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HAINTMSK(usb->index), usbc_haintmsk.u32); | |
1798 | } | |
1799 | ||
1800 | /* Setup the locations the DMA engines use */ | |
1801 | { | |
1802 | uint64_t dma_address = transaction->buffer + transaction->actual_bytes; | |
1803 | if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS) | |
1804 | dma_address = transaction->buffer + transaction->iso_packets[0].offset + transaction->actual_bytes; | |
1805 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_OUTB_CHN0(usb->index) + channel*8, dma_address); | |
1806 | __cvmx_usb_write_csr64(usb, CVMX_USBNX_DMA0_INB_CHN0(usb->index) + channel*8, dma_address); | |
1807 | } | |
1808 | ||
1809 | /* Setup both the size of the transfer and the SPLIT characteristics */ | |
1810 | { | |
1811 | union cvmx_usbcx_hcspltx usbc_hcsplt = {.u32 = 0}; | |
1812 | union cvmx_usbcx_hctsizx usbc_hctsiz = {.u32 = 0}; | |
1813 | int packets_to_transfer; | |
1814 | int bytes_to_transfer = transaction->buffer_length - transaction->actual_bytes; | |
1815 | ||
1816 | /* | |
1817 | * ISOCHRONOUS transactions store each individual transfer size | |
1818 | * in the packet structure, not the global buffer_length | |
1819 | */ | |
1820 | if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS) | |
1821 | bytes_to_transfer = transaction->iso_packets[0].length - transaction->actual_bytes; | |
1822 | ||
1823 | /* | |
1824 | * We need to do split transactions when we are talking to non | |
1825 | * high speed devices that are behind a high speed hub | |
1826 | */ | |
1827 | if (__cvmx_usb_pipe_needs_split(usb, pipe)) { | |
1828 | /* | |
1829 | * On the start split phase (stage is even) record the | |
1830 | * frame number we will need to send the split complete. | |
1831 | * We only store the lower two bits since the time ahead | |
1832 | * can only be two frames | |
1833 | */ | |
1834 | if ((transaction->stage&1) == 0) { | |
1835 | if (transaction->type == CVMX_USB_TRANSFER_BULK) | |
1836 | pipe->split_sc_frame = (usb->frame_number + 1) & 0x7f; | |
1837 | else | |
1838 | pipe->split_sc_frame = (usb->frame_number + 2) & 0x7f; | |
1839 | } else | |
1840 | pipe->split_sc_frame = -1; | |
1841 | ||
1842 | usbc_hcsplt.s.spltena = 1; | |
1843 | usbc_hcsplt.s.hubaddr = pipe->hub_device_addr; | |
1844 | usbc_hcsplt.s.prtaddr = pipe->hub_port; | |
1845 | usbc_hcsplt.s.compsplt = (transaction->stage == CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE); | |
1846 | ||
1847 | /* | |
1848 | * SPLIT transactions can only ever transmit one data | |
1849 | * packet so limit the transfer size to the max packet | |
1850 | * size | |
1851 | */ | |
1852 | if (bytes_to_transfer > pipe->max_packet) | |
1853 | bytes_to_transfer = pipe->max_packet; | |
1854 | ||
1855 | /* | |
1856 | * ISOCHRONOUS OUT splits are unique in that they limit | |
1857 | * data transfers to 188 byte chunks representing the | |
1858 | * begin/middle/end of the data or all | |
1859 | */ | |
1860 | if (!usbc_hcsplt.s.compsplt && | |
1861 | (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) && | |
1862 | (pipe->transfer_type == CVMX_USB_TRANSFER_ISOCHRONOUS)) { | |
1863 | /* | |
1864 | * Clear the split complete frame number as | |
1865 | * there isn't going to be a split complete | |
1866 | */ | |
1867 | pipe->split_sc_frame = -1; | |
1868 | /* | |
1869 | * See if we've started this transfer and sent | |
1870 | * data | |
1871 | */ | |
1872 | if (transaction->actual_bytes == 0) { | |
1873 | /* | |
1874 | * Nothing sent yet, this is either a | |
1875 | * begin or the entire payload | |
1876 | */ | |
1877 | if (bytes_to_transfer <= 188) | |
1878 | /* Entire payload in one go */ | |
1879 | usbc_hcsplt.s.xactpos = 3; | |
1880 | else | |
1881 | /* First part of payload */ | |
1882 | usbc_hcsplt.s.xactpos = 2; | |
1883 | } else { | |
1884 | /* | |
1885 | * Continuing the previous data, we must | |
1886 | * either be in the middle or at the end | |
1887 | */ | |
1888 | if (bytes_to_transfer <= 188) | |
1889 | /* End of payload */ | |
1890 | usbc_hcsplt.s.xactpos = 1; | |
1891 | else | |
1892 | /* Middle of payload */ | |
1893 | usbc_hcsplt.s.xactpos = 0; | |
1894 | } | |
1895 | /* | |
1896 | * Again, the transfer size is limited to 188 | |
1897 | * bytes | |
1898 | */ | |
1899 | if (bytes_to_transfer > 188) | |
1900 | bytes_to_transfer = 188; | |
1901 | } | |
1902 | } | |
1903 | ||
1904 | /* | |
1905 | * Make sure the transfer never exceeds the byte limit of the | |
1906 | * hardware. Further bytes will be sent as continued | |
1907 | * transactions | |
1908 | */ | |
1909 | if (bytes_to_transfer > MAX_TRANSFER_BYTES) { | |
1910 | /* | |
1911 | * Round MAX_TRANSFER_BYTES to a multiple of out packet | |
1912 | * size | |
1913 | */ | |
1914 | bytes_to_transfer = MAX_TRANSFER_BYTES / pipe->max_packet; | |
1915 | bytes_to_transfer *= pipe->max_packet; | |
1916 | } | |
1917 | ||
1918 | /* | |
1919 | * Calculate the number of packets to transfer. If the length is | |
1920 | * zero we still need to transfer one packet | |
1921 | */ | |
1922 | packets_to_transfer = (bytes_to_transfer + pipe->max_packet - 1) / pipe->max_packet; | |
1923 | if (packets_to_transfer == 0) | |
1924 | packets_to_transfer = 1; | |
1925 | else if ((packets_to_transfer > 1) && (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA)) { | |
1926 | /* | |
1927 | * Limit to one packet when not using DMA. Channels must | |
1928 | * be restarted between every packet for IN | |
1929 | * transactions, so there is no reason to do multiple | |
1930 | * packets in a row | |
1931 | */ | |
1932 | packets_to_transfer = 1; | |
1933 | bytes_to_transfer = packets_to_transfer * pipe->max_packet; | |
1934 | } else if (packets_to_transfer > MAX_TRANSFER_PACKETS) { | |
1935 | /* | |
1936 | * Limit the number of packet and data transferred to | |
1937 | * what the hardware can handle | |
1938 | */ | |
1939 | packets_to_transfer = MAX_TRANSFER_PACKETS; | |
1940 | bytes_to_transfer = packets_to_transfer * pipe->max_packet; | |
1941 | } | |
1942 | ||
1943 | usbc_hctsiz.s.xfersize = bytes_to_transfer; | |
1944 | usbc_hctsiz.s.pktcnt = packets_to_transfer; | |
1945 | ||
1946 | /* Update the DATA0/DATA1 toggle */ | |
1947 | usbc_hctsiz.s.pid = __cvmx_usb_get_data_pid(pipe); | |
1948 | /* | |
1949 | * High speed pipes may need a hardware ping before they start | |
1950 | */ | |
1951 | if (pipe->flags & __CVMX_USB_PIPE_FLAGS_NEED_PING) | |
1952 | usbc_hctsiz.s.dopng = 1; | |
1953 | ||
1954 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCSPLTX(channel, usb->index), usbc_hcsplt.u32); | |
1955 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index), usbc_hctsiz.u32); | |
1956 | } | |
1957 | ||
1958 | /* Setup the Host Channel Characteristics Register */ | |
1959 | { | |
1960 | union cvmx_usbcx_hccharx usbc_hcchar = {.u32 = 0}; | |
1961 | ||
1962 | /* | |
1963 | * Set the startframe odd/even properly. This is only used for | |
1964 | * periodic | |
1965 | */ | |
1966 | usbc_hcchar.s.oddfrm = usb->frame_number&1; | |
1967 | ||
1968 | /* | |
1969 | * Set the number of back to back packets allowed by this | |
1970 | * endpoint. Split transactions interpret "ec" as the number of | |
1971 | * immediate retries of failure. These retries happen too | |
1972 | * quickly, so we disable these entirely for splits | |
1973 | */ | |
1974 | if (__cvmx_usb_pipe_needs_split(usb, pipe)) | |
1975 | usbc_hcchar.s.ec = 1; | |
1976 | else if (pipe->multi_count < 1) | |
1977 | usbc_hcchar.s.ec = 1; | |
1978 | else if (pipe->multi_count > 3) | |
1979 | usbc_hcchar.s.ec = 3; | |
1980 | else | |
1981 | usbc_hcchar.s.ec = pipe->multi_count; | |
1982 | ||
1983 | /* Set the rest of the endpoint specific settings */ | |
1984 | usbc_hcchar.s.devaddr = pipe->device_addr; | |
1985 | usbc_hcchar.s.eptype = transaction->type; | |
1986 | usbc_hcchar.s.lspddev = (pipe->device_speed == CVMX_USB_SPEED_LOW); | |
1987 | usbc_hcchar.s.epdir = pipe->transfer_dir; | |
1988 | usbc_hcchar.s.epnum = pipe->endpoint_num; | |
1989 | usbc_hcchar.s.mps = pipe->max_packet; | |
1990 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32); | |
1991 | } | |
1992 | ||
1993 | /* Do transaction type specific fixups as needed */ | |
1994 | switch (transaction->type) { | |
1995 | case CVMX_USB_TRANSFER_CONTROL: | |
1996 | __cvmx_usb_start_channel_control(usb, channel, pipe); | |
1997 | break; | |
1998 | case CVMX_USB_TRANSFER_BULK: | |
1999 | case CVMX_USB_TRANSFER_INTERRUPT: | |
2000 | break; | |
2001 | case CVMX_USB_TRANSFER_ISOCHRONOUS: | |
2002 | if (!__cvmx_usb_pipe_needs_split(usb, pipe)) { | |
2003 | /* | |
2004 | * ISO transactions require different PIDs depending on | |
2005 | * direction and how many packets are needed | |
2006 | */ | |
2007 | if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) { | |
2008 | if (pipe->multi_count < 2) /* Need DATA0 */ | |
2009 | USB_SET_FIELD32(CVMX_USBCX_HCTSIZX(channel, usb->index), union cvmx_usbcx_hctsizx, pid, 0); | |
2010 | else /* Need MDATA */ | |
2011 | USB_SET_FIELD32(CVMX_USBCX_HCTSIZX(channel, usb->index), union cvmx_usbcx_hctsizx, pid, 3); | |
2012 | } | |
2013 | } | |
2014 | break; | |
2015 | } | |
2016 | { | |
2017 | union cvmx_usbcx_hctsizx usbc_hctsiz = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index))}; | |
2018 | transaction->xfersize = usbc_hctsiz.s.xfersize; | |
2019 | transaction->pktcnt = usbc_hctsiz.s.pktcnt; | |
2020 | } | |
2021 | /* Remeber when we start a split transaction */ | |
2022 | if (__cvmx_usb_pipe_needs_split(usb, pipe)) | |
2023 | usb->active_split = transaction; | |
2024 | USB_SET_FIELD32(CVMX_USBCX_HCCHARX(channel, usb->index), union cvmx_usbcx_hccharx, chena, 1); | |
2025 | if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) | |
2026 | __cvmx_usb_fill_tx_fifo(usb, channel); | |
2027 | return; | |
2028 | } | |
2029 | ||
2030 | ||
2031 | /** | |
2032 | * Find a pipe that is ready to be scheduled to hardware. | |
cb61c600 | 2033 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
2034 | * @list: Pipe list to search |
2035 | * @current_frame: | |
2036 | * Frame counter to use as a time reference. | |
2037 | * | |
2038 | * Returns: Pipe or NULL if none are ready | |
2039 | */ | |
cb61c600 | 2040 | static struct cvmx_usb_pipe *__cvmx_usb_find_ready_pipe(struct cvmx_usb_state *usb, struct cvmx_usb_pipe_list *list, uint64_t current_frame) |
6570b4a9 AK |
2041 | { |
2042 | struct cvmx_usb_pipe *pipe = list->head; | |
2043 | while (pipe) { | |
2044 | if (!(pipe->flags & __CVMX_USB_PIPE_FLAGS_SCHEDULED) && pipe->head && | |
2045 | (pipe->next_tx_frame <= current_frame) && | |
2046 | ((pipe->split_sc_frame == -1) || ((((int)current_frame - (int)pipe->split_sc_frame) & 0x7f) < 0x40)) && | |
2047 | (!usb->active_split || (usb->active_split == pipe->head))) { | |
2048 | CVMX_PREFETCH(pipe, 128); | |
2049 | CVMX_PREFETCH(pipe->head, 0); | |
2050 | return pipe; | |
2051 | } | |
2052 | pipe = pipe->next; | |
2053 | } | |
2054 | return NULL; | |
2055 | } | |
2056 | ||
2057 | ||
2058 | /** | |
2059 | * Called whenever a pipe might need to be scheduled to the | |
2060 | * hardware. | |
2061 | * | |
cb61c600 | 2062 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
2063 | * @is_sof: True if this schedule was called on a SOF interrupt. |
2064 | */ | |
cb61c600 | 2065 | static void __cvmx_usb_schedule(struct cvmx_usb_state *usb, int is_sof) |
6570b4a9 AK |
2066 | { |
2067 | int channel; | |
2068 | struct cvmx_usb_pipe *pipe; | |
2069 | int need_sof; | |
2070 | enum cvmx_usb_transfer ttype; | |
2071 | ||
2072 | if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) { | |
2073 | /* | |
2074 | * Without DMA we need to be careful to not schedule something | |
2075 | * at the end of a frame and cause an overrun. | |
2076 | */ | |
2077 | union cvmx_usbcx_hfnum hfnum = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index))}; | |
2078 | union cvmx_usbcx_hfir hfir = {.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFIR(usb->index))}; | |
2079 | if (hfnum.s.frrem < hfir.s.frint/4) | |
2080 | goto done; | |
2081 | } | |
2082 | ||
2083 | while (usb->idle_hardware_channels) { | |
2084 | /* Find an idle channel */ | |
2085 | channel = __fls(usb->idle_hardware_channels); | |
2086 | if (unlikely(channel > 7)) | |
2087 | break; | |
2088 | ||
2089 | /* Find a pipe needing service */ | |
2090 | pipe = NULL; | |
2091 | if (is_sof) { | |
2092 | /* | |
2093 | * Only process periodic pipes on SOF interrupts. This | |
2094 | * way we are sure that the periodic data is sent in the | |
2095 | * beginning of the frame | |
2096 | */ | |
2097 | pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_ISOCHRONOUS, usb->frame_number); | |
2098 | if (likely(!pipe)) | |
2099 | pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_INTERRUPT, usb->frame_number); | |
2100 | } | |
2101 | if (likely(!pipe)) { | |
2102 | pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_CONTROL, usb->frame_number); | |
2103 | if (likely(!pipe)) | |
2104 | pipe = __cvmx_usb_find_ready_pipe(usb, usb->active_pipes + CVMX_USB_TRANSFER_BULK, usb->frame_number); | |
2105 | } | |
2106 | if (!pipe) | |
2107 | break; | |
2108 | ||
2109 | __cvmx_usb_start_channel(usb, channel, pipe); | |
2110 | } | |
2111 | ||
2112 | done: | |
2113 | /* | |
2114 | * Only enable SOF interrupts when we have transactions pending in the | |
2115 | * future that might need to be scheduled | |
2116 | */ | |
2117 | need_sof = 0; | |
2118 | for (ttype = CVMX_USB_TRANSFER_CONTROL; ttype <= CVMX_USB_TRANSFER_INTERRUPT; ttype++) { | |
2119 | pipe = usb->active_pipes[ttype].head; | |
2120 | while (pipe) { | |
2121 | if (pipe->next_tx_frame > usb->frame_number) { | |
2122 | need_sof = 1; | |
2123 | break; | |
2124 | } | |
2125 | pipe = pipe->next; | |
2126 | } | |
2127 | } | |
2128 | USB_SET_FIELD32(CVMX_USBCX_GINTMSK(usb->index), union cvmx_usbcx_gintmsk, sofmsk, need_sof); | |
2129 | return; | |
2130 | } | |
2131 | ||
75ee5124 AK |
2132 | static inline struct octeon_hcd *cvmx_usb_to_octeon(struct cvmx_usb_state *p) |
2133 | { | |
2134 | return container_of(p, struct octeon_hcd, usb); | |
2135 | } | |
6570b4a9 | 2136 | |
75ee5124 | 2137 | static inline struct usb_hcd *octeon_to_hcd(struct octeon_hcd *p) |
6570b4a9 | 2138 | { |
75ee5124 AK |
2139 | return container_of((void *)p, struct usb_hcd, hcd_priv); |
2140 | } | |
2141 | ||
2142 | static void octeon_usb_urb_complete_callback(struct cvmx_usb_state *usb, | |
2143 | enum cvmx_usb_complete status, | |
2144 | int pipe_handle, | |
2145 | int submit_handle, | |
2146 | int bytes_transferred, | |
0cce1004 | 2147 | struct urb *urb) |
75ee5124 AK |
2148 | { |
2149 | struct octeon_hcd *priv = cvmx_usb_to_octeon(usb); | |
2150 | struct usb_hcd *hcd = octeon_to_hcd(priv); | |
2151 | struct device *dev = hcd->self.controller; | |
75ee5124 AK |
2152 | |
2153 | urb->actual_length = bytes_transferred; | |
2154 | urb->hcpriv = NULL; | |
2155 | ||
2156 | if (!list_empty(&urb->urb_list)) { | |
2157 | /* | |
2158 | * It is on the dequeue_list, but we are going to call | |
2159 | * usb_hcd_giveback_urb(), so we must clear it from | |
2160 | * the list. We got to it before the | |
2161 | * octeon_usb_urb_dequeue_work() tasklet did. | |
2162 | */ | |
2163 | list_del(&urb->urb_list); | |
2164 | /* No longer on the dequeue_list. */ | |
2165 | INIT_LIST_HEAD(&urb->urb_list); | |
6570b4a9 AK |
2166 | } |
2167 | ||
75ee5124 AK |
2168 | /* For Isochronous transactions we need to update the URB packet status |
2169 | list from data in our private copy */ | |
2170 | if (usb_pipetype(urb->pipe) == PIPE_ISOCHRONOUS) { | |
2171 | int i; | |
2172 | /* | |
2173 | * The pointer to the private list is stored in the setup_packet | |
2174 | * field. | |
2175 | */ | |
2176 | struct cvmx_usb_iso_packet *iso_packet = | |
2177 | (struct cvmx_usb_iso_packet *) urb->setup_packet; | |
2178 | /* Recalculate the transfer size by adding up each packet */ | |
2179 | urb->actual_length = 0; | |
2180 | for (i = 0; i < urb->number_of_packets; i++) { | |
2181 | if (iso_packet[i].status == CVMX_USB_COMPLETE_SUCCESS) { | |
2182 | urb->iso_frame_desc[i].status = 0; | |
2183 | urb->iso_frame_desc[i].actual_length = iso_packet[i].length; | |
2184 | urb->actual_length += urb->iso_frame_desc[i].actual_length; | |
2185 | } else { | |
2186 | dev_dbg(dev, "ISOCHRONOUS packet=%d of %d status=%d pipe=%d submit=%d size=%d\n", | |
2187 | i, urb->number_of_packets, | |
2188 | iso_packet[i].status, pipe_handle, | |
2189 | submit_handle, iso_packet[i].length); | |
2190 | urb->iso_frame_desc[i].status = -EREMOTEIO; | |
2191 | } | |
2192 | } | |
2193 | /* Free the private list now that we don't need it anymore */ | |
2194 | kfree(iso_packet); | |
2195 | urb->setup_packet = NULL; | |
2196 | } | |
6570b4a9 | 2197 | |
75ee5124 AK |
2198 | switch (status) { |
2199 | case CVMX_USB_COMPLETE_SUCCESS: | |
2200 | urb->status = 0; | |
2201 | break; | |
2202 | case CVMX_USB_COMPLETE_CANCEL: | |
2203 | if (urb->status == 0) | |
2204 | urb->status = -ENOENT; | |
2205 | break; | |
2206 | case CVMX_USB_COMPLETE_STALL: | |
2207 | dev_dbg(dev, "status=stall pipe=%d submit=%d size=%d\n", | |
2208 | pipe_handle, submit_handle, bytes_transferred); | |
2209 | urb->status = -EPIPE; | |
2210 | break; | |
2211 | case CVMX_USB_COMPLETE_BABBLEERR: | |
2212 | dev_dbg(dev, "status=babble pipe=%d submit=%d size=%d\n", | |
2213 | pipe_handle, submit_handle, bytes_transferred); | |
2214 | urb->status = -EPIPE; | |
2215 | break; | |
2216 | case CVMX_USB_COMPLETE_SHORT: | |
2217 | dev_dbg(dev, "status=short pipe=%d submit=%d size=%d\n", | |
2218 | pipe_handle, submit_handle, bytes_transferred); | |
2219 | urb->status = -EREMOTEIO; | |
2220 | break; | |
2221 | case CVMX_USB_COMPLETE_ERROR: | |
2222 | case CVMX_USB_COMPLETE_XACTERR: | |
2223 | case CVMX_USB_COMPLETE_DATATGLERR: | |
2224 | case CVMX_USB_COMPLETE_FRAMEERR: | |
2225 | dev_dbg(dev, "status=%d pipe=%d submit=%d size=%d\n", | |
2226 | status, pipe_handle, submit_handle, bytes_transferred); | |
2227 | urb->status = -EPROTO; | |
2228 | break; | |
2229 | } | |
2230 | spin_unlock(&priv->lock); | |
2231 | usb_hcd_giveback_urb(octeon_to_hcd(priv), urb, urb->status); | |
2232 | spin_lock(&priv->lock); | |
6570b4a9 AK |
2233 | } |
2234 | ||
6570b4a9 AK |
2235 | /** |
2236 | * Signal the completion of a transaction and free it. The | |
2237 | * transaction will be removed from the pipe transaction list. | |
2238 | * | |
cb61c600 | 2239 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
2240 | * @pipe: Pipe the transaction is on |
2241 | * @transaction: | |
2242 | * Transaction that completed | |
2243 | * @complete_code: | |
2244 | * Completion code | |
2245 | */ | |
cb61c600 | 2246 | static void __cvmx_usb_perform_complete(struct cvmx_usb_state *usb, |
6570b4a9 AK |
2247 | struct cvmx_usb_pipe *pipe, |
2248 | struct cvmx_usb_transaction *transaction, | |
2249 | enum cvmx_usb_complete complete_code) | |
2250 | { | |
75ee5124 AK |
2251 | int pipe_handle; |
2252 | int submit_handle; | |
2253 | ||
6570b4a9 AK |
2254 | /* If this was a split then clear our split in progress marker */ |
2255 | if (usb->active_split == transaction) | |
2256 | usb->active_split = NULL; | |
2257 | ||
2258 | /* | |
2259 | * Isochronous transactions need extra processing as they might not be | |
2260 | * done after a single data transfer | |
2261 | */ | |
2262 | if (unlikely(transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS)) { | |
2263 | /* Update the number of bytes transferred in this ISO packet */ | |
2264 | transaction->iso_packets[0].length = transaction->actual_bytes; | |
2265 | transaction->iso_packets[0].status = complete_code; | |
2266 | ||
2267 | /* | |
2268 | * If there are more ISOs pending and we succeeded, schedule the | |
2269 | * next one | |
2270 | */ | |
2271 | if ((transaction->iso_number_packets > 1) && (complete_code == CVMX_USB_COMPLETE_SUCCESS)) { | |
2272 | /* No bytes transferred for this packet as of yet */ | |
2273 | transaction->actual_bytes = 0; | |
2274 | /* One less ISO waiting to transfer */ | |
2275 | transaction->iso_number_packets--; | |
2276 | /* Increment to the next location in our packet array */ | |
2277 | transaction->iso_packets++; | |
2278 | transaction->stage = CVMX_USB_STAGE_NON_CONTROL; | |
2279 | goto done; | |
2280 | } | |
2281 | } | |
2282 | ||
2283 | /* Remove the transaction from the pipe list */ | |
2284 | if (transaction->next) | |
2285 | transaction->next->prev = transaction->prev; | |
2286 | else | |
2287 | pipe->tail = transaction->prev; | |
2288 | if (transaction->prev) | |
2289 | transaction->prev->next = transaction->next; | |
2290 | else | |
2291 | pipe->head = transaction->next; | |
2292 | if (!pipe->head) { | |
2293 | __cvmx_usb_remove_pipe(usb->active_pipes + pipe->transfer_type, pipe); | |
2294 | __cvmx_usb_append_pipe(&usb->idle_pipes, pipe); | |
2295 | ||
2296 | } | |
75ee5124 AK |
2297 | pipe_handle = __cvmx_usb_get_pipe_handle(usb, pipe); |
2298 | submit_handle = __cvmx_usb_get_submit_handle(usb, transaction); | |
2299 | octeon_usb_urb_complete_callback(usb, complete_code, pipe_handle, | |
2300 | submit_handle, | |
2301 | transaction->actual_bytes, | |
0cce1004 | 2302 | transaction->urb); |
6570b4a9 AK |
2303 | __cvmx_usb_free_transaction(usb, transaction); |
2304 | done: | |
2305 | return; | |
2306 | } | |
2307 | ||
2308 | ||
2309 | /** | |
2310 | * Submit a usb transaction to a pipe. Called for all types | |
2311 | * of transactions. | |
2312 | * | |
2313 | * @usb: | |
2314 | * @pipe_handle: | |
2315 | * Which pipe to submit to. Will be validated in this function. | |
2316 | * @type: Transaction type | |
2317 | * @buffer: User buffer for the transaction | |
2318 | * @buffer_length: | |
2319 | * User buffer's length in bytes | |
2320 | * @control_header: | |
2321 | * For control transactions, the 8 byte standard header | |
2322 | * @iso_start_frame: | |
2323 | * For ISO transactions, the start frame | |
2324 | * @iso_number_packets: | |
2325 | * For ISO, the number of packet in the transaction. | |
2326 | * @iso_packets: | |
2327 | * A description of each ISO packet | |
0cce1004 | 2328 | * @urb: URB for the callback |
6570b4a9 AK |
2329 | * |
2330 | * Returns: Submit handle or negative on failure. Matches the result | |
2331 | * in the external API. | |
2332 | */ | |
cb61c600 | 2333 | static int __cvmx_usb_submit_transaction(struct cvmx_usb_state *usb, |
6570b4a9 AK |
2334 | int pipe_handle, |
2335 | enum cvmx_usb_transfer type, | |
2336 | uint64_t buffer, | |
2337 | int buffer_length, | |
2338 | uint64_t control_header, | |
2339 | int iso_start_frame, | |
2340 | int iso_number_packets, | |
2341 | struct cvmx_usb_iso_packet *iso_packets, | |
0cce1004 | 2342 | struct urb *urb) |
6570b4a9 AK |
2343 | { |
2344 | int submit_handle; | |
2345 | struct cvmx_usb_transaction *transaction; | |
2346 | struct cvmx_usb_pipe *pipe = usb->pipe + pipe_handle; | |
2347 | ||
2348 | if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES))) | |
2349 | return -EINVAL; | |
2350 | /* Fail if the pipe isn't open */ | |
2351 | if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0)) | |
2352 | return -EINVAL; | |
2353 | if (unlikely(pipe->transfer_type != type)) | |
2354 | return -EINVAL; | |
2355 | ||
2356 | transaction = __cvmx_usb_alloc_transaction(usb); | |
2357 | if (unlikely(!transaction)) | |
2358 | return -ENOMEM; | |
2359 | ||
2360 | transaction->type = type; | |
2361 | transaction->buffer = buffer; | |
2362 | transaction->buffer_length = buffer_length; | |
2363 | transaction->control_header = control_header; | |
2364 | /* FIXME: This is not used, implement it. */ | |
2365 | transaction->iso_start_frame = iso_start_frame; | |
2366 | transaction->iso_number_packets = iso_number_packets; | |
2367 | transaction->iso_packets = iso_packets; | |
0cce1004 | 2368 | transaction->urb = urb; |
6570b4a9 AK |
2369 | if (transaction->type == CVMX_USB_TRANSFER_CONTROL) |
2370 | transaction->stage = CVMX_USB_STAGE_SETUP; | |
2371 | else | |
2372 | transaction->stage = CVMX_USB_STAGE_NON_CONTROL; | |
2373 | ||
2374 | transaction->next = NULL; | |
2375 | if (pipe->tail) { | |
2376 | transaction->prev = pipe->tail; | |
2377 | transaction->prev->next = transaction; | |
2378 | } else { | |
2379 | if (pipe->next_tx_frame < usb->frame_number) | |
2380 | pipe->next_tx_frame = usb->frame_number + pipe->interval - | |
2381 | (usb->frame_number - pipe->next_tx_frame) % pipe->interval; | |
2382 | transaction->prev = NULL; | |
2383 | pipe->head = transaction; | |
2384 | __cvmx_usb_remove_pipe(&usb->idle_pipes, pipe); | |
2385 | __cvmx_usb_append_pipe(usb->active_pipes + pipe->transfer_type, pipe); | |
2386 | } | |
2387 | pipe->tail = transaction; | |
2388 | ||
2389 | submit_handle = __cvmx_usb_get_submit_handle(usb, transaction); | |
2390 | ||
2391 | /* We may need to schedule the pipe if this was the head of the pipe */ | |
2392 | if (!transaction->prev) | |
2393 | __cvmx_usb_schedule(usb, 0); | |
2394 | ||
2395 | return submit_handle; | |
2396 | } | |
2397 | ||
2398 | ||
2399 | /** | |
2400 | * Call to submit a USB Bulk transfer to a pipe. | |
2401 | * | |
cb61c600 | 2402 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
2403 | * @pipe_handle: |
2404 | * Handle to the pipe for the transfer. | |
9ccca707 | 2405 | * @urb: URB. |
6570b4a9 AK |
2406 | * |
2407 | * Returns: A submitted transaction handle or negative on | |
2408 | * failure. Negative values are error codes. | |
2409 | */ | |
cb61c600 | 2410 | static int cvmx_usb_submit_bulk(struct cvmx_usb_state *usb, int pipe_handle, |
0cce1004 | 2411 | struct urb *urb) |
6570b4a9 AK |
2412 | { |
2413 | int submit_handle; | |
6570b4a9 | 2414 | |
6570b4a9 AK |
2415 | submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle, |
2416 | CVMX_USB_TRANSFER_BULK, | |
9ccca707 AK |
2417 | urb->transfer_dma, |
2418 | urb->transfer_buffer_length, | |
6570b4a9 AK |
2419 | 0, /* control_header */ |
2420 | 0, /* iso_start_frame */ | |
2421 | 0, /* iso_number_packets */ | |
2422 | NULL, /* iso_packets */ | |
0cce1004 | 2423 | urb); |
6570b4a9 AK |
2424 | return submit_handle; |
2425 | } | |
2426 | ||
2427 | ||
2428 | /** | |
2429 | * Call to submit a USB Interrupt transfer to a pipe. | |
2430 | * | |
cb61c600 | 2431 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
2432 | * @pipe_handle: |
2433 | * Handle to the pipe for the transfer. | |
0cce1004 | 2434 | * @urb: URB returned when the callback is called. |
6570b4a9 AK |
2435 | * |
2436 | * Returns: A submitted transaction handle or negative on | |
2437 | * failure. Negative values are error codes. | |
2438 | */ | |
cb61c600 | 2439 | static int cvmx_usb_submit_interrupt(struct cvmx_usb_state *usb, |
9fdbb696 | 2440 | int pipe_handle, struct urb *urb) |
6570b4a9 AK |
2441 | { |
2442 | int submit_handle; | |
6570b4a9 | 2443 | |
6570b4a9 AK |
2444 | submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle, |
2445 | CVMX_USB_TRANSFER_INTERRUPT, | |
9fdbb696 AK |
2446 | urb->transfer_dma, |
2447 | urb->transfer_buffer_length, | |
6570b4a9 AK |
2448 | 0, /* control_header */ |
2449 | 0, /* iso_start_frame */ | |
2450 | 0, /* iso_number_packets */ | |
2451 | NULL, /* iso_packets */ | |
0cce1004 | 2452 | urb); |
6570b4a9 AK |
2453 | return submit_handle; |
2454 | } | |
2455 | ||
2456 | ||
2457 | /** | |
2458 | * Call to submit a USB Control transfer to a pipe. | |
2459 | * | |
cb61c600 | 2460 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
2461 | * @pipe_handle: |
2462 | * Handle to the pipe for the transfer. | |
2ae09e87 | 2463 | * @urb: URB. |
6570b4a9 AK |
2464 | * |
2465 | * Returns: A submitted transaction handle or negative on | |
2466 | * failure. Negative values are error codes. | |
2467 | */ | |
2ae09e87 | 2468 | static int cvmx_usb_submit_control(struct cvmx_usb_state *usb, int pipe_handle, |
0cce1004 | 2469 | struct urb *urb) |
6570b4a9 AK |
2470 | { |
2471 | int submit_handle; | |
2ae09e87 AK |
2472 | int buffer_length = urb->transfer_buffer_length; |
2473 | uint64_t control_header = urb->setup_dma; | |
6570b4a9 AK |
2474 | union cvmx_usb_control_header *header = |
2475 | cvmx_phys_to_ptr(control_header); | |
2476 | ||
2477 | /* Pipe handle checking is done later in a common place */ | |
6570b4a9 AK |
2478 | if ((header->s.request_type & 0x80) == 0) |
2479 | buffer_length = le16_to_cpu(header->s.length); | |
2480 | ||
2481 | submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle, | |
2482 | CVMX_USB_TRANSFER_CONTROL, | |
2ae09e87 | 2483 | urb->transfer_dma, |
6570b4a9 AK |
2484 | buffer_length, |
2485 | control_header, | |
2486 | 0, /* iso_start_frame */ | |
2487 | 0, /* iso_number_packets */ | |
2488 | NULL, /* iso_packets */ | |
0cce1004 | 2489 | urb); |
6570b4a9 AK |
2490 | return submit_handle; |
2491 | } | |
2492 | ||
2493 | ||
2494 | /** | |
2495 | * Call to submit a USB Isochronous transfer to a pipe. | |
2496 | * | |
cb61c600 | 2497 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
2498 | * @pipe_handle: |
2499 | * Handle to the pipe for the transfer. | |
2500 | * @start_frame: | |
2501 | * Number of frames into the future to schedule | |
2502 | * this transaction. | |
2503 | * @number_packets: | |
2504 | * Number of sequential packets to transfer. | |
2505 | * "packets" is a pointer to an array of this | |
2506 | * many packet structures. | |
2507 | * @packets: Description of each transfer packet as | |
2508 | * defined by struct cvmx_usb_iso_packet. The array | |
2509 | * pointed to here must stay valid until the | |
2510 | * complete callback is called. | |
2511 | * @buffer: Physical address of the data buffer in | |
2512 | * memory. Note that this is NOT A POINTER, but | |
2513 | * the full 64bit physical address of the | |
2514 | * buffer. This may be zero if buffer_length is | |
2515 | * zero. | |
2516 | * @buffer_length: | |
2517 | * Length of buffer in bytes. | |
0cce1004 | 2518 | * @urb: URB returned when the callback is called. |
6570b4a9 AK |
2519 | * |
2520 | * Returns: A submitted transaction handle or negative on | |
2521 | * failure. Negative values are error codes. | |
2522 | */ | |
cb61c600 | 2523 | static int cvmx_usb_submit_isochronous(struct cvmx_usb_state *usb, |
6570b4a9 AK |
2524 | int pipe_handle, int start_frame, |
2525 | int number_packets, struct | |
2526 | cvmx_usb_iso_packet packets[], | |
2527 | uint64_t buffer, int buffer_length, | |
0cce1004 | 2528 | struct urb *urb) |
6570b4a9 AK |
2529 | { |
2530 | int submit_handle; | |
6570b4a9 AK |
2531 | |
2532 | /* Pipe handle checking is done later in a common place */ | |
2533 | if (unlikely(start_frame < 0)) | |
2534 | return -EINVAL; | |
2535 | if (unlikely(number_packets < 1)) | |
2536 | return -EINVAL; | |
2537 | if (unlikely(!packets)) | |
2538 | return -EINVAL; | |
2539 | if (unlikely(!buffer)) | |
2540 | return -EINVAL; | |
2541 | if (unlikely(buffer_length < 0)) | |
2542 | return -EINVAL; | |
2543 | ||
2544 | submit_handle = __cvmx_usb_submit_transaction(usb, pipe_handle, | |
2545 | CVMX_USB_TRANSFER_ISOCHRONOUS, | |
2546 | buffer, | |
2547 | buffer_length, | |
2548 | 0, /* control_header */ | |
2549 | start_frame, | |
2550 | number_packets, | |
2551 | packets, | |
0cce1004 | 2552 | urb); |
6570b4a9 AK |
2553 | return submit_handle; |
2554 | } | |
2555 | ||
2556 | ||
2557 | /** | |
2558 | * Cancel one outstanding request in a pipe. Canceling a request | |
2559 | * can fail if the transaction has already completed before cancel | |
2560 | * is called. Even after a successful cancel call, it may take | |
2561 | * a frame or two for the cvmx_usb_poll() function to call the | |
2562 | * associated callback. | |
2563 | * | |
cb61c600 | 2564 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
2565 | * @pipe_handle: |
2566 | * Pipe handle to cancel requests in. | |
2567 | * @submit_handle: | |
2568 | * Handle to transaction to cancel, returned by the submit | |
2569 | * function. | |
2570 | * | |
2571 | * Returns: 0 or a negative error code. | |
2572 | */ | |
cb61c600 | 2573 | static int cvmx_usb_cancel(struct cvmx_usb_state *usb, int pipe_handle, |
6570b4a9 AK |
2574 | int submit_handle) |
2575 | { | |
2576 | struct cvmx_usb_transaction *transaction; | |
6570b4a9 AK |
2577 | struct cvmx_usb_pipe *pipe = usb->pipe + pipe_handle; |
2578 | ||
2579 | if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES))) | |
2580 | return -EINVAL; | |
2581 | if (unlikely((submit_handle < 0) || (submit_handle >= MAX_TRANSACTIONS))) | |
2582 | return -EINVAL; | |
2583 | ||
2584 | /* Fail if the pipe isn't open */ | |
2585 | if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0)) | |
2586 | return -EINVAL; | |
2587 | ||
2588 | transaction = usb->transaction + submit_handle; | |
2589 | ||
2590 | /* Fail if this transaction already completed */ | |
2591 | if (unlikely((transaction->flags & __CVMX_USB_TRANSACTION_FLAGS_IN_USE) == 0)) | |
2592 | return -EINVAL; | |
2593 | ||
2594 | /* | |
2595 | * If the transaction is the HEAD of the queue and scheduled. We need to | |
2596 | * treat it special | |
2597 | */ | |
2598 | if ((pipe->head == transaction) && | |
2599 | (pipe->flags & __CVMX_USB_PIPE_FLAGS_SCHEDULED)) { | |
2600 | union cvmx_usbcx_hccharx usbc_hcchar; | |
2601 | ||
2602 | usb->pipe_for_channel[pipe->channel] = NULL; | |
2603 | pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED; | |
2604 | ||
2605 | CVMX_SYNCW; | |
2606 | ||
2607 | usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(pipe->channel, usb->index)); | |
2608 | /* | |
2609 | * If the channel isn't enabled then the transaction already | |
2610 | * completed. | |
2611 | */ | |
2612 | if (usbc_hcchar.s.chena) { | |
2613 | usbc_hcchar.s.chdis = 1; | |
2614 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(pipe->channel, usb->index), usbc_hcchar.u32); | |
2615 | } | |
2616 | } | |
2617 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_CANCEL); | |
2618 | return 0; | |
2619 | } | |
2620 | ||
2621 | ||
2622 | /** | |
2623 | * Cancel all outstanding requests in a pipe. Logically all this | |
2624 | * does is call cvmx_usb_cancel() in a loop. | |
2625 | * | |
cb61c600 | 2626 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
2627 | * @pipe_handle: |
2628 | * Pipe handle to cancel requests in. | |
2629 | * | |
2630 | * Returns: 0 or a negative error code. | |
2631 | */ | |
cb61c600 | 2632 | static int cvmx_usb_cancel_all(struct cvmx_usb_state *usb, int pipe_handle) |
6570b4a9 | 2633 | { |
6570b4a9 AK |
2634 | struct cvmx_usb_pipe *pipe = usb->pipe + pipe_handle; |
2635 | ||
2636 | if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES))) | |
2637 | return -EINVAL; | |
2638 | ||
2639 | /* Fail if the pipe isn't open */ | |
2640 | if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0)) | |
2641 | return -EINVAL; | |
2642 | ||
2643 | /* Simply loop through and attempt to cancel each transaction */ | |
2644 | while (pipe->head) { | |
cb61c600 | 2645 | int result = cvmx_usb_cancel(usb, pipe_handle, |
6570b4a9 AK |
2646 | __cvmx_usb_get_submit_handle(usb, pipe->head)); |
2647 | if (unlikely(result != 0)) | |
2648 | return result; | |
2649 | } | |
2650 | return 0; | |
2651 | } | |
2652 | ||
2653 | ||
2654 | /** | |
2655 | * Close a pipe created with cvmx_usb_open_pipe(). | |
2656 | * | |
cb61c600 | 2657 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
2658 | * @pipe_handle: |
2659 | * Pipe handle to close. | |
2660 | * | |
2661 | * Returns: 0 or a negative error code. EBUSY is returned if the pipe has | |
2662 | * outstanding transfers. | |
2663 | */ | |
cb61c600 | 2664 | static int cvmx_usb_close_pipe(struct cvmx_usb_state *usb, int pipe_handle) |
6570b4a9 | 2665 | { |
6570b4a9 AK |
2666 | struct cvmx_usb_pipe *pipe = usb->pipe + pipe_handle; |
2667 | ||
2668 | if (unlikely((pipe_handle < 0) || (pipe_handle >= MAX_PIPES))) | |
2669 | return -EINVAL; | |
2670 | ||
2671 | /* Fail if the pipe isn't open */ | |
2672 | if (unlikely((pipe->flags & __CVMX_USB_PIPE_FLAGS_OPEN) == 0)) | |
2673 | return -EINVAL; | |
2674 | ||
2675 | /* Fail if the pipe has pending transactions */ | |
2676 | if (unlikely(pipe->head)) | |
2677 | return -EBUSY; | |
2678 | ||
2679 | pipe->flags = 0; | |
2680 | __cvmx_usb_remove_pipe(&usb->idle_pipes, pipe); | |
2681 | __cvmx_usb_append_pipe(&usb->free_pipes, pipe); | |
2682 | ||
2683 | return 0; | |
2684 | } | |
2685 | ||
6570b4a9 AK |
2686 | /** |
2687 | * Get the current USB protocol level frame number. The frame | |
2688 | * number is always in the range of 0-0x7ff. | |
2689 | * | |
cb61c600 | 2690 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
2691 | * |
2692 | * Returns: USB frame number | |
2693 | */ | |
cb61c600 | 2694 | static int cvmx_usb_get_frame_number(struct cvmx_usb_state *usb) |
6570b4a9 AK |
2695 | { |
2696 | int frame_number; | |
6570b4a9 AK |
2697 | union cvmx_usbcx_hfnum usbc_hfnum; |
2698 | ||
2699 | usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index)); | |
2700 | frame_number = usbc_hfnum.s.frnum; | |
2701 | ||
2702 | return frame_number; | |
2703 | } | |
2704 | ||
2705 | ||
2706 | /** | |
2707 | * Poll a channel for status | |
2708 | * | |
2709 | * @usb: USB device | |
2710 | * @channel: Channel to poll | |
2711 | * | |
2712 | * Returns: Zero on success | |
2713 | */ | |
cb61c600 | 2714 | static int __cvmx_usb_poll_channel(struct cvmx_usb_state *usb, int channel) |
6570b4a9 AK |
2715 | { |
2716 | union cvmx_usbcx_hcintx usbc_hcint; | |
2717 | union cvmx_usbcx_hctsizx usbc_hctsiz; | |
2718 | union cvmx_usbcx_hccharx usbc_hcchar; | |
2719 | struct cvmx_usb_pipe *pipe; | |
2720 | struct cvmx_usb_transaction *transaction; | |
2721 | int bytes_this_transfer; | |
2722 | int bytes_in_last_packet; | |
2723 | int packets_processed; | |
2724 | int buffer_space_left; | |
2725 | ||
2726 | /* Read the interrupt status bits for the channel */ | |
2727 | usbc_hcint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCINTX(channel, usb->index)); | |
2728 | ||
2729 | if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) { | |
2730 | usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index)); | |
2731 | ||
2732 | if (usbc_hcchar.s.chena && usbc_hcchar.s.chdis) { | |
2733 | /* | |
2734 | * There seems to be a bug in CN31XX which can cause | |
2735 | * interrupt IN transfers to get stuck until we do a | |
2736 | * write of HCCHARX without changing things | |
2737 | */ | |
2738 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32); | |
2739 | return 0; | |
2740 | } | |
2741 | ||
2742 | /* | |
2743 | * In non DMA mode the channels don't halt themselves. We need | |
2744 | * to manually disable channels that are left running | |
2745 | */ | |
2746 | if (!usbc_hcint.s.chhltd) { | |
2747 | if (usbc_hcchar.s.chena) { | |
2748 | union cvmx_usbcx_hcintmskx hcintmsk; | |
2749 | /* Disable all interrupts except CHHLTD */ | |
2750 | hcintmsk.u32 = 0; | |
2751 | hcintmsk.s.chhltdmsk = 1; | |
2752 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), hcintmsk.u32); | |
2753 | usbc_hcchar.s.chdis = 1; | |
2754 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index), usbc_hcchar.u32); | |
2755 | return 0; | |
2756 | } else if (usbc_hcint.s.xfercompl) { | |
2757 | /* | |
2758 | * Successful IN/OUT with transfer complete. | |
2759 | * Channel halt isn't needed. | |
2760 | */ | |
2761 | } else { | |
2762 | cvmx_dprintf("USB%d: Channel %d interrupt without halt\n", usb->index, channel); | |
2763 | return 0; | |
2764 | } | |
2765 | } | |
2766 | } else { | |
2767 | /* | |
2768 | * There is are no interrupts that we need to process when the | |
2769 | * channel is still running | |
2770 | */ | |
2771 | if (!usbc_hcint.s.chhltd) | |
2772 | return 0; | |
2773 | } | |
2774 | ||
2775 | /* Disable the channel interrupts now that it is done */ | |
2776 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HCINTMSKX(channel, usb->index), 0); | |
2777 | usb->idle_hardware_channels |= (1<<channel); | |
2778 | ||
2779 | /* Make sure this channel is tied to a valid pipe */ | |
2780 | pipe = usb->pipe_for_channel[channel]; | |
2781 | CVMX_PREFETCH(pipe, 0); | |
2782 | CVMX_PREFETCH(pipe, 128); | |
2783 | if (!pipe) | |
2784 | return 0; | |
2785 | transaction = pipe->head; | |
2786 | CVMX_PREFETCH(transaction, 0); | |
2787 | ||
2788 | /* | |
2789 | * Disconnect this pipe from the HW channel. Later the schedule | |
2790 | * function will figure out which pipe needs to go | |
2791 | */ | |
2792 | usb->pipe_for_channel[channel] = NULL; | |
2793 | pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_SCHEDULED; | |
2794 | ||
2795 | /* | |
2796 | * Read the channel config info so we can figure out how much data | |
2797 | * transfered | |
2798 | */ | |
2799 | usbc_hcchar.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCCHARX(channel, usb->index)); | |
2800 | usbc_hctsiz.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HCTSIZX(channel, usb->index)); | |
2801 | ||
2802 | /* | |
2803 | * Calculating the number of bytes successfully transferred is dependent | |
2804 | * on the transfer direction | |
2805 | */ | |
2806 | packets_processed = transaction->pktcnt - usbc_hctsiz.s.pktcnt; | |
2807 | if (usbc_hcchar.s.epdir) { | |
2808 | /* | |
2809 | * IN transactions are easy. For every byte received the | |
2810 | * hardware decrements xfersize. All we need to do is subtract | |
2811 | * the current value of xfersize from its starting value and we | |
2812 | * know how many bytes were written to the buffer | |
2813 | */ | |
2814 | bytes_this_transfer = transaction->xfersize - usbc_hctsiz.s.xfersize; | |
2815 | } else { | |
2816 | /* | |
2817 | * OUT transaction don't decrement xfersize. Instead pktcnt is | |
2818 | * decremented on every successful packet send. The hardware | |
2819 | * does this when it receives an ACK, or NYET. If it doesn't | |
2820 | * receive one of these responses pktcnt doesn't change | |
2821 | */ | |
2822 | bytes_this_transfer = packets_processed * usbc_hcchar.s.mps; | |
2823 | /* | |
2824 | * The last packet may not be a full transfer if we didn't have | |
2825 | * enough data | |
2826 | */ | |
2827 | if (bytes_this_transfer > transaction->xfersize) | |
2828 | bytes_this_transfer = transaction->xfersize; | |
2829 | } | |
2830 | /* Figure out how many bytes were in the last packet of the transfer */ | |
2831 | if (packets_processed) | |
2832 | bytes_in_last_packet = bytes_this_transfer - (packets_processed-1) * usbc_hcchar.s.mps; | |
2833 | else | |
2834 | bytes_in_last_packet = bytes_this_transfer; | |
2835 | ||
2836 | /* | |
2837 | * As a special case, setup transactions output the setup header, not | |
2838 | * the user's data. For this reason we don't count setup data as bytes | |
2839 | * transferred | |
2840 | */ | |
2841 | if ((transaction->stage == CVMX_USB_STAGE_SETUP) || | |
2842 | (transaction->stage == CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE)) | |
2843 | bytes_this_transfer = 0; | |
2844 | ||
2845 | /* | |
2846 | * Add the bytes transferred to the running total. It is important that | |
2847 | * bytes_this_transfer doesn't count any data that needs to be | |
2848 | * retransmitted | |
2849 | */ | |
2850 | transaction->actual_bytes += bytes_this_transfer; | |
2851 | if (transaction->type == CVMX_USB_TRANSFER_ISOCHRONOUS) | |
2852 | buffer_space_left = transaction->iso_packets[0].length - transaction->actual_bytes; | |
2853 | else | |
2854 | buffer_space_left = transaction->buffer_length - transaction->actual_bytes; | |
2855 | ||
2856 | /* | |
2857 | * We need to remember the PID toggle state for the next transaction. | |
2858 | * The hardware already updated it for the next transaction | |
2859 | */ | |
2860 | pipe->pid_toggle = !(usbc_hctsiz.s.pid == 0); | |
2861 | ||
2862 | /* | |
2863 | * For high speed bulk out, assume the next transaction will need to do | |
2864 | * a ping before proceeding. If this isn't true the ACK processing below | |
2865 | * will clear this flag | |
2866 | */ | |
2867 | if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) && | |
2868 | (pipe->transfer_type == CVMX_USB_TRANSFER_BULK) && | |
2869 | (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT)) | |
2870 | pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING; | |
2871 | ||
2872 | if (usbc_hcint.s.stall) { | |
2873 | /* | |
2874 | * STALL as a response means this transaction cannot be | |
2875 | * completed because the device can't process transactions. Tell | |
2876 | * the user. Any data that was transferred will be counted on | |
2877 | * the actual bytes transferred | |
2878 | */ | |
2879 | pipe->pid_toggle = 0; | |
2880 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_STALL); | |
2881 | } else if (usbc_hcint.s.xacterr) { | |
2882 | /* | |
2883 | * We know at least one packet worked if we get a ACK or NAK. | |
2884 | * Reset the retry counter | |
2885 | */ | |
2886 | if (usbc_hcint.s.nak || usbc_hcint.s.ack) | |
2887 | transaction->retries = 0; | |
2888 | transaction->retries++; | |
2889 | if (transaction->retries > MAX_RETRIES) { | |
2890 | /* | |
2891 | * XactErr as a response means the device signaled | |
2892 | * something wrong with the transfer. For example, PID | |
2893 | * toggle errors cause these | |
2894 | */ | |
2895 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_XACTERR); | |
2896 | } else { | |
2897 | /* | |
2898 | * If this was a split then clear our split in progress | |
2899 | * marker | |
2900 | */ | |
2901 | if (usb->active_split == transaction) | |
2902 | usb->active_split = NULL; | |
2903 | /* | |
2904 | * Rewind to the beginning of the transaction by anding | |
2905 | * off the split complete bit | |
2906 | */ | |
2907 | transaction->stage &= ~1; | |
2908 | pipe->split_sc_frame = -1; | |
2909 | pipe->next_tx_frame += pipe->interval; | |
2910 | if (pipe->next_tx_frame < usb->frame_number) | |
2911 | pipe->next_tx_frame = usb->frame_number + pipe->interval - | |
2912 | (usb->frame_number - pipe->next_tx_frame) % pipe->interval; | |
2913 | } | |
2914 | } else if (usbc_hcint.s.bblerr) { | |
2915 | /* Babble Error (BblErr) */ | |
2916 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_BABBLEERR); | |
2917 | } else if (usbc_hcint.s.datatglerr) { | |
2918 | /* We'll retry the exact same transaction again */ | |
2919 | transaction->retries++; | |
2920 | } else if (usbc_hcint.s.nyet) { | |
2921 | /* | |
2922 | * NYET as a response is only allowed in three cases: as a | |
2923 | * response to a ping, as a response to a split transaction, and | |
2924 | * as a response to a bulk out. The ping case is handled by | |
2925 | * hardware, so we only have splits and bulk out | |
2926 | */ | |
2927 | if (!__cvmx_usb_pipe_needs_split(usb, pipe)) { | |
2928 | transaction->retries = 0; | |
2929 | /* | |
2930 | * If there is more data to go then we need to try | |
2931 | * again. Otherwise this transaction is complete | |
2932 | */ | |
2933 | if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) | |
2934 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS); | |
2935 | } else { | |
2936 | /* | |
2937 | * Split transactions retry the split complete 4 times | |
2938 | * then rewind to the start split and do the entire | |
2939 | * transactions again | |
2940 | */ | |
2941 | transaction->retries++; | |
2942 | if ((transaction->retries & 0x3) == 0) { | |
2943 | /* | |
2944 | * Rewind to the beginning of the transaction by | |
2945 | * anding off the split complete bit | |
2946 | */ | |
2947 | transaction->stage &= ~1; | |
2948 | pipe->split_sc_frame = -1; | |
2949 | } | |
2950 | } | |
2951 | } else if (usbc_hcint.s.ack) { | |
2952 | transaction->retries = 0; | |
2953 | /* | |
2954 | * The ACK bit can only be checked after the other error bits. | |
2955 | * This is because a multi packet transfer may succeed in a | |
2956 | * number of packets and then get a different response on the | |
2957 | * last packet. In this case both ACK and the last response bit | |
2958 | * will be set. If none of the other response bits is set, then | |
2959 | * the last packet must have been an ACK | |
2960 | * | |
2961 | * Since we got an ACK, we know we don't need to do a ping on | |
2962 | * this pipe | |
2963 | */ | |
2964 | pipe->flags &= ~__CVMX_USB_PIPE_FLAGS_NEED_PING; | |
2965 | ||
2966 | switch (transaction->type) { | |
2967 | case CVMX_USB_TRANSFER_CONTROL: | |
2968 | switch (transaction->stage) { | |
2969 | case CVMX_USB_STAGE_NON_CONTROL: | |
2970 | case CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE: | |
2971 | /* This should be impossible */ | |
2972 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_ERROR); | |
2973 | break; | |
2974 | case CVMX_USB_STAGE_SETUP: | |
2975 | pipe->pid_toggle = 1; | |
2976 | if (__cvmx_usb_pipe_needs_split(usb, pipe)) | |
2977 | transaction->stage = CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE; | |
2978 | else { | |
2979 | union cvmx_usb_control_header *header = | |
2980 | cvmx_phys_to_ptr(transaction->control_header); | |
2981 | if (header->s.length) | |
2982 | transaction->stage = CVMX_USB_STAGE_DATA; | |
2983 | else | |
2984 | transaction->stage = CVMX_USB_STAGE_STATUS; | |
2985 | } | |
2986 | break; | |
2987 | case CVMX_USB_STAGE_SETUP_SPLIT_COMPLETE: | |
2988 | { | |
2989 | union cvmx_usb_control_header *header = | |
2990 | cvmx_phys_to_ptr(transaction->control_header); | |
2991 | if (header->s.length) | |
2992 | transaction->stage = CVMX_USB_STAGE_DATA; | |
2993 | else | |
2994 | transaction->stage = CVMX_USB_STAGE_STATUS; | |
2995 | } | |
2996 | break; | |
2997 | case CVMX_USB_STAGE_DATA: | |
2998 | if (__cvmx_usb_pipe_needs_split(usb, pipe)) { | |
2999 | transaction->stage = CVMX_USB_STAGE_DATA_SPLIT_COMPLETE; | |
3000 | /* | |
3001 | * For setup OUT data that are splits, | |
3002 | * the hardware doesn't appear to count | |
3003 | * transferred data. Here we manually | |
3004 | * update the data transferred | |
3005 | */ | |
3006 | if (!usbc_hcchar.s.epdir) { | |
3007 | if (buffer_space_left < pipe->max_packet) | |
3008 | transaction->actual_bytes += buffer_space_left; | |
3009 | else | |
3010 | transaction->actual_bytes += pipe->max_packet; | |
3011 | } | |
3012 | } else if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) { | |
3013 | pipe->pid_toggle = 1; | |
3014 | transaction->stage = CVMX_USB_STAGE_STATUS; | |
3015 | } | |
3016 | break; | |
3017 | case CVMX_USB_STAGE_DATA_SPLIT_COMPLETE: | |
3018 | if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) { | |
3019 | pipe->pid_toggle = 1; | |
3020 | transaction->stage = CVMX_USB_STAGE_STATUS; | |
3021 | } else { | |
3022 | transaction->stage = CVMX_USB_STAGE_DATA; | |
3023 | } | |
3024 | break; | |
3025 | case CVMX_USB_STAGE_STATUS: | |
3026 | if (__cvmx_usb_pipe_needs_split(usb, pipe)) | |
3027 | transaction->stage = CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE; | |
3028 | else | |
3029 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS); | |
3030 | break; | |
3031 | case CVMX_USB_STAGE_STATUS_SPLIT_COMPLETE: | |
3032 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS); | |
3033 | break; | |
3034 | } | |
3035 | break; | |
3036 | case CVMX_USB_TRANSFER_BULK: | |
3037 | case CVMX_USB_TRANSFER_INTERRUPT: | |
3038 | /* | |
3039 | * The only time a bulk transfer isn't complete when it | |
3040 | * finishes with an ACK is during a split transaction. | |
3041 | * For splits we need to continue the transfer if more | |
3042 | * data is needed | |
3043 | */ | |
3044 | if (__cvmx_usb_pipe_needs_split(usb, pipe)) { | |
3045 | if (transaction->stage == CVMX_USB_STAGE_NON_CONTROL) | |
3046 | transaction->stage = CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE; | |
3047 | else { | |
3048 | if (buffer_space_left && (bytes_in_last_packet == pipe->max_packet)) | |
3049 | transaction->stage = CVMX_USB_STAGE_NON_CONTROL; | |
3050 | else { | |
3051 | if (transaction->type == CVMX_USB_TRANSFER_INTERRUPT) | |
3052 | pipe->next_tx_frame += pipe->interval; | |
3053 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS); | |
3054 | } | |
3055 | } | |
3056 | } else { | |
3057 | if ((pipe->device_speed == CVMX_USB_SPEED_HIGH) && | |
3058 | (pipe->transfer_type == CVMX_USB_TRANSFER_BULK) && | |
3059 | (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) && | |
3060 | (usbc_hcint.s.nak)) | |
3061 | pipe->flags |= __CVMX_USB_PIPE_FLAGS_NEED_PING; | |
3062 | if (!buffer_space_left || (bytes_in_last_packet < pipe->max_packet)) { | |
3063 | if (transaction->type == CVMX_USB_TRANSFER_INTERRUPT) | |
3064 | pipe->next_tx_frame += pipe->interval; | |
3065 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS); | |
3066 | } | |
3067 | } | |
3068 | break; | |
3069 | case CVMX_USB_TRANSFER_ISOCHRONOUS: | |
3070 | if (__cvmx_usb_pipe_needs_split(usb, pipe)) { | |
3071 | /* | |
3072 | * ISOCHRONOUS OUT splits don't require a | |
3073 | * complete split stage. Instead they use a | |
3074 | * sequence of begin OUT splits to transfer the | |
3075 | * data 188 bytes at a time. Once the transfer | |
3076 | * is complete, the pipe sleeps until the next | |
3077 | * schedule interval | |
3078 | */ | |
3079 | if (pipe->transfer_dir == CVMX_USB_DIRECTION_OUT) { | |
3080 | /* | |
3081 | * If no space left or this wasn't a max | |
3082 | * size packet then this transfer is | |
3083 | * complete. Otherwise start it again to | |
3084 | * send the next 188 bytes | |
3085 | */ | |
3086 | if (!buffer_space_left || (bytes_this_transfer < 188)) { | |
3087 | pipe->next_tx_frame += pipe->interval; | |
3088 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS); | |
3089 | } | |
3090 | } else { | |
3091 | if (transaction->stage == CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE) { | |
3092 | /* | |
3093 | * We are in the incoming data | |
3094 | * phase. Keep getting data | |
3095 | * until we run out of space or | |
3096 | * get a small packet | |
3097 | */ | |
3098 | if ((buffer_space_left == 0) || (bytes_in_last_packet < pipe->max_packet)) { | |
3099 | pipe->next_tx_frame += pipe->interval; | |
3100 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS); | |
3101 | } | |
3102 | } else | |
3103 | transaction->stage = CVMX_USB_STAGE_NON_CONTROL_SPLIT_COMPLETE; | |
3104 | } | |
3105 | } else { | |
3106 | pipe->next_tx_frame += pipe->interval; | |
3107 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_SUCCESS); | |
3108 | } | |
3109 | break; | |
3110 | } | |
3111 | } else if (usbc_hcint.s.nak) { | |
3112 | /* | |
3113 | * If this was a split then clear our split in progress marker. | |
3114 | */ | |
3115 | if (usb->active_split == transaction) | |
3116 | usb->active_split = NULL; | |
3117 | /* | |
3118 | * NAK as a response means the device couldn't accept the | |
3119 | * transaction, but it should be retried in the future. Rewind | |
3120 | * to the beginning of the transaction by anding off the split | |
3121 | * complete bit. Retry in the next interval | |
3122 | */ | |
3123 | transaction->retries = 0; | |
3124 | transaction->stage &= ~1; | |
3125 | pipe->next_tx_frame += pipe->interval; | |
3126 | if (pipe->next_tx_frame < usb->frame_number) | |
3127 | pipe->next_tx_frame = usb->frame_number + pipe->interval - | |
3128 | (usb->frame_number - pipe->next_tx_frame) % pipe->interval; | |
3129 | } else { | |
3130 | struct cvmx_usb_port_status port; | |
cb61c600 | 3131 | port = cvmx_usb_get_status(usb); |
6570b4a9 AK |
3132 | if (port.port_enabled) { |
3133 | /* We'll retry the exact same transaction again */ | |
3134 | transaction->retries++; | |
3135 | } else { | |
3136 | /* | |
3137 | * We get channel halted interrupts with no result bits | |
3138 | * sets when the cable is unplugged | |
3139 | */ | |
3140 | __cvmx_usb_perform_complete(usb, pipe, transaction, CVMX_USB_COMPLETE_ERROR); | |
3141 | } | |
3142 | } | |
3143 | return 0; | |
3144 | } | |
3145 | ||
393e2146 AK |
3146 | static void octeon_usb_port_callback(struct cvmx_usb_state *usb) |
3147 | { | |
3148 | struct octeon_hcd *priv = cvmx_usb_to_octeon(usb); | |
3149 | ||
3150 | spin_unlock(&priv->lock); | |
3151 | usb_hcd_poll_rh_status(octeon_to_hcd(priv)); | |
3152 | spin_lock(&priv->lock); | |
3153 | } | |
6570b4a9 AK |
3154 | |
3155 | /** | |
3156 | * Poll the USB block for status and call all needed callback | |
3157 | * handlers. This function is meant to be called in the interrupt | |
3158 | * handler for the USB controller. It can also be called | |
3159 | * periodically in a loop for non-interrupt based operation. | |
3160 | * | |
cb61c600 | 3161 | * @usb: USB device state populated by cvmx_usb_initialize(). |
6570b4a9 AK |
3162 | * |
3163 | * Returns: 0 or a negative error code. | |
3164 | */ | |
cb61c600 | 3165 | static int cvmx_usb_poll(struct cvmx_usb_state *usb) |
6570b4a9 AK |
3166 | { |
3167 | union cvmx_usbcx_hfnum usbc_hfnum; | |
3168 | union cvmx_usbcx_gintsts usbc_gintsts; | |
6570b4a9 AK |
3169 | |
3170 | CVMX_PREFETCH(usb, 0); | |
3171 | CVMX_PREFETCH(usb, 1*128); | |
3172 | CVMX_PREFETCH(usb, 2*128); | |
3173 | CVMX_PREFETCH(usb, 3*128); | |
3174 | CVMX_PREFETCH(usb, 4*128); | |
3175 | ||
3176 | /* Update the frame counter */ | |
3177 | usbc_hfnum.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HFNUM(usb->index)); | |
3178 | if ((usb->frame_number&0x3fff) > usbc_hfnum.s.frnum) | |
3179 | usb->frame_number += 0x4000; | |
3180 | usb->frame_number &= ~0x3fffull; | |
3181 | usb->frame_number |= usbc_hfnum.s.frnum; | |
3182 | ||
3183 | /* Read the pending interrupts */ | |
3184 | usbc_gintsts.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_GINTSTS(usb->index)); | |
3185 | ||
3186 | /* Clear the interrupts now that we know about them */ | |
3187 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_GINTSTS(usb->index), usbc_gintsts.u32); | |
3188 | ||
3189 | if (usbc_gintsts.s.rxflvl) { | |
3190 | /* | |
3191 | * RxFIFO Non-Empty (RxFLvl) | |
3192 | * Indicates that there is at least one packet pending to be | |
3193 | * read from the RxFIFO. | |
3194 | * | |
3195 | * In DMA mode this is handled by hardware | |
3196 | */ | |
3197 | if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) | |
3198 | __cvmx_usb_poll_rx_fifo(usb); | |
3199 | } | |
3200 | if (usbc_gintsts.s.ptxfemp || usbc_gintsts.s.nptxfemp) { | |
3201 | /* Fill the Tx FIFOs when not in DMA mode */ | |
3202 | if (usb->init_flags & CVMX_USB_INITIALIZE_FLAGS_NO_DMA) | |
3203 | __cvmx_usb_poll_tx_fifo(usb); | |
3204 | } | |
3205 | if (usbc_gintsts.s.disconnint || usbc_gintsts.s.prtint) { | |
3206 | union cvmx_usbcx_hprt usbc_hprt; | |
3207 | /* | |
3208 | * Disconnect Detected Interrupt (DisconnInt) | |
3209 | * Asserted when a device disconnect is detected. | |
3210 | * | |
3211 | * Host Port Interrupt (PrtInt) | |
3212 | * The core sets this bit to indicate a change in port status of | |
3213 | * one of the O2P USB core ports in Host mode. The application | |
3214 | * must read the Host Port Control and Status (HPRT) register to | |
3215 | * determine the exact event that caused this interrupt. The | |
3216 | * application must clear the appropriate status bit in the Host | |
3217 | * Port Control and Status register to clear this bit. | |
3218 | * | |
3219 | * Call the user's port callback | |
3220 | */ | |
393e2146 | 3221 | octeon_usb_port_callback(usb); |
6570b4a9 AK |
3222 | /* Clear the port change bits */ |
3223 | usbc_hprt.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HPRT(usb->index)); | |
3224 | usbc_hprt.s.prtena = 0; | |
3225 | __cvmx_usb_write_csr32(usb, CVMX_USBCX_HPRT(usb->index), usbc_hprt.u32); | |
3226 | } | |
3227 | if (usbc_gintsts.s.hchint) { | |
3228 | /* | |
3229 | * Host Channels Interrupt (HChInt) | |
3230 | * The core sets this bit to indicate that an interrupt is | |
3231 | * pending on one of the channels of the core (in Host mode). | |
3232 | * The application must read the Host All Channels Interrupt | |
3233 | * (HAINT) register to determine the exact number of the channel | |
3234 | * on which the interrupt occurred, and then read the | |
3235 | * corresponding Host Channel-n Interrupt (HCINTn) register to | |
3236 | * determine the exact cause of the interrupt. The application | |
3237 | * must clear the appropriate status bit in the HCINTn register | |
3238 | * to clear this bit. | |
3239 | */ | |
3240 | union cvmx_usbcx_haint usbc_haint; | |
3241 | usbc_haint.u32 = __cvmx_usb_read_csr32(usb, CVMX_USBCX_HAINT(usb->index)); | |
3242 | while (usbc_haint.u32) { | |
3243 | int channel; | |
3244 | ||
3245 | channel = __fls(usbc_haint.u32); | |
3246 | __cvmx_usb_poll_channel(usb, channel); | |
3247 | usbc_haint.u32 ^= 1<<channel; | |
3248 | } | |
3249 | } | |
3250 | ||
3251 | __cvmx_usb_schedule(usb, usbc_gintsts.s.sof); | |
3252 | ||
3253 | return 0; | |
3254 | } | |
3255 | ||
b164935b AK |
3256 | /* convert between an HCD pointer and the corresponding struct octeon_hcd */ |
3257 | static inline struct octeon_hcd *hcd_to_octeon(struct usb_hcd *hcd) | |
3258 | { | |
3259 | return (struct octeon_hcd *)(hcd->hcd_priv); | |
3260 | } | |
3261 | ||
b164935b AK |
3262 | static irqreturn_t octeon_usb_irq(struct usb_hcd *hcd) |
3263 | { | |
771378bb AK |
3264 | struct octeon_hcd *priv = hcd_to_octeon(hcd); |
3265 | unsigned long flags; | |
71e06db3 | 3266 | |
771378bb AK |
3267 | spin_lock_irqsave(&priv->lock, flags); |
3268 | cvmx_usb_poll(&priv->usb); | |
3269 | spin_unlock_irqrestore(&priv->lock, flags); | |
3270 | return IRQ_HANDLED; | |
b164935b AK |
3271 | } |
3272 | ||
b164935b AK |
3273 | static int octeon_usb_start(struct usb_hcd *hcd) |
3274 | { | |
771378bb | 3275 | hcd->state = HC_STATE_RUNNING; |
771378bb | 3276 | return 0; |
b164935b AK |
3277 | } |
3278 | ||
3279 | static void octeon_usb_stop(struct usb_hcd *hcd) | |
3280 | { | |
771378bb | 3281 | hcd->state = HC_STATE_HALT; |
b164935b AK |
3282 | } |
3283 | ||
3284 | static int octeon_usb_get_frame_number(struct usb_hcd *hcd) | |
3285 | { | |
771378bb | 3286 | struct octeon_hcd *priv = hcd_to_octeon(hcd); |
71e06db3 | 3287 | |
771378bb | 3288 | return cvmx_usb_get_frame_number(&priv->usb); |
b164935b AK |
3289 | } |
3290 | ||
b164935b | 3291 | static int octeon_usb_urb_enqueue(struct usb_hcd *hcd, |
771378bb AK |
3292 | struct urb *urb, |
3293 | gfp_t mem_flags) | |
b164935b | 3294 | { |
771378bb | 3295 | struct octeon_hcd *priv = hcd_to_octeon(hcd); |
71e06db3 | 3296 | struct device *dev = hcd->self.controller; |
771378bb AK |
3297 | int submit_handle = -1; |
3298 | int pipe_handle; | |
3299 | unsigned long flags; | |
6e0e1b00 | 3300 | struct cvmx_usb_iso_packet *iso_packet; |
771378bb AK |
3301 | struct usb_host_endpoint *ep = urb->ep; |
3302 | ||
771378bb AK |
3303 | urb->status = 0; |
3304 | INIT_LIST_HEAD(&urb->urb_list); /* not enqueued on dequeue_list */ | |
3305 | spin_lock_irqsave(&priv->lock, flags); | |
3306 | ||
3307 | if (!ep->hcpriv) { | |
394d4e08 | 3308 | enum cvmx_usb_transfer transfer_type; |
4918072e | 3309 | enum cvmx_usb_speed speed; |
771378bb AK |
3310 | int split_device = 0; |
3311 | int split_port = 0; | |
3312 | switch (usb_pipetype(urb->pipe)) { | |
3313 | case PIPE_ISOCHRONOUS: | |
3314 | transfer_type = CVMX_USB_TRANSFER_ISOCHRONOUS; | |
3315 | break; | |
3316 | case PIPE_INTERRUPT: | |
3317 | transfer_type = CVMX_USB_TRANSFER_INTERRUPT; | |
3318 | break; | |
3319 | case PIPE_CONTROL: | |
3320 | transfer_type = CVMX_USB_TRANSFER_CONTROL; | |
3321 | break; | |
3322 | default: | |
3323 | transfer_type = CVMX_USB_TRANSFER_BULK; | |
3324 | break; | |
3325 | } | |
3326 | switch (urb->dev->speed) { | |
3327 | case USB_SPEED_LOW: | |
3328 | speed = CVMX_USB_SPEED_LOW; | |
3329 | break; | |
3330 | case USB_SPEED_FULL: | |
3331 | speed = CVMX_USB_SPEED_FULL; | |
3332 | break; | |
3333 | default: | |
3334 | speed = CVMX_USB_SPEED_HIGH; | |
3335 | break; | |
3336 | } | |
87e7e57a AK |
3337 | /* |
3338 | * For slow devices on high speed ports we need to find the hub | |
3339 | * that does the speed translation so we know where to send the | |
3340 | * split transactions. | |
3341 | */ | |
771378bb | 3342 | if (speed != CVMX_USB_SPEED_HIGH) { |
87e7e57a AK |
3343 | /* |
3344 | * Start at this device and work our way up the usb | |
3345 | * tree. | |
3346 | */ | |
771378bb AK |
3347 | struct usb_device *dev = urb->dev; |
3348 | while (dev->parent) { | |
87e7e57a AK |
3349 | /* |
3350 | * If our parent is high speed then he'll | |
3351 | * receive the splits. | |
3352 | */ | |
771378bb AK |
3353 | if (dev->parent->speed == USB_SPEED_HIGH) { |
3354 | split_device = dev->parent->devnum; | |
3355 | split_port = dev->portnum; | |
3356 | break; | |
3357 | } | |
87e7e57a AK |
3358 | /* |
3359 | * Move up the tree one level. If we make it all | |
3360 | * the way up the tree, then the port must not | |
3361 | * be in high speed mode and we don't need a | |
3362 | * split. | |
3363 | */ | |
771378bb AK |
3364 | dev = dev->parent; |
3365 | } | |
3366 | } | |
3367 | pipe_handle = cvmx_usb_open_pipe(&priv->usb, | |
771378bb AK |
3368 | usb_pipedevice(urb->pipe), |
3369 | usb_pipeendpoint(urb->pipe), | |
3370 | speed, | |
3371 | le16_to_cpu(ep->desc.wMaxPacketSize) & 0x7ff, | |
3372 | transfer_type, | |
3373 | usb_pipein(urb->pipe) ? CVMX_USB_DIRECTION_IN : CVMX_USB_DIRECTION_OUT, | |
3374 | urb->interval, | |
3375 | (le16_to_cpu(ep->desc.wMaxPacketSize) >> 11) & 0x3, | |
3376 | split_device, | |
3377 | split_port); | |
3378 | if (pipe_handle < 0) { | |
3379 | spin_unlock_irqrestore(&priv->lock, flags); | |
71e06db3 | 3380 | dev_dbg(dev, "Failed to create pipe\n"); |
771378bb AK |
3381 | return -ENOMEM; |
3382 | } | |
3383 | ep->hcpriv = (void *)(0x10000L + pipe_handle); | |
c7609eac | 3384 | } else { |
771378bb | 3385 | pipe_handle = 0xffff & (long)ep->hcpriv; |
c7609eac | 3386 | } |
771378bb AK |
3387 | |
3388 | switch (usb_pipetype(urb->pipe)) { | |
3389 | case PIPE_ISOCHRONOUS: | |
71e06db3 AK |
3390 | dev_dbg(dev, "Submit isochronous to %d.%d\n", |
3391 | usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe)); | |
87e7e57a AK |
3392 | /* |
3393 | * Allocate a structure to use for our private list of | |
3394 | * isochronous packets. | |
3395 | */ | |
6e0e1b00 AK |
3396 | iso_packet = kmalloc(urb->number_of_packets * |
3397 | sizeof(struct cvmx_usb_iso_packet), | |
3398 | GFP_ATOMIC); | |
771378bb AK |
3399 | if (iso_packet) { |
3400 | int i; | |
3401 | /* Fill the list with the data from the URB */ | |
3402 | for (i = 0; i < urb->number_of_packets; i++) { | |
3403 | iso_packet[i].offset = urb->iso_frame_desc[i].offset; | |
3404 | iso_packet[i].length = urb->iso_frame_desc[i].length; | |
3405 | iso_packet[i].status = CVMX_USB_COMPLETE_ERROR; | |
3406 | } | |
87e7e57a AK |
3407 | /* |
3408 | * Store a pointer to the list in the URB setup_packet | |
3409 | * field. We know this currently isn't being used and | |
3410 | * this saves us a bunch of logic. | |
3411 | */ | |
771378bb AK |
3412 | urb->setup_packet = (char *)iso_packet; |
3413 | submit_handle = cvmx_usb_submit_isochronous(&priv->usb, pipe_handle, | |
3414 | urb->start_frame, | |
771378bb AK |
3415 | urb->number_of_packets, |
3416 | iso_packet, | |
3417 | urb->transfer_dma, | |
3418 | urb->transfer_buffer_length, | |
771378bb | 3419 | urb); |
87e7e57a AK |
3420 | /* |
3421 | * If submit failed we need to free our private packet | |
3422 | * list. | |
3423 | */ | |
771378bb AK |
3424 | if (submit_handle < 0) { |
3425 | urb->setup_packet = NULL; | |
3426 | kfree(iso_packet); | |
3427 | } | |
3428 | } | |
3429 | break; | |
3430 | case PIPE_INTERRUPT: | |
71e06db3 AK |
3431 | dev_dbg(dev, "Submit interrupt to %d.%d\n", |
3432 | usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe)); | |
9fdbb696 AK |
3433 | submit_handle = cvmx_usb_submit_interrupt(&priv->usb, |
3434 | pipe_handle, urb); | |
771378bb AK |
3435 | break; |
3436 | case PIPE_CONTROL: | |
71e06db3 AK |
3437 | dev_dbg(dev, "Submit control to %d.%d\n", |
3438 | usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe)); | |
771378bb | 3439 | submit_handle = cvmx_usb_submit_control(&priv->usb, pipe_handle, |
2ae09e87 | 3440 | urb); |
771378bb AK |
3441 | break; |
3442 | case PIPE_BULK: | |
71e06db3 AK |
3443 | dev_dbg(dev, "Submit bulk to %d.%d\n", |
3444 | usb_pipedevice(urb->pipe), usb_pipeendpoint(urb->pipe)); | |
771378bb | 3445 | submit_handle = cvmx_usb_submit_bulk(&priv->usb, pipe_handle, |
9ccca707 | 3446 | urb); |
771378bb AK |
3447 | break; |
3448 | } | |
3449 | if (submit_handle < 0) { | |
3450 | spin_unlock_irqrestore(&priv->lock, flags); | |
71e06db3 | 3451 | dev_dbg(dev, "Failed to submit\n"); |
771378bb AK |
3452 | return -ENOMEM; |
3453 | } | |
3454 | urb->hcpriv = (void *)(long)(((submit_handle & 0xffff) << 16) | pipe_handle); | |
3455 | spin_unlock_irqrestore(&priv->lock, flags); | |
3456 | return 0; | |
b164935b AK |
3457 | } |
3458 | ||
3459 | static void octeon_usb_urb_dequeue_work(unsigned long arg) | |
3460 | { | |
771378bb AK |
3461 | unsigned long flags; |
3462 | struct octeon_hcd *priv = (struct octeon_hcd *)arg; | |
3463 | ||
3464 | spin_lock_irqsave(&priv->lock, flags); | |
3465 | ||
3466 | while (!list_empty(&priv->dequeue_list)) { | |
3467 | int pipe_handle; | |
3468 | int submit_handle; | |
3469 | struct urb *urb = container_of(priv->dequeue_list.next, struct urb, urb_list); | |
3470 | list_del(&urb->urb_list); | |
3471 | /* not enqueued on dequeue_list */ | |
3472 | INIT_LIST_HEAD(&urb->urb_list); | |
3473 | pipe_handle = 0xffff & (long)urb->hcpriv; | |
3474 | submit_handle = ((long)urb->hcpriv) >> 16; | |
3475 | cvmx_usb_cancel(&priv->usb, pipe_handle, submit_handle); | |
3476 | } | |
3477 | ||
3478 | spin_unlock_irqrestore(&priv->lock, flags); | |
b164935b AK |
3479 | } |
3480 | ||
3481 | static int octeon_usb_urb_dequeue(struct usb_hcd *hcd, struct urb *urb, int status) | |
3482 | { | |
771378bb AK |
3483 | struct octeon_hcd *priv = hcd_to_octeon(hcd); |
3484 | unsigned long flags; | |
b164935b | 3485 | |
771378bb AK |
3486 | if (!urb->dev) |
3487 | return -EINVAL; | |
b164935b | 3488 | |
771378bb | 3489 | spin_lock_irqsave(&priv->lock, flags); |
b164935b | 3490 | |
771378bb AK |
3491 | urb->status = status; |
3492 | list_add_tail(&urb->urb_list, &priv->dequeue_list); | |
b164935b | 3493 | |
771378bb | 3494 | spin_unlock_irqrestore(&priv->lock, flags); |
b164935b | 3495 | |
771378bb | 3496 | tasklet_schedule(&priv->dequeue_tasklet); |
b164935b | 3497 | |
771378bb | 3498 | return 0; |
b164935b AK |
3499 | } |
3500 | ||
3501 | static void octeon_usb_endpoint_disable(struct usb_hcd *hcd, struct usb_host_endpoint *ep) | |
3502 | { | |
71e06db3 AK |
3503 | struct device *dev = hcd->self.controller; |
3504 | ||
771378bb AK |
3505 | if (ep->hcpriv) { |
3506 | struct octeon_hcd *priv = hcd_to_octeon(hcd); | |
3507 | int pipe_handle = 0xffff & (long)ep->hcpriv; | |
3508 | unsigned long flags; | |
3509 | spin_lock_irqsave(&priv->lock, flags); | |
3510 | cvmx_usb_cancel_all(&priv->usb, pipe_handle); | |
3511 | if (cvmx_usb_close_pipe(&priv->usb, pipe_handle)) | |
71e06db3 | 3512 | dev_dbg(dev, "Closing pipe %d failed\n", pipe_handle); |
771378bb AK |
3513 | spin_unlock_irqrestore(&priv->lock, flags); |
3514 | ep->hcpriv = NULL; | |
3515 | } | |
b164935b AK |
3516 | } |
3517 | ||
3518 | static int octeon_usb_hub_status_data(struct usb_hcd *hcd, char *buf) | |
3519 | { | |
771378bb | 3520 | struct octeon_hcd *priv = hcd_to_octeon(hcd); |
51a19621 | 3521 | struct cvmx_usb_port_status port_status; |
771378bb | 3522 | unsigned long flags; |
b164935b | 3523 | |
771378bb AK |
3524 | spin_lock_irqsave(&priv->lock, flags); |
3525 | port_status = cvmx_usb_get_status(&priv->usb); | |
3526 | spin_unlock_irqrestore(&priv->lock, flags); | |
3527 | buf[0] = 0; | |
3528 | buf[0] = port_status.connect_change << 1; | |
b164935b | 3529 | |
771378bb | 3530 | return (buf[0] != 0); |
b164935b AK |
3531 | } |
3532 | ||
3533 | static int octeon_usb_hub_control(struct usb_hcd *hcd, u16 typeReq, u16 wValue, u16 wIndex, char *buf, u16 wLength) | |
3534 | { | |
771378bb | 3535 | struct octeon_hcd *priv = hcd_to_octeon(hcd); |
71e06db3 | 3536 | struct device *dev = hcd->self.controller; |
51a19621 | 3537 | struct cvmx_usb_port_status usb_port_status; |
771378bb AK |
3538 | int port_status; |
3539 | struct usb_hub_descriptor *desc; | |
3540 | unsigned long flags; | |
3541 | ||
3542 | switch (typeReq) { | |
3543 | case ClearHubFeature: | |
71e06db3 | 3544 | dev_dbg(dev, "ClearHubFeature\n"); |
771378bb AK |
3545 | switch (wValue) { |
3546 | case C_HUB_LOCAL_POWER: | |
3547 | case C_HUB_OVER_CURRENT: | |
3548 | /* Nothing required here */ | |
3549 | break; | |
3550 | default: | |
3551 | return -EINVAL; | |
3552 | } | |
3553 | break; | |
3554 | case ClearPortFeature: | |
71e06db3 | 3555 | dev_dbg(dev, "ClearPortFeature\n"); |
771378bb | 3556 | if (wIndex != 1) { |
71e06db3 | 3557 | dev_dbg(dev, " INVALID\n"); |
771378bb AK |
3558 | return -EINVAL; |
3559 | } | |
3560 | ||
3561 | switch (wValue) { | |
3562 | case USB_PORT_FEAT_ENABLE: | |
71e06db3 | 3563 | dev_dbg(dev, " ENABLE\n"); |
771378bb AK |
3564 | spin_lock_irqsave(&priv->lock, flags); |
3565 | cvmx_usb_disable(&priv->usb); | |
3566 | spin_unlock_irqrestore(&priv->lock, flags); | |
3567 | break; | |
3568 | case USB_PORT_FEAT_SUSPEND: | |
71e06db3 | 3569 | dev_dbg(dev, " SUSPEND\n"); |
771378bb AK |
3570 | /* Not supported on Octeon */ |
3571 | break; | |
3572 | case USB_PORT_FEAT_POWER: | |
71e06db3 | 3573 | dev_dbg(dev, " POWER\n"); |
771378bb AK |
3574 | /* Not supported on Octeon */ |
3575 | break; | |
3576 | case USB_PORT_FEAT_INDICATOR: | |
71e06db3 | 3577 | dev_dbg(dev, " INDICATOR\n"); |
771378bb AK |
3578 | /* Port inidicator not supported */ |
3579 | break; | |
3580 | case USB_PORT_FEAT_C_CONNECTION: | |
71e06db3 | 3581 | dev_dbg(dev, " C_CONNECTION\n"); |
771378bb AK |
3582 | /* Clears drivers internal connect status change flag */ |
3583 | spin_lock_irqsave(&priv->lock, flags); | |
29a202fa | 3584 | priv->usb.port_status = cvmx_usb_get_status(&priv->usb); |
771378bb AK |
3585 | spin_unlock_irqrestore(&priv->lock, flags); |
3586 | break; | |
3587 | case USB_PORT_FEAT_C_RESET: | |
71e06db3 | 3588 | dev_dbg(dev, " C_RESET\n"); |
87e7e57a AK |
3589 | /* |
3590 | * Clears the driver's internal Port Reset Change flag. | |
3591 | */ | |
771378bb | 3592 | spin_lock_irqsave(&priv->lock, flags); |
29a202fa | 3593 | priv->usb.port_status = cvmx_usb_get_status(&priv->usb); |
771378bb AK |
3594 | spin_unlock_irqrestore(&priv->lock, flags); |
3595 | break; | |
3596 | case USB_PORT_FEAT_C_ENABLE: | |
71e06db3 | 3597 | dev_dbg(dev, " C_ENABLE\n"); |
87e7e57a AK |
3598 | /* |
3599 | * Clears the driver's internal Port Enable/Disable | |
3600 | * Change flag. | |
3601 | */ | |
771378bb | 3602 | spin_lock_irqsave(&priv->lock, flags); |
29a202fa | 3603 | priv->usb.port_status = cvmx_usb_get_status(&priv->usb); |
771378bb AK |
3604 | spin_unlock_irqrestore(&priv->lock, flags); |
3605 | break; | |
3606 | case USB_PORT_FEAT_C_SUSPEND: | |
71e06db3 | 3607 | dev_dbg(dev, " C_SUSPEND\n"); |
87e7e57a AK |
3608 | /* |
3609 | * Clears the driver's internal Port Suspend Change | |
3610 | * flag, which is set when resume signaling on the host | |
3611 | * port is complete. | |
3612 | */ | |
771378bb AK |
3613 | break; |
3614 | case USB_PORT_FEAT_C_OVER_CURRENT: | |
71e06db3 | 3615 | dev_dbg(dev, " C_OVER_CURRENT\n"); |
771378bb AK |
3616 | /* Clears the driver's overcurrent Change flag */ |
3617 | spin_lock_irqsave(&priv->lock, flags); | |
29a202fa | 3618 | priv->usb.port_status = cvmx_usb_get_status(&priv->usb); |
771378bb AK |
3619 | spin_unlock_irqrestore(&priv->lock, flags); |
3620 | break; | |
3621 | default: | |
71e06db3 | 3622 | dev_dbg(dev, " UNKNOWN\n"); |
771378bb AK |
3623 | return -EINVAL; |
3624 | } | |
771378bb AK |
3625 | break; |
3626 | case GetHubDescriptor: | |
71e06db3 | 3627 | dev_dbg(dev, "GetHubDescriptor\n"); |
771378bb AK |
3628 | desc = (struct usb_hub_descriptor *)buf; |
3629 | desc->bDescLength = 9; | |
3630 | desc->bDescriptorType = 0x29; | |
3631 | desc->bNbrPorts = 1; | |
3632 | desc->wHubCharacteristics = 0x08; | |
3633 | desc->bPwrOn2PwrGood = 1; | |
3634 | desc->bHubContrCurrent = 0; | |
3635 | desc->u.hs.DeviceRemovable[0] = 0; | |
3636 | desc->u.hs.DeviceRemovable[1] = 0xff; | |
3637 | break; | |
3638 | case GetHubStatus: | |
71e06db3 | 3639 | dev_dbg(dev, "GetHubStatus\n"); |
771378bb AK |
3640 | *(__le32 *) buf = 0; |
3641 | break; | |
3642 | case GetPortStatus: | |
71e06db3 | 3643 | dev_dbg(dev, "GetPortStatus\n"); |
771378bb | 3644 | if (wIndex != 1) { |
71e06db3 | 3645 | dev_dbg(dev, " INVALID\n"); |
771378bb AK |
3646 | return -EINVAL; |
3647 | } | |
3648 | ||
3649 | spin_lock_irqsave(&priv->lock, flags); | |
3650 | usb_port_status = cvmx_usb_get_status(&priv->usb); | |
3651 | spin_unlock_irqrestore(&priv->lock, flags); | |
3652 | port_status = 0; | |
3653 | ||
3654 | if (usb_port_status.connect_change) { | |
3655 | port_status |= (1 << USB_PORT_FEAT_C_CONNECTION); | |
71e06db3 | 3656 | dev_dbg(dev, " C_CONNECTION\n"); |
771378bb AK |
3657 | } |
3658 | ||
3659 | if (usb_port_status.port_enabled) { | |
3660 | port_status |= (1 << USB_PORT_FEAT_C_ENABLE); | |
71e06db3 | 3661 | dev_dbg(dev, " C_ENABLE\n"); |
771378bb AK |
3662 | } |
3663 | ||
3664 | if (usb_port_status.connected) { | |
3665 | port_status |= (1 << USB_PORT_FEAT_CONNECTION); | |
71e06db3 | 3666 | dev_dbg(dev, " CONNECTION\n"); |
771378bb AK |
3667 | } |
3668 | ||
3669 | if (usb_port_status.port_enabled) { | |
3670 | port_status |= (1 << USB_PORT_FEAT_ENABLE); | |
71e06db3 | 3671 | dev_dbg(dev, " ENABLE\n"); |
771378bb AK |
3672 | } |
3673 | ||
3674 | if (usb_port_status.port_over_current) { | |
3675 | port_status |= (1 << USB_PORT_FEAT_OVER_CURRENT); | |
71e06db3 | 3676 | dev_dbg(dev, " OVER_CURRENT\n"); |
771378bb AK |
3677 | } |
3678 | ||
3679 | if (usb_port_status.port_powered) { | |
3680 | port_status |= (1 << USB_PORT_FEAT_POWER); | |
71e06db3 | 3681 | dev_dbg(dev, " POWER\n"); |
771378bb AK |
3682 | } |
3683 | ||
3684 | if (usb_port_status.port_speed == CVMX_USB_SPEED_HIGH) { | |
3685 | port_status |= USB_PORT_STAT_HIGH_SPEED; | |
71e06db3 | 3686 | dev_dbg(dev, " HIGHSPEED\n"); |
771378bb AK |
3687 | } else if (usb_port_status.port_speed == CVMX_USB_SPEED_LOW) { |
3688 | port_status |= (1 << USB_PORT_FEAT_LOWSPEED); | |
71e06db3 | 3689 | dev_dbg(dev, " LOWSPEED\n"); |
771378bb AK |
3690 | } |
3691 | ||
3692 | *((__le32 *) buf) = cpu_to_le32(port_status); | |
771378bb AK |
3693 | break; |
3694 | case SetHubFeature: | |
71e06db3 | 3695 | dev_dbg(dev, "SetHubFeature\n"); |
771378bb AK |
3696 | /* No HUB features supported */ |
3697 | break; | |
3698 | case SetPortFeature: | |
71e06db3 | 3699 | dev_dbg(dev, "SetPortFeature\n"); |
771378bb | 3700 | if (wIndex != 1) { |
71e06db3 | 3701 | dev_dbg(dev, " INVALID\n"); |
771378bb AK |
3702 | return -EINVAL; |
3703 | } | |
3704 | ||
3705 | switch (wValue) { | |
3706 | case USB_PORT_FEAT_SUSPEND: | |
71e06db3 | 3707 | dev_dbg(dev, " SUSPEND\n"); |
771378bb AK |
3708 | return -EINVAL; |
3709 | case USB_PORT_FEAT_POWER: | |
71e06db3 | 3710 | dev_dbg(dev, " POWER\n"); |
771378bb AK |
3711 | return -EINVAL; |
3712 | case USB_PORT_FEAT_RESET: | |
71e06db3 | 3713 | dev_dbg(dev, " RESET\n"); |
771378bb AK |
3714 | spin_lock_irqsave(&priv->lock, flags); |
3715 | cvmx_usb_disable(&priv->usb); | |
3716 | if (cvmx_usb_enable(&priv->usb)) | |
71e06db3 | 3717 | dev_dbg(dev, "Failed to enable the port\n"); |
771378bb AK |
3718 | spin_unlock_irqrestore(&priv->lock, flags); |
3719 | return 0; | |
3720 | case USB_PORT_FEAT_INDICATOR: | |
71e06db3 | 3721 | dev_dbg(dev, " INDICATOR\n"); |
771378bb AK |
3722 | /* Not supported */ |
3723 | break; | |
3724 | default: | |
71e06db3 | 3725 | dev_dbg(dev, " UNKNOWN\n"); |
771378bb AK |
3726 | return -EINVAL; |
3727 | } | |
3728 | break; | |
3729 | default: | |
71e06db3 | 3730 | dev_dbg(dev, "Unknown root hub request\n"); |
771378bb AK |
3731 | return -EINVAL; |
3732 | } | |
3733 | return 0; | |
b164935b AK |
3734 | } |
3735 | ||
3736 | ||
3737 | static const struct hc_driver octeon_hc_driver = { | |
771378bb AK |
3738 | .description = "Octeon USB", |
3739 | .product_desc = "Octeon Host Controller", | |
3740 | .hcd_priv_size = sizeof(struct octeon_hcd), | |
3741 | .irq = octeon_usb_irq, | |
3742 | .flags = HCD_MEMORY | HCD_USB2, | |
3743 | .start = octeon_usb_start, | |
3744 | .stop = octeon_usb_stop, | |
3745 | .urb_enqueue = octeon_usb_urb_enqueue, | |
3746 | .urb_dequeue = octeon_usb_urb_dequeue, | |
3747 | .endpoint_disable = octeon_usb_endpoint_disable, | |
3748 | .get_frame_number = octeon_usb_get_frame_number, | |
3749 | .hub_status_data = octeon_usb_hub_status_data, | |
3750 | .hub_control = octeon_usb_hub_control, | |
b164935b AK |
3751 | }; |
3752 | ||
3753 | ||
3754 | static int octeon_usb_driver_probe(struct device *dev) | |
3755 | { | |
771378bb AK |
3756 | int status; |
3757 | int usb_num = to_platform_device(dev)->id; | |
3758 | int irq = platform_get_irq(to_platform_device(dev), 0); | |
3759 | struct octeon_hcd *priv; | |
3760 | struct usb_hcd *hcd; | |
3761 | unsigned long flags; | |
3762 | ||
87e7e57a AK |
3763 | /* |
3764 | * Set the DMA mask to 64bits so we get buffers already translated for | |
3765 | * DMA. | |
3766 | */ | |
771378bb AK |
3767 | dev->coherent_dma_mask = ~0; |
3768 | dev->dma_mask = &dev->coherent_dma_mask; | |
3769 | ||
3770 | hcd = usb_create_hcd(&octeon_hc_driver, dev, dev_name(dev)); | |
3771 | if (!hcd) { | |
71e06db3 | 3772 | dev_dbg(dev, "Failed to allocate memory for HCD\n"); |
771378bb AK |
3773 | return -1; |
3774 | } | |
3775 | hcd->uses_new_polling = 1; | |
3776 | priv = (struct octeon_hcd *)hcd->hcd_priv; | |
3777 | ||
3778 | spin_lock_init(&priv->lock); | |
3779 | ||
3780 | tasklet_init(&priv->dequeue_tasklet, octeon_usb_urb_dequeue_work, (unsigned long)priv); | |
3781 | INIT_LIST_HEAD(&priv->dequeue_list); | |
3782 | ||
9be317e6 | 3783 | status = cvmx_usb_initialize(&priv->usb, usb_num); |
771378bb | 3784 | if (status) { |
71e06db3 | 3785 | dev_dbg(dev, "USB initialization failed with %d\n", status); |
771378bb AK |
3786 | kfree(hcd); |
3787 | return -1; | |
3788 | } | |
3789 | ||
3790 | /* This delay is needed for CN3010, but I don't know why... */ | |
3791 | mdelay(10); | |
3792 | ||
3793 | spin_lock_irqsave(&priv->lock, flags); | |
3794 | cvmx_usb_poll(&priv->usb); | |
3795 | spin_unlock_irqrestore(&priv->lock, flags); | |
3796 | ||
3797 | status = usb_add_hcd(hcd, irq, IRQF_SHARED); | |
3798 | if (status) { | |
71e06db3 | 3799 | dev_dbg(dev, "USB add HCD failed with %d\n", status); |
771378bb AK |
3800 | kfree(hcd); |
3801 | return -1; | |
3802 | } | |
3803 | ||
d935217d | 3804 | dev_dbg(dev, "Registered HCD for port %d on irq %d\n", usb_num, irq); |
771378bb AK |
3805 | |
3806 | return 0; | |
b164935b AK |
3807 | } |
3808 | ||
3809 | static int octeon_usb_driver_remove(struct device *dev) | |
3810 | { | |
771378bb AK |
3811 | int status; |
3812 | struct usb_hcd *hcd = dev_get_drvdata(dev); | |
3813 | struct octeon_hcd *priv = hcd_to_octeon(hcd); | |
3814 | unsigned long flags; | |
b164935b | 3815 | |
771378bb AK |
3816 | usb_remove_hcd(hcd); |
3817 | tasklet_kill(&priv->dequeue_tasklet); | |
3818 | spin_lock_irqsave(&priv->lock, flags); | |
3819 | status = cvmx_usb_shutdown(&priv->usb); | |
3820 | spin_unlock_irqrestore(&priv->lock, flags); | |
3821 | if (status) | |
71e06db3 | 3822 | dev_dbg(dev, "USB shutdown failed with %d\n", status); |
b164935b | 3823 | |
771378bb | 3824 | kfree(hcd); |
b164935b | 3825 | |
771378bb | 3826 | return 0; |
b164935b AK |
3827 | } |
3828 | ||
3829 | static struct device_driver octeon_usb_driver = { | |
771378bb AK |
3830 | .name = "OcteonUSB", |
3831 | .bus = &platform_bus_type, | |
3832 | .probe = octeon_usb_driver_probe, | |
3833 | .remove = octeon_usb_driver_remove, | |
b164935b AK |
3834 | }; |
3835 | ||
3836 | ||
3837 | #define MAX_USB_PORTS 10 | |
f5ed3a38 | 3838 | static struct platform_device *pdev_glob[MAX_USB_PORTS]; |
b164935b AK |
3839 | static int octeon_usb_registered; |
3840 | static int __init octeon_usb_module_init(void) | |
3841 | { | |
771378bb AK |
3842 | int num_devices = cvmx_usb_get_num_ports(); |
3843 | int device; | |
b164935b | 3844 | |
771378bb AK |
3845 | if (usb_disabled() || num_devices == 0) |
3846 | return -ENODEV; | |
b164935b | 3847 | |
71e06db3 | 3848 | if (driver_register(&octeon_usb_driver)) |
771378bb | 3849 | return -ENOMEM; |
71e06db3 | 3850 | |
771378bb | 3851 | octeon_usb_registered = 1; |
b164935b AK |
3852 | |
3853 | /* | |
3854 | * Only cn52XX and cn56XX have DWC_OTG USB hardware and the | |
3855 | * IOB priority registers. Under heavy network load USB | |
3856 | * hardware can be starved by the IOB causing a crash. Give | |
3857 | * it a priority boost if it has been waiting more than 400 | |
3858 | * cycles to avoid this situation. | |
3859 | * | |
3860 | * Testing indicates that a cnt_val of 8192 is not sufficient, | |
3861 | * but no failures are seen with 4096. We choose a value of | |
3862 | * 400 to give a safety factor of 10. | |
3863 | */ | |
3864 | if (OCTEON_IS_MODEL(OCTEON_CN52XX) || OCTEON_IS_MODEL(OCTEON_CN56XX)) { | |
3865 | union cvmx_iob_n2c_l2c_pri_cnt pri_cnt; | |
3866 | ||
3867 | pri_cnt.u64 = 0; | |
3868 | pri_cnt.s.cnt_enb = 1; | |
3869 | pri_cnt.s.cnt_val = 400; | |
3870 | cvmx_write_csr(CVMX_IOB_N2C_L2C_PRI_CNT, pri_cnt.u64); | |
3871 | } | |
3872 | ||
771378bb AK |
3873 | for (device = 0; device < num_devices; device++) { |
3874 | struct resource irq_resource; | |
3875 | struct platform_device *pdev; | |
3876 | memset(&irq_resource, 0, sizeof(irq_resource)); | |
3877 | irq_resource.start = (device == 0) ? OCTEON_IRQ_USB0 : OCTEON_IRQ_USB1; | |
3878 | irq_resource.end = irq_resource.start; | |
3879 | irq_resource.flags = IORESOURCE_IRQ; | |
3880 | pdev = platform_device_register_simple((char *)octeon_usb_driver. name, device, &irq_resource, 1); | |
3881 | if (IS_ERR(pdev)) { | |
771378bb AK |
3882 | driver_unregister(&octeon_usb_driver); |
3883 | octeon_usb_registered = 0; | |
3884 | return PTR_ERR(pdev); | |
3885 | } | |
3886 | if (device < MAX_USB_PORTS) | |
3887 | pdev_glob[device] = pdev; | |
3888 | ||
3889 | } | |
3890 | return 0; | |
b164935b AK |
3891 | } |
3892 | ||
3893 | static void __exit octeon_usb_module_cleanup(void) | |
3894 | { | |
771378bb | 3895 | int i; |
71e06db3 | 3896 | |
771378bb AK |
3897 | for (i = 0; i < MAX_USB_PORTS; i++) |
3898 | if (pdev_glob[i]) { | |
3899 | platform_device_unregister(pdev_glob[i]); | |
3900 | pdev_glob[i] = NULL; | |
3901 | } | |
b164935b AK |
3902 | if (octeon_usb_registered) |
3903 | driver_unregister(&octeon_usb_driver); | |
3904 | } | |
3905 | ||
3906 | MODULE_LICENSE("GPL"); | |
3907 | MODULE_AUTHOR("Cavium Networks <support@caviumnetworks.com>"); | |
3908 | MODULE_DESCRIPTION("Cavium Networks Octeon USB Host driver."); | |
3909 | module_init(octeon_usb_module_init); | |
3910 | module_exit(octeon_usb_module_cleanup); |