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971bcfca | 1 | /* SPDX-License-Identifier: GPL-2.0 */ |
162c7d8c MD |
2 | /* |
3 | * NVEC: NVIDIA compliant embedded controller interface | |
4 | * | |
5 | * Copyright (C) 2011 The AC100 Kernel Team <ac100@lists.launchpad.net> | |
6 | * | |
7 | * Authors: Pierre-Hugues Husson <phhusson@free.fr> | |
8 | * Ilya Petrov <ilya.muromec@gmail.com> | |
9 | * Marc Dietrich <marvin24@gmx.de> | |
bdf034d9 | 10 | * Julian Andres Klode <jak@jak-linux.org> |
162c7d8c MD |
11 | */ |
12 | ||
32890b98 MD |
13 | #ifndef __LINUX_MFD_NVEC |
14 | #define __LINUX_MFD_NVEC | |
15 | ||
0b1076c4 | 16 | #include <linux/atomic.h> |
12b5a55d JAK |
17 | #include <linux/clk.h> |
18 | #include <linux/completion.h> | |
19 | #include <linux/list.h> | |
20 | #include <linux/mutex.h> | |
7974035c | 21 | #include <linux/notifier.h> |
c0df5bf5 | 22 | #include <linux/reset.h> |
12b5a55d JAK |
23 | #include <linux/spinlock.h> |
24 | #include <linux/workqueue.h> | |
32890b98 | 25 | |
0b1076c4 JAK |
26 | /* NVEC_POOL_SIZE - Size of the pool in &struct nvec_msg */ |
27 | #define NVEC_POOL_SIZE 64 | |
28 | ||
0cab4cb8 JAK |
29 | /* |
30 | * NVEC_MSG_SIZE - Maximum size of the data field of &struct nvec_msg. | |
31 | * | |
32 | * A message must store up to a SMBus block operation which consists of | |
33 | * one command byte, one count byte, and up to 32 payload bytes = 34 | |
34 | * byte. | |
35 | */ | |
36 | #define NVEC_MSG_SIZE 34 | |
37 | ||
bdf034d9 JAK |
38 | /** |
39 | * enum nvec_event_size - The size of an event message | |
40 | * @NVEC_2BYTES: The message has one command byte and one data byte | |
41 | * @NVEC_3BYTES: The message has one command byte and two data bytes | |
535f2a5f | 42 | * @NVEC_VAR_SIZE: The message has one command byte, one count byte, and has |
bdf034d9 JAK |
43 | * up to as many bytes as the number in the count byte. The |
44 | * maximum is 32 | |
45 | * | |
46 | * Events can be fixed or variable sized. This is useless on other message | |
47 | * types, which are always variable sized. | |
48 | */ | |
49 | enum nvec_event_size { | |
32890b98 MD |
50 | NVEC_2BYTES, |
51 | NVEC_3BYTES, | |
0cab4cb8 JAK |
52 | NVEC_VAR_SIZE, |
53 | }; | |
32890b98 | 54 | |
bdf034d9 JAK |
55 | /** |
56 | * enum nvec_msg_type - The type of a message | |
57 | * @NVEC_SYS: A system request/response | |
58 | * @NVEC_BAT: A battery request/response | |
59 | * @NVEC_KBD: A keyboard request/response | |
60 | * @NVEC_PS2: A mouse request/response | |
61 | * @NVEC_CNTL: A EC control request/response | |
62 | * @NVEC_KB_EVT: An event from the keyboard | |
63 | * @NVEC_PS2_EVT: An event from the mouse | |
64 | * | |
65 | * Events can be fixed or variable sized. This is useless on other message | |
66 | * types, which are always variable sized. | |
67 | */ | |
68 | enum nvec_msg_type { | |
162c7d8c | 69 | NVEC_SYS = 1, |
32890b98 | 70 | NVEC_BAT, |
518945fb MD |
71 | NVEC_GPIO, |
72 | NVEC_SLEEP, | |
73 | NVEC_KBD, | |
32890b98 MD |
74 | NVEC_PS2, |
75 | NVEC_CNTL, | |
93eff83f | 76 | NVEC_OEM0 = 0x0d, |
32890b98 | 77 | NVEC_KB_EVT = 0x80, |
0cab4cb8 JAK |
78 | NVEC_PS2_EVT, |
79 | }; | |
32890b98 | 80 | |
bdf034d9 JAK |
81 | /** |
82 | * struct nvec_msg - A buffer for a single message | |
83 | * @node: Messages are part of various lists in a &struct nvec_chip | |
84 | * @data: The data of the message | |
85 | * @size: For TX messages, the number of bytes used in @data | |
86 | * @pos: For RX messages, the current position to write to. For TX messages, | |
87 | * the position to read from. | |
88 | * @used: Used for the message pool to mark a message as free/allocated. | |
89 | * | |
90 | * This structure is used to hold outgoing and incoming messages. Outgoing | |
91 | * messages have a different format than incoming messages, and that is not | |
92 | * documented yet. | |
93 | */ | |
32890b98 | 94 | struct nvec_msg { |
0cab4cb8 JAK |
95 | struct list_head node; |
96 | unsigned char data[NVEC_MSG_SIZE]; | |
32890b98 MD |
97 | unsigned short size; |
98 | unsigned short pos; | |
0b1076c4 | 99 | atomic_t used; |
32890b98 MD |
100 | }; |
101 | ||
bdf034d9 JAK |
102 | /** |
103 | * struct nvec_chip - A single connection to an NVIDIA Embedded controller | |
104 | * @dev: The device | |
105 | * @gpio: The same as for &struct nvec_platform_data | |
106 | * @irq: The IRQ of the I2C device | |
107 | * @i2c_addr: The address of the I2C slave | |
108 | * @base: The base of the memory mapped region of the I2C device | |
c0df5bf5 SW |
109 | * @i2c_clk: The clock of the I2C device |
110 | * @rst: The reset of the I2C device | |
bdf034d9 JAK |
111 | * @notifier_list: Notifiers to be called on received messages, see |
112 | * nvec_register_notifier() | |
113 | * @rx_data: Received messages that have to be processed | |
114 | * @tx_data: Messages waiting to be sent to the controller | |
115 | * @nvec_status_notifier: Internal notifier (see nvec_status_notifier()) | |
116 | * @rx_work: A work structure for the RX worker nvec_dispatch() | |
117 | * @tx_work: A work structure for the TX worker nvec_request_master() | |
118 | * @wq: The work queue in which @rx_work and @tx_work are executed | |
119 | * @rx: The message currently being retrieved or %NULL | |
120 | * @msg_pool: A pool of messages for allocation | |
121 | * @tx: The message currently being transferred | |
122 | * @tx_scratch: Used for building pseudo messages | |
123 | * @ec_transfer: A completion that will be completed once a message has been | |
124 | * received (see nvec_rx_completed()) | |
125 | * @tx_lock: Spinlock for modifications on @tx_data | |
126 | * @rx_lock: Spinlock for modifications on @rx_data | |
127 | * @sync_write_mutex: A mutex for nvec_write_sync() | |
128 | * @sync_write: A completion to signal that a synchronous message is complete | |
129 | * @sync_write_pending: The first two bytes of the request (type and subtype) | |
130 | * @last_sync_msg: The last synchronous message. | |
131 | * @state: State of our finite state machine used in nvec_interrupt() | |
132 | */ | |
32890b98 MD |
133 | struct nvec_chip { |
134 | struct device *dev; | |
40fbffd9 | 135 | struct gpio_desc *gpiod; |
32890b98 | 136 | int irq; |
4cf64a5f | 137 | u32 i2c_addr; |
f686e9af MD |
138 | void __iomem *base; |
139 | struct clk *i2c_clk; | |
c0df5bf5 | 140 | struct reset_control *rst; |
32890b98 MD |
141 | struct atomic_notifier_head notifier_list; |
142 | struct list_head rx_data, tx_data; | |
143 | struct notifier_block nvec_status_notifier; | |
144 | struct work_struct rx_work, tx_work; | |
0cab4cb8 | 145 | struct workqueue_struct *wq; |
0b1076c4 | 146 | struct nvec_msg msg_pool[NVEC_POOL_SIZE]; |
0cab4cb8 JAK |
147 | struct nvec_msg *rx; |
148 | ||
149 | struct nvec_msg *tx; | |
150 | struct nvec_msg tx_scratch; | |
151 | struct completion ec_transfer; | |
152 | ||
153 | spinlock_t tx_lock, rx_lock; | |
32890b98 | 154 | |
162c7d8c | 155 | /* sync write stuff */ |
0cab4cb8 | 156 | struct mutex sync_write_mutex; |
32890b98 MD |
157 | struct completion sync_write; |
158 | u16 sync_write_pending; | |
159 | struct nvec_msg *last_sync_msg; | |
0cab4cb8 JAK |
160 | |
161 | int state; | |
32890b98 MD |
162 | }; |
163 | ||
ddc9bceb JP |
164 | int nvec_write_async(struct nvec_chip *nvec, const unsigned char *data, |
165 | short size); | |
32890b98 | 166 | |
73b37c91 TT |
167 | int nvec_write_sync(struct nvec_chip *nvec, |
168 | const unsigned char *data, short size, | |
169 | struct nvec_msg **msg); | |
0cab4cb8 | 170 | |
ddc9bceb JP |
171 | int nvec_register_notifier(struct nvec_chip *nvec, |
172 | struct notifier_block *nb, | |
173 | unsigned int events); | |
32890b98 | 174 | |
ddc9bceb | 175 | int nvec_unregister_notifier(struct nvec_chip *dev, struct notifier_block *nb); |
198dd267 | 176 | |
ddc9bceb | 177 | void nvec_msg_free(struct nvec_chip *nvec, struct nvec_msg *msg); |
198dd267 | 178 | |
32890b98 | 179 | #endif |