[media] mn88472: finalize driver
[linux-2.6-block.git] / drivers / staging / media / mn88472 / mn88472.c
CommitLineData
ca25cb54
AP
1/*
2 * Panasonic MN88472 DVB-T/T2/C demodulator driver
3 *
4 * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
10 *
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
15 */
16
17#include "mn88472_priv.h"
18
8e0d8572 19static int mn88472_get_tune_settings(struct dvb_frontend *fe,
8d1f38fc 20 struct dvb_frontend_tune_settings *s)
8e0d8572 21{
8d1f38fc 22 s->min_delay_ms = 1000;
8e0d8572
AP
23 return 0;
24}
25
8d1f38fc
AP
26static int mn88472_read_status(struct dvb_frontend *fe, enum fe_status *status)
27{
28 struct i2c_client *client = fe->demodulator_priv;
29 struct mn88472_dev *dev = i2c_get_clientdata(client);
30 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
31 int ret;
32 unsigned int utmp;
33
34 if (!dev->active) {
35 ret = -EAGAIN;
36 goto err;
37 }
38
39 switch (c->delivery_system) {
40 case SYS_DVBT:
41 ret = regmap_read(dev->regmap[0], 0x7f, &utmp);
42 if (ret)
43 goto err;
44 if ((utmp & 0x0f) >= 0x09)
45 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
46 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
47 else
48 *status = 0;
49 break;
50 case SYS_DVBT2:
51 ret = regmap_read(dev->regmap[2], 0x92, &utmp);
52 if (ret)
53 goto err;
54 if ((utmp & 0x0f) >= 0x0d)
55 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
56 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
57 else if ((utmp & 0x0f) >= 0x0a)
58 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
59 FE_HAS_VITERBI;
60 else if ((utmp & 0x0f) >= 0x07)
61 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER;
62 else
63 *status = 0;
64 break;
65 case SYS_DVBC_ANNEX_A:
66 ret = regmap_read(dev->regmap[1], 0x84, &utmp);
67 if (ret)
68 goto err;
69 if ((utmp & 0x0f) >= 0x08)
70 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
71 FE_HAS_VITERBI | FE_HAS_SYNC | FE_HAS_LOCK;
72 else
73 *status = 0;
74 break;
75 default:
76 ret = -EINVAL;
77 goto err;
78 }
79
80 return 0;
81err:
82 dev_dbg(&client->dev, "failed=%d\n", ret);
83 return ret;
84}
85
5ef1ad35 86static int mn88472_set_frontend(struct dvb_frontend *fe)
ca25cb54 87{
528af195
AP
88 struct i2c_client *client = fe->demodulator_priv;
89 struct mn88472_dev *dev = i2c_get_clientdata(client);
ca25cb54 90 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
50489070 91 int ret, i;
8d1f38fc
AP
92 unsigned int utmp;
93 u32 if_frequency;
94 u8 buf[3], delivery_system_val, bandwidth_val, *bandwidth_vals_ptr;
95 u8 reg_bank0_b4_val, reg_bank0_cd_val, reg_bank0_d4_val;
96 u8 reg_bank0_d6_val;
528af195
AP
97
98 dev_dbg(&client->dev,
8d1f38fc
AP
99 "delivery_system=%u modulation=%u frequency=%u bandwidth_hz=%u symbol_rate=%u inversion=%d stream_id=%d\n",
100 c->delivery_system, c->modulation, c->frequency,
101 c->bandwidth_hz, c->symbol_rate, c->inversion, c->stream_id);
ca25cb54 102
8d1f38fc 103 if (!dev->active) {
ca25cb54
AP
104 ret = -EAGAIN;
105 goto err;
106 }
107
50489070
AP
108 switch (c->delivery_system) {
109 case SYS_DVBT:
110 delivery_system_val = 0x02;
8d1f38fc
AP
111 reg_bank0_b4_val = 0x00;
112 reg_bank0_cd_val = 0x1f;
113 reg_bank0_d4_val = 0x0a;
114 reg_bank0_d6_val = 0x48;
50489070
AP
115 break;
116 case SYS_DVBT2:
117 delivery_system_val = 0x03;
8d1f38fc
AP
118 reg_bank0_b4_val = 0xf6;
119 reg_bank0_cd_val = 0x01;
120 reg_bank0_d4_val = 0x09;
121 reg_bank0_d6_val = 0x46;
50489070
AP
122 break;
123 case SYS_DVBC_ANNEX_A:
124 delivery_system_val = 0x04;
8d1f38fc
AP
125 reg_bank0_b4_val = 0x00;
126 reg_bank0_cd_val = 0x17;
127 reg_bank0_d4_val = 0x09;
128 reg_bank0_d6_val = 0x48;
50489070
AP
129 break;
130 default:
131 ret = -EINVAL;
132 goto err;
133 }
134
8d1f38fc
AP
135 switch (c->delivery_system) {
136 case SYS_DVBT:
137 case SYS_DVBT2:
138 switch (c->bandwidth_hz) {
139 case 5000000:
140 bandwidth_vals_ptr = "\xe5\x99\x9a\x1b\xa9\x1b\xa9";
141 bandwidth_val = 0x03;
142 break;
143 case 6000000:
144 bandwidth_vals_ptr = "\xbf\x55\x55\x15\x6b\x15\x6b";
145 bandwidth_val = 0x02;
146 break;
147 case 7000000:
148 bandwidth_vals_ptr = "\xa4\x00\x00\x0f\x2c\x0f\x2c";
149 bandwidth_val = 0x01;
150 break;
151 case 8000000:
152 bandwidth_vals_ptr = "\x8f\x80\x00\x08\xee\x08\xee";
153 bandwidth_val = 0x00;
154 break;
155 default:
156 ret = -EINVAL;
157 goto err;
158 }
159 break;
160 case SYS_DVBC_ANNEX_A:
161 bandwidth_vals_ptr = NULL;
162 bandwidth_val = 0x00;
163 break;
164 default:
165 break;
50489070
AP
166 }
167
8d1f38fc 168 /* Program tuner */
ca25cb54
AP
169 if (fe->ops.tuner_ops.set_params) {
170 ret = fe->ops.tuner_ops.set_params(fe);
171 if (ret)
172 goto err;
173 }
174
175 if (fe->ops.tuner_ops.get_if_frequency) {
176 ret = fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
177 if (ret)
178 goto err;
179
528af195 180 dev_dbg(&client->dev, "get_if_frequency=%d\n", if_frequency);
8d1f38fc
AP
181 } else {
182 ret = -EINVAL;
ca25cb54 183 goto err;
8d1f38fc 184 }
ca25cb54 185
50489070 186 ret = regmap_write(dev->regmap[2], 0x00, 0x66);
ca25cb54
AP
187 if (ret)
188 goto err;
50489070 189 ret = regmap_write(dev->regmap[2], 0x01, 0x00);
ca25cb54
AP
190 if (ret)
191 goto err;
50489070 192 ret = regmap_write(dev->regmap[2], 0x02, 0x01);
ca25cb54
AP
193 if (ret)
194 goto err;
50489070 195 ret = regmap_write(dev->regmap[2], 0x03, delivery_system_val);
ca25cb54
AP
196 if (ret)
197 goto err;
8d1f38fc 198 ret = regmap_write(dev->regmap[2], 0x04, bandwidth_val);
ca25cb54
AP
199 if (ret)
200 goto err;
201
8d1f38fc
AP
202 /* IF */
203 utmp = DIV_ROUND_CLOSEST_ULL((u64)if_frequency * 0x1000000, dev->clk);
204 buf[0] = (utmp >> 16) & 0xff;
205 buf[1] = (utmp >> 8) & 0xff;
206 buf[2] = (utmp >> 0) & 0xff;
207 for (i = 0; i < 3; i++) {
208 ret = regmap_write(dev->regmap[2], 0x10 + i, buf[i]);
50489070
AP
209 if (ret)
210 goto err;
211 }
ca25cb54 212
8d1f38fc
AP
213 /* Bandwidth */
214 if (bandwidth_vals_ptr) {
215 for (i = 0; i < 7; i++) {
216 ret = regmap_write(dev->regmap[2], 0x13 + i,
217 bandwidth_vals_ptr[i]);
218 if (ret)
219 goto err;
220 }
50489070 221 }
ca25cb54 222
8d1f38fc
AP
223 ret = regmap_write(dev->regmap[0], 0xb4, reg_bank0_b4_val);
224 if (ret)
225 goto err;
226 ret = regmap_write(dev->regmap[0], 0xcd, reg_bank0_cd_val);
227 if (ret)
228 goto err;
229 ret = regmap_write(dev->regmap[0], 0xd4, reg_bank0_d4_val);
230 if (ret)
231 goto err;
232 ret = regmap_write(dev->regmap[0], 0xd6, reg_bank0_d6_val);
233 if (ret)
234 goto err;
235
50489070
AP
236 switch (c->delivery_system) {
237 case SYS_DVBT:
238 ret = regmap_write(dev->regmap[0], 0x07, 0x26);
8d1f38fc
AP
239 if (ret)
240 goto err;
50489070 241 ret = regmap_write(dev->regmap[0], 0x00, 0xba);
8d1f38fc
AP
242 if (ret)
243 goto err;
50489070
AP
244 ret = regmap_write(dev->regmap[0], 0x01, 0x13);
245 if (ret)
246 goto err;
247 break;
248 case SYS_DVBT2:
249 ret = regmap_write(dev->regmap[2], 0x2b, 0x13);
8d1f38fc
AP
250 if (ret)
251 goto err;
50489070 252 ret = regmap_write(dev->regmap[2], 0x4f, 0x05);
8d1f38fc
AP
253 if (ret)
254 goto err;
50489070 255 ret = regmap_write(dev->regmap[1], 0xf6, 0x05);
50489070
AP
256 if (ret)
257 goto err;
8d1f38fc 258 ret = regmap_write(dev->regmap[2], 0x32, c->stream_id);
50489070
AP
259 if (ret)
260 goto err;
261 break;
8d1f38fc 262 case SYS_DVBC_ANNEX_A:
021cd2d2
BL
263 break;
264 default:
021cd2d2 265 break;
021cd2d2 266 }
645c7cea 267
8d1f38fc 268 /* Reset FSM */
c1011fb8 269 ret = regmap_write(dev->regmap[2], 0xf8, 0x9f);
ca25cb54
AP
270 if (ret)
271 goto err;
272
ca25cb54
AP
273 return 0;
274err:
528af195 275 dev_dbg(&client->dev, "failed=%d\n", ret);
ca25cb54
AP
276 return ret;
277}
278
5ef1ad35 279static int mn88472_init(struct dvb_frontend *fe)
ca25cb54 280{
528af195
AP
281 struct i2c_client *client = fe->demodulator_priv;
282 struct mn88472_dev *dev = i2c_get_clientdata(client);
8d1f38fc
AP
283 int ret, len, rem;
284 unsigned int utmp;
285 const struct firmware *firmware;
286 const char *name = MN88472_FIRMWARE;
528af195
AP
287
288 dev_dbg(&client->dev, "\n");
ca25cb54 289
8d1f38fc 290 /* Power up */
c1011fb8 291 ret = regmap_write(dev->regmap[2], 0x05, 0x00);
ca25cb54
AP
292 if (ret)
293 goto err;
8d1f38fc 294 ret = regmap_write(dev->regmap[2], 0x0b, 0x00);
ca25cb54
AP
295 if (ret)
296 goto err;
8d1f38fc 297 ret = regmap_write(dev->regmap[2], 0x0c, 0x00);
4752eb27
BL
298 if (ret)
299 goto err;
300
8d1f38fc
AP
301 /* Check if firmware is already running */
302 ret = regmap_read(dev->regmap[0], 0xf5, &utmp);
303 if (ret)
304 goto err;
305 if (!(utmp & 0x01))
306 goto warm;
4752eb27 307
8d1f38fc 308 ret = request_firmware(&firmware, name, &client->dev);
ca25cb54 309 if (ret) {
8d1f38fc 310 dev_err(&client->dev, "firmware file '%s' not found\n", name);
ca25cb54
AP
311 goto err;
312 }
313
8d1f38fc 314 dev_info(&client->dev, "downloading firmware from file '%s'\n", name);
ca25cb54 315
c1011fb8 316 ret = regmap_write(dev->regmap[0], 0xf5, 0x03);
ca25cb54 317 if (ret)
8d1f38fc 318 goto err_release_firmware;
ca25cb54 319
8d1f38fc
AP
320 for (rem = firmware->size; rem > 0; rem -= (dev->i2c_write_max - 1)) {
321 len = min(dev->i2c_write_max - 1, rem);
c1011fb8 322 ret = regmap_bulk_write(dev->regmap[0], 0xf6,
8d1f38fc
AP
323 &firmware->data[firmware->size - rem],
324 len);
ca25cb54 325 if (ret) {
8d1f38fc
AP
326 dev_err(&client->dev, "firmware download failed %d\n",
327 ret);
328 goto err_release_firmware;
ca25cb54
AP
329 }
330 }
331
8d1f38fc
AP
332 /* Parity check of firmware */
333 ret = regmap_read(dev->regmap[0], 0xf8, &utmp);
334 if (ret)
335 goto err_release_firmware;
336 if (utmp & 0x10) {
337 ret = -EINVAL;
338 dev_err(&client->dev, "firmware did not run\n");
339 goto err_release_firmware;
307e95c9 340 }
307e95c9 341
c1011fb8 342 ret = regmap_write(dev->regmap[0], 0xf5, 0x00);
ca25cb54 343 if (ret)
8d1f38fc
AP
344 goto err_release_firmware;
345
346 release_firmware(firmware);
347warm:
348 /* TS config */
349 switch (dev->ts_mode) {
350 case SERIAL_TS_MODE:
351 utmp = 0x1d;
352 break;
353 case PARALLEL_TS_MODE:
354 utmp = 0x00;
355 break;
356 default:
357 ret = -EINVAL;
358 goto err;
359 }
360 ret = regmap_write(dev->regmap[2], 0x08, utmp);
361 if (ret)
362 goto err;
ca25cb54 363
8d1f38fc
AP
364 switch (dev->ts_clk) {
365 case VARIABLE_TS_CLOCK:
366 utmp = 0xe3;
367 break;
368 case FIXED_TS_CLOCK:
369 utmp = 0xe1;
370 break;
371 default:
372 ret = -EINVAL;
373 goto err;
374 }
375 ret = regmap_write(dev->regmap[0], 0xd9, utmp);
376 if (ret)
377 goto err;
ca25cb54 378
8d1f38fc 379 dev->active = true;
ca25cb54
AP
380
381 return 0;
8d1f38fc
AP
382err_release_firmware:
383 release_firmware(firmware);
bf104c23 384err:
528af195 385 dev_dbg(&client->dev, "failed=%d\n", ret);
ca25cb54
AP
386 return ret;
387}
388
5ef1ad35 389static int mn88472_sleep(struct dvb_frontend *fe)
ca25cb54 390{
528af195
AP
391 struct i2c_client *client = fe->demodulator_priv;
392 struct mn88472_dev *dev = i2c_get_clientdata(client);
ca25cb54 393 int ret;
528af195
AP
394
395 dev_dbg(&client->dev, "\n");
ca25cb54 396
8d1f38fc
AP
397 /* Power down */
398 ret = regmap_write(dev->regmap[2], 0x0c, 0x30);
399 if (ret)
400 goto err;
c1011fb8 401 ret = regmap_write(dev->regmap[2], 0x0b, 0x30);
ca25cb54
AP
402 if (ret)
403 goto err;
c1011fb8 404 ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
ca25cb54
AP
405 if (ret)
406 goto err;
407
ca25cb54
AP
408 return 0;
409err:
528af195 410 dev_dbg(&client->dev, "failed=%d\n", ret);
ca25cb54
AP
411 return ret;
412}
413
528af195 414static struct dvb_frontend_ops mn88472_ops = {
50489070 415 .delsys = {SYS_DVBT, SYS_DVBT2, SYS_DVBC_ANNEX_A},
528af195
AP
416 .info = {
417 .name = "Panasonic MN88472",
d73ab406
AP
418 .symbol_rate_min = 1000000,
419 .symbol_rate_max = 7200000,
528af195
AP
420 .caps = FE_CAN_FEC_1_2 |
421 FE_CAN_FEC_2_3 |
422 FE_CAN_FEC_3_4 |
423 FE_CAN_FEC_5_6 |
424 FE_CAN_FEC_7_8 |
425 FE_CAN_FEC_AUTO |
426 FE_CAN_QPSK |
427 FE_CAN_QAM_16 |
428 FE_CAN_QAM_32 |
429 FE_CAN_QAM_64 |
430 FE_CAN_QAM_128 |
431 FE_CAN_QAM_256 |
432 FE_CAN_QAM_AUTO |
433 FE_CAN_TRANSMISSION_MODE_AUTO |
434 FE_CAN_GUARD_INTERVAL_AUTO |
435 FE_CAN_HIERARCHY_AUTO |
436 FE_CAN_MUTE_TS |
437 FE_CAN_2G_MODULATION |
438 FE_CAN_MULTISTREAM
439 },
0186e434 440
528af195
AP
441 .get_tune_settings = mn88472_get_tune_settings,
442
443 .init = mn88472_init,
444 .sleep = mn88472_sleep,
445
446 .set_frontend = mn88472_set_frontend,
447
448 .read_status = mn88472_read_status,
449};
ca25cb54 450
8d1f38fc
AP
451static struct dvb_frontend *mn88472_get_dvb_frontend(struct i2c_client *client)
452{
453 struct mn88472_dev *dev = i2c_get_clientdata(client);
454
455 dev_dbg(&client->dev, "\n");
456
457 return &dev->fe;
458}
459
528af195 460static int mn88472_probe(struct i2c_client *client,
8d1f38fc 461 const struct i2c_device_id *id)
ca25cb54 462{
8d1f38fc 463 struct mn88472_config *pdata = client->dev.platform_data;
0186e434 464 struct mn88472_dev *dev;
528af195 465 int ret;
c1011fb8
AP
466 unsigned int utmp;
467 static const struct regmap_config regmap_config = {
468 .reg_bits = 8,
469 .val_bits = 8,
470 };
ca25cb54 471
528af195
AP
472 dev_dbg(&client->dev, "\n");
473
0186e434 474 dev = kzalloc(sizeof(*dev), GFP_KERNEL);
4a1e81bc 475 if (!dev) {
ca25cb54 476 ret = -ENOMEM;
ca25cb54
AP
477 goto err;
478 }
479
8d1f38fc
AP
480 dev->i2c_write_max = pdata->i2c_wr_max ? pdata->i2c_wr_max : ~0;
481 dev->clk = pdata->xtal;
482 dev->ts_mode = pdata->ts_mode;
483 dev->ts_clk = pdata->ts_clock;
c1011fb8
AP
484 dev->client[0] = client;
485 dev->regmap[0] = regmap_init_i2c(dev->client[0], &regmap_config);
486 if (IS_ERR(dev->regmap[0])) {
487 ret = PTR_ERR(dev->regmap[0]);
488 goto err_kfree;
489 }
ca25cb54 490
8d1f38fc
AP
491 /* Check demod answers with correct chip id */
492 ret = regmap_read(dev->regmap[0], 0xff, &utmp);
ca25cb54 493 if (ret)
c1011fb8 494 goto err_regmap_0_regmap_exit;
528af195 495
8d1f38fc
AP
496 dev_dbg(&client->dev, "chip id=%02x\n", utmp);
497
498 if (utmp != 0x02) {
499 ret = -ENODEV;
500 goto err_regmap_0_regmap_exit;
501 }
502
528af195 503 /*
8d1f38fc 504 * Chip has three I2C addresses for different register banks. Used
528af195 505 * addresses are 0x18, 0x1a and 0x1c. We register two dummy clients,
8d1f38fc
AP
506 * 0x1a and 0x1c, in order to get own I2C client for each register bank.
507 *
508 * Also, register bank 2 do not support sequential I/O. Only single
509 * register write or read is allowed to that bank.
528af195
AP
510 */
511 dev->client[1] = i2c_new_dummy(client->adapter, 0x1a);
4a1e81bc 512 if (!dev->client[1]) {
528af195
AP
513 ret = -ENODEV;
514 dev_err(&client->dev, "I2C registration failed\n");
515 if (ret)
c1011fb8
AP
516 goto err_regmap_0_regmap_exit;
517 }
518 dev->regmap[1] = regmap_init_i2c(dev->client[1], &regmap_config);
519 if (IS_ERR(dev->regmap[1])) {
520 ret = PTR_ERR(dev->regmap[1]);
521 goto err_client_1_i2c_unregister_device;
528af195
AP
522 }
523 i2c_set_clientdata(dev->client[1], dev);
524
525 dev->client[2] = i2c_new_dummy(client->adapter, 0x1c);
4a1e81bc 526 if (!dev->client[2]) {
528af195
AP
527 ret = -ENODEV;
528 dev_err(&client->dev, "2nd I2C registration failed\n");
529 if (ret)
c1011fb8
AP
530 goto err_regmap_1_regmap_exit;
531 }
532 dev->regmap[2] = regmap_init_i2c(dev->client[2], &regmap_config);
533 if (IS_ERR(dev->regmap[2])) {
534 ret = PTR_ERR(dev->regmap[2]);
535 goto err_client_2_i2c_unregister_device;
528af195
AP
536 }
537 i2c_set_clientdata(dev->client[2], dev);
ca25cb54 538
8d1f38fc
AP
539 /* Sleep because chip is active by default */
540 ret = regmap_write(dev->regmap[2], 0x05, 0x3e);
541 if (ret)
542 goto err_regmap_2_regmap_exit;
543
544 /* Create dvb frontend */
0186e434 545 memcpy(&dev->fe.ops, &mn88472_ops, sizeof(struct dvb_frontend_ops));
528af195 546 dev->fe.demodulator_priv = client;
8d1f38fc 547 *pdata->fe = &dev->fe;
528af195 548 i2c_set_clientdata(client, dev);
ca25cb54 549
8d1f38fc
AP
550 /* Setup callbacks */
551 pdata->get_dvb_frontend = mn88472_get_dvb_frontend;
528af195 552
8d1f38fc
AP
553 dev_info(&client->dev, "Panasonic MN88472 successfully identified\n");
554
555 return 0;
556err_regmap_2_regmap_exit:
557 regmap_exit(dev->regmap[2]);
c1011fb8
AP
558err_client_2_i2c_unregister_device:
559 i2c_unregister_device(dev->client[2]);
560err_regmap_1_regmap_exit:
561 regmap_exit(dev->regmap[1]);
528af195
AP
562err_client_1_i2c_unregister_device:
563 i2c_unregister_device(dev->client[1]);
c1011fb8
AP
564err_regmap_0_regmap_exit:
565 regmap_exit(dev->regmap[0]);
528af195 566err_kfree:
0186e434 567 kfree(dev);
528af195
AP
568err:
569 dev_dbg(&client->dev, "failed=%d\n", ret);
570 return ret;
ca25cb54 571}
ca25cb54 572
528af195
AP
573static int mn88472_remove(struct i2c_client *client)
574{
575 struct mn88472_dev *dev = i2c_get_clientdata(client);
ca25cb54 576
528af195 577 dev_dbg(&client->dev, "\n");
ca25cb54 578
c1011fb8 579 regmap_exit(dev->regmap[2]);
528af195 580 i2c_unregister_device(dev->client[2]);
8e0d8572 581
c1011fb8 582 regmap_exit(dev->regmap[1]);
528af195 583 i2c_unregister_device(dev->client[1]);
ca25cb54 584
c1011fb8
AP
585 regmap_exit(dev->regmap[0]);
586
528af195 587 kfree(dev);
ca25cb54 588
528af195
AP
589 return 0;
590}
591
592static const struct i2c_device_id mn88472_id_table[] = {
593 {"mn88472", 0},
594 {}
ca25cb54 595};
528af195
AP
596MODULE_DEVICE_TABLE(i2c, mn88472_id_table);
597
598static struct i2c_driver mn88472_driver = {
599 .driver = {
8d1f38fc
AP
600 .name = "mn88472",
601 .suppress_bind_attrs = true,
528af195 602 },
8d1f38fc
AP
603 .probe = mn88472_probe,
604 .remove = mn88472_remove,
605 .id_table = mn88472_id_table,
528af195
AP
606};
607
608module_i2c_driver(mn88472_driver);
ca25cb54
AP
609
610MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
611MODULE_DESCRIPTION("Panasonic MN88472 DVB-T/T2/C demodulator driver");
612MODULE_LICENSE("GPL");
613MODULE_FIRMWARE(MN88472_FIRMWARE);