[linux-2.6-block.git] / drivers / staging / imx-drm / ipuv3-crtc.c

/*
 * i.MX IPUv3 Graphics driver
 *
 * Copyright (C) 2011 Sascha Hauer, Pengutronix
 *
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
 * as published by the Free Software Foundation; either version 2
 * of the License, or (at your option) any later version.
 * This program is distributed in the hope that it will be useful,
 * but WITHOUT ANY WARRANTY; without even the implied warranty of
 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 * GNU General Public License for more details.
 *
 * You should have received a copy of the GNU General Public License
 * along with this program; if not, write to the Free Software
 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
 * MA 02110-1301, USA.
 */
#include <linux/module.h>
#include <linux/export.h>
#include <linux/device.h>
#include <linux/platform_device.h>
#include <drm/drmP.h>
#include <drm/drm_crtc_helper.h>
#include <linux/fb.h>
#include <linux/clk.h>
#include <linux/errno.h>
#include <drm/drm_gem_cma_helper.h>
#include <drm/drm_fb_cma_helper.h>

#include "ipu-v3/imx-ipu-v3.h"
#include "imx-drm.h"
#include "ipuv3-plane.h"

#define DRIVER_DESC		"i.MX IPUv3 Graphics"

struct ipu_crtc {
	struct device		*dev;
	struct drm_crtc		base;
	struct imx_drm_crtc	*imx_crtc;

	/* plane[0] is the full plane, plane[1] is the partial plane */
	struct ipu_plane	*plane[2];

	struct ipu_dc		*dc;
	struct ipu_di		*di;
	int			enabled;
	struct drm_pending_vblank_event *page_flip_event;
	struct drm_framebuffer	*newfb;
	int			irq;
	u32			interface_pix_fmt;
	unsigned long		di_clkflags;
	int			di_hsync_pin;
	int			di_vsync_pin;
};

#define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)

static void ipu_fb_enable(struct ipu_crtc *ipu_crtc)
{
	if (ipu_crtc->enabled)
		return;

	ipu_di_enable(ipu_crtc->di);
	ipu_dc_enable_channel(ipu_crtc->dc);
	ipu_plane_enable(ipu_crtc->plane[0]);

	ipu_crtc->enabled = 1;
}

static void ipu_fb_disable(struct ipu_crtc *ipu_crtc)
{
	if (!ipu_crtc->enabled)
		return;

	ipu_plane_disable(ipu_crtc->plane[0]);
	ipu_dc_disable_channel(ipu_crtc->dc);
	ipu_di_disable(ipu_crtc->di);

	ipu_crtc->enabled = 0;
}

static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
{
	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

	dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);

	switch (mode) {
	case DRM_MODE_DPMS_ON:
		ipu_fb_enable(ipu_crtc);
		break;
	case DRM_MODE_DPMS_STANDBY:
	case DRM_MODE_DPMS_SUSPEND:
	case DRM_MODE_DPMS_OFF:
		ipu_fb_disable(ipu_crtc);
		break;
	}
}

static int ipu_page_flip(struct drm_crtc *crtc,
		struct drm_framebuffer *fb,
		struct drm_pending_vblank_event *event,
		uint32_t page_flip_flags)
{
	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
	int ret;

	if (ipu_crtc->newfb)
		return -EBUSY;

	ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc);
	if (ret) {
		dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n");
		list_del(&event->base.link);

		return ret;
	}

	ipu_crtc->newfb = fb;
	ipu_crtc->page_flip_event = event;
	crtc->fb = fb;

	return 0;
}

static const struct drm_crtc_funcs ipu_crtc_funcs = {
	.set_config = drm_crtc_helper_set_config,
	.destroy = drm_crtc_cleanup,
	.page_flip = ipu_page_flip,
};

static int ipu_crtc_mode_set(struct drm_crtc *crtc,
			       struct drm_display_mode *orig_mode,
			       struct drm_display_mode *mode,
			       int x, int y,
			       struct drm_framebuffer *old_fb)
{
	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
	int ret;
	struct ipu_di_signal_cfg sig_cfg = {};
	u32 out_pixel_fmt;

	dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
			mode->hdisplay);
	dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
			mode->vdisplay);

	out_pixel_fmt = ipu_crtc->interface_pix_fmt;

	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
		sig_cfg.interlaced = 1;
	if (mode->flags & DRM_MODE_FLAG_PHSYNC)
		sig_cfg.Hsync_pol = 1;
	if (mode->flags & DRM_MODE_FLAG_PVSYNC)
		sig_cfg.Vsync_pol = 1;

	sig_cfg.enable_pol = 1;
	sig_cfg.clk_pol = 1;
	sig_cfg.width = mode->hdisplay;
	sig_cfg.height = mode->vdisplay;
	sig_cfg.pixel_fmt = out_pixel_fmt;
	sig_cfg.h_start_width = mode->htotal - mode->hsync_end;
	sig_cfg.h_sync_width = mode->hsync_end - mode->hsync_start;
	sig_cfg.h_end_width = mode->hsync_start - mode->hdisplay;

	sig_cfg.v_start_width = mode->vtotal - mode->vsync_end;
	sig_cfg.v_sync_width = mode->vsync_end - mode->vsync_start;
	sig_cfg.v_end_width = mode->vsync_start - mode->vdisplay;
	sig_cfg.pixelclock = mode->clock * 1000;
	sig_cfg.clkflags = ipu_crtc->di_clkflags;

	sig_cfg.v_to_h_sync = 0;

	sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
	sig_cfg.vsync_pin = ipu_crtc->di_vsync_pin;

	ret = ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di, sig_cfg.interlaced,
			out_pixel_fmt, mode->hdisplay);
	if (ret) {
		dev_err(ipu_crtc->dev,
				"initializing display controller failed with %d\n",
				ret);
		return ret;
	}

	ret = ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
	if (ret) {
		dev_err(ipu_crtc->dev,
				"initializing panel failed with %d\n", ret);
		return ret;
	}

	return ipu_plane_mode_set(ipu_crtc->plane[0], crtc, mode, crtc->fb,
				  0, 0, mode->hdisplay, mode->vdisplay,
				  x, y, mode->hdisplay, mode->vdisplay);
}

static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc)
{
	unsigned long flags;
	struct drm_device *drm = ipu_crtc->base.dev;

	spin_lock_irqsave(&drm->event_lock, flags);
	if (ipu_crtc->page_flip_event)
		drm_send_vblank_event(drm, -1, ipu_crtc->page_flip_event);
	ipu_crtc->page_flip_event = NULL;
	imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
	spin_unlock_irqrestore(&drm->event_lock, flags);
}

static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
{
	struct ipu_crtc *ipu_crtc = dev_id;

	imx_drm_handle_vblank(ipu_crtc->imx_crtc);

	if (ipu_crtc->newfb) {
		ipu_crtc->newfb = NULL;
		ipu_plane_set_base(ipu_crtc->plane[0], ipu_crtc->base.fb,
				ipu_crtc->plane[0]->x, ipu_crtc->plane[0]->y);
		ipu_crtc_handle_pageflip(ipu_crtc);
	}

	return IRQ_HANDLED;
}

static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
				  const struct drm_display_mode *mode,
				  struct drm_display_mode *adjusted_mode)
{
	return true;
}

static void ipu_crtc_prepare(struct drm_crtc *crtc)
{
	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

	ipu_fb_disable(ipu_crtc);
}

static void ipu_crtc_commit(struct drm_crtc *crtc)
{
	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

	ipu_fb_enable(ipu_crtc);
}

static struct drm_crtc_helper_funcs ipu_helper_funcs = {
	.dpms = ipu_crtc_dpms,
	.mode_fixup = ipu_crtc_mode_fixup,
	.mode_set = ipu_crtc_mode_set,
	.prepare = ipu_crtc_prepare,
	.commit = ipu_crtc_commit,
};

static int ipu_enable_vblank(struct drm_crtc *crtc)
{
	return 0;
}

static void ipu_disable_vblank(struct drm_crtc *crtc)
{
	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

	ipu_crtc->page_flip_event = NULL;
	ipu_crtc->newfb = NULL;
}

static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc, u32 encoder_type,
		u32 pixfmt, int hsync_pin, int vsync_pin)
{
	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);

	ipu_crtc->interface_pix_fmt = pixfmt;
	ipu_crtc->di_hsync_pin = hsync_pin;
	ipu_crtc->di_vsync_pin = vsync_pin;

	switch (encoder_type) {
	case DRM_MODE_ENCODER_DAC:
	case DRM_MODE_ENCODER_TVDAC:
	case DRM_MODE_ENCODER_LVDS:
		ipu_crtc->di_clkflags = IPU_DI_CLKMODE_SYNC |
			IPU_DI_CLKMODE_EXT;
		break;
	case DRM_MODE_ENCODER_NONE:
		ipu_crtc->di_clkflags = 0;
		break;
	}

	return 0;
}

static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
	.enable_vblank = ipu_enable_vblank,
	.disable_vblank = ipu_disable_vblank,
	.set_interface_pix_fmt = ipu_set_interface_pix_fmt,
	.crtc_funcs = &ipu_crtc_funcs,
	.crtc_helper_funcs = &ipu_helper_funcs,
};

static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
{
	if (!IS_ERR_OR_NULL(ipu_crtc->dc))
		ipu_dc_put(ipu_crtc->dc);
	if (!IS_ERR_OR_NULL(ipu_crtc->di))
		ipu_di_put(ipu_crtc->di);
}

static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
		struct ipu_client_platformdata *pdata)
{
	struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
	int ret;

	ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
	if (IS_ERR(ipu_crtc->dc)) {
		ret = PTR_ERR(ipu_crtc->dc);
		goto err_out;
	}

	ipu_crtc->di = ipu_di_get(ipu, pdata->di);
	if (IS_ERR(ipu_crtc->di)) {
		ret = PTR_ERR(ipu_crtc->di);
		goto err_out;
	}

	return 0;
err_out:
	ipu_put_resources(ipu_crtc);

	return ret;
}

static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
		struct ipu_client_platformdata *pdata)
{
	struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
	int dp = -EINVAL;
	int ret;
	int id;

	ret = ipu_get_resources(ipu_crtc, pdata);
	if (ret) {
		dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
				ret);
		return ret;
	}

	ret = imx_drm_add_crtc(&ipu_crtc->base,
			&ipu_crtc->imx_crtc,
			&ipu_crtc_helper_funcs, THIS_MODULE,
			ipu_crtc->dev->parent->of_node, pdata->di);
	if (ret) {
		dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
		goto err_put_resources;
	}

	if (pdata->dp >= 0)
		dp = IPU_DP_FLOW_SYNC_BG;
	id = imx_drm_crtc_id(ipu_crtc->imx_crtc);
	ipu_crtc->plane[0] = ipu_plane_init(ipu_crtc->base.dev, ipu,
					    pdata->dma[0], dp, BIT(id), true);
	ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
	if (ret) {
		dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
			ret);
		goto err_remove_crtc;
	}

	/* If this crtc is using the DP, add an overlay plane */
	if (pdata->dp >= 0 && pdata->dma[1] > 0) {
		ipu_crtc->plane[1] = ipu_plane_init(ipu_crtc->base.dev, ipu,
						    pdata->dma[1],
						    IPU_DP_FLOW_SYNC_FG,
						    BIT(id), false);
		if (IS_ERR(ipu_crtc->plane[1]))
			ipu_crtc->plane[1] = NULL;
	}

	ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
	ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
			"imx_drm", ipu_crtc);
	if (ret < 0) {
		dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
		goto err_put_plane_res;
	}

	return 0;

err_put_plane_res:
	ipu_plane_put_resources(ipu_crtc->plane[0]);
err_remove_crtc:
	imx_drm_remove_crtc(ipu_crtc->imx_crtc);
err_put_resources:
	ipu_put_resources(ipu_crtc);

	return ret;
}

static int ipu_drm_probe(struct platform_device *pdev)
{
	struct ipu_client_platformdata *pdata = pdev->dev.platform_data;
	struct ipu_crtc *ipu_crtc;
	int ret;

	if (!pdata)
		return -EINVAL;

	ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
	if (ret)
		return ret;

	ipu_crtc = devm_kzalloc(&pdev->dev, sizeof(*ipu_crtc), GFP_KERNEL);
	if (!ipu_crtc)
		return -ENOMEM;

	ipu_crtc->dev = &pdev->dev;

	ret = ipu_crtc_init(ipu_crtc, pdata);
	if (ret)
		return ret;

	platform_set_drvdata(pdev, ipu_crtc);

	return 0;
}

static int ipu_drm_remove(struct platform_device *pdev)
{
	struct ipu_crtc *ipu_crtc = platform_get_drvdata(pdev);

	imx_drm_remove_crtc(ipu_crtc->imx_crtc);

	ipu_plane_put_resources(ipu_crtc->plane[0]);
	ipu_put_resources(ipu_crtc);

	return 0;
}

static struct platform_driver ipu_drm_driver = {
	.driver = {
		.name = "imx-ipuv3-crtc",
	},
	.probe = ipu_drm_probe,
	.remove = ipu_drm_remove,
};
module_platform_driver(ipu_drm_driver);

MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
MODULE_DESCRIPTION(DRIVER_DESC);
MODULE_LICENSE("GPL");
MODULE_ALIAS("platform:imx-ipuv3-crtc");
Commit	Line	Data
f326f799 SH	1	/*
	2	* i.MX IPUv3 Graphics driver
	3	*
	4	* Copyright (C) 2011 Sascha Hauer, Pengutronix
	5	*
	6	* This program is free software; you can redistribute it and/or
	7	* modify it under the terms of the GNU General Public License
	8	* as published by the Free Software Foundation; either version 2
	9	* of the License, or (at your option) any later version.
	10	* This program is distributed in the hope that it will be useful,
	11	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	12	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	13	* GNU General Public License for more details.
	14	*
	15	* You should have received a copy of the GNU General Public License
	16	* along with this program; if not, write to the Free Software
	17	* Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
	18	* MA 02110-1301, USA.
	19	*/
	20	#include <linux/module.h>
	21	#include <linux/export.h>
	22	#include <linux/device.h>
	23	#include <linux/platform_device.h>
	24	#include <drm/drmP.h>
f326f799 SH	25	#include <drm/drm_crtc_helper.h>
	26	#include <linux/fb.h>
	27	#include <linux/clk.h>
b8d181e4	28	#include <linux/errno.h>
f326f799 SH	29	#include <drm/drm_gem_cma_helper.h>
	30	#include <drm/drm_fb_cma_helper.h>
	31
	32	#include "ipu-v3/imx-ipu-v3.h"
	33	#include "imx-drm.h"
b8d181e4	34	#include "ipuv3-plane.h"
f326f799 SH	35
	36	#define DRIVER_DESC "i.MX IPUv3 Graphics"
	37
f326f799	38	struct ipu_crtc {
f326f799 SH	39	struct device *dev;
	40	struct drm_crtc base;
	41	struct imx_drm_crtc *imx_crtc;
b8d181e4 PZ	42
	43	/* plane[0] is the full plane, plane[1] is the partial plane */
	44	struct ipu_plane *plane[2];
	45
f326f799	46	struct ipu_dc *dc;
f326f799 SH	47	struct ipu_di *di;
f326f799 SH	48	int enabled;
f326f799 SH	49	struct drm_pending_vblank_event *page_flip_event;
	50	struct drm_framebuffer *newfb;
	51	int irq;
	52	u32 interface_pix_fmt;
	53	unsigned long di_clkflags;
2ea42608 PZ	54	int di_hsync_pin;
2ea42608 PZ	55	int di_vsync_pin;
f326f799 SH	56	};
	57
	58	#define to_ipu_crtc(x) container_of(x, struct ipu_crtc, base)
	59
f326f799 SH	60	static void ipu_fb_enable(struct ipu_crtc *ipu_crtc)
	61	{
	62	if (ipu_crtc->enabled)
	63	return;
	64
	65	ipu_di_enable(ipu_crtc->di);
f326f799	66	ipu_dc_enable_channel(ipu_crtc->dc);
b8d181e4	67	ipu_plane_enable(ipu_crtc->plane[0]);
f326f799 SH	68
	69	ipu_crtc->enabled = 1;
	70	}
	71
	72	static void ipu_fb_disable(struct ipu_crtc *ipu_crtc)
	73	{
	74	if (!ipu_crtc->enabled)
	75	return;
	76
b8d181e4	77	ipu_plane_disable(ipu_crtc->plane[0]);
f326f799	78	ipu_dc_disable_channel(ipu_crtc->dc);
f326f799 SH	79	ipu_di_disable(ipu_crtc->di);
	80
	81	ipu_crtc->enabled = 0;
	82	}
	83
	84	static void ipu_crtc_dpms(struct drm_crtc *crtc, int mode)
	85	{
	86	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
	87
a8e4e232	88	dev_dbg(ipu_crtc->dev, "%s mode: %d\n", __func__, mode);
f326f799 SH	89
	90	switch (mode) {
	91	case DRM_MODE_DPMS_ON:
	92	ipu_fb_enable(ipu_crtc);
	93	break;
	94	case DRM_MODE_DPMS_STANDBY:
	95	case DRM_MODE_DPMS_SUSPEND:
	96	case DRM_MODE_DPMS_OFF:
	97	ipu_fb_disable(ipu_crtc);
	98	break;
	99	}
	100	}
	101
	102	static int ipu_page_flip(struct drm_crtc *crtc,
	103	struct drm_framebuffer *fb,
ed8d1975 KP	104	struct drm_pending_vblank_event *event,
ed8d1975 KP	105	uint32_t page_flip_flags)
f326f799 SH	106	{
	107	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
	108	int ret;
	109
	110	if (ipu_crtc->newfb)
	111	return -EBUSY;
	112
	113	ret = imx_drm_crtc_vblank_get(ipu_crtc->imx_crtc);
	114	if (ret) {
	115	dev_dbg(ipu_crtc->dev, "failed to acquire vblank counter\n");
	116	list_del(&event->base.link);
	117
	118	return ret;
	119	}
	120
	121	ipu_crtc->newfb = fb;
	122	ipu_crtc->page_flip_event = event;
1f941ae8	123	crtc->fb = fb;
f326f799 SH	124
	125	return 0;
	126	}
	127
	128	static const struct drm_crtc_funcs ipu_crtc_funcs = {
	129	.set_config = drm_crtc_helper_set_config,
	130	.destroy = drm_crtc_cleanup,
	131	.page_flip = ipu_page_flip,
	132	};
	133
f326f799 SH	134	static int ipu_crtc_mode_set(struct drm_crtc *crtc,
	135	struct drm_display_mode *orig_mode,
	136	struct drm_display_mode *mode,
	137	int x, int y,
	138	struct drm_framebuffer *old_fb)
	139	{
	140	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
f326f799 SH	141	int ret;
	142	struct ipu_di_signal_cfg sig_cfg = {};
	143	u32 out_pixel_fmt;
f326f799 SH	144
	145	dev_dbg(ipu_crtc->dev, "%s: mode->hdisplay: %d\n", __func__,
	146	mode->hdisplay);
	147	dev_dbg(ipu_crtc->dev, "%s: mode->vdisplay: %d\n", __func__,
	148	mode->vdisplay);
	149
f326f799 SH	150	out_pixel_fmt = ipu_crtc->interface_pix_fmt;
	151
	152	if (mode->flags & DRM_MODE_FLAG_INTERLACE)
	153	sig_cfg.interlaced = 1;
	154	if (mode->flags & DRM_MODE_FLAG_PHSYNC)
	155	sig_cfg.Hsync_pol = 1;
	156	if (mode->flags & DRM_MODE_FLAG_PVSYNC)
	157	sig_cfg.Vsync_pol = 1;
	158
	159	sig_cfg.enable_pol = 1;
f0ac9beb	160	sig_cfg.clk_pol = 1;
f326f799 SH	161	sig_cfg.width = mode->hdisplay;
	162	sig_cfg.height = mode->vdisplay;
	163	sig_cfg.pixel_fmt = out_pixel_fmt;
	164	sig_cfg.h_start_width = mode->htotal - mode->hsync_end;
	165	sig_cfg.h_sync_width = mode->hsync_end - mode->hsync_start;
	166	sig_cfg.h_end_width = mode->hsync_start - mode->hdisplay;
	167
	168	sig_cfg.v_start_width = mode->vtotal - mode->vsync_end;
	169	sig_cfg.v_sync_width = mode->vsync_end - mode->vsync_start;
	170	sig_cfg.v_end_width = mode->vsync_start - mode->vdisplay;
	171	sig_cfg.pixelclock = mode->clock * 1000;
	172	sig_cfg.clkflags = ipu_crtc->di_clkflags;
	173
	174	sig_cfg.v_to_h_sync = 0;
	175
2ea42608 PZ	176	sig_cfg.hsync_pin = ipu_crtc->di_hsync_pin;
	177	sig_cfg.vsync_pin = ipu_crtc->di_vsync_pin;
	178
f326f799 SH	179	ret = ipu_dc_init_sync(ipu_crtc->dc, ipu_crtc->di, sig_cfg.interlaced,
	180	out_pixel_fmt, mode->hdisplay);
	181	if (ret) {
	182	dev_err(ipu_crtc->dev,
	183	"initializing display controller failed with %d\n",
	184	ret);
	185	return ret;
	186	}
	187
	188	ret = ipu_di_init_sync_panel(ipu_crtc->di, &sig_cfg);
	189	if (ret) {
	190	dev_err(ipu_crtc->dev,
	191	"initializing panel failed with %d\n", ret);
	192	return ret;
	193	}
	194
b8d181e4 PZ	195	return ipu_plane_mode_set(ipu_crtc->plane[0], crtc, mode, crtc->fb,
	196	0, 0, mode->hdisplay, mode->vdisplay,
	197	x, y, mode->hdisplay, mode->vdisplay);
f326f799 SH	198	}
	199
	200	static void ipu_crtc_handle_pageflip(struct ipu_crtc *ipu_crtc)
	201	{
f326f799 SH	202	unsigned long flags;
	203	struct drm_device *drm = ipu_crtc->base.dev;
	204
	205	spin_lock_irqsave(&drm->event_lock, flags);
0eca56f9 RC	206	if (ipu_crtc->page_flip_event)
0eca56f9 RC	207	drm_send_vblank_event(drm, -1, ipu_crtc->page_flip_event);
f326f799	208	ipu_crtc->page_flip_event = NULL;
f326f799	209	imx_drm_crtc_vblank_put(ipu_crtc->imx_crtc);
f326f799 SH	210	spin_unlock_irqrestore(&drm->event_lock, flags);
	211	}
	212
	213	static irqreturn_t ipu_irq_handler(int irq, void *dev_id)
	214	{
	215	struct ipu_crtc *ipu_crtc = dev_id;
	216
	217	imx_drm_handle_vblank(ipu_crtc->imx_crtc);
	218
	219	if (ipu_crtc->newfb) {
f326f799	220	ipu_crtc->newfb = NULL;
32f71106 LS	221	ipu_plane_set_base(ipu_crtc->plane[0], ipu_crtc->base.fb,
32f71106 LS	222	ipu_crtc->plane[0]->x, ipu_crtc->plane[0]->y);
f326f799 SH	223	ipu_crtc_handle_pageflip(ipu_crtc);
	224	}
	225
	226	return IRQ_HANDLED;
	227	}
	228
	229	static bool ipu_crtc_mode_fixup(struct drm_crtc *crtc,
	230	const struct drm_display_mode *mode,
	231	struct drm_display_mode *adjusted_mode)
	232	{
	233	return true;
	234	}
	235
	236	static void ipu_crtc_prepare(struct drm_crtc *crtc)
	237	{
	238	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
	239
	240	ipu_fb_disable(ipu_crtc);
	241	}
	242
	243	static void ipu_crtc_commit(struct drm_crtc *crtc)
	244	{
	245	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
	246
	247	ipu_fb_enable(ipu_crtc);
	248	}
	249
f326f799 SH	250	static struct drm_crtc_helper_funcs ipu_helper_funcs = {
	251	.dpms = ipu_crtc_dpms,
	252	.mode_fixup = ipu_crtc_mode_fixup,
	253	.mode_set = ipu_crtc_mode_set,
	254	.prepare = ipu_crtc_prepare,
	255	.commit = ipu_crtc_commit,
f326f799 SH	256	};
	257
	258	static int ipu_enable_vblank(struct drm_crtc *crtc)
	259	{
f326f799 SH	260	return 0;
	261	}
	262
	263	static void ipu_disable_vblank(struct drm_crtc *crtc)
	264	{
	265	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
	266
6ee4d7fe SH	267	ipu_crtc->page_flip_event = NULL;
6ee4d7fe SH	268	ipu_crtc->newfb = NULL;
f326f799 SH	269	}
	270
	271	static int ipu_set_interface_pix_fmt(struct drm_crtc *crtc, u32 encoder_type,
2ea42608	272	u32 pixfmt, int hsync_pin, int vsync_pin)
f326f799 SH	273	{
	274	struct ipu_crtc *ipu_crtc = to_ipu_crtc(crtc);
	275
	276	ipu_crtc->interface_pix_fmt = pixfmt;
2ea42608 PZ	277	ipu_crtc->di_hsync_pin = hsync_pin;
2ea42608 PZ	278	ipu_crtc->di_vsync_pin = vsync_pin;
f326f799 SH	279
f326f799 SH	280	switch (encoder_type) {
b60b5bcb PZ	281	case DRM_MODE_ENCODER_DAC:
b60b5bcb PZ	282	case DRM_MODE_ENCODER_TVDAC:
f326f799 SH	283	case DRM_MODE_ENCODER_LVDS:
	284	ipu_crtc->di_clkflags = IPU_DI_CLKMODE_SYNC \|
	285	IPU_DI_CLKMODE_EXT;
	286	break;
	287	case DRM_MODE_ENCODER_NONE:
	288	ipu_crtc->di_clkflags = 0;
	289	break;
	290	}
	291
	292	return 0;
	293	}
	294
	295	static const struct imx_drm_crtc_helper_funcs ipu_crtc_helper_funcs = {
	296	.enable_vblank = ipu_enable_vblank,
	297	.disable_vblank = ipu_disable_vblank,
	298	.set_interface_pix_fmt = ipu_set_interface_pix_fmt,
	299	.crtc_funcs = &ipu_crtc_funcs,
	300	.crtc_helper_funcs = &ipu_helper_funcs,
	301	};
	302
	303	static void ipu_put_resources(struct ipu_crtc *ipu_crtc)
	304	{
b8d181e4 PZ	305	if (!IS_ERR_OR_NULL(ipu_crtc->dc))
b8d181e4 PZ	306	ipu_dc_put(ipu_crtc->dc);
f326f799 SH	307	if (!IS_ERR_OR_NULL(ipu_crtc->di))
	308	ipu_di_put(ipu_crtc->di);
	309	}
	310
	311	static int ipu_get_resources(struct ipu_crtc *ipu_crtc,
	312	struct ipu_client_platformdata *pdata)
	313	{
	314	struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
	315	int ret;
	316
f326f799 SH	317	ipu_crtc->dc = ipu_dc_get(ipu, pdata->dc);
	318	if (IS_ERR(ipu_crtc->dc)) {
	319	ret = PTR_ERR(ipu_crtc->dc);
	320	goto err_out;
	321	}
	322
f326f799 SH	323	ipu_crtc->di = ipu_di_get(ipu, pdata->di);
	324	if (IS_ERR(ipu_crtc->di)) {
	325	ret = PTR_ERR(ipu_crtc->di);
	326	goto err_out;
	327	}
	328
f326f799 SH	329	return 0;
	330	err_out:
	331	ipu_put_resources(ipu_crtc);
	332
	333	return ret;
	334	}
	335
	336	static int ipu_crtc_init(struct ipu_crtc *ipu_crtc,
	337	struct ipu_client_platformdata *pdata)
	338	{
47b1be5c	339	struct ipu_soc *ipu = dev_get_drvdata(ipu_crtc->dev->parent);
b8d181e4	340	int dp = -EINVAL;
f326f799	341	int ret;
b8d181e4	342	int id;
f326f799 SH	343
	344	ret = ipu_get_resources(ipu_crtc, pdata);
	345	if (ret) {
	346	dev_err(ipu_crtc->dev, "getting resources failed with %d.\n",
	347	ret);
	348	return ret;
	349	}
	350
	351	ret = imx_drm_add_crtc(&ipu_crtc->base,
	352	&ipu_crtc->imx_crtc,
	353	&ipu_crtc_helper_funcs, THIS_MODULE,
	354	ipu_crtc->dev->parent->of_node, pdata->di);
	355	if (ret) {
	356	dev_err(ipu_crtc->dev, "adding crtc failed with %d.\n", ret);
	357	goto err_put_resources;
	358	}
	359
b8d181e4 PZ	360	if (pdata->dp >= 0)
	361	dp = IPU_DP_FLOW_SYNC_BG;
	362	id = imx_drm_crtc_id(ipu_crtc->imx_crtc);
	363	ipu_crtc->plane[0] = ipu_plane_init(ipu_crtc->base.dev, ipu,
	364	pdata->dma[0], dp, BIT(id), true);
	365	ret = ipu_plane_get_resources(ipu_crtc->plane[0]);
	366	if (ret) {
	367	dev_err(ipu_crtc->dev, "getting plane 0 resources failed with %d.\n",
	368	ret);
	369	goto err_remove_crtc;
	370	}
	371
	372	/* If this crtc is using the DP, add an overlay plane */
	373	if (pdata->dp >= 0 && pdata->dma[1] > 0) {
	374	ipu_crtc->plane[1] = ipu_plane_init(ipu_crtc->base.dev, ipu,
	375	pdata->dma[1],
	376	IPU_DP_FLOW_SYNC_FG,
	377	BIT(id), false);
	378	if (IS_ERR(ipu_crtc->plane[1]))
	379	ipu_crtc->plane[1] = NULL;
	380	}
	381
	382	ipu_crtc->irq = ipu_plane_irq(ipu_crtc->plane[0]);
47b1be5c PZ	383	ret = devm_request_irq(ipu_crtc->dev, ipu_crtc->irq, ipu_irq_handler, 0,
	384	"imx_drm", ipu_crtc);
	385	if (ret < 0) {
	386	dev_err(ipu_crtc->dev, "irq request failed with %d.\n", ret);
b8d181e4	387	goto err_put_plane_res;
47b1be5c PZ	388	}
47b1be5c PZ	389
f326f799 SH	390	return 0;
f326f799 SH	391
b8d181e4 PZ	392	err_put_plane_res:
	393	ipu_plane_put_resources(ipu_crtc->plane[0]);
	394	err_remove_crtc:
	395	imx_drm_remove_crtc(ipu_crtc->imx_crtc);
f326f799 SH	396	err_put_resources:
	397	ipu_put_resources(ipu_crtc);
	398
	399	return ret;
	400	}
	401
c4aabf8d	402	static int ipu_drm_probe(struct platform_device *pdev)
f326f799 SH	403	{
	404	struct ipu_client_platformdata *pdata = pdev->dev.platform_data;
	405	struct ipu_crtc *ipu_crtc;
	406	int ret;
	407
	408	if (!pdata)
	409	return -EINVAL;
	410
4cdbb4ff RK	411	ret = dma_set_coherent_mask(&pdev->dev, DMA_BIT_MASK(32));
	412	if (ret)
	413	return ret;
f326f799 SH	414
	415	ipu_crtc = devm_kzalloc(&pdev->dev, sizeof(*ipu_crtc), GFP_KERNEL);
	416	if (!ipu_crtc)
	417	return -ENOMEM;
	418
	419	ipu_crtc->dev = &pdev->dev;
	420
	421	ret = ipu_crtc_init(ipu_crtc, pdata);
9a8f3f44 LW	422	if (ret)
9a8f3f44 LW	423	return ret;
f326f799 SH	424
	425	platform_set_drvdata(pdev, ipu_crtc);
	426
	427	return 0;
	428	}
	429
8aa1be45	430	static int ipu_drm_remove(struct platform_device *pdev)
f326f799 SH	431	{
	432	struct ipu_crtc *ipu_crtc = platform_get_drvdata(pdev);
	433
	434	imx_drm_remove_crtc(ipu_crtc->imx_crtc);
	435
b8d181e4	436	ipu_plane_put_resources(ipu_crtc->plane[0]);
f326f799 SH	437	ipu_put_resources(ipu_crtc);
	438
	439	return 0;
	440	}
	441
	442	static struct platform_driver ipu_drm_driver = {
	443	.driver = {
	444	.name = "imx-ipuv3-crtc",
	445	},
	446	.probe = ipu_drm_probe,
99c28f10	447	.remove = ipu_drm_remove,
f326f799 SH	448	};
	449	module_platform_driver(ipu_drm_driver);
	450
	451	MODULE_AUTHOR("Sascha Hauer <s.hauer@pengutronix.de>");
	452	MODULE_DESCRIPTION(DRIVER_DESC);
	453	MODULE_LICENSE("GPL");
ce9c1cef	454	MODULE_ALIAS("platform:imx-ipuv3-crtc");