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1 | #ifndef _ADE7759_H |
2 | #define _ADE7759_H | |
3 | ||
4 | #define ADE7759_WAVEFORM 0x01 | |
5 | #define ADE7759_AENERGY 0x02 | |
6 | #define ADE7759_RSTENERGY 0x03 | |
7 | #define ADE7759_STATUS 0x04 | |
8 | #define ADE7759_RSTSTATUS 0x05 | |
9 | #define ADE7759_MODE 0x06 | |
10 | #define ADE7759_CFDEN 0x07 | |
11 | #define ADE7759_CH1OS 0x08 | |
12 | #define ADE7759_CH2OS 0x09 | |
13 | #define ADE7759_GAIN 0x0A | |
14 | #define ADE7759_APGAIN 0x0B | |
15 | #define ADE7759_PHCAL 0x0C | |
16 | #define ADE7759_APOS 0x0D | |
17 | #define ADE7759_ZXTOUT 0x0E | |
18 | #define ADE7759_SAGCYC 0x0F | |
19 | #define ADE7759_IRQEN 0x10 | |
20 | #define ADE7759_SAGLVL 0x11 | |
21 | #define ADE7759_TEMP 0x12 | |
22 | #define ADE7759_LINECYC 0x13 | |
23 | #define ADE7759_LENERGY 0x14 | |
24 | #define ADE7759_CFNUM 0x15 | |
25 | #define ADE7759_CHKSUM 0x1E | |
26 | #define ADE7759_DIEREV 0x1F | |
27 | ||
28 | #define ADE7759_READ_REG(a) a | |
29 | #define ADE7759_WRITE_REG(a) ((a) | 0x80) | |
30 | ||
31 | #define ADE7759_MAX_TX 6 | |
32 | #define ADE7759_MAX_RX 6 | |
33 | #define ADE7759_STARTUP_DELAY 1 | |
34 | ||
35 | #define ADE7759_SPI_SLOW (u32)(300 * 1000) | |
36 | #define ADE7759_SPI_BURST (u32)(1000 * 1000) | |
37 | #define ADE7759_SPI_FAST (u32)(2000 * 1000) | |
38 | ||
39 | #define DRIVER_NAME "ade7759" | |
40 | ||
41 | /** | |
42 | * struct ade7759_state - device instance specific data | |
43 | * @us: actual spi_device | |
2919fa54 | 44 | * @indio_dev: industrial I/O device structure |
2919fa54 | 45 | * @tx: transmit buffer |
25985edc | 46 | * @rx: receive buffer |
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47 | * @buf_lock: mutex to protect tx and rx |
48 | **/ | |
49 | struct ade7759_state { | |
50 | struct spi_device *us; | |
2919fa54 | 51 | struct iio_dev *indio_dev; |
2919fa54 BS |
52 | u8 *tx; |
53 | u8 *rx; | |
54 | struct mutex buf_lock; | |
55 | }; | |
2919fa54 BS |
56 | |
57 | #endif |