Commit | Line | Data |
---|---|---|
8d97a587 BS |
1 | #ifndef _ADE7754_H |
2 | #define _ADE7754_H | |
3 | ||
4 | #define ADE7754_AENERGY 0x01 | |
5 | #define ADE7754_RAENERGY 0x02 | |
6 | #define ADE7754_LAENERGY 0x03 | |
7 | #define ADE7754_VAENERGY 0x04 | |
8 | #define ADE7754_RVAENERGY 0x05 | |
9 | #define ADE7754_LVAENERGY 0x06 | |
10 | #define ADE7754_PERIOD 0x07 | |
11 | #define ADE7754_TEMP 0x08 | |
12 | #define ADE7754_WFORM 0x09 | |
13 | #define ADE7754_OPMODE 0x0A | |
14 | #define ADE7754_MMODE 0x0B | |
15 | #define ADE7754_WAVMODE 0x0C | |
16 | #define ADE7754_WATMODE 0x0D | |
17 | #define ADE7754_VAMODE 0x0E | |
18 | #define ADE7754_IRQEN 0x0F | |
19 | #define ADE7754_STATUS 0x10 | |
20 | #define ADE7754_RSTATUS 0x11 | |
21 | #define ADE7754_ZXTOUT 0x12 | |
22 | #define ADE7754_LINCYC 0x13 | |
23 | #define ADE7754_SAGCYC 0x14 | |
24 | #define ADE7754_SAGLVL 0x15 | |
25 | #define ADE7754_VPEAK 0x16 | |
26 | #define ADE7754_IPEAK 0x17 | |
27 | #define ADE7754_GAIN 0x18 | |
28 | #define ADE7754_AWG 0x19 | |
29 | #define ADE7754_BWG 0x1A | |
30 | #define ADE7754_CWG 0x1B | |
31 | #define ADE7754_AVAG 0x1C | |
32 | #define ADE7754_BVAG 0x1D | |
33 | #define ADE7754_CVAG 0x1E | |
34 | #define ADE7754_APHCAL 0x1F | |
35 | #define ADE7754_BPHCAL 0x20 | |
36 | #define ADE7754_CPHCAL 0x21 | |
37 | #define ADE7754_AAPOS 0x22 | |
38 | #define ADE7754_BAPOS 0x23 | |
39 | #define ADE7754_CAPOS 0x24 | |
40 | #define ADE7754_CFNUM 0x25 | |
41 | #define ADE7754_CFDEN 0x26 | |
42 | #define ADE7754_WDIV 0x27 | |
43 | #define ADE7754_VADIV 0x28 | |
44 | #define ADE7754_AIRMS 0x29 | |
45 | #define ADE7754_BIRMS 0x2A | |
46 | #define ADE7754_CIRMS 0x2B | |
47 | #define ADE7754_AVRMS 0x2C | |
48 | #define ADE7754_BVRMS 0x2D | |
49 | #define ADE7754_CVRMS 0x2E | |
50 | #define ADE7754_AIRMSOS 0x2F | |
51 | #define ADE7754_BIRMSOS 0x30 | |
52 | #define ADE7754_CIRMSOS 0x31 | |
53 | #define ADE7754_AVRMSOS 0x32 | |
54 | #define ADE7754_BVRMSOS 0x33 | |
55 | #define ADE7754_CVRMSOS 0x34 | |
56 | #define ADE7754_AAPGAIN 0x35 | |
57 | #define ADE7754_BAPGAIN 0x36 | |
58 | #define ADE7754_CAPGAIN 0x37 | |
59 | #define ADE7754_AVGAIN 0x38 | |
60 | #define ADE7754_BVGAIN 0x39 | |
61 | #define ADE7754_CVGAIN 0x3A | |
62 | #define ADE7754_CHKSUM 0x3E | |
63 | #define ADE7754_VERSION 0x3F | |
64 | ||
65 | #define ADE7754_READ_REG(a) a | |
66 | #define ADE7754_WRITE_REG(a) ((a) | 0x80) | |
67 | ||
68 | #define ADE7754_MAX_TX 4 | |
69 | #define ADE7754_MAX_RX 4 | |
70 | #define ADE7754_STARTUP_DELAY 1 | |
71 | ||
72 | #define ADE7754_SPI_SLOW (u32)(300 * 1000) | |
73 | #define ADE7754_SPI_BURST (u32)(1000 * 1000) | |
74 | #define ADE7754_SPI_FAST (u32)(2000 * 1000) | |
75 | ||
76 | #define DRIVER_NAME "ade7754" | |
77 | ||
78 | /** | |
79 | * struct ade7754_state - device instance specific data | |
80 | * @us: actual spi_device | |
8d97a587 | 81 | * @indio_dev: industrial I/O device structure |
8d97a587 | 82 | * @tx: transmit buffer |
25985edc | 83 | * @rx: receive buffer |
8d97a587 BS |
84 | * @buf_lock: mutex to protect tx and rx |
85 | **/ | |
86 | struct ade7754_state { | |
87 | struct spi_device *us; | |
8d97a587 | 88 | struct iio_dev *indio_dev; |
8d97a587 BS |
89 | u8 *tx; |
90 | u8 *rx; | |
91 | struct mutex buf_lock; | |
92 | }; | |
8d97a587 BS |
93 | |
94 | #endif |