[linux-2.6-block.git] / drivers / staging / iio / meter / ade7753.c

/*
 * ADE7753 Single-Phase Multifunction Metering IC with di/dt Sensor Interface
 *
 * Copyright 2010 Analog Devices Inc.
 *
 * Licensed under the GPL-2 or later.
 */

#include <linux/interrupt.h>
#include <linux/irq.h>
#include <linux/delay.h>
#include <linux/mutex.h>
#include <linux/device.h>
#include <linux/kernel.h>
#include <linux/spi/spi.h>
#include <linux/slab.h>
#include <linux/sysfs.h>
#include <linux/list.h>
#include <linux/module.h>

#include <linux/iio/iio.h>
#include <linux/iio/sysfs.h>
#include "meter.h"
#include "ade7753.h"

static int ade7753_spi_write_reg_8(struct device *dev,
				   u8 reg_address,
				   u8 val)
{
	int ret;
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7753_WRITE_REG(reg_address);
	st->tx[1] = val;

	ret = spi_write(st->us, st->tx, 2);
	mutex_unlock(&st->buf_lock);

	return ret;
}

static int ade7753_spi_write_reg_16(struct device *dev,
		u8 reg_address,
		u16 value)
{
	int ret;
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7753_WRITE_REG(reg_address);
	st->tx[1] = (value >> 8) & 0xFF;
	st->tx[2] = value & 0xFF;
	ret = spi_write(st->us, st->tx, 3);
	mutex_unlock(&st->buf_lock);

	return ret;
}

static int ade7753_spi_read_reg_8(struct device *dev,
		u8 reg_address,
		u8 *val)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);
	ssize_t ret;

	ret = spi_w8r8(st->us, ADE7753_READ_REG(reg_address));
	if (ret < 0) {
		dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
				reg_address);
		return ret;
	}
	*val = ret;

	return 0;
}

static int ade7753_spi_read_reg_16(struct device *dev,
		u8 reg_address,
		u16 *val)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);
	ssize_t ret;

	ret = spi_w8r16(st->us, ADE7753_READ_REG(reg_address));
	if (ret < 0) {
		dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
			reg_address);
		return ret;
	}

	*val = ret;
	*val = be16_to_cpup(val);

	return 0;
}

static int ade7753_spi_read_reg_24(struct device *dev,
		u8 reg_address,
		u32 *val)
{
	struct spi_message msg;
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);
	int ret;
	struct spi_transfer xfers[] = {
		{
			.tx_buf = st->tx,
			.bits_per_word = 8,
			.len = 1,
		}, {
			.rx_buf = st->tx,
			.bits_per_word = 8,
			.len = 3,
		}
	};

	mutex_lock(&st->buf_lock);
	st->tx[0] = ADE7753_READ_REG(reg_address);

	spi_message_init(&msg);
	spi_message_add_tail(&xfers[0], &msg);
	spi_message_add_tail(&xfers[1], &msg);
	ret = spi_sync(st->us, &msg);
	if (ret) {
		dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
				reg_address);
		goto error_ret;
	}
	*val = (st->rx[0] << 16) | (st->rx[1] << 8) | st->rx[2];

error_ret:
	mutex_unlock(&st->buf_lock);
	return ret;
}

static ssize_t ade7753_read_8bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u8 val;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7753_spi_read_reg_8(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%u\n", val);
}

static ssize_t ade7753_read_16bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u16 val;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7753_spi_read_reg_16(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%u\n", val);
}

static ssize_t ade7753_read_24bit(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret;
	u32 val;
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);

	ret = ade7753_spi_read_reg_24(dev, this_attr->address, &val);
	if (ret)
		return ret;

	return sprintf(buf, "%u\n", val);
}

static ssize_t ade7753_write_8bit(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	int ret;
	long val;

	ret = strict_strtol(buf, 10, &val);
	if (ret)
		goto error_ret;
	ret = ade7753_spi_write_reg_8(dev, this_attr->address, val);

error_ret:
	return ret ? ret : len;
}

static ssize_t ade7753_write_16bit(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	int ret;
	long val;

	ret = strict_strtol(buf, 10, &val);
	if (ret)
		goto error_ret;
	ret = ade7753_spi_write_reg_16(dev, this_attr->address, val);

error_ret:
	return ret ? ret : len;
}

static int ade7753_reset(struct device *dev)
{
	u16 val;

	ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
	val |= 1 << 6; /* Software Chip Reset */

	return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
}

static ssize_t ade7753_write_reset(struct device *dev,
		struct device_attribute *attr,
		const char *buf, size_t len)
{
	if (len < 1)
		return -1;
	switch (buf[0]) {
	case '1':
	case 'y':
	case 'Y':
		return ade7753_reset(dev);
	}
	return -1;
}

static IIO_DEV_ATTR_AENERGY(ade7753_read_24bit, ADE7753_AENERGY);
static IIO_DEV_ATTR_LAENERGY(ade7753_read_24bit, ADE7753_LAENERGY);
static IIO_DEV_ATTR_VAENERGY(ade7753_read_24bit, ADE7753_VAENERGY);
static IIO_DEV_ATTR_LVAENERGY(ade7753_read_24bit, ADE7753_LVAENERGY);
static IIO_DEV_ATTR_CFDEN(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_CFDEN);
static IIO_DEV_ATTR_CFNUM(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_CFNUM);
static IIO_DEV_ATTR_CHKSUM(ade7753_read_8bit, ADE7753_CHKSUM);
static IIO_DEV_ATTR_PHCAL(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_PHCAL);
static IIO_DEV_ATTR_APOS(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_APOS);
static IIO_DEV_ATTR_SAGCYC(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_SAGCYC);
static IIO_DEV_ATTR_SAGLVL(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_SAGLVL);
static IIO_DEV_ATTR_LINECYC(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_LINECYC);
static IIO_DEV_ATTR_WDIV(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_WDIV);
static IIO_DEV_ATTR_IRMS(S_IWUSR | S_IRUGO,
		ade7753_read_24bit,
		NULL,
		ADE7753_IRMS);
static IIO_DEV_ATTR_VRMS(S_IRUGO,
		ade7753_read_24bit,
		NULL,
		ADE7753_VRMS);
static IIO_DEV_ATTR_IRMSOS(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_IRMSOS);
static IIO_DEV_ATTR_VRMSOS(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_VRMSOS);
static IIO_DEV_ATTR_WGAIN(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_WGAIN);
static IIO_DEV_ATTR_VAGAIN(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_VAGAIN);
static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR | S_IRUGO,
		ade7753_read_16bit,
		ade7753_write_16bit,
		ADE7753_GAIN);
static IIO_DEV_ATTR_IPKLVL(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_IPKLVL);
static IIO_DEV_ATTR_VPKLVL(S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_VPKLVL);
static IIO_DEV_ATTR_IPEAK(S_IRUGO,
		ade7753_read_24bit,
		NULL,
		ADE7753_IPEAK);
static IIO_DEV_ATTR_VPEAK(S_IRUGO,
		ade7753_read_24bit,
		NULL,
		ADE7753_VPEAK);
static IIO_DEV_ATTR_VPERIOD(S_IRUGO,
		ade7753_read_16bit,
		NULL,
		ADE7753_PERIOD);
static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_CH1OS);
static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR | S_IRUGO,
		ade7753_read_8bit,
		ade7753_write_8bit,
		ADE7753_CH2OS);

static int ade7753_set_irq(struct device *dev, bool enable)
{
	int ret;
	u8 irqen;
	ret = ade7753_spi_read_reg_8(dev, ADE7753_IRQEN, &irqen);
	if (ret)
		goto error_ret;

	if (enable)
		irqen |= 1 << 3; /* Enables an interrupt when a data is
				    present in the waveform register */
	else
		irqen &= ~(1 << 3);

	ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);

error_ret:
	return ret;
}

/* Power down the device */
static int ade7753_stop_device(struct device *dev)
{
	u16 val;

	ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
	val |= 1 << 4;  /* AD converters can be turned off */

	return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
}

static int ade7753_initial_setup(struct iio_dev *indio_dev)
{
	int ret;
	struct device *dev = &indio_dev->dev;
	struct ade7753_state *st = iio_priv(indio_dev);

	/* use low spi speed for init */
	st->us->mode = SPI_MODE_3;
	spi_setup(st->us);

	/* Disable IRQ */
	ret = ade7753_set_irq(dev, false);
	if (ret) {
		dev_err(dev, "disable irq failed");
		goto err_ret;
	}

	ade7753_reset(dev);
	msleep(ADE7753_STARTUP_DELAY);

err_ret:
	return ret;
}

static ssize_t ade7753_read_frequency(struct device *dev,
		struct device_attribute *attr,
		char *buf)
{
	int ret, len = 0;
	u16 t;
	int sps;
	ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &t);
	if (ret)
		return ret;

	t = (t >> 11) & 0x3;
	sps = 27900 / (1 + t);

	len = sprintf(buf, "%d\n", sps);
	return len;
}

static ssize_t ade7753_write_frequency(struct device *dev,
		struct device_attribute *attr,
		const char *buf,
		size_t len)
{
	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
	struct ade7753_state *st = iio_priv(indio_dev);
	unsigned long val;
	int ret;
	u16 reg, t;

	ret = strict_strtol(buf, 10, &val);
	if (ret)
		return ret;
	if (val == 0)
		return -EINVAL;

	mutex_lock(&indio_dev->mlock);

	t = (27900 / val);
	if (t > 0)
		t--;

	if (t > 1)
		st->us->max_speed_hz = ADE7753_SPI_SLOW;
	else
		st->us->max_speed_hz = ADE7753_SPI_FAST;

	ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &reg);
	if (ret)
		goto out;

	reg &= ~(3 << 11);
	reg |= t << 11;

	ret = ade7753_spi_write_reg_16(dev, ADE7753_MODE, reg);

out:
	mutex_unlock(&indio_dev->mlock);

	return ret ? ret : len;
}

static IIO_DEV_ATTR_TEMP_RAW(ade7753_read_8bit);
static IIO_CONST_ATTR(in_temp_offset, "-25 C");
static IIO_CONST_ATTR(in_temp_scale, "0.67 C");

static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR | S_IRUGO,
		ade7753_read_frequency,
		ade7753_write_frequency);

static IIO_DEV_ATTR_RESET(ade7753_write_reset);

static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");

static struct attribute *ade7753_attributes[] = {
	&iio_dev_attr_in_temp_raw.dev_attr.attr,
	&iio_const_attr_in_temp_offset.dev_attr.attr,
	&iio_const_attr_in_temp_scale.dev_attr.attr,
	&iio_dev_attr_sampling_frequency.dev_attr.attr,
	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
	&iio_dev_attr_reset.dev_attr.attr,
	&iio_dev_attr_phcal.dev_attr.attr,
	&iio_dev_attr_cfden.dev_attr.attr,
	&iio_dev_attr_aenergy.dev_attr.attr,
	&iio_dev_attr_laenergy.dev_attr.attr,
	&iio_dev_attr_vaenergy.dev_attr.attr,
	&iio_dev_attr_lvaenergy.dev_attr.attr,
	&iio_dev_attr_cfnum.dev_attr.attr,
	&iio_dev_attr_apos.dev_attr.attr,
	&iio_dev_attr_sagcyc.dev_attr.attr,
	&iio_dev_attr_saglvl.dev_attr.attr,
	&iio_dev_attr_linecyc.dev_attr.attr,
	&iio_dev_attr_chksum.dev_attr.attr,
	&iio_dev_attr_pga_gain.dev_attr.attr,
	&iio_dev_attr_wgain.dev_attr.attr,
	&iio_dev_attr_choff_1.dev_attr.attr,
	&iio_dev_attr_choff_2.dev_attr.attr,
	&iio_dev_attr_wdiv.dev_attr.attr,
	&iio_dev_attr_irms.dev_attr.attr,
	&iio_dev_attr_vrms.dev_attr.attr,
	&iio_dev_attr_irmsos.dev_attr.attr,
	&iio_dev_attr_vrmsos.dev_attr.attr,
	&iio_dev_attr_vagain.dev_attr.attr,
	&iio_dev_attr_ipklvl.dev_attr.attr,
	&iio_dev_attr_vpklvl.dev_attr.attr,
	&iio_dev_attr_ipeak.dev_attr.attr,
	&iio_dev_attr_vpeak.dev_attr.attr,
	&iio_dev_attr_vperiod.dev_attr.attr,
	NULL,
};

static const struct attribute_group ade7753_attribute_group = {
	.attrs = ade7753_attributes,
};

static const struct iio_info ade7753_info = {
	.attrs = &ade7753_attribute_group,
	.driver_module = THIS_MODULE,
};

static int ade7753_probe(struct spi_device *spi)
{
	int ret;
	struct ade7753_state *st;
	struct iio_dev *indio_dev;

	/* setup the industrialio driver allocated elements */
	indio_dev = iio_device_alloc(sizeof(*st));
	if (indio_dev == NULL) {
		ret = -ENOMEM;
		goto error_ret;
	}
	/* this is only used for removal purposes */
	spi_set_drvdata(spi, indio_dev);

	st = iio_priv(indio_dev);
	st->us = spi;
	mutex_init(&st->buf_lock);

	indio_dev->name = spi->dev.driver->name;
	indio_dev->dev.parent = &spi->dev;
	indio_dev->info = &ade7753_info;
	indio_dev->modes = INDIO_DIRECT_MODE;

	/* Get the device into a sane initial state */
	ret = ade7753_initial_setup(indio_dev);
	if (ret)
		goto error_free_dev;

	ret = iio_device_register(indio_dev);
	if (ret)
		goto error_free_dev;

	return 0;

error_free_dev:
	iio_device_free(indio_dev);

error_ret:
	return ret;
}

/* fixme, confirm ordering in this function */
static int __devexit ade7753_remove(struct spi_device *spi)
{
	struct iio_dev *indio_dev = spi_get_drvdata(spi);

	iio_device_unregister(indio_dev);
	ade7753_stop_device(&indio_dev->dev);
	iio_device_free(indio_dev);

	return 0;
}

static struct spi_driver ade7753_driver = {
	.driver = {
		.name = "ade7753",
		.owner = THIS_MODULE,
	},
	.probe = ade7753_probe,
	.remove = __devexit_p(ade7753_remove),
};
module_spi_driver(ade7753_driver);

MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
MODULE_DESCRIPTION("Analog Devices ADE7753/6 Single-Phase Multifunction Meter");
MODULE_LICENSE("GPL v2");
MODULE_ALIAS("spi:ade7753");
Commit	Line	Data
09434ef7	1	/*
72db6eb6	2	* ADE7753 Single-Phase Multifunction Metering IC with di/dt Sensor Interface
09434ef7 BS	3	*
	4	* Copyright 2010 Analog Devices Inc.
	5	*
	6	* Licensed under the GPL-2 or later.
	7	*/
	8
	9	#include <linux/interrupt.h>
	10	#include <linux/irq.h>
09434ef7 BS	11	#include <linux/delay.h>
	12	#include <linux/mutex.h>
	13	#include <linux/device.h>
	14	#include <linux/kernel.h>
	15	#include <linux/spi/spi.h>
	16	#include <linux/slab.h>
	17	#include <linux/sysfs.h>
	18	#include <linux/list.h>
99c97852	19	#include <linux/module.h>
09434ef7	20
06458e27 JC	21	#include <linux/iio/iio.h>
06458e27 JC	22	#include <linux/iio/sysfs.h>
09434ef7 BS	23	#include "meter.h"
	24	#include "ade7753.h"
	25
72db6eb6 JC	26	static int ade7753_spi_write_reg_8(struct device *dev,
	27	u8 reg_address,
	28	u8 val)
09434ef7 BS	29	{
09434ef7 BS	30	int ret;
196b59c1	31	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	32	struct ade7753_state *st = iio_priv(indio_dev);
09434ef7 BS	33
	34	mutex_lock(&st->buf_lock);
	35	st->tx[0] = ADE7753_WRITE_REG(reg_address);
	36	st->tx[1] = val;
	37
	38	ret = spi_write(st->us, st->tx, 2);
	39	mutex_unlock(&st->buf_lock);
	40
	41	return ret;
	42	}
	43
	44	static int ade7753_spi_write_reg_16(struct device *dev,
	45	u8 reg_address,
	46	u16 value)
	47	{
	48	int ret;
196b59c1	49	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	50	struct ade7753_state *st = iio_priv(indio_dev);
09434ef7 BS	51
	52	mutex_lock(&st->buf_lock);
	53	st->tx[0] = ADE7753_WRITE_REG(reg_address);
	54	st->tx[1] = (value >> 8) & 0xFF;
	55	st->tx[2] = value & 0xFF;
72db6eb6	56	ret = spi_write(st->us, st->tx, 3);
09434ef7 BS	57	mutex_unlock(&st->buf_lock);
	58
	59	return ret;
	60	}
	61
	62	static int ade7753_spi_read_reg_8(struct device *dev,
	63	u8 reg_address,
	64	u8 *val)
	65	{
196b59c1	66	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	67	struct ade7753_state *st = iio_priv(indio_dev);
72db6eb6	68	ssize_t ret;
09434ef7	69
72db6eb6 JC	70	ret = spi_w8r8(st->us, ADE7753_READ_REG(reg_address));
72db6eb6 JC	71	if (ret < 0) {
09434ef7 BS	72	dev_err(&st->us->dev, "problem when reading 8 bit register 0x%02X",
09434ef7 BS	73	reg_address);
72db6eb6	74	return ret;
09434ef7	75	}
72db6eb6	76	*val = ret;
09434ef7	77
72db6eb6	78	return 0;
09434ef7 BS	79	}
	80
	81	static int ade7753_spi_read_reg_16(struct device *dev,
	82	u8 reg_address,
	83	u16 *val)
	84	{
196b59c1	85	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	86	struct ade7753_state *st = iio_priv(indio_dev);
72db6eb6	87	ssize_t ret;
09434ef7	88
72db6eb6 JC	89	ret = spi_w8r16(st->us, ADE7753_READ_REG(reg_address));
72db6eb6 JC	90	if (ret < 0) {
09434ef7	91	dev_err(&st->us->dev, "problem when reading 16 bit register 0x%02X",
72db6eb6 JC	92	reg_address);
72db6eb6 JC	93	return ret;
09434ef7	94	}
09434ef7	95
72db6eb6 JC	96	*val = ret;
	97	*val = be16_to_cpup(val);
	98
	99	return 0;
09434ef7 BS	100	}
	101
	102	static int ade7753_spi_read_reg_24(struct device *dev,
	103	u8 reg_address,
	104	u32 *val)
	105	{
	106	struct spi_message msg;
196b59c1	107	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	108	struct ade7753_state *st = iio_priv(indio_dev);
09434ef7 BS	109	int ret;
	110	struct spi_transfer xfers[] = {
	111	{
	112	.tx_buf = st->tx,
09434ef7	113	.bits_per_word = 8,
72db6eb6 JC	114	.len = 1,
	115	}, {
	116	.rx_buf = st->tx,
	117	.bits_per_word = 8,
	118	.len = 3,
	119	}
09434ef7 BS	120	};
	121
	122	mutex_lock(&st->buf_lock);
	123	st->tx[0] = ADE7753_READ_REG(reg_address);
09434ef7 BS	124
09434ef7 BS	125	spi_message_init(&msg);
72db6eb6 JC	126	spi_message_add_tail(&xfers[0], &msg);
72db6eb6 JC	127	spi_message_add_tail(&xfers[1], &msg);
09434ef7 BS	128	ret = spi_sync(st->us, &msg);
	129	if (ret) {
	130	dev_err(&st->us->dev, "problem when reading 24 bit register 0x%02X",
	131	reg_address);
	132	goto error_ret;
	133	}
72db6eb6	134	*val = (st->rx[0] << 16) \| (st->rx[1] << 8) \| st->rx[2];
09434ef7 BS	135
	136	error_ret:
	137	mutex_unlock(&st->buf_lock);
	138	return ret;
	139	}
	140
	141	static ssize_t ade7753_read_8bit(struct device *dev,
	142	struct device_attribute *attr,
	143	char *buf)
	144	{
	145	int ret;
72db6eb6	146	u8 val;
09434ef7 BS	147	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	148
	149	ret = ade7753_spi_read_reg_8(dev, this_attr->address, &val);
	150	if (ret)
	151	return ret;
	152
	153	return sprintf(buf, "%u\n", val);
	154	}
	155
	156	static ssize_t ade7753_read_16bit(struct device *dev,
	157	struct device_attribute *attr,
	158	char *buf)
	159	{
	160	int ret;
72db6eb6	161	u16 val;
09434ef7 BS	162	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	163
	164	ret = ade7753_spi_read_reg_16(dev, this_attr->address, &val);
	165	if (ret)
	166	return ret;
	167
	168	return sprintf(buf, "%u\n", val);
	169	}
	170
	171	static ssize_t ade7753_read_24bit(struct device *dev,
	172	struct device_attribute *attr,
	173	char *buf)
	174	{
	175	int ret;
72db6eb6	176	u32 val;
09434ef7 BS	177	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	178
	179	ret = ade7753_spi_read_reg_24(dev, this_attr->address, &val);
	180	if (ret)
	181	return ret;
	182
72db6eb6	183	return sprintf(buf, "%u\n", val);
09434ef7 BS	184	}
	185
	186	static ssize_t ade7753_write_8bit(struct device *dev,
	187	struct device_attribute *attr,
	188	const char *buf,
	189	size_t len)
	190	{
	191	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	192	int ret;
	193	long val;
	194
	195	ret = strict_strtol(buf, 10, &val);
	196	if (ret)
	197	goto error_ret;
	198	ret = ade7753_spi_write_reg_8(dev, this_attr->address, val);
	199
	200	error_ret:
	201	return ret ? ret : len;
	202	}
	203
	204	static ssize_t ade7753_write_16bit(struct device *dev,
	205	struct device_attribute *attr,
	206	const char *buf,
	207	size_t len)
	208	{
	209	struct iio_dev_attr *this_attr = to_iio_dev_attr(attr);
	210	int ret;
	211	long val;
	212
	213	ret = strict_strtol(buf, 10, &val);
	214	if (ret)
	215	goto error_ret;
	216	ret = ade7753_spi_write_reg_16(dev, this_attr->address, val);
	217
	218	error_ret:
	219	return ret ? ret : len;
	220	}
	221
	222	static int ade7753_reset(struct device *dev)
	223	{
09434ef7	224	u16 val;
72db6eb6 JC	225
72db6eb6 JC	226	ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
09434ef7	227	val \|= 1 << 6; /* Software Chip Reset */
09434ef7	228
72db6eb6	229	return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
09434ef7 BS	230	}
	231
	232	static ssize_t ade7753_write_reset(struct device *dev,
	233	struct device_attribute *attr,
	234	const char *buf, size_t len)
	235	{
	236	if (len < 1)
	237	return -1;
	238	switch (buf[0]) {
	239	case '1':
	240	case 'y':
	241	case 'Y':
	242	return ade7753_reset(dev);
	243	}
	244	return -1;
	245	}
	246
	247	static IIO_DEV_ATTR_AENERGY(ade7753_read_24bit, ADE7753_AENERGY);
	248	static IIO_DEV_ATTR_LAENERGY(ade7753_read_24bit, ADE7753_LAENERGY);
	249	static IIO_DEV_ATTR_VAENERGY(ade7753_read_24bit, ADE7753_VAENERGY);
	250	static IIO_DEV_ATTR_LVAENERGY(ade7753_read_24bit, ADE7753_LVAENERGY);
	251	static IIO_DEV_ATTR_CFDEN(S_IWUSR \| S_IRUGO,
	252	ade7753_read_16bit,
	253	ade7753_write_16bit,
	254	ADE7753_CFDEN);
	255	static IIO_DEV_ATTR_CFNUM(S_IWUSR \| S_IRUGO,
	256	ade7753_read_8bit,
	257	ade7753_write_8bit,
	258	ADE7753_CFNUM);
	259	static IIO_DEV_ATTR_CHKSUM(ade7753_read_8bit, ADE7753_CHKSUM);
	260	static IIO_DEV_ATTR_PHCAL(S_IWUSR \| S_IRUGO,
	261	ade7753_read_16bit,
	262	ade7753_write_16bit,
	263	ADE7753_PHCAL);
	264	static IIO_DEV_ATTR_APOS(S_IWUSR \| S_IRUGO,
	265	ade7753_read_16bit,
	266	ade7753_write_16bit,
	267	ADE7753_APOS);
	268	static IIO_DEV_ATTR_SAGCYC(S_IWUSR \| S_IRUGO,
	269	ade7753_read_8bit,
	270	ade7753_write_8bit,
	271	ADE7753_SAGCYC);
	272	static IIO_DEV_ATTR_SAGLVL(S_IWUSR \| S_IRUGO,
	273	ade7753_read_8bit,
	274	ade7753_write_8bit,
	275	ADE7753_SAGLVL);
	276	static IIO_DEV_ATTR_LINECYC(S_IWUSR \| S_IRUGO,
	277	ade7753_read_8bit,
	278	ade7753_write_8bit,
	279	ADE7753_LINECYC);
	280	static IIO_DEV_ATTR_WDIV(S_IWUSR \| S_IRUGO,
	281	ade7753_read_8bit,
	282	ade7753_write_8bit,
	283	ADE7753_WDIV);
	284	static IIO_DEV_ATTR_IRMS(S_IWUSR \| S_IRUGO,
	285	ade7753_read_24bit,
	286	NULL,
	287	ADE7753_IRMS);
	288	static IIO_DEV_ATTR_VRMS(S_IRUGO,
	289	ade7753_read_24bit,
	290	NULL,
	291	ADE7753_VRMS);
	292	static IIO_DEV_ATTR_IRMSOS(S_IWUSR \| S_IRUGO,
	293	ade7753_read_16bit,
294	ade7753_write_16bit,
295	ADE7753_IRMSOS);
296	static IIO_DEV_ATTR_VRMSOS(S_IWUSR \| S_IRUGO,
297	ade7753_read_16bit,
298	ade7753_write_16bit,
299	ADE7753_VRMSOS);
300	static IIO_DEV_ATTR_WGAIN(S_IWUSR \| S_IRUGO,
301	ade7753_read_16bit,
302	ade7753_write_16bit,
303	ADE7753_WGAIN);
304	static IIO_DEV_ATTR_VAGAIN(S_IWUSR \| S_IRUGO,
305	ade7753_read_16bit,
306	ade7753_write_16bit,
307	ADE7753_VAGAIN);
308	static IIO_DEV_ATTR_PGA_GAIN(S_IWUSR \| S_IRUGO,
309	ade7753_read_16bit,
310	ade7753_write_16bit,
311	ADE7753_GAIN);
312	static IIO_DEV_ATTR_IPKLVL(S_IWUSR \| S_IRUGO,
313	ade7753_read_8bit,
314	ade7753_write_8bit,
315	ADE7753_IPKLVL);
316	static IIO_DEV_ATTR_VPKLVL(S_IWUSR \| S_IRUGO,
317	ade7753_read_8bit,
318	ade7753_write_8bit,
319	ADE7753_VPKLVL);
320	static IIO_DEV_ATTR_IPEAK(S_IRUGO,
321	ade7753_read_24bit,
322	NULL,
323	ADE7753_IPEAK);
324	static IIO_DEV_ATTR_VPEAK(S_IRUGO,
325	ade7753_read_24bit,
326	NULL,
327	ADE7753_VPEAK);
328	static IIO_DEV_ATTR_VPERIOD(S_IRUGO,
329	ade7753_read_16bit,
330	NULL,
331	ADE7753_PERIOD);
332	static IIO_DEV_ATTR_CH_OFF(1, S_IWUSR \| S_IRUGO,
333	ade7753_read_8bit,
334	ade7753_write_8bit,
335	ADE7753_CH1OS);
336	static IIO_DEV_ATTR_CH_OFF(2, S_IWUSR \| S_IRUGO,
337	ade7753_read_8bit,
338	ade7753_write_8bit,
339	ADE7753_CH2OS);
340
341	static int ade7753_set_irq(struct device *dev, bool enable)
342	{
343	int ret;
344	u8 irqen;
345	ret = ade7753_spi_read_reg_8(dev, ADE7753_IRQEN, &irqen);
346	if (ret)
347	goto error_ret;
348
349	if (enable)
350	irqen \|= 1 << 3; /* Enables an interrupt when a data is
351	present in the waveform register */
352	else
353	irqen &= ~(1 << 3);
354
355	ret = ade7753_spi_write_reg_8(dev, ADE7753_IRQEN, irqen);
09434ef7 BS	356
	357	error_ret:
	358	return ret;
	359	}
	360
	361	/* Power down the device */
72db6eb6	362	static int ade7753_stop_device(struct device *dev)
09434ef7	363	{
09434ef7	364	u16 val;
72db6eb6 JC	365
72db6eb6 JC	366	ade7753_spi_read_reg_16(dev, ADE7753_MODE, &val);
09434ef7	367	val \|= 1 << 4; /* AD converters can be turned off */
09434ef7	368
72db6eb6	369	return ade7753_spi_write_reg_16(dev, ADE7753_MODE, val);
09434ef7 BS	370	}
09434ef7 BS	371
bfccd4fb	372	static int ade7753_initial_setup(struct iio_dev *indio_dev)
09434ef7 BS	373	{
09434ef7 BS	374	int ret;
bfccd4fb JC	375	struct device *dev = &indio_dev->dev;
bfccd4fb JC	376	struct ade7753_state *st = iio_priv(indio_dev);
09434ef7 BS	377
	378	/* use low spi speed for init */
	379	st->us->mode = SPI_MODE_3;
	380	spi_setup(st->us);
	381
	382	/* Disable IRQ */
	383	ret = ade7753_set_irq(dev, false);
	384	if (ret) {
	385	dev_err(dev, "disable irq failed");
	386	goto err_ret;
	387	}
	388
	389	ade7753_reset(dev);
	390	msleep(ADE7753_STARTUP_DELAY);
	391
	392	err_ret:
	393	return ret;
	394	}
	395
	396	static ssize_t ade7753_read_frequency(struct device *dev,
	397	struct device_attribute *attr,
	398	char *buf)
	399	{
	400	int ret, len = 0;
e1703b32	401	u16 t;
09434ef7	402	int sps;
e1703b32	403	ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &t);
09434ef7 BS	404	if (ret)
	405	return ret;
	406
	407	t = (t >> 11) & 0x3;
	408	sps = 27900 / (1 + t);
	409
72db6eb6	410	len = sprintf(buf, "%d\n", sps);
09434ef7 BS	411	return len;
	412	}
	413
	414	static ssize_t ade7753_write_frequency(struct device *dev,
	415	struct device_attribute *attr,
	416	const char *buf,
	417	size_t len)
	418	{
196b59c1	419	struct iio_dev *indio_dev = dev_to_iio_dev(dev);
bfccd4fb	420	struct ade7753_state *st = iio_priv(indio_dev);
09434ef7 BS	421	unsigned long val;
	422	int ret;
	423	u16 reg, t;
	424
	425	ret = strict_strtol(buf, 10, &val);
	426	if (ret)
	427	return ret;
50d4b306 DC	428	if (val == 0)
50d4b306 DC	429	return -EINVAL;
09434ef7 BS	430
	431	mutex_lock(&indio_dev->mlock);
	432
	433	t = (27900 / val);
	434	if (t > 0)
	435	t--;
	436
	437	if (t > 1)
	438	st->us->max_speed_hz = ADE7753_SPI_SLOW;
	439	else
	440	st->us->max_speed_hz = ADE7753_SPI_FAST;
	441
72db6eb6	442	ret = ade7753_spi_read_reg_16(dev, ADE7753_MODE, &reg);
09434ef7 BS	443	if (ret)
	444	goto out;
	445
	446	reg &= ~(3 << 11);
	447	reg \|= t << 11;
	448
72db6eb6	449	ret = ade7753_spi_write_reg_16(dev, ADE7753_MODE, reg);
09434ef7 BS	450
	451	out:
	452	mutex_unlock(&indio_dev->mlock);
	453
	454	return ret ? ret : len;
	455	}
72db6eb6	456
09434ef7	457	static IIO_DEV_ATTR_TEMP_RAW(ade7753_read_8bit);
322c9563 JC	458	static IIO_CONST_ATTR(in_temp_offset, "-25 C");
322c9563 JC	459	static IIO_CONST_ATTR(in_temp_scale, "0.67 C");
09434ef7 BS	460
	461	static IIO_DEV_ATTR_SAMP_FREQ(S_IWUSR \| S_IRUGO,
	462	ade7753_read_frequency,
	463	ade7753_write_frequency);
	464
	465	static IIO_DEV_ATTR_RESET(ade7753_write_reset);
	466
	467	static IIO_CONST_ATTR_SAMP_FREQ_AVAIL("27900 14000 7000 3500");
	468
09434ef7	469	static struct attribute *ade7753_attributes[] = {
322c9563 JC	470	&iio_dev_attr_in_temp_raw.dev_attr.attr,
	471	&iio_const_attr_in_temp_offset.dev_attr.attr,
	472	&iio_const_attr_in_temp_scale.dev_attr.attr,
09434ef7 BS	473	&iio_dev_attr_sampling_frequency.dev_attr.attr,
	474	&iio_const_attr_sampling_frequency_available.dev_attr.attr,
	475	&iio_dev_attr_reset.dev_attr.attr,
09434ef7 BS	476	&iio_dev_attr_phcal.dev_attr.attr,
	477	&iio_dev_attr_cfden.dev_attr.attr,
	478	&iio_dev_attr_aenergy.dev_attr.attr,
	479	&iio_dev_attr_laenergy.dev_attr.attr,
	480	&iio_dev_attr_vaenergy.dev_attr.attr,
	481	&iio_dev_attr_lvaenergy.dev_attr.attr,
	482	&iio_dev_attr_cfnum.dev_attr.attr,
	483	&iio_dev_attr_apos.dev_attr.attr,
	484	&iio_dev_attr_sagcyc.dev_attr.attr,
	485	&iio_dev_attr_saglvl.dev_attr.attr,
	486	&iio_dev_attr_linecyc.dev_attr.attr,
	487	&iio_dev_attr_chksum.dev_attr.attr,
	488	&iio_dev_attr_pga_gain.dev_attr.attr,
	489	&iio_dev_attr_wgain.dev_attr.attr,
	490	&iio_dev_attr_choff_1.dev_attr.attr,
	491	&iio_dev_attr_choff_2.dev_attr.attr,
	492	&iio_dev_attr_wdiv.dev_attr.attr,
	493	&iio_dev_attr_irms.dev_attr.attr,
	494	&iio_dev_attr_vrms.dev_attr.attr,
	495	&iio_dev_attr_irmsos.dev_attr.attr,
	496	&iio_dev_attr_vrmsos.dev_attr.attr,
	497	&iio_dev_attr_vagain.dev_attr.attr,
	498	&iio_dev_attr_ipklvl.dev_attr.attr,
	499	&iio_dev_attr_vpklvl.dev_attr.attr,
	500	&iio_dev_attr_ipeak.dev_attr.attr,
	501	&iio_dev_attr_vpeak.dev_attr.attr,
	502	&iio_dev_attr_vperiod.dev_attr.attr,
	503	NULL,
	504	};
	505
	506	static const struct attribute_group ade7753_attribute_group = {
	507	.attrs = ade7753_attributes,
	508	};
	509
6fe8135f JC	510	static const struct iio_info ade7753_info = {
	511	.attrs = &ade7753_attribute_group,
	512	.driver_module = THIS_MODULE,
	513	};
	514
4ae1c61f	515	static int ade7753_probe(struct spi_device *spi)
09434ef7	516	{
26d25ae3	517	int ret;
bfccd4fb JC	518	struct ade7753_state *st;
	519	struct iio_dev *indio_dev;
	520
	521	/* setup the industrialio driver allocated elements */
7cbb7537	522	indio_dev = iio_device_alloc(sizeof(*st));
bfccd4fb JC	523	if (indio_dev == NULL) {
bfccd4fb JC	524	ret = -ENOMEM;
09434ef7 BS	525	goto error_ret;
	526	}
	527	/* this is only used for removal purposes */
bfccd4fb	528	spi_set_drvdata(spi, indio_dev);
09434ef7	529
bfccd4fb	530	st = iio_priv(indio_dev);
09434ef7 BS	531	st->us = spi;
09434ef7 BS	532	mutex_init(&st->buf_lock);
09434ef7	533
bfccd4fb JC	534	indio_dev->name = spi->dev.driver->name;
	535	indio_dev->dev.parent = &spi->dev;
	536	indio_dev->info = &ade7753_info;
	537	indio_dev->modes = INDIO_DIRECT_MODE;
09434ef7	538
26d25ae3 JC	539	/* Get the device into a sane initial state */
26d25ae3 JC	540	ret = ade7753_initial_setup(indio_dev);
09434ef7	541	if (ret)
72db6eb6	542	goto error_free_dev;
09434ef7	543
26d25ae3	544	ret = iio_device_register(indio_dev);
09434ef7	545	if (ret)
72db6eb6	546	goto error_free_dev;
26d25ae3	547
09434ef7 BS	548	return 0;
09434ef7 BS	549
09434ef7	550	error_free_dev:
7cbb7537	551	iio_device_free(indio_dev);
bfccd4fb	552
09434ef7 BS	553	error_ret:
	554	return ret;
	555	}
	556
	557	/* fixme, confirm ordering in this function */
8e828752	558	static int __devexit ade7753_remove(struct spi_device *spi)
09434ef7	559	{
bfccd4fb	560	struct iio_dev *indio_dev = spi_get_drvdata(spi);
09434ef7	561
d2fffd6c	562	iio_device_unregister(indio_dev);
d576c755	563	ade7753_stop_device(&indio_dev->dev);
7cbb7537	564	iio_device_free(indio_dev);
d576c755 LPC	565
d576c755 LPC	566	return 0;
09434ef7 BS	567	}
	568
	569	static struct spi_driver ade7753_driver = {
	570	.driver = {
	571	.name = "ade7753",
	572	.owner = THIS_MODULE,
	573	},
	574	.probe = ade7753_probe,
	575	.remove = __devexit_p(ade7753_remove),
	576	};
ae6ae6fe	577	module_spi_driver(ade7753_driver);
09434ef7 BS	578
09434ef7 BS	579	MODULE_AUTHOR("Barry Song <21cnbao@gmail.com>");
72db6eb6	580	MODULE_DESCRIPTION("Analog Devices ADE7753/6 Single-Phase Multifunction Meter");
09434ef7	581	MODULE_LICENSE("GPL v2");
55e4390c	582	MODULE_ALIAS("spi:ade7753");