staging: IIO: DAC: AD5446: Add power down support
[linux-2.6-block.git] / drivers / staging / iio / dac / ad5446.h
CommitLineData
b5a49481
MH
1/*
2 * AD5446 SPI DAC driver
3 *
4 * Copyright 2010 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2 or later.
7 */
d846263d
MH
8#ifndef IIO_DAC_AD5446_H_
9#define IIO_DAC_AD5446_H_
b5a49481
MH
10
11/* DAC Control Bits */
12
13#define AD5446_LOAD (0x0 << 14) /* Load and update */
14#define AD5446_SDO_DIS (0x1 << 14) /* Disable SDO */
15#define AD5446_NOP (0x2 << 14) /* No operation */
16#define AD5446_CLK_RISING (0x3 << 14) /* Clock data on rising edge */
17
d846263d
MH
18#define AD5620_LOAD (0x0 << 14) /* Load and update Norm Operation*/
19#define AD5620_PWRDWN_1k (0x1 << 14) /* Power-down: 1kOhm to GND */
20#define AD5620_PWRDWN_100k (0x2 << 14) /* Power-down: 100kOhm to GND */
21#define AD5620_PWRDWN_TRISTATE (0x3 << 14) /* Power-down: Three-state */
22
23#define AD5660_LOAD (0x0 << 16) /* Load and update Norm Operation*/
24#define AD5660_PWRDWN_1k (0x1 << 16) /* Power-down: 1kOhm to GND */
25#define AD5660_PWRDWN_100k (0x2 << 16) /* Power-down: 100kOhm to GND */
26#define AD5660_PWRDWN_TRISTATE (0x3 << 16) /* Power-down: Three-state */
27
b5a49481
MH
28#define RES_MASK(bits) ((1 << (bits)) - 1)
29
bbed4dc7
MH
30#define MODE_PWRDWN_1k 0x1
31#define MODE_PWRDWN_100k 0x2
32#define MODE_PWRDWN_TRISTATE 0x3
33
d846263d
MH
34/**
35 * struct ad5446_state - driver instance specific data
36 * @indio_dev: the industrial I/O device
37 * @spi: spi_device
38 * @chip_info: chip model specific constants, available modes etc
39 * @reg: supply regulator
40 * @poll_work: bottom half of polling interrupt handler
41 * @vref_mv: actual reference voltage used
42 * @xfer: default spi transfer
43 * @msg: default spi message
44 * @data: spi transmit buffer
45 */
b5a49481
MH
46
47struct ad5446_state {
48 struct iio_dev *indio_dev;
49 struct spi_device *spi;
50 const struct ad5446_chip_info *chip_info;
51 struct regulator *reg;
52 struct work_struct poll_work;
53 unsigned short vref_mv;
bbed4dc7
MH
54 unsigned cached_val;
55 unsigned pwr_down_mode;
56 unsigned pwr_down;
b5a49481
MH
57 struct spi_transfer xfer;
58 struct spi_message msg;
d846263d
MH
59 union {
60 unsigned short d16;
61 unsigned char d24[3];
62 } data;
63};
64
65/**
4f765482 66 * struct ad5446_chip_info - chip specific information
d846263d
MH
67 * @bits: accuracy of the DAC in bits
68 * @storagebits: number of bits written to the DAC
69 * @left_shift: number of bits the datum must be shifted
d846263d 70 * @int_vref_mv: AD5620/40/60: the internal reference voltage
4f765482 71 * @store_sample: chip specific helper function to store the datum
bbed4dc7 72 * @store_sample: chip specific helper function to store the powerpown cmd
d846263d
MH
73 */
74
75struct ad5446_chip_info {
bbed4dc7
MH
76 u8 bits;
77 u8 storagebits;
78 u8 left_shift;
79 u16 int_vref_mv;
80 void (*store_sample) (struct ad5446_state *st, unsigned val);
81 void (*store_pwr_down) (struct ad5446_state *st, unsigned mode);
b5a49481
MH
82};
83
d846263d
MH
84/**
85 * ad5446_supported_device_ids:
86 * The AD5620/40/60 parts are available in different fixed internal reference
87 * voltage options. The actual part numbers may look differently
88 * (and a bit cryptic), however this style is used to make clear which
89 * parts are supported here.
90 */
91
b5a49481
MH
92enum ad5446_supported_device_ids {
93 ID_AD5444,
94 ID_AD5446,
95 ID_AD5542A,
0772268a 96 ID_AD5543,
b5a49481 97 ID_AD5512A,
0772268a 98 ID_AD5553,
d846263d
MH
99 ID_AD5620_2500,
100 ID_AD5620_1250,
101 ID_AD5640_2500,
102 ID_AD5640_1250,
103 ID_AD5660_2500,
104 ID_AD5660_1250,
b5a49481
MH
105};
106
d846263d 107#endif /* IIO_DAC_AD5446_H_ */