staging:iio:ad7606: Let the common probe function return int
[linux-2.6-block.git] / drivers / staging / iio / adc / ad7606_core.c
CommitLineData
b9618c0c
MH
1/*
2 * AD7606 SPI ADC driver
3 *
4 * Copyright 2011 Analog Devices Inc.
5 *
6 * Licensed under the GPL-2.
7 */
8
9#include <linux/interrupt.h>
b9618c0c
MH
10#include <linux/device.h>
11#include <linux/kernel.h>
12#include <linux/slab.h>
13#include <linux/sysfs.h>
b9618c0c
MH
14#include <linux/regulator/consumer.h>
15#include <linux/err.h>
16#include <linux/gpio.h>
17#include <linux/delay.h>
18#include <linux/sched.h>
99c97852 19#include <linux/module.h>
b9618c0c 20
06458e27
JC
21#include <linux/iio/iio.h>
22#include <linux/iio/sysfs.h>
23#include <linux/iio/buffer.h>
b9618c0c
MH
24
25#include "ad7606.h"
26
27int ad7606_reset(struct ad7606_state *st)
28{
68b41aef 29 if (gpio_is_valid(st->pdata->gpio_reset)) {
b9618c0c
MH
30 gpio_set_value(st->pdata->gpio_reset, 1);
31 ndelay(100); /* t_reset >= 100ns */
32 gpio_set_value(st->pdata->gpio_reset, 0);
33 return 0;
34 }
35
36 return -ENODEV;
37}
38
91b7334b
LPC
39int ad7606_read_samples(struct ad7606_state *st)
40{
41 unsigned int num = st->chip_info->num_channels;
42 u16 *data = st->data;
43 int ret;
44
45 /*
46 * The frstdata signal is set to high while and after reading the sample
47 * of the first channel and low for all other channels. This can be used
48 * to check that the incoming data is correctly aligned. During normal
49 * operation the data should never become unaligned, but some glitch or
50 * electrostatic discharge might cause an extra read or clock cycle.
51 * Monitoring the frstdata signal allows to recover from such failure
52 * situations.
53 */
54
55 if (gpio_is_valid(st->pdata->gpio_frstdata)) {
56 ret = st->bops->read_block(st->dev, 1, data);
57 if (ret)
58 return ret;
59
60 if (!gpio_get_value(st->pdata->gpio_frstdata)) {
61 ad7606_reset(st);
62 return -EIO;
63 }
64
65 data++;
66 num--;
67 }
68
69 return st->bops->read_block(st->dev, num, data);
70}
71
51fadb98 72static int ad7606_scan_direct(struct iio_dev *indio_dev, unsigned int ch)
b9618c0c 73{
44039a67 74 struct ad7606_state *st = iio_priv(indio_dev);
b9618c0c
MH
75 int ret;
76
77 st->done = false;
78 gpio_set_value(st->pdata->gpio_convst, 1);
79
80 ret = wait_event_interruptible(st->wq_data_avail, st->done);
81 if (ret)
82 goto error_ret;
83
91b7334b
LPC
84 ret = ad7606_read_samples(st);
85 if (ret == 0)
86 ret = st->data[ch];
b9618c0c
MH
87
88error_ret:
89 gpio_set_value(st->pdata->gpio_convst, 0);
90
91 return ret;
92}
93
b9c44515 94static int ad7606_read_raw(struct iio_dev *indio_dev,
1caf7cb4
MH
95 struct iio_chan_spec const *chan,
96 int *val,
97 int *val2,
98 long m)
b9618c0c 99{
b9618c0c 100 int ret;
44039a67 101 struct ad7606_state *st = iio_priv(indio_dev);
1caf7cb4
MH
102
103 switch (m) {
b11f98ff 104 case IIO_CHAN_INFO_RAW:
ff5c37e3
AS
105 ret = iio_device_claim_direct_mode(indio_dev);
106 if (ret)
107 return ret;
108
109 ret = ad7606_scan_direct(indio_dev, chan->address);
110 iio_device_release_direct_mode(indio_dev);
1caf7cb4
MH
111
112 if (ret < 0)
113 return ret;
c30685c6 114 *val = (short)ret;
1caf7cb4 115 return IIO_VAL_INT;
c8a9f805 116 case IIO_CHAN_INFO_SCALE:
9324131b
LPC
117 *val = st->range * 2;
118 *val2 = st->chip_info->channels[0].scan_type.realbits;
119 return IIO_VAL_FRACTIONAL_LOG2;
4a5936da
ERR
120 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
121 *val = st->oversampling;
122 return IIO_VAL_INT;
1caf7cb4
MH
123 }
124 return -EINVAL;
b9618c0c
MH
125}
126
b9618c0c 127static ssize_t ad7606_show_range(struct device *dev,
e8ef49f0 128 struct device_attribute *attr, char *buf)
b9618c0c 129{
62c51839 130 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
44039a67 131 struct ad7606_state *st = iio_priv(indio_dev);
b9618c0c
MH
132
133 return sprintf(buf, "%u\n", st->range);
134}
135
136static ssize_t ad7606_store_range(struct device *dev,
e8ef49f0
IC
137 struct device_attribute *attr,
138 const char *buf, size_t count)
b9618c0c 139{
62c51839 140 struct iio_dev *indio_dev = dev_to_iio_dev(dev);
44039a67 141 struct ad7606_state *st = iio_priv(indio_dev);
b9618c0c 142 unsigned long lval;
f86f8362
AM
143 int ret;
144
145 ret = kstrtoul(buf, 10, &lval);
146 if (ret)
147 return ret;
b9618c0c 148
aa960266 149 if (!(lval == 5000 || lval == 10000))
b9618c0c 150 return -EINVAL;
aa960266 151
b9c44515 152 mutex_lock(&indio_dev->mlock);
b9618c0c
MH
153 gpio_set_value(st->pdata->gpio_range, lval == 10000);
154 st->range = lval;
b9c44515 155 mutex_unlock(&indio_dev->mlock);
b9618c0c
MH
156
157 return count;
158}
159
af14afd2 160static IIO_DEVICE_ATTR(in_voltage_range, S_IRUGO | S_IWUSR,
b9618c0c 161 ad7606_show_range, ad7606_store_range, 0);
cedd1a16 162static IIO_CONST_ATTR(in_voltage_range_available, "5000 10000");
b9618c0c 163
51fadb98 164static int ad7606_oversampling_get_index(unsigned int val)
b9618c0c 165{
e79e8027 166 unsigned char supported[] = {1, 2, 4, 8, 16, 32, 64};
b9618c0c
MH
167 int i;
168
169 for (i = 0; i < ARRAY_SIZE(supported); i++)
170 if (val == supported[i])
171 return i;
172
173 return -EINVAL;
174}
175
4a5936da
ERR
176static int ad7606_write_raw(struct iio_dev *indio_dev,
177 struct iio_chan_spec const *chan,
178 int val,
179 int val2,
180 long mask)
b9618c0c 181{
44039a67 182 struct ad7606_state *st = iio_priv(indio_dev);
b9618c0c
MH
183 int ret;
184
4a5936da
ERR
185 switch (mask) {
186 case IIO_CHAN_INFO_OVERSAMPLING_RATIO:
187 if (val2)
188 return -EINVAL;
189 ret = ad7606_oversampling_get_index(val);
aa960266 190 if (ret < 0)
4a5936da 191 return ret;
b9618c0c 192
4a5936da
ERR
193 mutex_lock(&indio_dev->mlock);
194 gpio_set_value(st->pdata->gpio_os0, (ret >> 0) & 1);
195 gpio_set_value(st->pdata->gpio_os1, (ret >> 1) & 1);
196 gpio_set_value(st->pdata->gpio_os2, (ret >> 2) & 1);
197 st->oversampling = val;
198 mutex_unlock(&indio_dev->mlock);
199 return 0;
200 default:
201 return -EINVAL;
b9618c0c 202 }
b9618c0c
MH
203}
204
e79e8027 205static IIO_CONST_ATTR(oversampling_ratio_available, "1 2 4 8 16 32 64");
b9618c0c 206
9214cc6e 207static struct attribute *ad7606_attributes_os_and_range[] = {
cedd1a16
JC
208 &iio_dev_attr_in_voltage_range.dev_attr.attr,
209 &iio_const_attr_in_voltage_range_available.dev_attr.attr,
b9618c0c
MH
210 &iio_const_attr_oversampling_ratio_available.dev_attr.attr,
211 NULL,
212};
213
9214cc6e
JC
214static const struct attribute_group ad7606_attribute_group_os_and_range = {
215 .attrs = ad7606_attributes_os_and_range,
216};
b9618c0c 217
9214cc6e 218static struct attribute *ad7606_attributes_os[] = {
9214cc6e
JC
219 &iio_const_attr_oversampling_ratio_available.dev_attr.attr,
220 NULL,
221};
b9618c0c 222
9214cc6e
JC
223static const struct attribute_group ad7606_attribute_group_os = {
224 .attrs = ad7606_attributes_os,
225};
226
227static struct attribute *ad7606_attributes_range[] = {
228 &iio_dev_attr_in_voltage_range.dev_attr.attr,
229 &iio_const_attr_in_voltage_range_available.dev_attr.attr,
230 NULL,
231};
232
233static const struct attribute_group ad7606_attribute_group_range = {
234 .attrs = ad7606_attributes_range,
b9618c0c
MH
235};
236
b11f98ff
JC
237#define AD7606_CHANNEL(num) \
238 { \
239 .type = IIO_VOLTAGE, \
240 .indexed = 1, \
241 .channel = num, \
242 .address = num, \
7593908f
JC
243 .info_mask_separate = BIT(IIO_CHAN_INFO_RAW), \
244 .info_mask_shared_by_type = BIT(IIO_CHAN_INFO_SCALE),\
4a5936da
ERR
245 .info_mask_shared_by_all = \
246 BIT(IIO_CHAN_INFO_OVERSAMPLING_RATIO), \
b11f98ff 247 .scan_index = num, \
5ae52859
JC
248 .scan_type = { \
249 .sign = 's', \
250 .realbits = 16, \
251 .storagebits = 16, \
252 .endianness = IIO_CPU, \
253 }, \
50ac23be
JC
254 }
255
c89e2e2a
LPC
256static const struct iio_chan_spec ad7606_channels[] = {
257 IIO_CHAN_SOFT_TIMESTAMP(8),
50ac23be
JC
258 AD7606_CHANNEL(0),
259 AD7606_CHANNEL(1),
260 AD7606_CHANNEL(2),
261 AD7606_CHANNEL(3),
262 AD7606_CHANNEL(4),
263 AD7606_CHANNEL(5),
264 AD7606_CHANNEL(6),
265 AD7606_CHANNEL(7),
1caf7cb4
MH
266};
267
b9618c0c
MH
268static const struct ad7606_chip_info ad7606_chip_info_tbl[] = {
269 /*
270 * More devices added in future
271 */
272 [ID_AD7606_8] = {
c89e2e2a
LPC
273 .channels = ad7606_channels,
274 .num_channels = 9,
b9618c0c
MH
275 },
276 [ID_AD7606_6] = {
c89e2e2a
LPC
277 .channels = ad7606_channels,
278 .num_channels = 7,
b9618c0c
MH
279 },
280 [ID_AD7606_4] = {
c89e2e2a
LPC
281 .channels = ad7606_channels,
282 .num_channels = 5,
b9618c0c
MH
283 },
284};
285
286static int ad7606_request_gpios(struct ad7606_state *st)
287{
288 struct gpio gpio_array[3] = {
289 [0] = {
290 .gpio = st->pdata->gpio_os0,
291 .flags = GPIOF_DIR_OUT | ((st->oversampling & 1) ?
292 GPIOF_INIT_HIGH : GPIOF_INIT_LOW),
293 .label = "AD7606_OS0",
294 },
295 [1] = {
296 .gpio = st->pdata->gpio_os1,
297 .flags = GPIOF_DIR_OUT | ((st->oversampling & 2) ?
298 GPIOF_INIT_HIGH : GPIOF_INIT_LOW),
299 .label = "AD7606_OS1",
300 },
301 [2] = {
302 .gpio = st->pdata->gpio_os2,
303 .flags = GPIOF_DIR_OUT | ((st->oversampling & 4) ?
304 GPIOF_INIT_HIGH : GPIOF_INIT_LOW),
305 .label = "AD7606_OS2",
306 },
307 };
308 int ret;
309
68b41aef
JC
310 if (gpio_is_valid(st->pdata->gpio_convst)) {
311 ret = gpio_request_one(st->pdata->gpio_convst,
312 GPIOF_OUT_INIT_LOW,
313 "AD7606_CONVST");
314 if (ret) {
315 dev_err(st->dev, "failed to request GPIO CONVST\n");
316 goto error_ret;
317 }
318 } else {
319 ret = -EIO;
320 goto error_ret;
b9618c0c
MH
321 }
322
68b41aef
JC
323 if (gpio_is_valid(st->pdata->gpio_os0) &&
324 gpio_is_valid(st->pdata->gpio_os1) &&
325 gpio_is_valid(st->pdata->gpio_os2)) {
326 ret = gpio_request_array(gpio_array, ARRAY_SIZE(gpio_array));
327 if (ret < 0)
328 goto error_free_convst;
329 }
b9618c0c 330
68b41aef
JC
331 if (gpio_is_valid(st->pdata->gpio_reset)) {
332 ret = gpio_request_one(st->pdata->gpio_reset,
333 GPIOF_OUT_INIT_LOW,
334 "AD7606_RESET");
335 if (ret < 0)
336 goto error_free_os;
337 }
b9618c0c 338
68b41aef
JC
339 if (gpio_is_valid(st->pdata->gpio_range)) {
340 ret = gpio_request_one(st->pdata->gpio_range, GPIOF_DIR_OUT |
341 ((st->range == 10000) ? GPIOF_INIT_HIGH :
342 GPIOF_INIT_LOW), "AD7606_RANGE");
343 if (ret < 0)
344 goto error_free_reset;
345 }
346 if (gpio_is_valid(st->pdata->gpio_stby)) {
347 ret = gpio_request_one(st->pdata->gpio_stby,
348 GPIOF_OUT_INIT_HIGH,
349 "AD7606_STBY");
350 if (ret < 0)
351 goto error_free_range;
352 }
b9618c0c
MH
353
354 if (gpio_is_valid(st->pdata->gpio_frstdata)) {
355 ret = gpio_request_one(st->pdata->gpio_frstdata, GPIOF_IN,
356 "AD7606_FRSTDATA");
68b41aef
JC
357 if (ret < 0)
358 goto error_free_stby;
b9618c0c
MH
359 }
360
361 return 0;
68b41aef
JC
362
363error_free_stby:
364 if (gpio_is_valid(st->pdata->gpio_stby))
365 gpio_free(st->pdata->gpio_stby);
366error_free_range:
367 if (gpio_is_valid(st->pdata->gpio_range))
368 gpio_free(st->pdata->gpio_range);
369error_free_reset:
370 if (gpio_is_valid(st->pdata->gpio_reset))
371 gpio_free(st->pdata->gpio_reset);
372error_free_os:
373 if (gpio_is_valid(st->pdata->gpio_os0) &&
374 gpio_is_valid(st->pdata->gpio_os1) &&
375 gpio_is_valid(st->pdata->gpio_os2))
376 gpio_free_array(gpio_array, ARRAY_SIZE(gpio_array));
377error_free_convst:
378 gpio_free(st->pdata->gpio_convst);
379error_ret:
380 return ret;
b9618c0c
MH
381}
382
383static void ad7606_free_gpios(struct ad7606_state *st)
384{
68b41aef
JC
385 if (gpio_is_valid(st->pdata->gpio_frstdata))
386 gpio_free(st->pdata->gpio_frstdata);
387 if (gpio_is_valid(st->pdata->gpio_stby))
b9618c0c 388 gpio_free(st->pdata->gpio_stby);
68b41aef
JC
389 if (gpio_is_valid(st->pdata->gpio_range))
390 gpio_free(st->pdata->gpio_range);
391 if (gpio_is_valid(st->pdata->gpio_reset))
392 gpio_free(st->pdata->gpio_reset);
393 if (gpio_is_valid(st->pdata->gpio_os0) &&
394 gpio_is_valid(st->pdata->gpio_os1) &&
395 gpio_is_valid(st->pdata->gpio_os2)) {
b9618c0c 396 gpio_free(st->pdata->gpio_os2);
68b41aef
JC
397 gpio_free(st->pdata->gpio_os1);
398 gpio_free(st->pdata->gpio_os0);
b9618c0c 399 }
b9618c0c
MH
400 gpio_free(st->pdata->gpio_convst);
401}
402
403/**
404 * Interrupt handler
405 */
406static irqreturn_t ad7606_interrupt(int irq, void *dev_id)
407{
e61181d0
MH
408 struct iio_dev *indio_dev = dev_id;
409 struct ad7606_state *st = iio_priv(indio_dev);
b9618c0c 410
14555b14 411 if (iio_buffer_enabled(indio_dev)) {
4fa33325 412 schedule_work(&st->poll_work);
b9618c0c
MH
413 } else {
414 st->done = true;
415 wake_up_interruptible(&st->wq_data_avail);
416 }
417
418 return IRQ_HANDLED;
419};
420
9214cc6e 421static const struct iio_info ad7606_info_no_os_or_range = {
6fe8135f
JC
422 .driver_module = THIS_MODULE,
423 .read_raw = &ad7606_read_raw,
9214cc6e
JC
424};
425
426static const struct iio_info ad7606_info_os_and_range = {
427 .driver_module = THIS_MODULE,
428 .read_raw = &ad7606_read_raw,
4a5936da 429 .write_raw = &ad7606_write_raw,
9214cc6e
JC
430 .attrs = &ad7606_attribute_group_os_and_range,
431};
432
433static const struct iio_info ad7606_info_os = {
434 .driver_module = THIS_MODULE,
435 .read_raw = &ad7606_read_raw,
4a5936da 436 .write_raw = &ad7606_write_raw,
9214cc6e
JC
437 .attrs = &ad7606_attribute_group_os,
438};
439
440static const struct iio_info ad7606_info_range = {
441 .driver_module = THIS_MODULE,
442 .read_raw = &ad7606_read_raw,
443 .attrs = &ad7606_attribute_group_range,
6fe8135f
JC
444};
445
71faca73
LPC
446int ad7606_probe(struct device *dev, int irq, void __iomem *base_address,
447 const char *name, unsigned int id,
448 const struct ad7606_bus_ops *bops)
b9618c0c
MH
449{
450 struct ad7606_platform_data *pdata = dev->platform_data;
451 struct ad7606_state *st;
26d25ae3 452 int ret;
3727245a 453 struct iio_dev *indio_dev;
b9618c0c 454
3727245a
SK
455 indio_dev = devm_iio_device_alloc(dev, sizeof(*st));
456 if (!indio_dev)
71faca73 457 return -ENOMEM;
b9618c0c 458
e61181d0
MH
459 st = iio_priv(indio_dev);
460
b9618c0c 461 st->dev = dev;
b9618c0c
MH
462 st->bops = bops;
463 st->base_address = base_address;
9f72520f 464 st->range = 5000;
e79e8027 465 st->oversampling = 1;
b9618c0c 466
3727245a 467 st->reg = devm_regulator_get(dev, "vcc");
b9618c0c
MH
468 if (!IS_ERR(st->reg)) {
469 ret = regulator_enable(st->reg);
470 if (ret)
71faca73 471 return ret;
b9618c0c
MH
472 }
473
474 st->pdata = pdata;
475 st->chip_info = &ad7606_chip_info_tbl[id];
476
e61181d0 477 indio_dev->dev.parent = dev;
9214cc6e
JC
478 if (gpio_is_valid(st->pdata->gpio_os0) &&
479 gpio_is_valid(st->pdata->gpio_os1) &&
480 gpio_is_valid(st->pdata->gpio_os2)) {
481 if (gpio_is_valid(st->pdata->gpio_range))
482 indio_dev->info = &ad7606_info_os_and_range;
483 else
484 indio_dev->info = &ad7606_info_os;
485 } else {
486 if (gpio_is_valid(st->pdata->gpio_range))
487 indio_dev->info = &ad7606_info_range;
488 else
489 indio_dev->info = &ad7606_info_no_os_or_range;
490 }
e61181d0 491 indio_dev->modes = INDIO_DIRECT_MODE;
063a51c5 492 indio_dev->name = name;
e61181d0
MH
493 indio_dev->channels = st->chip_info->channels;
494 indio_dev->num_channels = st->chip_info->num_channels;
b9618c0c
MH
495
496 init_waitqueue_head(&st->wq_data_avail);
497
498 ret = ad7606_request_gpios(st);
499 if (ret)
e61181d0 500 goto error_disable_reg;
b9618c0c
MH
501
502 ret = ad7606_reset(st);
503 if (ret)
504 dev_warn(st->dev, "failed to RESET: no RESET GPIO specified\n");
505
063a51c5
LPC
506 ret = request_irq(irq, ad7606_interrupt, IRQF_TRIGGER_FALLING, name,
507 indio_dev);
b9618c0c
MH
508 if (ret)
509 goto error_free_gpios;
510
e61181d0 511 ret = ad7606_register_ring_funcs_and_init(indio_dev);
b9618c0c
MH
512 if (ret)
513 goto error_free_irq;
514
26d25ae3
JC
515 ret = iio_device_register(indio_dev);
516 if (ret)
517 goto error_unregister_ring;
b9618c0c 518
382a4777
LPC
519 dev_set_drvdata(dev, indio_dev);
520
71faca73 521 return 0;
26d25ae3 522error_unregister_ring:
e61181d0 523 ad7606_ring_cleanup(indio_dev);
b9618c0c
MH
524
525error_free_irq:
8cbb36a0 526 free_irq(irq, indio_dev);
b9618c0c
MH
527
528error_free_gpios:
529 ad7606_free_gpios(st);
530
b9618c0c
MH
531error_disable_reg:
532 if (!IS_ERR(st->reg))
533 regulator_disable(st->reg);
71faca73 534 return ret;
b9618c0c 535}
0046a46a 536EXPORT_SYMBOL_GPL(ad7606_probe);
b9618c0c 537
8cbb36a0 538int ad7606_remove(struct iio_dev *indio_dev, int irq)
b9618c0c 539{
e61181d0
MH
540 struct ad7606_state *st = iio_priv(indio_dev);
541
d2fffd6c 542 iio_device_unregister(indio_dev);
b9618c0c 543 ad7606_ring_cleanup(indio_dev);
e61181d0 544
8cbb36a0 545 free_irq(irq, indio_dev);
3727245a 546 if (!IS_ERR(st->reg))
b9618c0c 547 regulator_disable(st->reg);
b9618c0c
MH
548
549 ad7606_free_gpios(st);
550
b9618c0c
MH
551 return 0;
552}
0046a46a 553EXPORT_SYMBOL_GPL(ad7606_remove);
b9618c0c 554
2c3a5236
LPC
555#ifdef CONFIG_PM_SLEEP
556
557static int ad7606_suspend(struct device *dev)
b9618c0c 558{
2c3a5236 559 struct iio_dev *indio_dev = dev_get_drvdata(dev);
e61181d0
MH
560 struct ad7606_state *st = iio_priv(indio_dev);
561
68b41aef
JC
562 if (gpio_is_valid(st->pdata->gpio_stby)) {
563 if (gpio_is_valid(st->pdata->gpio_range))
b9618c0c
MH
564 gpio_set_value(st->pdata->gpio_range, 1);
565 gpio_set_value(st->pdata->gpio_stby, 0);
566 }
2c3a5236
LPC
567
568 return 0;
b9618c0c
MH
569}
570
2c3a5236 571static int ad7606_resume(struct device *dev)
b9618c0c 572{
2c3a5236 573 struct iio_dev *indio_dev = dev_get_drvdata(dev);
e61181d0
MH
574 struct ad7606_state *st = iio_priv(indio_dev);
575
68b41aef
JC
576 if (gpio_is_valid(st->pdata->gpio_stby)) {
577 if (gpio_is_valid(st->pdata->gpio_range))
b9618c0c 578 gpio_set_value(st->pdata->gpio_range,
e8ef49f0 579 st->range == 10000);
b9618c0c
MH
580
581 gpio_set_value(st->pdata->gpio_stby, 1);
582 ad7606_reset(st);
583 }
2c3a5236
LPC
584
585 return 0;
b9618c0c 586}
2c3a5236
LPC
587
588SIMPLE_DEV_PM_OPS(ad7606_pm_ops, ad7606_suspend, ad7606_resume);
589EXPORT_SYMBOL_GPL(ad7606_pm_ops);
590
591#endif
b9618c0c
MH
592
593MODULE_AUTHOR("Michael Hennerich <hennerich@blackfin.uclinux.org>");
594MODULE_DESCRIPTION("Analog Devices AD7606 ADC");
595MODULE_LICENSE("GPL v2");