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203e2de3 | 1 | // SPDX-License-Identifier: GPL-2.0 |
3a288fd5 GR |
2 | /* |
3 | * Freescale Management Complex (MC) bus driver MSI support | |
4 | * | |
6466dac7 | 5 | * Copyright (C) 2015-2016 Freescale Semiconductor, Inc. |
3a288fd5 GR |
6 | * Author: German Rivera <German.Rivera@freescale.com> |
7 | * | |
3a288fd5 GR |
8 | */ |
9 | ||
3a288fd5 GR |
10 | #include <linux/of_device.h> |
11 | #include <linux/of_address.h> | |
3a288fd5 GR |
12 | #include <linux/irq.h> |
13 | #include <linux/msi.h> | |
14 | #include <linux/of.h> | |
15 | #include <linux/of_irq.h> | |
1df5d23d | 16 | #include "../include/mc.h" |
3a288fd5 GR |
17 | |
18 | static struct irq_chip its_msi_irq_chip = { | |
d64c28a3 | 19 | .name = "ITS-fMSI", |
3a288fd5 GR |
20 | .irq_mask = irq_chip_mask_parent, |
21 | .irq_unmask = irq_chip_unmask_parent, | |
22 | .irq_eoi = irq_chip_eoi_parent, | |
23 | .irq_set_affinity = msi_domain_set_affinity | |
24 | }; | |
25 | ||
26 | static int its_fsl_mc_msi_prepare(struct irq_domain *msi_domain, | |
27 | struct device *dev, | |
28 | int nvec, msi_alloc_info_t *info) | |
29 | { | |
30 | struct fsl_mc_device *mc_bus_dev; | |
31 | struct msi_domain_info *msi_info; | |
32 | ||
a385dd7b | 33 | if (!dev_is_fsl_mc(dev)) |
3a288fd5 GR |
34 | return -EINVAL; |
35 | ||
36 | mc_bus_dev = to_fsl_mc_device(dev); | |
a385dd7b | 37 | if (!(mc_bus_dev->flags & FSL_MC_IS_DPRC)) |
3a288fd5 GR |
38 | return -EINVAL; |
39 | ||
40 | /* | |
41 | * Set the device Id to be passed to the GIC-ITS: | |
42 | * | |
43 | * NOTE: This device id corresponds to the IOMMU stream ID | |
44 | * associated with the DPRC object (ICID). | |
45 | */ | |
507deb25 | 46 | #ifdef GENERIC_MSI_DOMAIN_OPS |
3a288fd5 | 47 | info->scratchpad[0].ul = mc_bus_dev->icid; |
507deb25 | 48 | #endif |
3a288fd5 GR |
49 | msi_info = msi_get_domain_info(msi_domain->parent); |
50 | return msi_info->ops->msi_prepare(msi_domain->parent, dev, nvec, info); | |
51 | } | |
52 | ||
76b94eb1 | 53 | static struct msi_domain_ops its_fsl_mc_msi_ops __ro_after_init = { |
3a288fd5 GR |
54 | .msi_prepare = its_fsl_mc_msi_prepare, |
55 | }; | |
56 | ||
57 | static struct msi_domain_info its_fsl_mc_msi_domain_info = { | |
58 | .flags = (MSI_FLAG_USE_DEF_DOM_OPS | MSI_FLAG_USE_DEF_CHIP_OPS), | |
59 | .ops = &its_fsl_mc_msi_ops, | |
60 | .chip = &its_msi_irq_chip, | |
61 | }; | |
62 | ||
63 | static const struct of_device_id its_device_id[] = { | |
64 | { .compatible = "arm,gic-v3-its", }, | |
65 | {}, | |
66 | }; | |
67 | ||
a535929f | 68 | static int __init its_fsl_mc_msi_init(void) |
3a288fd5 GR |
69 | { |
70 | struct device_node *np; | |
71 | struct irq_domain *parent; | |
72 | struct irq_domain *mc_msi_domain; | |
73 | ||
74 | for (np = of_find_matching_node(NULL, its_device_id); np; | |
75 | np = of_find_matching_node(np, its_device_id)) { | |
95a25625 SB |
76 | if (!of_device_is_available(np)) |
77 | continue; | |
3a288fd5 GR |
78 | if (!of_property_read_bool(np, "msi-controller")) |
79 | continue; | |
80 | ||
81 | parent = irq_find_matching_host(np, DOMAIN_BUS_NEXUS); | |
82 | if (!parent || !msi_get_domain_info(parent)) { | |
3c18c44d | 83 | pr_err("%pOF: unable to locate ITS domain\n", np); |
3a288fd5 GR |
84 | continue; |
85 | } | |
86 | ||
87 | mc_msi_domain = fsl_mc_msi_create_irq_domain( | |
88 | of_node_to_fwnode(np), | |
89 | &its_fsl_mc_msi_domain_info, | |
90 | parent); | |
91 | if (!mc_msi_domain) { | |
3c18c44d | 92 | pr_err("%pOF: unable to create fsl-mc domain\n", np); |
3a288fd5 GR |
93 | continue; |
94 | } | |
95 | ||
3c18c44d | 96 | pr_info("fsl-mc MSI: %pOF domain created\n", np); |
3a288fd5 GR |
97 | } |
98 | ||
99 | return 0; | |
100 | } | |
1d11d556 IR |
101 | |
102 | early_initcall(its_fsl_mc_msi_init); |