Merge branch 'for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/mason/linux...
[linux-2.6-block.git] / drivers / staging / csr / csr_wifi_hip_chiphelper_private.h
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1/*****************************************************************************
2
3 (c) Cambridge Silicon Radio Limited 2011
4 All rights reserved and confidential information of CSR
5
6 Refer to LICENSE.txt included with this source for details
7 on the license terms.
8
9*****************************************************************************/
10
11#ifndef CSR_WIFI_HIP_CHIPHELPER_PRIVATE_H__
12#define CSR_WIFI_HIP_CHIPHELPER_PRIVATE_H__
13
14
15#include "csr_wifi_hip_chiphelper.h"
16
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17/* This GP stuff should be somewhere else? */
18
19/* Memory spaces encoded in top byte of Generic Pointer type */
20#define UNIFI_SH_DMEM 0x01 /* Shared Data Memory */
21#define UNIFI_EXT_FLASH 0x02 /* External FLASH */
22#define UNIFI_EXT_SRAM 0x03 /* External SRAM */
23#define UNIFI_REGISTERS 0x04 /* Registers */
24#define UNIFI_PHY_DMEM 0x10 /* PHY Data Memory */
25#define UNIFI_PHY_PMEM 0x11 /* PHY Program Memory */
26#define UNIFI_PHY_ROM 0x12 /* PHY ROM */
27#define UNIFI_MAC_DMEM 0x20 /* MAC Data Memory */
28#define UNIFI_MAC_PMEM 0x21 /* MAC Program Memory */
29#define UNIFI_MAC_ROM 0x22 /* MAC ROM */
30#define UNIFI_BT_DMEM 0x30 /* BT Data Memory */
31#define UNIFI_BT_PMEM 0x31 /* BT Program Memory */
32#define UNIFI_BT_ROM 0x32 /* BT ROM */
33
34#define MAKE_GP(R, O) (((UNIFI_ ## R) << 24) | (O))
35#define GP_OFFSET(GP) ((GP) & 0xFFFFFF)
36#define GP_SPACE(GP) (((GP) >> 24) & 0xFF)
37
38
39/* Address value pairs */
40struct val_array_t
41{
26a6b2e1 42 u32 len;
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43 const struct chip_helper_init_values *vals;
44};
45
8c87f69a 46/* Just a (counted) u16 array */
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47struct data_array_t
48{
26a6b2e1 49 u32 len;
8c87f69a 50 const u16 *vals;
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51};
52
53struct reset_prog_t
54{
26a6b2e1 55 u32 len;
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56 const struct chip_helper_reset_values *vals;
57};
58
59/* The addresses of registers that are equivalent but on
60 different host transports. */
61struct chip_map_address_t
62{
8c87f69a 63 u16 spi, host;
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64};
65
66struct map_array_t
67{
26a6b2e1 68 u32 len;
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69 const struct chip_map_address_t *vals;
70};
71
72struct chip_device_regs_per_transport_t
73{
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74 u16 dbg_proc_select;
75 u16 dbg_stop_status;
76 u16 window1_page; /* PROG_PMEM1 or GW1 */
77 u16 window2_page; /* PROG_PMEM2 or GW2 */
78 u16 window3_page; /* SHARED or GW3 */
79 u16 io_log_addr;
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80};
81
82struct chip_device_regs_t
83{
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84 u16 gbl_chip_version;
85 u16 gbl_misc_enables;
86 u16 dbg_emu_cmd;
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87 struct chip_device_regs_per_transport_t host;
88 struct chip_device_regs_per_transport_t spi;
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89 u16 dbg_reset;
90 u16 dbg_reset_value;
91 u16 dbg_reset_warn;
92 u16 dbg_reset_warn_value;
93 u16 dbg_reset_result;
94 u16 xap_pch;
95 u16 xap_pcl;
96 u16 proc_pc_snoop;
97 u16 watchdog_disable;
98 u16 mailbox0;
99 u16 mailbox1;
100 u16 mailbox2;
101 u16 mailbox3;
102 u16 sdio_host_int;
103 u16 shared_io_interrupt;
104 u16 sdio_hip_handshake;
105 u16 coex_status; /* Allows WAPI detection */
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106};
107
108/* If allowed is false then this window does not provide this
109 type of access.
110 This describes how addresses should be shifted to make the
111 "page" address. The address is shifted left by 'page_shift'
112 and then has 'page_offset' added. This value should then be
113 written to the page register. */
114struct window_shift_info_t
115{
95e326c2 116 s32 allowed;
26a6b2e1 117 u32 page_shift;
8c87f69a 118 u16 page_offset;
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119};
120
121/* Each window has an address and size. These are obvious. It then
122 has a description for each type of memory that might be accessed
123 through it. There might also be a start to the offset of the window.
124 This means that that number of addresses at the start of the window
125 are unusable. */
126struct window_info_t
127{
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128 u16 address;
129 u16 size;
130 u16 blocked;
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131 const struct window_shift_info_t *mode;
132};
133
134/* If GBL_CHIP_VERSION and'ed with 'mask' and is equal to 'result'
135 then this is the correct set of info. If pre_bc7 is true then the
136 address of GBL_CHIP_VERSION is FF9A, else its FE81. */
137struct chip_version_t
138{
95e326c2 139 s32 pre_bc7;
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140 u16 mask;
141 u16 result;
7e6f5794 142 u8 sdio;
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143};
144
145struct chip_device_desc_t
146{
147 struct chip_version_t chip_version;
148
149 /* This is a text string that a human might find useful (BC02, UF105x) */
c781b96b 150 const char *friendly_name;
635d2b00 151 /* This is what we show to customers */
c781b96b 152 const char *marketing_name;
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153
154 /* Initialisation values to write following a reset */
155 struct val_array_t init;
156
157 /* Binary sequence for hard reset */
158 struct reset_prog_t reset_prog;
159
160 /* The register map */
161 const struct chip_device_regs_t *regs;
162
163 /* Some misc. info on the chip */
164 struct
165 {
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166 u32 has_flash : 1;
167 u32 has_ext_sram : 1;
168 u32 has_rom : 1;
169 u32 has_bt : 1;
170 u32 has_wlan : 1;
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171 } bools;
172
173 /* This table is used to remap register addresses depending on what
174 host interface is used. On the BC7 and later chips there are
175 multiple sets of memory window registers, on for each host
176 interafce (SDIO / SPI). The correct one is needed. */
177 struct map_array_t map;
178
179 /* The offsets into the program address space of the different types of memory.
180 The RAM offset is probably the most useful. */
181 struct
182 {
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183 u32 ram;
184 u32 rom;
185 u32 flash;
186 u32 ext_sram;
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187 } prog_offset;
188
189 /* The offsets into the data address space of interesting things. */
190 struct
191 {
8c87f69a 192 u16 ram;
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193 /* maybe add shared / page tables? */
194 } data_offset;
195
196 /* Information on the different windows */
197 const struct window_info_t *windows[CHIP_HELPER_WINDOW_COUNT];
198};
199
635d2b00 200#endif /* CSR_WIFI_HIP_CHIPHELPER_PRIVATE_H__ */