Merge branch 'timers-urgent-for-linus' of git://git.kernel.org/pub/scm/linux/kernel...
[linux-2.6-block.git] / drivers / staging / csr / csr_wifi_hip_card_sdio.h
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1/*****************************************************************************
2
3 (c) Cambridge Silicon Radio Limited 2011
4 All rights reserved and confidential information of CSR
5
6 Refer to LICENSE.txt included with this source for details
7 on the license terms.
8
9*****************************************************************************/
10
11/*
12 * ---------------------------------------------------------------------------
13 *
14 * FILE: csr_wifi_hip_card_sdio.h
15 *
16 * PURPOSE:
17 * Internal header for Card API for SDIO.
18 * ---------------------------------------------------------------------------
19 */
20#ifndef __CARD_SDIO_H__
21#define __CARD_SDIO_H__
22
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23#include "csr_wifi_hip_unifi.h"
24#include "csr_wifi_hip_unifi_udi.h"
25#include "csr_wifi_hip_unifihw.h"
26#include "csr_wifi_hip_unifiversion.h"
27#ifndef CSR_WIFI_HIP_TA_DISABLE
28#include "csr_wifi_hip_ta_sampling.h"
29#endif
30#include "csr_wifi_hip_xbv.h"
31#include "csr_wifi_hip_chiphelper.h"
32
33
34/*
35 *
36 * Configuration items.
37 * Which of these should go in a platform unifi_config.h file?
38 *
39 */
40
41/*
42 * When the traffic queues contain more signals than there is space for on
43 * UniFi, a limiting algorithm comes into play.
44 * If a traffic queue has enough slots free to buffer more traffic from the
45 * network stack, then the following check is applied. The number of free
46 * slots is RESUME_XMIT_THRESHOLD.
47 */
48#define RESUME_XMIT_THRESHOLD 4
49
50
51/*
52 * When reading signals from UniFi, the host processes pending all signals
53 * and then acknowledges them together in a single write to update the
54 * to-host-chunks-read location.
55 * When there is more than one bulk data transfer (e.g. one received data
56 * packet and a request for the payload data of a transmitted packet), the
57 * update can be delayed significantly. This ties up resources on chip.
58 *
59 * To remedy this problem, to-host-chunks-read is updated after processing
60 * a signal if TO_HOST_FLUSH_THRESHOLD bytes of bulk data have been
61 * transferred since the last update.
62 */
63#define TO_HOST_FLUSH_THRESHOLD (500 * 5)
64
65
66/* SDIO Card Common Control Registers */
67#define SDIO_CCCR_SDIO_REVISION (0x00)
68#define SDIO_SD_SPEC_REVISION (0x01)
69#define SDIO_IO_ENABLE (0x02)
70#define SDIO_IO_READY (0x03)
71#define SDIO_INT_ENABLE (0x04)
72#define SDIO_INT_PENDING (0x05)
73#define SDIO_IO_ABORT (0x06)
74#define SDIO_BUS_IFACE_CONTROL (0x07)
75#define SDIO_CARD_CAPABILOTY (0x08)
76#define SDIO_COMMON_CIS_POINTER (0x09)
77#define SDIO_BUS_SUSPEND (0x0C)
78#define SDIO_FUNCTION_SELECT (0x0D)
79#define SDIO_EXEC_FLAGS (0x0E)
80#define SDIO_READY_FLAGS (0x0F)
81#define SDIO_FN0_BLOCK_SIZE (0x10)
82#define SDIO_POWER_CONTROL (0x12)
83#define SDIO_VENDOR_START (0xF0)
84
85#define SDIO_CSR_HOST_WAKEUP (0xf0)
86#define SDIO_CSR_HOST_INT_CLEAR (0xf1)
87#define SDIO_CSR_FROM_HOST_SCRATCH0 (0xf2)
88#define SDIO_CSR_FROM_HOST_SCRATCH1 (0xf3)
89#define SDIO_CSR_TO_HOST_SCRATCH0 (0xf4)
90#define SDIO_CSR_TO_HOST_SCRATCH1 (0xf5)
91#define SDIO_CSR_FUNC_EN (0xf6)
92#define SDIO_CSR_CSPI_MODE (0xf7)
93#define SDIO_CSR_CSPI_STATUS (0xf8)
94#define SDIO_CSR_CSPI_PADDING (0xf9)
95
96
97#define UNIFI_SD_INT_ENABLE_IENM 0x0001 /* Master INT Enable */
98
99#ifdef CSR_PRE_ALLOC_NET_DATA
100#define BULK_DATA_PRE_ALLOC_NUM 16
101#endif
102
103/*
104 * Structure to hold configuration information read from UniFi.
105 */
106typedef struct
107{
108 /*
109 * The version of the SDIO signal queues and bulk data pools
110 * configuration structure. The MSB is the major version number, used to
111 * indicate incompatible changes. The LSB gives the minor revision number,
112 * used to indicate changes that maintain backwards compatibility.
113 */
8c87f69a 114 u16 version;
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115
116 /*
117 * offset from the start of the shared data memory to the SD IO
118 * control structure.
119 */
8c87f69a 120 u16 sdio_ctrl_offset;
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121
122 /* Buffer handle of the from-host signal queue */
8c87f69a 123 u16 fromhost_sigbuf_handle;
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124
125 /* Buffer handle of the to-host signal queue */
8c87f69a 126 u16 tohost_sigbuf_handle;
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127
128 /*
129 * Maximum number of signal primitive or bulk data command fragments that may be
130 * pending in the to-hw signal queue.
131 */
8c87f69a 132 u16 num_fromhost_sig_frags;
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133
134 /*
135 * Number of signal primitive or bulk data command fragments that must be pending
136 * in the to-host signal queue before the host will generate an interrupt
137 * to indicate that it has read a signal. This will usually be the total
138 * capacity of the to-host signal buffer less the size of the largest signal
139 * primitive divided by the signal primitive fragment size, but may be set
140 * to 1 to request interrupts every time that the host read a signal.
141 * Note that the hw may place more signals in the to-host signal queue
142 * than indicated by this field.
143 */
8c87f69a 144 u16 num_tohost_sig_frags;
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145
146 /*
147 * Number of to-hw bulk data slots. Slots are numbered from 0 (zero) to
148 * one less than the value in this field
149 */
8c87f69a 150 u16 num_fromhost_data_slots;
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151
152 /*
153 * Number of frm-hw bulk data slots. Slots are numbered from 0 (zero) to
154 * one less than the value in this field
155 */
8c87f69a 156 u16 num_tohost_data_slots;
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157
158 /*
159 * Size of the bulk data slots (2 octets)
160 * The size of the bulk data slots in octets. This will usually be
161 * the size of the largest MSDU. The value should always be even.
162 */
8c87f69a 163 u16 data_slot_size;
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164
165 /*
166 * Indicates that the host has finished the initialisation sequence.
167 * Initialised to 0x0000 by the firmware, and set to 0x0001 by us.
168 */
8c87f69a 169 u16 initialised;
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170
171 /* Added by protocol version 0x0001 */
26a6b2e1 172 u32 overlay_size;
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173
174 /* Added by protocol version 0x0300 */
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175 u16 data_slot_round;
176 u16 sig_frag_size;
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177
178 /* Added by protocol version 0x0500 */
8c87f69a 179 u16 tohost_signal_padding;
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180} sdio_config_data_t;
181
182/*
183 * These values may change with versions of the Host Interface Protocol.
184 */
185/*
186 * Size of config info block pointed to by the CSR_SLT_SDIO_SLOT_CONFIG
187 * entry in the f/w symbol table
188 */
189#define SDIO_CONFIG_DATA_SIZE 30
190
191/* Offset of the INIT flag in the config info block. */
192#define SDIO_INIT_FLAG_OFFSET 0x12
193#define SDIO_TO_HOST_SIG_PADDING_OFFSET 0x1C
194
195
196/* Structure for a bulk data transfer command */
197typedef struct
198{
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199 u16 cmd_and_len; /* bits 12-15 cmd, bits 0-11 len */
200 u16 data_slot; /* slot number, perhaps OR'd with SLOT_DIR_TO_HOST */
201 u16 offset;
202 u16 buffer_handle;
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203} bulk_data_cmd_t;
204
205
206/* Bulk Data signal command values */
207#define SDIO_CMD_SIGNAL 0x00
208#define SDIO_CMD_TO_HOST_TRANSFER 0x01
209#define SDIO_CMD_TO_HOST_TRANSFER_ACK 0x02 /*deprecated*/
210#define SDIO_CMD_FROM_HOST_TRANSFER 0x03
211#define SDIO_CMD_FROM_HOST_TRANSFER_ACK 0x04 /*deprecated*/
212#define SDIO_CMD_CLEAR_SLOT 0x05
213#define SDIO_CMD_OVERLAY_TRANSFER 0x06
214#define SDIO_CMD_OVERLAY_TRANSFER_ACK 0x07 /*deprecated*/
215#define SDIO_CMD_FROM_HOST_AND_CLEAR 0x08
216#define SDIO_CMD_PADDING 0x0f
217
218#define SLOT_DIR_TO_HOST 0x8000
219
220
221/* Initialise bulkdata slot
222 * params:
223 * bulk_data_desc_t *bulk_data_slot
224 */
225#define UNIFI_INIT_BULK_DATA(bulk_data_slot) \
226 { \
227 (bulk_data_slot)->os_data_ptr = NULL; \
228 (bulk_data_slot)->data_length = 0; \
229 (bulk_data_slot)->os_net_buf_ptr = NULL; \
230 (bulk_data_slot)->net_buf_length = 0; \
231 }
232
233/*
234 * Structure to contain a SIGNAL datagram.
235 * This is used to build signal queues between the main driver and the
236 * i/o thread.
237 * The fields are:
238 * sigbuf Contains the HIP signal is wire-format (i.e. packed,
239 * little-endian)
240 * bulkdata Contains a copy of any associated bulk data
241 * signal_length The size of the signal in the sigbuf
242 */
243typedef struct card_signal
244{
7e6f5794 245 u8 sigbuf[UNIFI_PACKED_SIGBUF_SIZE];
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246
247 /* Length of the SIGNAL inside sigbuf */
8c87f69a 248 u16 signal_length;
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249
250 bulk_data_desc_t bulkdata[UNIFI_MAX_DATA_REFERENCES];
251} card_signal_t;
252
253
254/*
255 * Control structure for a generic ring buffer.
256 */
257#define UNIFI_QUEUE_NAME_MAX_LENGTH 16
258typedef struct
259{
260 card_signal_t *q_body;
261
262 /* Num elements in queue (capacity is one less than this!) */
8c87f69a 263 u16 q_length;
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265 u16 q_wr_ptr;
266 u16 q_rd_ptr;
635d2b00 267
c781b96b 268 char name[UNIFI_QUEUE_NAME_MAX_LENGTH];
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269} q_t;
270
271
272#define UNIFI_RESERVED_COMMAND_SLOTS 2
273
274/* Considering approx 500 us per packet giving 0.5 secs */
275#define UNIFI_PACKETS_INTERVAL 1000
276
277/*
278 * Dynamic slot reservation for QoS
279 */
280typedef struct
281{
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282 u16 from_host_used_slots[UNIFI_NO_OF_TX_QS];
283 u16 from_host_max_slots[UNIFI_NO_OF_TX_QS];
284 u16 from_host_reserved_slots[UNIFI_NO_OF_TX_QS];
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285
286 /* Parameters to determine if a queue was active.
287 If number of packets sent is greater than the threshold
288 for the queue, the queue is considered active and no
289 re reservation is done, it is important not to keep this
290 value too low */
291 /* Packets sent during this interval */
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292 u16 packets_txed[UNIFI_NO_OF_TX_QS];
293 u16 total_packets_txed;
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294
295 /* Number of packets to see if slots need to be reassigned */
8c87f69a 296 u16 packets_interval;
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297
298 /* Once a queue reaches a stable state, avoid processing */
5379b13d 299 u8 queue_stable[UNIFI_NO_OF_TX_QS];
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300} card_dynamic_slot_t;
301
302
303/* These are type-safe and don't write incorrect values to the
304 * structure. */
305
306/* Return queue slots used count
307 * params:
308 * const q_t *q
309 * returns:
8c87f69a 310 * u16
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311 */
312#define CSR_WIFI_HIP_Q_SLOTS_USED(q) \
313 (((q)->q_wr_ptr - (q)->q_rd_ptr < 0)? \
314 ((q)->q_wr_ptr - (q)->q_rd_ptr + (q)->q_length) : ((q)->q_wr_ptr - (q)->q_rd_ptr))
315
316/* Return queue slots free count
317 * params:
318 * const q_t *q
319 * returns:
8c87f69a 320 * u16
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321 */
322#define CSR_WIFI_HIP_Q_SLOTS_FREE(q) \
323 ((q)->q_length - CSR_WIFI_HIP_Q_SLOTS_USED((q)) - 1)
324
325/* Return slot signal data pointer
326 * params:
327 * const q_t *q
8c87f69a 328 * u16 slot
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329 * returns:
330 * card_signal_t *
331 */
332#define CSR_WIFI_HIP_Q_SLOT_DATA(q, slot) \
333 ((q)->q_body + slot)
334
335/* Return queue next read slot
336 * params:
337 * const q_t *q
338 * returns:
8c87f69a 339 * u16 slot offset
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340 */
341#define CSR_WIFI_HIP_Q_NEXT_R_SLOT(q) \
342 ((q)->q_rd_ptr)
343
344/* Return queue next write slot
345 * params:
346 * const q_t *q
347 * returns:
8c87f69a 348 * u16 slot offset
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349 */
350#define CSR_WIFI_HIP_Q_NEXT_W_SLOT(q) \
351 ((q)->q_wr_ptr)
352
353/* Return updated queue pointer wrapped around its length
354 * params:
355 * const q_t *q
8c87f69a 356 * u16 x amount to add to queue pointer
635d2b00 357 * returns:
8c87f69a 358 * u16 wrapped queue pointer
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359 */
360#define CSR_WIFI_HIP_Q_WRAP(q, x) \
361 ((((x) >= (q)->q_length)?((x) % (q)->q_length) : (x)))
362
363/* Advance queue read pointer
364 * params:
365 * const q_t *q
366 */
367#define CSR_WIFI_HIP_Q_INC_R(q) \
368 ((q)->q_rd_ptr = CSR_WIFI_HIP_Q_WRAP((q), (q)->q_rd_ptr + 1))
369
370/* Advance queue write pointer
371 * params:
372 * const q_t *q
373 */
374#define CSR_WIFI_HIP_Q_INC_W(q) \
375 ((q)->q_wr_ptr = CSR_WIFI_HIP_Q_WRAP((q), (q)->q_wr_ptr + 1))
376
377enum unifi_host_state
378{
379 UNIFI_HOST_STATE_AWAKE = 0,
380 UNIFI_HOST_STATE_DROWSY = 1,
381 UNIFI_HOST_STATE_TORPID = 2
382};
383
384typedef struct
385{
386 bulk_data_desc_t bd;
387 unifi_TrafficQueue queue; /* Used for dynamic slot reservation */
388} slot_desc_t;
389
390/*
391 * Structure describing a UniFi SDIO card.
392 */
393struct card
394{
395 /*
396 * Back pointer for the higher level OS code. This is passed as
397 * an argument to callbacks (e.g. for received data and indications).
398 */
399 void *ospriv;
400
401 /*
402 * mapping of HIP slot to MA-PACKET.req host tag, the
403 * array is indexed by slot numbers and each index stores
404 * information of the last host tag it was used for
405 */
26a6b2e1 406 u32 *fh_slot_host_tag_record;
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407
408
409 /* Info read from Symbol Table during probe */
26a6b2e1 410 u32 build_id;
c781b96b 411 char build_id_string[128];
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412
413 /* Retrieve from SDIO driver. */
8c87f69a 414 u16 chip_id;
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415
416 /* Read from GBL_CHIP_VERSION. */
8c87f69a 417 u16 chip_version;
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418
419 /* From the SDIO driver (probably 1) */
7e6f5794 420 u8 function;
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421
422 /* This is sused to get the register addresses and things. */
423 ChipDescript *helper;
424
425 /*
426 * Bit mask of PIOs for the loader to waggle during download.
427 * We assume these are connected to LEDs. The main firmware gets
428 * the mask from a MIB entry.
429 */
95e326c2 430 s32 loader_led_mask;
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431
432 /*
433 * Support for flow control. When the from-host queue of signals
434 * is full, we ask the host upper layer to stop sending packets. When
435 * the queue drains we tell it that it can send packets again.
436 * We use this flag to remember the current state.
437 */
438#define card_is_tx_q_paused(card, q) (card->tx_q_paused_flag[q])
439#define card_tx_q_unpause(card, q) (card->tx_q_paused_flag[q] = 0)
440#define card_tx_q_pause(card, q) (card->tx_q_paused_flag[q] = 1)
441
8c87f69a 442 u16 tx_q_paused_flag[UNIFI_TRAFFIC_Q_MAX + 1 + UNIFI_NO_OF_TX_QS]; /* defensive more than big enough */
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443
444 /* UDI callback for logging UniFi interactions */
445 udi_func_t udi_hook;
446
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447 u8 bh_reason_host;
448 u8 bh_reason_unifi;
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449
450 /* SDIO clock speed request from OS layer */
7e6f5794 451 u8 request_max_clock;
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452
453 /* Last SDIO clock frequency set */
26a6b2e1 454 u32 sdio_clock_speed;
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455
456 /*
457 * Current host state (copy of value in IOABORT register and
458 * spinlock to protect it.
459 */
460 enum unifi_host_state host_state;
461
462 enum unifi_low_power_mode low_power_mode;
463 enum unifi_periodic_wake_mode periodic_wake_mode;
464
465 /*
466 * Ring buffer of signal structs for a queue of data packets from
467 * the host.
468 * The queue is empty when fh_data_q_num_rd == fh_data_q_num_wr.
469 * To add a packet to the queue, copy it to index given by
470 * (fh_data_q_num_wr%UNIFI_SOFT_Q_LENGTH) and advance fh_data_q_num_wr.
471 * To take a packet from the queue, copy data from index given by
472 * (fh_data_q_num_rd%UNIFI_SOFT_Q_LENGTH) and advance fh_data_q_num_rd.
473 * fh_data_q_num_rd and fh_data_q_num_rd are both modulo 256.
474 */
475 card_signal_t fh_command_q_body[UNIFI_SOFT_COMMAND_Q_LENGTH];
476 q_t fh_command_queue;
477
478 card_signal_t fh_traffic_q_body[UNIFI_NO_OF_TX_QS][UNIFI_SOFT_TRAFFIC_Q_LENGTH];
479 q_t fh_traffic_queue[UNIFI_NO_OF_TX_QS];
480
481 /*
482 * Signal counts from UniFi SDIO Control Data Structure.
483 * These are cached and synchronised with the UniFi before and after
484 * a batch of operations.
485 *
486 * These are the modulo-256 count of signals written to or read from UniFi
487 * The value is incremented for every signal.
488 */
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489 s32 from_host_signals_w;
490 s32 from_host_signals_r;
491 s32 to_host_signals_r;
492 s32 to_host_signals_w;
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493
494
495 /* Should specify buffer size as a number of signals */
496 /*
497 * Enough for 10 th and 10 fh data slots:
498 * 1 * 10 * 8 = 80
499 * 2 * 10 * 8 = 160
500 */
501#define UNIFI_FH_BUF_SIZE 1024
502 struct sigbuf
503 {
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504 u8 *buf; /* buffer area */
505 u8 *ptr; /* current pos */
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506 u16 count; /* signal count */
507 u16 bufsize;
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508 } fh_buffer;
509 struct sigbuf th_buffer;
510
511
512 /*
513 * Field to use for the incrementing value to write to the UniFi
514 * SHARED_IO_INTERRUPT register.
515 * Flag to say we need to generate an interrupt at end of processing.
516 */
26a6b2e1 517 u32 unifi_interrupt_seq;
7e6f5794 518 u8 generate_interrupt;
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519
520
521 /* Pointers to the bulk data slots */
522 slot_desc_t *from_host_data;
523 bulk_data_desc_t *to_host_data;
524
525
526 /*
527 * Index of the next (hopefully) free data slot.
528 * This is an optimisation that starts searching at a more likely point
529 * than the beginning.
530 */
ab2b8c73 531 s16 from_host_data_head;
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532
533 /* Dynamic slot allocation for queues */
534 card_dynamic_slot_t dynamic_slot_data;
535
536 /*
537 * SDIO specific fields
538 */
539
540 /* Interface pointer for the SDIO library */
541 CsrSdioFunction *sdio_if;
542
543 /* Copy of config_data struct from the card */
544 sdio_config_data_t config_data;
545
546 /* SDIO address of the Initialised flag and Control Data struct */
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547 u32 init_flag_addr;
548 u32 sdio_ctrl_addr;
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549
550 /* The last value written to the Shared Data Memory Page register */
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551 u32 proc_select;
552 u32 dmem_page;
553 u32 pmem_page;
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554
555 /* SDIO traffic counters limited to 32 bits for Synergy compatibility */
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556 u32 sdio_bytes_read;
557 u32 sdio_bytes_written;
635d2b00 558
7e6f5794 559 u8 memory_resources_allocated;
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560
561 /* UniFi SDIO I/O Block size. */
8c87f69a 562 u16 sdio_io_block_size;
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563
564 /* Pad transfer sizes to SDIO block boundaries */
5379b13d 565 u8 sdio_io_block_pad;
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566
567 /* Read from the XBV */
568 struct FWOV fwov;
569
570#ifndef CSR_WIFI_HIP_TA_DISABLE
571 /* TA sampling */
572 ta_data_t ta_sampling;
573#endif
574
575 /* Auto-coredump */
ab2b8c73 576 s16 request_coredump_on_reset; /* request coredump on next reset */
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577 struct coredump_buf *dump_buf; /* root node */
578 struct coredump_buf *dump_next_write; /* node to fill at next dump */
579 struct coredump_buf *dump_cur_read; /* valid node to read, or NULL */
580
581#ifdef CSR_WIFI_HIP_DATA_PLANE_PROFILE
582 struct cmd_profile
583 {
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584 u32 cmd52_count;
585 u32 cmd53_count;
586 u32 tx_count;
587 u32 tx_cfm_count;
588 u32 rx_count;
589 u32 bh_count;
590 u32 process_count;
591 u32 protocol_count;
592
593 u32 cmd52_f0_r_count;
594 u32 cmd52_f0_w_count;
595 u32 cmd52_r8or16_count;
596 u32 cmd52_w8or16_count;
597 u32 cmd52_r16_count;
598 u32 cmd52_w16_count;
599 u32 cmd52_r32_count;
600
601 u32 sdio_cmd_signal;
602 u32 sdio_cmd_clear_slot;
603 u32 sdio_cmd_to_host;
604 u32 sdio_cmd_from_host;
605 u32 sdio_cmd_from_host_and_clear;
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606 } hip_prof;
607 struct cmd_profile cmd_prof;
608#endif
609
610 /* Interrupt processing mode flags */
26a6b2e1 611 u32 intmode;
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612
613#ifdef UNIFI_DEBUG
7e6f5794 614 u8 lsb;
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615#endif
616
617 /* Historic firmware panic codes */
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618 u32 panic_data_phy_addr;
619 u32 panic_data_mac_addr;
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620 u16 last_phy_panic_code;
621 u16 last_phy_panic_arg;
622 u16 last_mac_panic_code;
623 u16 last_mac_panic_arg;
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624#ifdef CSR_PRE_ALLOC_NET_DATA
625 bulk_data_desc_t bulk_data_desc_list[BULK_DATA_PRE_ALLOC_NUM];
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626 u16 prealloc_netdata_r;
627 u16 prealloc_netdata_w;
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628#endif
629}; /* struct card */
630
631
632/* Reset types */
633enum unifi_reset_type
634{
635 UNIFI_COLD_RESET = 1,
636 UNIFI_WARM_RESET = 2
637};
638
639/*
640 * unifi_set_host_state() implements signalling for waking UniFi from
641 * deep sleep. The host indicates to UniFi that it is in one of three states:
642 * Torpid - host has nothing to send, UniFi can go to sleep.
643 * Drowsy - host has data to send to UniFi. UniFi will respond with an
644 * SDIO interrupt. When hosts responds it moves to Awake.
645 * Awake - host has data to transfer, UniFi must stay awake.
646 * When host has finished, it moves to Torpid.
647 */
648CsrResult unifi_set_host_state(card_t *card, enum unifi_host_state state);
649
650
651CsrResult unifi_set_proc_select(card_t *card, enum unifi_dbg_processors_select select);
95e326c2 652s32 card_read_signal_counts(card_t *card);
ab2b8c73 653bulk_data_desc_t* card_find_data_slot(card_t *card, s16 slot);
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654
655
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656CsrResult unifi_read32(card_t *card, u32 unifi_addr, u32 *pdata);
657CsrResult unifi_readnz(card_t *card, u32 unifi_addr,
8c87f69a 658 void *pdata, u16 len);
95e326c2 659s32 unifi_read_shared_count(card_t *card, u32 addr);
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26a6b2e1 661CsrResult unifi_writen(card_t *card, u32 unifi_addr, void *pdata, u16 len);
635d2b00 662
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663CsrResult unifi_bulk_rw(card_t *card, u32 handle,
664 void *pdata, u32 len, s16 direction);
665CsrResult unifi_bulk_rw_noretry(card_t *card, u32 handle,
666 void *pdata, u32 len, s16 direction);
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667#define UNIFI_SDIO_READ 0
668#define UNIFI_SDIO_WRITE 1
669
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670CsrResult unifi_read_8_or_16(card_t *card, u32 unifi_addr, u8 *pdata);
671CsrResult unifi_write_8_or_16(card_t *card, u32 unifi_addr, u8 data);
672CsrResult unifi_read_direct_8_or_16(card_t *card, u32 addr, u8 *pdata);
673CsrResult unifi_write_direct_8_or_16(card_t *card, u32 addr, u8 data);
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675CsrResult unifi_read_direct16(card_t *card, u32 addr, u16 *pdata);
676CsrResult unifi_read_direct32(card_t *card, u32 addr, u32 *pdata);
677CsrResult unifi_read_directn(card_t *card, u32 addr, void *pdata, u16 len);
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679CsrResult unifi_write_direct16(card_t *card, u32 addr, u16 data);
680CsrResult unifi_write_directn(card_t *card, u32 addr, void *pdata, u16 len);
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682CsrResult sdio_read_f0(card_t *card, u32 addr, u8 *pdata);
683CsrResult sdio_write_f0(card_t *card, u32 addr, u8 data);
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684
685void unifi_read_panic(card_t *card);
686#ifdef CSR_PRE_ALLOC_NET_DATA
687void prealloc_netdata_free(card_t *card);
688CsrResult prealloc_netdata_alloc(card_t *card);
689#endif
690/* For diagnostic use */
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691void dump(void *mem, u16 len);
692void dump16(void *mem, u16 len);
635d2b00 693
635d2b00 694#endif /* __CARD_SDIO_H__ */