projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 635d2b00 GKH |
1 | #ifndef CSR_PRIM_DEFS_H__ |
| 2 | #define CSR_PRIM_DEFS_H__ | |
| 3 | /***************************************************************************** | |
| 4 | ||
| 5 | (c) Cambridge Silicon Radio Limited 2010 | |
| 6 | All rights reserved and confidential information of CSR | |
| 7 | ||
| 8 | Refer to LICENSE.txt included with this source for details | |
| 9 | on the license terms. | |
| 10 | ||
| 11 | *****************************************************************************/ | |
| 635d2b00 GKH |
12 | #ifdef __cplusplus |
| 13 | extern "C" { | |
| 14 | #endif | |
| 15 | ||
| 16 | /************************************************************************************ | |
| 17 | * Segmentation of primitives in upstream and downstream segment | |
| 18 | ************************************************************************************/ | |
| 8c87f69a | 19 | typedef u16 CsrPrim; |
| 635d2b00 GKH |
20 | #define CSR_PRIM_UPSTREAM ((CsrPrim) (0x8000)) |
| 21 | ||
| 22 | /************************************************************************************ | |
| 23 | * Primitive definitions for Synergy framework | |
| 24 | ************************************************************************************/ | |
| 8c87f69a | 25 | #define CSR_SYNERGY_EVENT_CLASS_BASE ((u16) (0x0600)) |
| 635d2b00 | 26 | |
| 8c87f69a GKH |
27 | #define CSR_HCI_PRIM ((u16) (0x0000 | CSR_SYNERGY_EVENT_CLASS_BASE)) |
| 28 | #define CSR_BCCMD_PRIM ((u16) (0x0001 | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 29 | #define CSR_HQ_PRIM ((u16) (0x0002 | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 30 | #define CSR_VM_PRIM ((u16) (0x0003 | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 31 | #define CSR_TM_BLUECORE_PRIM ((u16) (0x0004 | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 32 | #define CSR_FP_PRIM ((u16) (0x0005 | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 33 | #define CSR_IP_SOCKET_PRIM ((u16) (0x0006 | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 34 | #define CSR_IP_ETHER_PRIM ((u16) (0x0007 | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 35 | #define CSR_IP_IFCONFIG_PRIM ((u16) (0x0008 | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 36 | #define CSR_IP_INTERNAL_PRIM ((u16) (0x0009 | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 37 | #define CSR_FSAL_PRIM ((u16) (0x000A | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 38 | #define CSR_DATA_STORE_PRIM ((u16) (0x000B | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 39 | #define CSR_AM_PRIM ((u16) (0x000C | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 40 | #define CSR_TLS_PRIM ((u16) (0x000D | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 41 | #define CSR_DHCP_SERVER_PRIM ((u16) (0x000E | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 42 | #define CSR_TFTP_PRIM ((u16) (0x000F | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 43 | #define CSR_DSPM_PRIM ((u16) (0x0010 | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 44 | #define CSR_TLS_INTERNAL_PRIM ((u16) (0x0011 | CSR_SYNERGY_EVENT_CLASS_BASE)) | |
| 635d2b00 GKH |
45 | |
| 46 | #define NUMBER_OF_CSR_FW_EVENTS (CSR_DSPM_PRIM - CSR_SYNERGY_EVENT_CLASS_BASE + 1) | |
| 47 | ||
| 8c87f69a | 48 | #define CSR_SYNERGY_EVENT_CLASS_MISC_BASE ((u16) (0x06A0)) |
| 635d2b00 | 49 | |
| 8c87f69a GKH |
50 | #define CSR_UI_PRIM ((u16) (0x0000 | CSR_SYNERGY_EVENT_CLASS_MISC_BASE)) |
| 51 | #define CSR_APP_PRIM ((u16) (0x0001 | CSR_SYNERGY_EVENT_CLASS_MISC_BASE)) | |
| 52 | #define CSR_SDIO_PROBE_PRIM ((u16) (0x0002 | CSR_SYNERGY_EVENT_CLASS_MISC_BASE)) | |
| 635d2b00 GKH |
53 | |
| 54 | #define NUMBER_OF_CSR_FW_MISC_EVENTS (CSR_SDIO_PROBE_PRIM - CSR_SYNERGY_EVENT_CLASS_MISC_BASE + 1) | |
| 55 | ||
| 8c87f69a | 56 | #define CSR_ENV_PRIM ((u16) (0x00FF | CSR_SYNERGY_EVENT_CLASS_MISC_BASE)) |
| 635d2b00 GKH |
57 | |
| 58 | #ifdef __cplusplus | |
| 59 | } | |
| 60 | #endif | |
| 61 | ||
| 62 | #endif /* CSR_PRIM_DEFS_H__ */ |