projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| cb7859a9 FMH |
1 | /* |
| 2 | drivers/ni_tio.h | |
| 3 | Header file for NI general purpose counter support code (ni_tio.c) | |
| 4 | ||
| 5 | COMEDI - Linux Control and Measurement Device Interface | |
| 6 | ||
| 7 | This program is free software; you can redistribute it and/or modify | |
| 8 | it under the terms of the GNU General Public License as published by | |
| 9 | the Free Software Foundation; either version 2 of the License, or | |
| 10 | (at your option) any later version. | |
| 11 | ||
| 12 | This program is distributed in the hope that it will be useful, | |
| 13 | but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | GNU General Public License for more details. | |
| cb7859a9 FMH |
16 | */ |
| 17 | ||
| 18 | #ifndef _COMEDI_NI_TIO_H | |
| 19 | #define _COMEDI_NI_TIO_H | |
| 20 | ||
| 21 | #include "../comedidev.h" | |
| 22 | ||
| 2696fb57 | 23 | /* forward declarations */ |
| cb7859a9 FMH |
24 | struct mite_struct; |
| 25 | struct ni_gpct_device; | |
| 26 | ||
| 27 | enum ni_gpct_register { | |
| 12375292 HS |
28 | NITIO_G0_AUTO_INC, |
| 29 | NITIO_G1_AUTO_INC, | |
| 30 | NITIO_G2_AUTO_INC, | |
| 31 | NITIO_G3_AUTO_INC, | |
| 32 | NITIO_G0_CMD, | |
| 33 | NITIO_G1_CMD, | |
| 34 | NITIO_G2_CMD, | |
| 35 | NITIO_G3_CMD, | |
| 36 | NITIO_G0_HW_SAVE, | |
| 37 | NITIO_G1_HW_SAVE, | |
| 38 | NITIO_G2_HW_SAVE, | |
| 39 | NITIO_G3_HW_SAVE, | |
| 40 | NITIO_G0_SW_SAVE, | |
| 41 | NITIO_G1_SW_SAVE, | |
| 42 | NITIO_G2_SW_SAVE, | |
| 43 | NITIO_G3_SW_SAVE, | |
| 44 | NITIO_G0_MODE, | |
| 45 | NITIO_G1_MODE, | |
| 46 | NITIO_G2_MODE, | |
| 47 | NITIO_G3_MODE, | |
| 48 | NITIO_G0_LOADA, | |
| 49 | NITIO_G1_LOADA, | |
| 50 | NITIO_G2_LOADA, | |
| 51 | NITIO_G3_LOADA, | |
| 52 | NITIO_G0_LOADB, | |
| 53 | NITIO_G1_LOADB, | |
| 54 | NITIO_G2_LOADB, | |
| 55 | NITIO_G3_LOADB, | |
| 56 | NITIO_G0_INPUT_SEL, | |
| 57 | NITIO_G1_INPUT_SEL, | |
| 58 | NITIO_G2_INPUT_SEL, | |
| 59 | NITIO_G3_INPUT_SEL, | |
| 60 | NITIO_G0_CNT_MODE, | |
| 61 | NITIO_G1_CNT_MODE, | |
| 62 | NITIO_G2_CNT_MODE, | |
| 63 | NITIO_G3_CNT_MODE, | |
| 64 | NITIO_G0_GATE2, | |
| 65 | NITIO_G1_GATE2, | |
| 66 | NITIO_G2_GATE2, | |
| 67 | NITIO_G3_GATE2, | |
| 68 | NITIO_G01_STATUS, | |
| 69 | NITIO_G23_STATUS, | |
| 70 | NITIO_G01_RESET, | |
| 71 | NITIO_G23_RESET, | |
| 72 | NITIO_G01_STATUS1, | |
| 73 | NITIO_G23_STATUS1, | |
| 74 | NITIO_G01_STATUS2, | |
| 75 | NITIO_G23_STATUS2, | |
| 76 | NITIO_G0_DMA_CFG, | |
| 77 | NITIO_G1_DMA_CFG, | |
| 78 | NITIO_G2_DMA_CFG, | |
| 79 | NITIO_G3_DMA_CFG, | |
| 80 | NITIO_G0_DMA_STATUS, | |
| 81 | NITIO_G1_DMA_STATUS, | |
| 82 | NITIO_G2_DMA_STATUS, | |
| 83 | NITIO_G3_DMA_STATUS, | |
| 84 | NITIO_G0_ABZ, | |
| 85 | NITIO_G1_ABZ, | |
| 86 | NITIO_G0_INT_ACK, | |
| 87 | NITIO_G1_INT_ACK, | |
| 88 | NITIO_G2_INT_ACK, | |
| 89 | NITIO_G3_INT_ACK, | |
| 90 | NITIO_G0_STATUS, | |
| 91 | NITIO_G1_STATUS, | |
| 92 | NITIO_G2_STATUS, | |
| 93 | NITIO_G3_STATUS, | |
| 94 | NITIO_G0_INT_ENA, | |
| 95 | NITIO_G1_INT_ENA, | |
| 96 | NITIO_G2_INT_ENA, | |
| 97 | NITIO_G3_INT_ENA, | |
| 98 | NITIO_NUM_REGS, | |
| cb7859a9 FMH |
99 | }; |
| 100 | ||
| 101 | enum ni_gpct_variant { | |
| 102 | ni_gpct_variant_e_series, | |
| 103 | ni_gpct_variant_m_series, | |
| 104 | ni_gpct_variant_660x | |
| 105 | }; | |
| 106 | ||
| 107 | struct ni_gpct { | |
| 108 | struct ni_gpct_device *counter_dev; | |
| 109 | unsigned counter_index; | |
| 110 | unsigned chip_index; | |
| 111 | uint64_t clock_period_ps; /* clock period in picoseconds */ | |
| 112 | struct mite_channel *mite_chan; | |
| 113 | spinlock_t lock; | |
| 114 | }; | |
| 115 | ||
| 116 | struct ni_gpct_device { | |
| 71b5f4f1 | 117 | struct comedi_device *dev; |
| 3cf477b5 ND |
118 | void (*write_register)(struct ni_gpct *counter, unsigned bits, |
| 119 | enum ni_gpct_register reg); | |
| 120 | unsigned (*read_register)(struct ni_gpct *counter, | |
| 121 | enum ni_gpct_register reg); | |
| cb7859a9 FMH |
122 | enum ni_gpct_variant variant; |
| 123 | struct ni_gpct *counters; | |
| 124 | unsigned num_counters; | |
| 12375292 | 125 | unsigned regs[NITIO_NUM_REGS]; |
| cb7859a9 FMH |
126 | spinlock_t regs_lock; |
| 127 | }; | |
| 128 | ||
| c2e11bb1 HS |
129 | struct ni_gpct_device * |
| 130 | ni_gpct_device_construct(struct comedi_device *, | |
| 131 | void (*write_register)(struct ni_gpct *, | |
| 132 | unsigned bits, | |
| 133 | enum ni_gpct_register), | |
| 134 | unsigned (*read_register)(struct ni_gpct *, | |
| 135 | enum ni_gpct_register), | |
| 136 | enum ni_gpct_variant, | |
| 137 | unsigned num_counters); | |
| 138 | void ni_gpct_device_destroy(struct ni_gpct_device *); | |
| 139 | void ni_tio_init_counter(struct ni_gpct *); | |
| 9014d816 HS |
140 | int ni_tio_insn_read(struct comedi_device *, struct comedi_subdevice *, |
| 141 | struct comedi_insn *, unsigned int *data); | |
| cac04c0f HS |
142 | int ni_tio_insn_config(struct comedi_device *, struct comedi_subdevice *, |
| 143 | struct comedi_insn *, unsigned int *data); | |
| 10f74377 HS |
144 | int ni_tio_insn_write(struct comedi_device *, struct comedi_subdevice *, |
| 145 | struct comedi_insn *, unsigned int *data); | |
| 16cc181d | 146 | int ni_tio_cmd(struct comedi_device *, struct comedi_subdevice *); |
| c3f3b431 HS |
147 | int ni_tio_cmdtest(struct comedi_device *, struct comedi_subdevice *, |
| 148 | struct comedi_cmd *); | |
| c2e11bb1 HS |
149 | int ni_tio_cancel(struct ni_gpct *); |
| 150 | void ni_tio_handle_interrupt(struct ni_gpct *, struct comedi_subdevice *); | |
| 151 | void ni_tio_set_mite_channel(struct ni_gpct *, struct mite_channel *); | |
| f8cfd0eb | 152 | void ni_tio_acknowledge(struct ni_gpct *); |
| cb7859a9 | 153 | |
| cb7859a9 | 154 | #endif /* _COMEDI_NI_TIO_H */ |