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Merge tag 'iio-for-3.17b' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23...
[linux-2.6-block.git] / drivers / staging / comedi / drivers / ni_pcimio.c
CommitLineData
c4beb34e
DS		 1/*
2 comedi/drivers/ni_pcimio.c
3 Hardware driver for NI PCI-MIO E series cards
4
5 COMEDI - Linux Control and Measurement Device Interface
6 Copyright (C) 1997-8 David A. Schleef <ds@schleef.org>
7
8 This program is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2 of the License, or
11 (at your option) any later version.
12
13 This program is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
c4beb34e
DS		 17*/
18/*
19Driver: ni_pcimio
20Description: National Instruments PCI-MIO-E series and M series (all boards)
21Author: ds, John Hallen, Frank Mori Hess, Rolf Mueller, Herbert Peremans,
22 Herman Bruyninckx, Terry Barnaby
23Status: works
24Devices: [National Instruments] PCI-MIO-16XE-50 (ni_pcimio),
25 PCI-MIO-16XE-10, PXI-6030E, PCI-MIO-16E-1, PCI-MIO-16E-4, PCI-6014, PCI-6040E,
26 PXI-6040E, PCI-6030E, PCI-6031E, PCI-6032E, PCI-6033E, PCI-6071E, PCI-6023E,
27 PCI-6024E, PCI-6025E, PXI-6025E, PCI-6034E, PCI-6035E, PCI-6052E,
586b9839
IA		 28 PCI-6110, PCI-6111, PCI-6220, PCI-6221, PCI-6224, PXI-6224,
29 PCI-6225, PXI-6225, PCI-6229, PCI-6250, PCI-6251, PCIe-6251, PXIe-6251,
30 PCI-6254, PCI-6259, PCIe-6259,
c4beb34e
DS		 31 PCI-6280, PCI-6281, PXI-6281, PCI-6284, PCI-6289,
32 PCI-6711, PXI-6711, PCI-6713, PXI-6713,
33 PXI-6071E, PCI-6070E, PXI-6070E,
34 PXI-6052E, PCI-6036E, PCI-6731, PCI-6733, PXI-6733,
35 PCI-6143, PXI-6143
586b9839 36Updated: Mon, 09 Jan 2012 14:52:48 +0000
c4beb34e
DS		 37
38These boards are almost identical to the AT-MIO E series, except that
39they use the PCI bus instead of ISA (i.e., AT). See the notes for
40the ni_atmio.o driver for additional information about these boards.
41
42Autocalibration is supported on many of the devices, using the
43comedi_calibrate (or comedi_soft_calibrate for m-series) utility.
44M-Series boards do analog input and analog output calibration entirely
45in software. The software calibration corrects
46the analog input for offset, gain and
47nonlinearity. The analog outputs are corrected for offset and gain.
48See the comedilib documentation on comedi_get_softcal_converter() for
49more information.
50
51By default, the driver uses DMA to transfer analog input data to
52memory. When DMA is enabled, not all triggering features are
53supported.
54
55Digital I/O may not work on 673x.
56
57Note that the PCI-6143 is a simultaineous sampling device with 8 convertors.
58With this board all of the convertors perform one simultaineous sample during
59a scan interval. The period for a scan is used for the convert time in a
60Comedi cmd. The convert trigger source is normally set to TRIG_NOW by default.
61
62The RTSI trigger bus is supported on these cards on
63subdevice 10. See the comedilib documentation for details.
64
65Information (number of channels, bits, etc.) for some devices may be
66incorrect. Please check this and submit a bug if there are problems
67for your device.
68
69SCXI is probably broken for m-series boards.
70
71Bugs:
72 - When DMA is enabled, COMEDI_EV_CONVERT does
73 not work correctly.
74
75*/
76/*
77 The PCI-MIO E series driver was originally written by
78 Tomasz Motylewski <...>, and ported to comedi by ds.
79
80 References:
81
82 341079b.pdf PCI E Series Register-Level Programmer Manual
83 340934b.pdf DAQ-STC reference manual
84
85 322080b.pdf 6711/6713/6715 User Manual
86
87 320945c.pdf PCI E Series User Manual
88 322138a.pdf PCI-6052E and DAQPad-6052E User Manual
89
90 ISSUES:
91
92 need to deal with external reference for DAC, and other DAC
93 properties in board properties
94
95 deal with at-mio-16de-10 revision D to N changes, etc.
96
97 need to add other CALDAC type
98
99 need to slow down DAC loading. I don't trust NI's claim that
100 two writes to the PCI bus slows IO enough. I would prefer to
5f74ea14 101 use udelay(). Timing specs: (clock)
c4beb34e
DS		 102 AD8522 30ns
103 DAC8043 120ns
104 DAC8800 60ns
105 MB88341 ?
106
107*/
108
ce157f80 109#include <linux/module.h>
33782dd5
HS		 110#include <linux/delay.h>
111
c4beb34e
DS		 112#include "../comedidev.h"
113
f8db88ef 114#include <asm/byteorder.h>
c4beb34e
DS		 115
116#include "ni_stc.h"
117#include "mite.h"
118
c4beb34e
DS		 119#define PCIDMA
120
121#define PCIMIO 1
122#undef ATMIO
123
c4beb34e
DS		 124#define DRV_NAME "ni_pcimio"
125
c4beb34e
DS		 126/* These are not all the possible ao ranges for 628x boards.
127 They can do OFFSET +- REFERENCE where OFFSET can be
128 0V, 5V, APFI<0,1>, or AO<0...3> and RANGE can
129 be 10V, 5V, 2V, 1V, APFI<0,1>, AO<0...3>. That's
130 63 different possibilities. An AO channel
131 can not act as it's own OFFSET or REFERENCE.
132*/
a19d9824
HS		 133static const struct comedi_lrange range_ni_M_628x_ao = {
134 8, {
135 BIP_RANGE(10),
136 BIP_RANGE(5),
137 BIP_RANGE(2),
138 BIP_RANGE(1),
139 RANGE(-5, 15),
140 UNI_RANGE(10),
141 RANGE(3, 7),
142 RANGE(4, 6),
143 RANGE_ext(-1, 1)
144 }
c4beb34e 145};
0a85b6f0 146
a19d9824
HS		 147static const struct comedi_lrange range_ni_M_625x_ao = {
148 3, {
149 BIP_RANGE(10),
150 BIP_RANGE(5),
151 RANGE_ext(-1, 1)
152 }
c4beb34e 153};
0a85b6f0 154
a25a701a
HS		 155enum ni_pcimio_boardid {
156 BOARD_PCIMIO_16XE_50,
157 BOARD_PCIMIO_16XE_10,
158 BOARD_PCI6014,
159 BOARD_PXI6030E,
160 BOARD_PCIMIO_16E_1,
161 BOARD_PCIMIO_16E_4,
162 BOARD_PXI6040E,
163 BOARD_PCI6031E,
164 BOARD_PCI6032E,
165 BOARD_PCI6033E,
166 BOARD_PCI6071E,
167 BOARD_PCI6023E,
168 BOARD_PCI6024E,
169 BOARD_PCI6025E,
170 BOARD_PXI6025E,
171 BOARD_PCI6034E,
172 BOARD_PCI6035E,
173 BOARD_PCI6052E,
174 BOARD_PCI6110,
175 BOARD_PCI6111,
176 /* BOARD_PCI6115, */
177 /* BOARD_PXI6115, */
178 BOARD_PCI6711,
179 BOARD_PXI6711,
180 BOARD_PCI6713,
181 BOARD_PXI6713,
182 BOARD_PCI6731,
183 /* BOARD_PXI6731, */
184 BOARD_PCI6733,
185 BOARD_PXI6733,
186 BOARD_PXI6071E,
187 BOARD_PXI6070E,
188 BOARD_PXI6052E,
189 BOARD_PXI6031E,
190 BOARD_PCI6036E,
191 BOARD_PCI6220,
192 BOARD_PCI6221,
193 BOARD_PCI6221_37PIN,
194 BOARD_PCI6224,
195 BOARD_PXI6224,
196 BOARD_PCI6225,
197 BOARD_PXI6225,
198 BOARD_PCI6229,
199 BOARD_PCI6250,
200 BOARD_PCI6251,
201 BOARD_PCIE6251,
202 BOARD_PXIE6251,
203 BOARD_PCI6254,
204 BOARD_PCI6259,
205 BOARD_PCIE6259,
206 BOARD_PCI6280,
207 BOARD_PCI6281,
208 BOARD_PXI6281,
209 BOARD_PCI6284,
210 BOARD_PCI6289,
211 BOARD_PCI6143,
212 BOARD_PXI6143,
213};
214
8ab41df0 215static const struct ni_board_struct ni_boards[] = {
a25a701a 216 [BOARD_PCIMIO_16XE_50] = {
68278f10
HS		 217 .name = "pci-mio-16xe-50",
218 .n_adchan = 16,
219 .adbits = 16,
220 .ai_fifo_depth = 2048,
221 .alwaysdither = 1,
222 .gainlkup = ai_gain_8,
223 .ai_speed = 50000,
224 .n_aochan = 2,
225 .aobits = 12,
226 .ao_range_table = &range_bipolar10,
227 .ao_speed = 50000,
228 .num_p0_dio_channels = 8,
229 .caldac = { dac8800, dac8043 },
230 },
a25a701a 231 [BOARD_PCIMIO_16XE_10] = {
68278f10
HS		 232 .name = "pci-mio-16xe-10", /* aka pci-6030E */
233 .n_adchan = 16,
234 .adbits = 16,
235 .ai_fifo_depth = 512,
236 .alwaysdither = 1,
237 .gainlkup = ai_gain_14,
238 .ai_speed = 10000,
239 .n_aochan = 2,
240 .aobits = 16,
241 .ao_fifo_depth = 2048,
242 .ao_range_table = &range_ni_E_ao_ext,
243 .ao_unipolar = 1,
244 .ao_speed = 10000,
245 .num_p0_dio_channels = 8,
246 .caldac = { dac8800, dac8043, ad8522 },
247 },
a25a701a 248 [BOARD_PCI6014] = {
68278f10
HS		 249 .name = "pci-6014",
250 .n_adchan = 16,
251 .adbits = 16,
252 .ai_fifo_depth = 512,
253 .alwaysdither = 1,
254 .gainlkup = ai_gain_4,
255 .ai_speed = 5000,
256 .n_aochan = 2,
257 .aobits = 16,
258 .ao_range_table = &range_bipolar10,
259 .ao_speed = 100000,
260 .num_p0_dio_channels = 8,
261 .caldac = { ad8804_debug },
262 },
a25a701a 263 [BOARD_PXI6030E] = {
68278f10
HS		 264 .name = "pxi-6030e",
265 .n_adchan = 16,
266 .adbits = 16,
267 .ai_fifo_depth = 512,
268 .alwaysdither = 1,
269 .gainlkup = ai_gain_14,
270 .ai_speed = 10000,
271 .n_aochan = 2,
272 .aobits = 16,
273 .ao_fifo_depth = 2048,
274 .ao_range_table = &range_ni_E_ao_ext,
275 .ao_unipolar = 1,
276 .ao_speed = 10000,
277 .num_p0_dio_channels = 8,
278 .caldac = { dac8800, dac8043, ad8522 },
279 },
a25a701a 280 [BOARD_PCIMIO_16E_1] = {
68278f10
HS		 281 .name = "pci-mio-16e-1", /* aka pci-6070e */
282 .n_adchan = 16,
283 .adbits = 12,
284 .ai_fifo_depth = 512,
285 .gainlkup = ai_gain_16,
286 .ai_speed = 800,
287 .n_aochan = 2,
288 .aobits = 12,
289 .ao_fifo_depth = 2048,
290 .ao_range_table = &range_ni_E_ao_ext,
291 .ao_unipolar = 1,
292 .ao_speed = 1000,
293 .num_p0_dio_channels = 8,
294 .caldac = { mb88341 },
295 },
a25a701a 296 [BOARD_PCIMIO_16E_4] = {
68278f10
HS		 297 .name = "pci-mio-16e-4", /* aka pci-6040e */
298 .n_adchan = 16,
299 .adbits = 12,
300 .ai_fifo_depth = 512,
301 .gainlkup = ai_gain_16,
302 /*
303 * there have been reported problems with
304 * full speed on this board
305 */
306 .ai_speed = 2000,
307 .n_aochan = 2,
308 .aobits = 12,
309 .ao_fifo_depth = 512,
310 .ao_range_table = &range_ni_E_ao_ext,
311 .ao_unipolar = 1,
312 .ao_speed = 1000,
313 .num_p0_dio_channels = 8,
314 .caldac = { ad8804_debug }, /* doc says mb88341 */
315 },
a25a701a 316 [BOARD_PXI6040E] = {
68278f10
HS		 317 .name = "pxi-6040e",
318 .n_adchan = 16,
319 .adbits = 12,
320 .ai_fifo_depth = 512,
321 .gainlkup = ai_gain_16,
322 .ai_speed = 2000,
323 .n_aochan = 2,
324 .aobits = 12,
325 .ao_fifo_depth = 512,
326 .ao_range_table = &range_ni_E_ao_ext,
327 .ao_unipolar = 1,
328 .ao_speed = 1000,
329 .num_p0_dio_channels = 8,
330 .caldac = { mb88341 },
331 },
a25a701a 332 [BOARD_PCI6031E] = {
68278f10
HS		 333 .name = "pci-6031e",
334 .n_adchan = 64,
335 .adbits = 16,
336 .ai_fifo_depth = 512,
337 .alwaysdither = 1,
338 .gainlkup = ai_gain_14,
339 .ai_speed = 10000,
340 .n_aochan = 2,
341 .aobits = 16,
342 .ao_fifo_depth = 2048,
343 .ao_range_table = &range_ni_E_ao_ext,
344 .ao_unipolar = 1,
345 .ao_speed = 10000,
346 .num_p0_dio_channels = 8,
347 .caldac = { dac8800, dac8043, ad8522 },
348 },
a25a701a 349 [BOARD_PCI6032E] = {
68278f10
HS		 350 .name = "pci-6032e",
351 .n_adchan = 16,
352 .adbits = 16,
353 .ai_fifo_depth = 512,
354 .alwaysdither = 1,
355 .gainlkup = ai_gain_14,
356 .ai_speed = 10000,
357 .num_p0_dio_channels = 8,
358 .caldac = { dac8800, dac8043, ad8522 },
359 },
a25a701a 360 [BOARD_PCI6033E] = {
68278f10
HS		 361 .name = "pci-6033e",
362 .n_adchan = 64,
363 .adbits = 16,
364 .ai_fifo_depth = 512,
365 .alwaysdither = 1,
366 .gainlkup = ai_gain_14,
367 .ai_speed = 10000,
368 .num_p0_dio_channels = 8,
369 .caldac = { dac8800, dac8043, ad8522 },
370 },
a25a701a 371 [BOARD_PCI6071E] = {
68278f10
HS		 372 .name = "pci-6071e",
373 .n_adchan = 64,
374 .adbits = 12,
375 .ai_fifo_depth = 512,
376 .alwaysdither = 1,
377 .gainlkup = ai_gain_16,
378 .ai_speed = 800,
379 .n_aochan = 2,
380 .aobits = 12,
381 .ao_fifo_depth = 2048,
382 .ao_range_table = &range_ni_E_ao_ext,
383 .ao_unipolar = 1,
384 .ao_speed = 1000,
385 .num_p0_dio_channels = 8,
386 .caldac = { ad8804_debug },
387 },
a25a701a 388 [BOARD_PCI6023E] = {
68278f10
HS		 389 .name = "pci-6023e",
390 .n_adchan = 16,
391 .adbits = 12,
392 .ai_fifo_depth = 512,
393 .gainlkup = ai_gain_4,
394 .ai_speed = 5000,
395 .num_p0_dio_channels = 8,
396 .caldac = { ad8804_debug }, /* manual is wrong */
397 },
a25a701a 398 [BOARD_PCI6024E] = {
68278f10
HS		 399 .name = "pci-6024e",
400 .n_adchan = 16,
401 .adbits = 12,
402 .ai_fifo_depth = 512,
403 .gainlkup = ai_gain_4,
404 .ai_speed = 5000,
405 .n_aochan = 2,
406 .aobits = 12,
407 .ao_range_table = &range_bipolar10,
408 .ao_speed = 100000,
409 .num_p0_dio_channels = 8,
410 .caldac = { ad8804_debug }, /* manual is wrong */
411 },
a25a701a 412 [BOARD_PCI6025E] = {
68278f10
HS		 413 .name = "pci-6025e",
414 .n_adchan = 16,
415 .adbits = 12,
416 .ai_fifo_depth = 512,
417 .gainlkup = ai_gain_4,
418 .ai_speed = 5000,
419 .n_aochan = 2,
420 .aobits = 12,
421 .ao_range_table = &range_bipolar10,
422 .ao_speed = 100000,
423 .num_p0_dio_channels = 8,
424 .caldac = { ad8804_debug }, /* manual is wrong */
425 .has_8255 = 1,
426 },
a25a701a 427 [BOARD_PXI6025E] = {
68278f10
HS		 428 .name = "pxi-6025e",
429 .n_adchan = 16,
430 .adbits = 12,
431 .ai_fifo_depth = 512,
432 .gainlkup = ai_gain_4,
433 .ai_speed = 5000,
434 .n_aochan = 2,
435 .aobits = 12,
436 .ao_range_table = &range_ni_E_ao_ext,
437 .ao_unipolar = 1,
438 .ao_speed = 100000,
439 .num_p0_dio_channels = 8,
440 .caldac = { ad8804_debug }, /* manual is wrong */
441 .has_8255 = 1,
442 },
a25a701a 443 [BOARD_PCI6034E] = {
68278f10
HS		 444 .name = "pci-6034e",
445 .n_adchan = 16,
446 .adbits = 16,
447 .ai_fifo_depth = 512,
448 .alwaysdither = 1,
449 .gainlkup = ai_gain_4,
450 .ai_speed = 5000,
451 .num_p0_dio_channels = 8,
452 .caldac = { ad8804_debug },
453 },
a25a701a 454 [BOARD_PCI6035E] = {
68278f10
HS		 455 .name = "pci-6035e",
456 .n_adchan = 16,
457 .adbits = 16,
458 .ai_fifo_depth = 512,
459 .alwaysdither = 1,
460 .gainlkup = ai_gain_4,
461 .ai_speed = 5000,
462 .n_aochan = 2,
463 .aobits = 12,
464 .ao_range_table = &range_bipolar10,
465 .ao_speed = 100000,
466 .num_p0_dio_channels = 8,
467 .caldac = { ad8804_debug },
468 },
a25a701a 469 [BOARD_PCI6052E] = {
68278f10
HS		 470 .name = "pci-6052e",
471 .n_adchan = 16,
472 .adbits = 16,
473 .ai_fifo_depth = 512,
474 .alwaysdither = 1,
475 .gainlkup = ai_gain_16,
476 .ai_speed = 3000,
477 .n_aochan = 2,
478 .aobits = 16,
479 .ao_unipolar = 1,
480 .ao_fifo_depth = 2048,
481 .ao_range_table = &range_ni_E_ao_ext,
482 .ao_speed = 3000,
483 .num_p0_dio_channels = 8,
484 /* manual is wrong */
485 .caldac = { ad8804_debug, ad8804_debug, ad8522 },
486 },
a25a701a 487 [BOARD_PCI6110] = {
68278f10
HS		 488 .name = "pci-6110",
489 .n_adchan = 4,
490 .adbits = 12,
491 .ai_fifo_depth = 8192,
492 .alwaysdither = 0,
493 .gainlkup = ai_gain_611x,
494 .ai_speed = 200,
495 .n_aochan = 2,
496 .aobits = 16,
497 .reg_type = ni_reg_611x,
498 .ao_range_table = &range_bipolar10,
499 .ao_fifo_depth = 2048,
500 .ao_speed = 250,
501 .num_p0_dio_channels = 8,
502 .caldac = { ad8804, ad8804 },
503 },
a25a701a 504 [BOARD_PCI6111] = {
68278f10
HS		 505 .name = "pci-6111",
506 .n_adchan = 2,
507 .adbits = 12,
508 .ai_fifo_depth = 8192,
509 .gainlkup = ai_gain_611x,
510 .ai_speed = 200,
511 .n_aochan = 2,
512 .aobits = 16,
513 .reg_type = ni_reg_611x,
514 .ao_range_table = &range_bipolar10,
515 .ao_fifo_depth = 2048,
516 .ao_speed = 250,
517 .num_p0_dio_channels = 8,
518 .caldac = { ad8804, ad8804 },
519 },
c4beb34e
DS		 520#if 0
521 /* The 6115 boards probably need their own driver */
a25a701a 522 [BOARD_PCI6115] = { /* .device_id = 0x2ed0, */
68278f10
HS		 523 .name = "pci-6115",
524 .n_adchan = 4,
525 .adbits = 12,
526 .ai_fifo_depth = 8192,
527 .gainlkup = ai_gain_611x,
528 .ai_speed = 100,
529 .n_aochan = 2,
530 .aobits = 16,
531 .ao_671x = 1,
532 .ao_fifo_depth = 2048,
533 .ao_speed = 250,
534 .num_p0_dio_channels = 8,
535 .reg_611x = 1,
536 /* XXX */
537 .caldac = { ad8804_debug, ad8804_debug, ad8804_debug },
538 },
c4beb34e
DS		 539#endif
540#if 0
a25a701a 541 [BOARD_PXI6115] = { /* .device_id = ????, */
68278f10
HS		 542 .name = "pxi-6115",
543 .n_adchan = 4,
544 .adbits = 12,
545 .ai_fifo_depth = 8192,
546 .gainlkup = ai_gain_611x,
547 .ai_speed = 100,
548 .n_aochan = 2,
549 .aobits = 16,
550 .ao_671x = 1,
551 .ao_fifo_depth = 2048,
552 .ao_speed = 250,
553 .reg_611x = 1,
554 .num_p0_dio_channels = 8,
555 /* XXX */
556 .caldac = { ad8804_debug, ad8804_debug, ad8804_debug },
557 },
c4beb34e 558#endif
a25a701a 559 [BOARD_PCI6711] = {
68278f10
HS		 560 .name = "pci-6711",
561 .n_aochan = 4,
562 .aobits = 12,
563 /* data sheet says 8192, but fifo really holds 16384 samples */
564 .ao_fifo_depth = 16384,
565 .ao_range_table = &range_bipolar10,
566 .ao_speed = 1000,
567 .num_p0_dio_channels = 8,
568 .reg_type = ni_reg_6711,
569 .caldac = { ad8804_debug },
570 },
a25a701a 571 [BOARD_PXI6711] = {
68278f10
HS		 572 .name = "pxi-6711",
573 .n_aochan = 4,
574 .aobits = 12,
575 .ao_fifo_depth = 16384,
576 .ao_range_table = &range_bipolar10,
577 .ao_speed = 1000,
578 .num_p0_dio_channels = 8,
579 .reg_type = ni_reg_6711,
580 .caldac = { ad8804_debug },
581 },
a25a701a 582 [BOARD_PCI6713] = {
68278f10
HS		 583 .name = "pci-6713",
584 .n_aochan = 8,
585 .aobits = 12,
586 .ao_fifo_depth = 16384,
587 .ao_range_table = &range_bipolar10,
588 .ao_speed = 1000,
589 .num_p0_dio_channels = 8,
590 .reg_type = ni_reg_6713,
591 .caldac = { ad8804_debug, ad8804_debug },
592 },
a25a701a 593 [BOARD_PXI6713] = {
68278f10
HS		 594 .name = "pxi-6713",
595 .n_aochan = 8,
596 .aobits = 12,
597 .ao_fifo_depth = 16384,
598 .ao_range_table = &range_bipolar10,
599 .ao_speed = 1000,
600 .num_p0_dio_channels = 8,
601 .reg_type = ni_reg_6713,
602 .caldac = { ad8804_debug, ad8804_debug },
603 },
a25a701a 604 [BOARD_PCI6731] = {
68278f10
HS		 605 .name = "pci-6731",
606 .n_aochan = 4,
607 .aobits = 16,
608 .ao_fifo_depth = 8192,
609 .ao_range_table = &range_bipolar10,
610 .ao_speed = 1000,
611 .num_p0_dio_channels = 8,
612 .reg_type = ni_reg_6711,
613 .caldac = { ad8804_debug },
614 },
a25a701a
HS		 615#if 0
616 [BOARD_PXI6731] = { /* .device_id = ????, */
68278f10
HS		 617 .name = "pxi-6731",
618 .n_aochan = 4,
619 .aobits = 16,
620 .ao_fifo_depth = 8192,
621 .ao_range_table = &range_bipolar10,
622 .num_p0_dio_channels = 8,
623 .reg_type = ni_reg_6711,
624 .caldac = { ad8804_debug },
625 },
c4beb34e 626#endif
a25a701a 627 [BOARD_PCI6733] = {
68278f10
HS		 628 .name = "pci-6733",
629 .n_aochan = 8,
630 .aobits = 16,
631 .ao_fifo_depth = 16384,
632 .ao_range_table = &range_bipolar10,
633 .ao_speed = 1000,
634 .num_p0_dio_channels = 8,
635 .reg_type = ni_reg_6713,
636 .caldac = { ad8804_debug, ad8804_debug },
637 },
a25a701a 638 [BOARD_PXI6733] = {
68278f10
HS		 639 .name = "pxi-6733",
640 .n_aochan = 8,
641 .aobits = 16,
642 .ao_fifo_depth = 16384,
643 .ao_range_table = &range_bipolar10,
644 .ao_speed = 1000,
645 .num_p0_dio_channels = 8,
646 .reg_type = ni_reg_6713,
647 .caldac = { ad8804_debug, ad8804_debug },
648 },
a25a701a 649 [BOARD_PXI6071E] = {
68278f10
HS		 650 .name = "pxi-6071e",
651 .n_adchan = 64,
652 .adbits = 12,
653 .ai_fifo_depth = 512,
654 .alwaysdither = 1,
655 .gainlkup = ai_gain_16,
656 .ai_speed = 800,
657 .n_aochan = 2,
658 .aobits = 12,
659 .ao_fifo_depth = 2048,
660 .ao_range_table = &range_ni_E_ao_ext,
661 .ao_unipolar = 1,
662 .ao_speed = 1000,
663 .num_p0_dio_channels = 8,
664 .caldac = { ad8804_debug },
665 },
a25a701a 666 [BOARD_PXI6070E] = {
68278f10
HS		 667 .name = "pxi-6070e",
668 .n_adchan = 16,
669 .adbits = 12,
670 .ai_fifo_depth = 512,
671 .alwaysdither = 1,
672 .gainlkup = ai_gain_16,
673 .ai_speed = 800,
674 .n_aochan = 2,
675 .aobits = 12,
676 .ao_fifo_depth = 2048,
677 .ao_range_table = &range_ni_E_ao_ext,
678 .ao_unipolar = 1,
679 .ao_speed = 1000,
680 .num_p0_dio_channels = 8,
681 .caldac = { ad8804_debug },
682 },
a25a701a 683 [BOARD_PXI6052E] = {
68278f10
HS		 684 .name = "pxi-6052e",
685 .n_adchan = 16,
686 .adbits = 16,
687 .ai_fifo_depth = 512,
688 .alwaysdither = 1,
689 .gainlkup = ai_gain_16,
690 .ai_speed = 3000,
691 .n_aochan = 2,
692 .aobits = 16,
693 .ao_unipolar = 1,
694 .ao_fifo_depth = 2048,
695 .ao_range_table = &range_ni_E_ao_ext,
696 .ao_speed = 3000,
697 .num_p0_dio_channels = 8,
698 .caldac = { mb88341, mb88341, ad8522 },
699 },
a25a701a 700 [BOARD_PXI6031E] = {
68278f10
HS		 701 .name = "pxi-6031e",
702 .n_adchan = 64,
703 .adbits = 16,
704 .ai_fifo_depth = 512,
705 .alwaysdither = 1,
706 .gainlkup = ai_gain_14,
707 .ai_speed = 10000,
708 .n_aochan = 2,
709 .aobits = 16,
710 .ao_fifo_depth = 2048,
711 .ao_range_table = &range_ni_E_ao_ext,
712 .ao_unipolar = 1,
713 .ao_speed = 10000,
714 .num_p0_dio_channels = 8,
715 .caldac = { dac8800, dac8043, ad8522 },
716 },
a25a701a 717 [BOARD_PCI6036E] = {
68278f10
HS		 718 .name = "pci-6036e",
719 .n_adchan = 16,
720 .adbits = 16,
721 .ai_fifo_depth = 512,
722 .alwaysdither = 1,
723 .gainlkup = ai_gain_4,
724 .ai_speed = 5000,
725 .n_aochan = 2,
726 .aobits = 16,
727 .ao_range_table = &range_bipolar10,
728 .ao_speed = 100000,
729 .num_p0_dio_channels = 8,
730 .caldac = { ad8804_debug },
731 },
a25a701a 732 [BOARD_PCI6220] = {
68278f10
HS		 733 .name = "pci-6220",
734 .n_adchan = 16,
735 .adbits = 16,
736 .ai_fifo_depth = 512, /* FIXME: guess */
737 .gainlkup = ai_gain_622x,
738 .ai_speed = 4000,
739 .num_p0_dio_channels = 8,
740 .reg_type = ni_reg_622x,
741 .caldac = { caldac_none },
742 },
a25a701a 743 [BOARD_PCI6221] = {
68278f10
HS		 744 .name = "pci-6221",
745 .n_adchan = 16,
746 .adbits = 16,
747 .ai_fifo_depth = 4095,
748 .gainlkup = ai_gain_622x,
749 .ai_speed = 4000,
750 .n_aochan = 2,
751 .aobits = 16,
752 .ao_fifo_depth = 8191,
a4f6d9ca 753 .ao_range_table = &range_bipolar10,
68278f10
HS		 754 .reg_type = ni_reg_622x,
755 .ao_speed = 1200,
756 .num_p0_dio_channels = 8,
757 .caldac = { caldac_none },
758 },
a25a701a 759 [BOARD_PCI6221_37PIN] = {
68278f10
HS		 760 .name = "pci-6221_37pin",
761 .n_adchan = 16,
762 .adbits = 16,
763 .ai_fifo_depth = 4095,
764 .gainlkup = ai_gain_622x,
765 .ai_speed = 4000,
766 .n_aochan = 2,
767 .aobits = 16,
768 .ao_fifo_depth = 8191,
a4f6d9ca 769 .ao_range_table = &range_bipolar10,
68278f10
HS		 770 .reg_type = ni_reg_622x,
771 .ao_speed = 1200,
772 .num_p0_dio_channels = 8,
773 .caldac = { caldac_none },
774 },
a25a701a 775 [BOARD_PCI6224] = {
68278f10
HS		 776 .name = "pci-6224",
777 .n_adchan = 32,
778 .adbits = 16,
779 .ai_fifo_depth = 4095,
780 .gainlkup = ai_gain_622x,
781 .ai_speed = 4000,
782 .reg_type = ni_reg_622x,
783 .num_p0_dio_channels = 32,
784 .caldac = { caldac_none },
785 },
a25a701a 786 [BOARD_PXI6224] = {
68278f10
HS		 787 .name = "pxi-6224",
788 .n_adchan = 32,
789 .adbits = 16,
790 .ai_fifo_depth = 4095,
791 .gainlkup = ai_gain_622x,
792 .ai_speed = 4000,
793 .reg_type = ni_reg_622x,
794 .num_p0_dio_channels = 32,
795 .caldac = { caldac_none },
796 },
a25a701a 797 [BOARD_PCI6225] = {
68278f10
HS		 798 .name = "pci-6225",
799 .n_adchan = 80,
800 .adbits = 16,
801 .ai_fifo_depth = 4095,
802 .gainlkup = ai_gain_622x,
803 .ai_speed = 4000,
804 .n_aochan = 2,
805 .aobits = 16,
806 .ao_fifo_depth = 8191,
a4f6d9ca 807 .ao_range_table = &range_bipolar10,
68278f10
HS		 808 .reg_type = ni_reg_622x,
809 .ao_speed = 1200,
810 .num_p0_dio_channels = 32,
811 .caldac = { caldac_none },
812 },
a25a701a 813 [BOARD_PXI6225] = {
68278f10
HS		 814 .name = "pxi-6225",
815 .n_adchan = 80,
816 .adbits = 16,
817 .ai_fifo_depth = 4095,
818 .gainlkup = ai_gain_622x,
819 .ai_speed = 4000,
820 .n_aochan = 2,
821 .aobits = 16,
822 .ao_fifo_depth = 8191,
a4f6d9ca 823 .ao_range_table = &range_bipolar10,
68278f10
HS		 824 .reg_type = ni_reg_622x,
825 .ao_speed = 1200,
826 .num_p0_dio_channels = 32,
827 .caldac = { caldac_none },
ecb8486d 828 },
a25a701a 829 [BOARD_PCI6229] = {
68278f10
HS		 830 .name = "pci-6229",
831 .n_adchan = 32,
832 .adbits = 16,
833 .ai_fifo_depth = 4095,
834 .gainlkup = ai_gain_622x,
835 .ai_speed = 4000,
836 .n_aochan = 4,
837 .aobits = 16,
838 .ao_fifo_depth = 8191,
a4f6d9ca 839 .ao_range_table = &range_bipolar10,
68278f10
HS		 840 .reg_type = ni_reg_622x,
841 .ao_speed = 1200,
842 .num_p0_dio_channels = 32,
843 .caldac = { caldac_none },
844 },
a25a701a 845 [BOARD_PCI6250] = {
68278f10
HS		 846 .name = "pci-6250",
847 .n_adchan = 16,
848 .adbits = 16,
849 .ai_fifo_depth = 4095,
850 .gainlkup = ai_gain_628x,
851 .ai_speed = 800,
852 .reg_type = ni_reg_625x,
853 .num_p0_dio_channels = 8,
854 .caldac = { caldac_none },
855 },
a25a701a 856 [BOARD_PCI6251] = {
68278f10
HS		 857 .name = "pci-6251",
858 .n_adchan = 16,
859 .adbits = 16,
860 .ai_fifo_depth = 4095,
861 .gainlkup = ai_gain_628x,
862 .ai_speed = 800,
863 .n_aochan = 2,
864 .aobits = 16,
865 .ao_fifo_depth = 8191,
866 .ao_range_table = &range_ni_M_625x_ao,
867 .reg_type = ni_reg_625x,
868 .ao_speed = 350,
869 .num_p0_dio_channels = 8,
870 .caldac = { caldac_none },
871 },
a25a701a 872 [BOARD_PCIE6251] = {
68278f10
HS		 873 .name = "pcie-6251",
874 .n_adchan = 16,
875 .adbits = 16,
876 .ai_fifo_depth = 4095,
877 .gainlkup = ai_gain_628x,
878 .ai_speed = 800,
879 .n_aochan = 2,
880 .aobits = 16,
881 .ao_fifo_depth = 8191,
882 .ao_range_table = &range_ni_M_625x_ao,
883 .reg_type = ni_reg_625x,
884 .ao_speed = 350,
885 .num_p0_dio_channels = 8,
886 .caldac = { caldac_none },
887 },
a25a701a 888 [BOARD_PXIE6251] = {
68278f10
HS		 889 .name = "pxie-6251",
890 .n_adchan = 16,
891 .adbits = 16,
892 .ai_fifo_depth = 4095,
893 .gainlkup = ai_gain_628x,
894 .ai_speed = 800,
895 .n_aochan = 2,
896 .aobits = 16,
897 .ao_fifo_depth = 8191,
898 .ao_range_table = &range_ni_M_625x_ao,
899 .reg_type = ni_reg_625x,
900 .ao_speed = 350,
901 .num_p0_dio_channels = 8,
902 .caldac = { caldac_none },
903 },
a25a701a 904 [BOARD_PCI6254] = {
68278f10
HS		 905 .name = "pci-6254",
906 .n_adchan = 32,
907 .adbits = 16,
908 .ai_fifo_depth = 4095,
909 .gainlkup = ai_gain_628x,
910 .ai_speed = 800,
911 .reg_type = ni_reg_625x,
912 .num_p0_dio_channels = 32,
913 .caldac = { caldac_none },
914 },
a25a701a 915 [BOARD_PCI6259] = {
68278f10
HS		 916 .name = "pci-6259",
917 .n_adchan = 32,
918 .adbits = 16,
919 .ai_fifo_depth = 4095,
920 .gainlkup = ai_gain_628x,
921 .ai_speed = 800,
922 .n_aochan = 4,
923 .aobits = 16,
924 .ao_fifo_depth = 8191,
925 .ao_range_table = &range_ni_M_625x_ao,
926 .reg_type = ni_reg_625x,
927 .ao_speed = 350,
928 .num_p0_dio_channels = 32,
929 .caldac = { caldac_none },
930 },
a25a701a 931 [BOARD_PCIE6259] = {
68278f10
HS		 932 .name = "pcie-6259",
933 .n_adchan = 32,
934 .adbits = 16,
935 .ai_fifo_depth = 4095,
936 .gainlkup = ai_gain_628x,
937 .ai_speed = 800,
938 .n_aochan = 4,
939 .aobits = 16,
940 .ao_fifo_depth = 8191,
941 .ao_range_table = &range_ni_M_625x_ao,
942 .reg_type = ni_reg_625x,
943 .ao_speed = 350,
944 .num_p0_dio_channels = 32,
945 .caldac = { caldac_none },
946 },
a25a701a 947 [BOARD_PCI6280] = {
68278f10
HS		 948 .name = "pci-6280",
949 .n_adchan = 16,
950 .adbits = 18,
951 .ai_fifo_depth = 2047,
952 .gainlkup = ai_gain_628x,
953 .ai_speed = 1600,
954 .ao_fifo_depth = 8191,
955 .reg_type = ni_reg_628x,
956 .num_p0_dio_channels = 8,
957 .caldac = { caldac_none },
958 },
a25a701a 959 [BOARD_PCI6281] = {
68278f10
HS		 960 .name = "pci-6281",
961 .n_adchan = 16,
962 .adbits = 18,
963 .ai_fifo_depth = 2047,
964 .gainlkup = ai_gain_628x,
965 .ai_speed = 1600,
966 .n_aochan = 2,
967 .aobits = 16,
968 .ao_fifo_depth = 8191,
969 .ao_range_table = &range_ni_M_628x_ao,
970 .reg_type = ni_reg_628x,
971 .ao_unipolar = 1,
972 .ao_speed = 350,
973 .num_p0_dio_channels = 8,
974 .caldac = { caldac_none },
975 },
a25a701a 976 [BOARD_PXI6281] = {
68278f10
HS		 977 .name = "pxi-6281",
978 .n_adchan = 16,
979 .adbits = 18,
980 .ai_fifo_depth = 2047,
981 .gainlkup = ai_gain_628x,
982 .ai_speed = 1600,
983 .n_aochan = 2,
984 .aobits = 16,
985 .ao_fifo_depth = 8191,
986 .ao_range_table = &range_ni_M_628x_ao,
987 .reg_type = ni_reg_628x,
988 .ao_unipolar = 1,
989 .ao_speed = 350,
990 .num_p0_dio_channels = 8,
991 .caldac = { caldac_none },
992 },
a25a701a 993 [BOARD_PCI6284] = {
68278f10
HS		 994 .name = "pci-6284",
995 .n_adchan = 32,
996 .adbits = 18,
997 .ai_fifo_depth = 2047,
998 .gainlkup = ai_gain_628x,
999 .ai_speed = 1600,
1000 .reg_type = ni_reg_628x,
1001 .num_p0_dio_channels = 32,
1002 .caldac = { caldac_none },
1003 },
a25a701a 1004 [BOARD_PCI6289] = {
68278f10
HS		 1005 .name = "pci-6289",
1006 .n_adchan = 32,
1007 .adbits = 18,
1008 .ai_fifo_depth = 2047,
1009 .gainlkup = ai_gain_628x,
1010 .ai_speed = 1600,
1011 .n_aochan = 4,
1012 .aobits = 16,
1013 .ao_fifo_depth = 8191,
1014 .ao_range_table = &range_ni_M_628x_ao,
1015 .reg_type = ni_reg_628x,
1016 .ao_unipolar = 1,
1017 .ao_speed = 350,
1018 .num_p0_dio_channels = 32,
1019 .caldac = { caldac_none },
1020 },
a25a701a 1021 [BOARD_PCI6143] = {
68278f10
HS		 1022 .name = "pci-6143",
1023 .n_adchan = 8,
1024 .adbits = 16,
1025 .ai_fifo_depth = 1024,
1026 .gainlkup = ai_gain_6143,
1027 .ai_speed = 4000,
1028 .reg_type = ni_reg_6143,
1029 .num_p0_dio_channels = 8,
1030 .caldac = { ad8804_debug, ad8804_debug },
1031 },
a25a701a 1032 [BOARD_PXI6143] = {
68278f10
HS		 1033 .name = "pxi-6143",
1034 .n_adchan = 8,
1035 .adbits = 16,
1036 .ai_fifo_depth = 1024,
1037 .gainlkup = ai_gain_6143,
1038 .ai_speed = 4000,
1039 .reg_type = ni_reg_6143,
1040 .num_p0_dio_channels = 8,
1041 .caldac = { ad8804_debug, ad8804_debug },
1042 },
c4beb34e
DS		 1043};
1044
ac63baf5
HS		 1045#define interrupt_pin(a) 0
1046#define IRQ_POLARITY 1
9c340ac9 1047
ac63baf5 1048#define NI_E_IRQ_FLAGS IRQF_SHARED
9c340ac9 1049
ac63baf5 1050#include "ni_mio_common.c"
c4beb34e 1051
0a85b6f0
MT		 1052static int pcimio_ai_change(struct comedi_device *dev,
1053 struct comedi_subdevice *s, unsigned long new_size);
1054static int pcimio_ao_change(struct comedi_device *dev,
1055 struct comedi_subdevice *s, unsigned long new_size);
1056static int pcimio_gpct0_change(struct comedi_device *dev,
1057 struct comedi_subdevice *s,
1058 unsigned long new_size);
1059static int pcimio_gpct1_change(struct comedi_device *dev,
1060 struct comedi_subdevice *s,
1061 unsigned long new_size);
1062static int pcimio_dio_change(struct comedi_device *dev,
1063 struct comedi_subdevice *s,
1064 unsigned long new_size);
c4beb34e 1065
da91b269 1066static void m_series_init_eeprom_buffer(struct comedi_device *dev)
c4beb34e 1067{
0e05c552 1068 struct ni_private *devpriv = dev->private;
c4beb34e
DS		 1069 static const int Start_Cal_EEPROM = 0x400;
1070 static const unsigned window_size = 10;
f8db88ef
FMH		 1071 static const int serial_number_eeprom_offset = 0x4;
1072 static const int serial_number_eeprom_length = 0x4;
c4beb34e
DS		 1073 unsigned old_iodwbsr_bits;
1074 unsigned old_iodwbsr1_bits;
1075 unsigned old_iodwcr1_bits;
1076 int i;
1077
1078 old_iodwbsr_bits = readl(devpriv->mite->mite_io_addr + MITE_IODWBSR);
1079 old_iodwbsr1_bits = readl(devpriv->mite->mite_io_addr + MITE_IODWBSR_1);
1080 old_iodwcr1_bits = readl(devpriv->mite->mite_io_addr + MITE_IODWCR_1);
1081 writel(0x0, devpriv->mite->mite_io_addr + MITE_IODWBSR);
1082 writel(((0x80 | window_size) | devpriv->mite->daq_phys_addr),
0a85b6f0
MT		 1083 devpriv->mite->mite_io_addr + MITE_IODWBSR_1);
1084 writel(0x1 | old_iodwcr1_bits,
1085 devpriv->mite->mite_io_addr + MITE_IODWCR_1);
c4beb34e
DS		 1086 writel(0xf, devpriv->mite->mite_io_addr + 0x30);
1087
f8db88ef
FMH		 1088 BUG_ON(serial_number_eeprom_length > sizeof(devpriv->serial_number));
1089 for (i = 0; i < serial_number_eeprom_length; ++i) {
0a85b6f0 1090 char *byte_ptr = (char *)&devpriv->serial_number + i;
ac63baf5 1091 *byte_ptr = ni_readb(dev, serial_number_eeprom_offset + i);
f8db88ef
FMH		 1092 }
1093 devpriv->serial_number = be32_to_cpu(devpriv->serial_number);
1094
25c0ca84 1095 for (i = 0; i < M_SERIES_EEPROM_SIZE; ++i)
ac63baf5 1096 devpriv->eeprom_buffer[i] = ni_readb(dev, Start_Cal_EEPROM + i);
c4beb34e
DS		 1097
1098 writel(old_iodwbsr1_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR_1);
1099 writel(old_iodwbsr_bits, devpriv->mite->mite_io_addr + MITE_IODWBSR);
1100 writel(old_iodwcr1_bits, devpriv->mite->mite_io_addr + MITE_IODWCR_1);
1101 writel(0x0, devpriv->mite->mite_io_addr + 0x30);
1102}
1103
da91b269 1104static void init_6143(struct comedi_device *dev)
c4beb34e 1105{
6293e357 1106 const struct ni_board_struct *board = comedi_board(dev);
0e05c552
HS		 1107 struct ni_private *devpriv = dev->private;
1108
2696fb57 1109 /* Disable interrupts */
b30f0d0c 1110 ni_stc_writew(dev, 0, Interrupt_Control_Register);
c4beb34e 1111
2696fb57 1112 /* Initialise 6143 AI specific bits */
9c340ac9
HS		 1113
1114 /* Set G0,G1 DMA mode to E series version */
ac63baf5 1115 ni_writeb(dev, 0x00, Magic_6143);
9c340ac9 1116 /* Set EOCMode, ADCMode and pipelinedelay */
ac63baf5 1117 ni_writeb(dev, 0x80, PipelineDelay_6143);
9c340ac9 1118 /* Set EOC Delay */
ac63baf5 1119 ni_writeb(dev, 0x00, EOC_Set_6143);
c4beb34e 1120
6293e357 1121 /* Set the FIFO half full level */
ac63baf5 1122 ni_writel(dev, board->ai_fifo_depth / 2, AIFIFO_Flag_6143);
c4beb34e 1123
2696fb57 1124 /* Strobe Relay disable bit */
c4beb34e 1125 devpriv->ai_calib_source_enabled = 0;
ac63baf5
HS		 1126 ni_writew(dev, devpriv->ai_calib_source |
1127 Calibration_Channel_6143_RelayOff,
1128 Calibration_Channel_6143);
1129 ni_writew(dev, devpriv->ai_calib_source, Calibration_Channel_6143);
c4beb34e
DS		 1130}
1131
484ecc95 1132static void pcimio_detach(struct comedi_device *dev)
c4beb34e 1133{
0e05c552
HS		 1134 struct ni_private *devpriv = dev->private;
1135
c4beb34e 1136 mio_common_detach(dev);
25c0ca84 1137 if (dev->irq)
5f74ea14 1138 free_irq(dev->irq, dev);
0e05c552 1139 if (devpriv) {
c4beb34e
DS		 1140 mite_free_ring(devpriv->ai_mite_ring);
1141 mite_free_ring(devpriv->ao_mite_ring);
1142 mite_free_ring(devpriv->cdo_mite_ring);
1143 mite_free_ring(devpriv->gpct_mite_ring[0]);
1144 mite_free_ring(devpriv->gpct_mite_ring[1]);
a5cf79e3 1145 if (devpriv->mite) {
c4beb34e 1146 mite_unsetup(devpriv->mite);
a5cf79e3
IA		 1147 mite_free(devpriv->mite);
1148 }
c4beb34e 1149 }
7f072f54 1150 comedi_pci_disable(dev);
c4beb34e
DS		 1151}
1152
a690b7e5 1153static int pcimio_auto_attach(struct comedi_device *dev,
a25a701a 1154 unsigned long context)
c4beb34e 1155{
750af5e5 1156 struct pci_dev *pcidev = comedi_to_pci_dev(dev);
a25a701a 1157 const struct ni_board_struct *board = NULL;
0e05c552 1158 struct ni_private *devpriv;
c108a5e0 1159 unsigned int irq;
c4beb34e
DS		 1160 int ret;
1161
a25a701a
HS		 1162 if (context < ARRAY_SIZE(ni_boards))
1163 board = &ni_boards[context];
1164 if (!board)
1165 return -ENODEV;
1166 dev->board_ptr = board;
1167 dev->board_name = board->name;
c4beb34e 1168
818f569f
HS		 1169 ret = comedi_pci_enable(dev);
1170 if (ret)
1171 return ret;
818f569f 1172
c4beb34e 1173 ret = ni_alloc_private(dev);
0e05c552 1174 if (ret)
c4beb34e 1175 return ret;
0e05c552 1176 devpriv = dev->private;
c4beb34e 1177
a5cf79e3 1178 devpriv->mite = mite_alloc(pcidev);
b0213674 1179 if (!devpriv->mite)
a5cf79e3 1180 return -ENOMEM;
c4beb34e 1181
b30f0d0c 1182 if (board->reg_type & ni_reg_m_series_mask)
17733219
HS		 1183 devpriv->is_m_series = 1;
1184
c4beb34e
DS		 1185 ret = mite_setup(devpriv->mite);
1186 if (ret < 0) {
e8f31fd3 1187 pr_warn("error setting up mite\n");
c4beb34e
DS		 1188 return ret;
1189 }
7fc465b1 1190
c4beb34e
DS		 1191 devpriv->ai_mite_ring = mite_alloc_ring(devpriv->mite);
1192 if (devpriv->ai_mite_ring == NULL)
1193 return -ENOMEM;
1194 devpriv->ao_mite_ring = mite_alloc_ring(devpriv->mite);
1195 if (devpriv->ao_mite_ring == NULL)
1196 return -ENOMEM;
1197 devpriv->cdo_mite_ring = mite_alloc_ring(devpriv->mite);
1198 if (devpriv->cdo_mite_ring == NULL)
1199 return -ENOMEM;
1200 devpriv->gpct_mite_ring[0] = mite_alloc_ring(devpriv->mite);
1201 if (devpriv->gpct_mite_ring[0] == NULL)
1202 return -ENOMEM;
1203 devpriv->gpct_mite_ring[1] = mite_alloc_ring(devpriv->mite);
1204 if (devpriv->gpct_mite_ring[1] == NULL)
1205 return -ENOMEM;
1206
17733219 1207 if (devpriv->is_m_series)
c4beb34e 1208 m_series_init_eeprom_buffer(dev);
a25a701a 1209 if (board->reg_type == ni_reg_6143)
c4beb34e
DS		 1210 init_6143(dev);
1211
c108a5e0
HS		 1212 irq = mite_irq(devpriv->mite);
1213 if (irq) {
1214 ret = request_irq(irq, ni_E_interrupt, NI_E_IRQ_FLAGS,
1215 dev->board_name, dev);
1216 if (ret == 0)
1217 dev->irq = irq;
c4beb34e
DS		 1218 }
1219
5b6137d8 1220 ret = ni_E_init(dev);
c4beb34e
DS		 1221 if (ret < 0)
1222 return ret;
1223
1224 dev->subdevices[NI_AI_SUBDEV].buf_change = &pcimio_ai_change;
1225 dev->subdevices[NI_AO_SUBDEV].buf_change = &pcimio_ao_change;
1226 dev->subdevices[NI_GPCT_SUBDEV(0)].buf_change = &pcimio_gpct0_change;
1227 dev->subdevices[NI_GPCT_SUBDEV(1)].buf_change = &pcimio_gpct1_change;
1228 dev->subdevices[NI_DIO_SUBDEV].buf_change = &pcimio_dio_change;
1229
fb780d21 1230 return 0;
c4beb34e
DS		 1231}
1232
0a85b6f0
MT		 1233static int pcimio_ai_change(struct comedi_device *dev,
1234 struct comedi_subdevice *s, unsigned long new_size)
c4beb34e 1235{
0e05c552 1236 struct ni_private *devpriv = dev->private;
c4beb34e
DS		 1237 int ret;
1238
b74e635d 1239 ret = mite_buf_change(devpriv->ai_mite_ring, s);
c4beb34e
DS		 1240 if (ret < 0)
1241 return ret;
1242
1243 return 0;
1244}
1245
0a85b6f0
MT		 1246static int pcimio_ao_change(struct comedi_device *dev,
1247 struct comedi_subdevice *s, unsigned long new_size)
c4beb34e 1248{
0e05c552 1249 struct ni_private *devpriv = dev->private;
c4beb34e
DS		 1250 int ret;
1251
b74e635d 1252 ret = mite_buf_change(devpriv->ao_mite_ring, s);
c4beb34e
DS		 1253 if (ret < 0)
1254 return ret;
1255
1256 return 0;
1257}
1258
0a85b6f0
MT		 1259static int pcimio_gpct0_change(struct comedi_device *dev,
1260 struct comedi_subdevice *s,
1261 unsigned long new_size)
c4beb34e 1262{
0e05c552 1263 struct ni_private *devpriv = dev->private;
c4beb34e
DS		 1264 int ret;
1265
b74e635d 1266 ret = mite_buf_change(devpriv->gpct_mite_ring[0], s);
c4beb34e
DS		 1267 if (ret < 0)
1268 return ret;
1269
1270 return 0;
1271}
1272
0a85b6f0
MT		 1273static int pcimio_gpct1_change(struct comedi_device *dev,
1274 struct comedi_subdevice *s,
1275 unsigned long new_size)
c4beb34e 1276{
0e05c552 1277 struct ni_private *devpriv = dev->private;
c4beb34e
DS		 1278 int ret;
1279
b74e635d 1280 ret = mite_buf_change(devpriv->gpct_mite_ring[1], s);
c4beb34e
DS		 1281 if (ret < 0)
1282 return ret;
1283
1284 return 0;
1285}
1286
0a85b6f0
MT		 1287static int pcimio_dio_change(struct comedi_device *dev,
1288 struct comedi_subdevice *s, unsigned long new_size)
c4beb34e 1289{
0e05c552 1290 struct ni_private *devpriv = dev->private;
c4beb34e
DS		 1291 int ret;
1292
b74e635d 1293 ret = mite_buf_change(devpriv->cdo_mite_ring, s);
c4beb34e
DS		 1294 if (ret < 0)
1295 return ret;
1296
1297 return 0;
1298}
3c323c01 1299
95f18c0c
HS		 1300static struct comedi_driver ni_pcimio_driver = {
1301 .driver_name = "ni_pcimio",
1302 .module = THIS_MODULE,
750af5e5 1303 .auto_attach = pcimio_auto_attach,
95f18c0c
HS		 1304 .detach = pcimio_detach,
1305};
1306
a690b7e5 1307static int ni_pcimio_pci_probe(struct pci_dev *dev,
b8f4ac23 1308 const struct pci_device_id *id)
95f18c0c 1309{
b8f4ac23 1310 return comedi_pci_auto_config(dev, &ni_pcimio_driver, id->driver_data);
95f18c0c
HS		 1311}
1312
41e043fc 1313static const struct pci_device_id ni_pcimio_pci_table[] = {
a25a701a
HS		 1314 { PCI_VDEVICE(NI, 0x0162), BOARD_PCIMIO_16XE_50 }, /* 0x1620? */
1315 { PCI_VDEVICE(NI, 0x1170), BOARD_PCIMIO_16XE_10 },
1316 { PCI_VDEVICE(NI, 0x1180), BOARD_PCIMIO_16E_1 },
1317 { PCI_VDEVICE(NI, 0x1190), BOARD_PCIMIO_16E_4 },
1318 { PCI_VDEVICE(NI, 0x11b0), BOARD_PXI6070E },
1319 { PCI_VDEVICE(NI, 0x11c0), BOARD_PXI6040E },
1320 { PCI_VDEVICE(NI, 0x11d0), BOARD_PXI6030E },
1321 { PCI_VDEVICE(NI, 0x1270), BOARD_PCI6032E },
1322 { PCI_VDEVICE(NI, 0x1330), BOARD_PCI6031E },
1323 { PCI_VDEVICE(NI, 0x1340), BOARD_PCI6033E },
1324 { PCI_VDEVICE(NI, 0x1350), BOARD_PCI6071E },
1325 { PCI_VDEVICE(NI, 0x14e0), BOARD_PCI6110 },
1326 { PCI_VDEVICE(NI, 0x14f0), BOARD_PCI6111 },
1327 { PCI_VDEVICE(NI, 0x1580), BOARD_PXI6031E },
1328 { PCI_VDEVICE(NI, 0x15b0), BOARD_PXI6071E },
1329 { PCI_VDEVICE(NI, 0x1880), BOARD_PCI6711 },
1330 { PCI_VDEVICE(NI, 0x1870), BOARD_PCI6713 },
1331 { PCI_VDEVICE(NI, 0x18b0), BOARD_PCI6052E },
1332 { PCI_VDEVICE(NI, 0x18c0), BOARD_PXI6052E },
1333 { PCI_VDEVICE(NI, 0x2410), BOARD_PCI6733 },
1334 { PCI_VDEVICE(NI, 0x2420), BOARD_PXI6733 },
1335 { PCI_VDEVICE(NI, 0x2430), BOARD_PCI6731 },
1336 { PCI_VDEVICE(NI, 0x2890), BOARD_PCI6036E },
1337 { PCI_VDEVICE(NI, 0x28c0), BOARD_PCI6014 },
1338 { PCI_VDEVICE(NI, 0x2a60), BOARD_PCI6023E },
1339 { PCI_VDEVICE(NI, 0x2a70), BOARD_PCI6024E },
1340 { PCI_VDEVICE(NI, 0x2a80), BOARD_PCI6025E },
1341 { PCI_VDEVICE(NI, 0x2ab0), BOARD_PXI6025E },
1342 { PCI_VDEVICE(NI, 0x2b80), BOARD_PXI6713 },
1343 { PCI_VDEVICE(NI, 0x2b90), BOARD_PXI6711 },
1344 { PCI_VDEVICE(NI, 0x2c80), BOARD_PCI6035E },
1345 { PCI_VDEVICE(NI, 0x2ca0), BOARD_PCI6034E },
1346 { PCI_VDEVICE(NI, 0x70aa), BOARD_PCI6229 },
1347 { PCI_VDEVICE(NI, 0x70ab), BOARD_PCI6259 },
1348 { PCI_VDEVICE(NI, 0x70ac), BOARD_PCI6289 },
1349 { PCI_VDEVICE(NI, 0x70af), BOARD_PCI6221 },
1350 { PCI_VDEVICE(NI, 0x70b0), BOARD_PCI6220 },
1351 { PCI_VDEVICE(NI, 0x70b4), BOARD_PCI6250 },
1352 { PCI_VDEVICE(NI, 0x70b6), BOARD_PCI6280 },
1353 { PCI_VDEVICE(NI, 0x70b7), BOARD_PCI6254 },
1354 { PCI_VDEVICE(NI, 0x70b8), BOARD_PCI6251 },
1355 { PCI_VDEVICE(NI, 0x70bc), BOARD_PCI6284 },
1356 { PCI_VDEVICE(NI, 0x70bd), BOARD_PCI6281 },
1357 { PCI_VDEVICE(NI, 0x70bf), BOARD_PXI6281 },
1358 { PCI_VDEVICE(NI, 0x70c0), BOARD_PCI6143 },
1359 { PCI_VDEVICE(NI, 0x70f2), BOARD_PCI6224 },
1360 { PCI_VDEVICE(NI, 0x70f3), BOARD_PXI6224 },
1361 { PCI_VDEVICE(NI, 0x710d), BOARD_PXI6143 },
1362 { PCI_VDEVICE(NI, 0x716c), BOARD_PCI6225 },
1363 { PCI_VDEVICE(NI, 0x716d), BOARD_PXI6225 },
1364 { PCI_VDEVICE(NI, 0x717f), BOARD_PCIE6259 },
1365 { PCI_VDEVICE(NI, 0x71bc), BOARD_PCI6221_37PIN },
1366 { PCI_VDEVICE(NI, 0x717d), BOARD_PCIE6251 },
1367 { PCI_VDEVICE(NI, 0x72e8), BOARD_PXIE6251 },
95f18c0c
HS		 1368 { 0 }
1369};
1370MODULE_DEVICE_TABLE(pci, ni_pcimio_pci_table);
1371
1372static struct pci_driver ni_pcimio_pci_driver = {
1373 .name = "ni_pcimio",
1374 .id_table = ni_pcimio_pci_table,
1375 .probe = ni_pcimio_pci_probe,
9901a4d7 1376 .remove = comedi_pci_auto_unconfig,
95f18c0c 1377};
9c4aef95 1378module_comedi_pci_driver(ni_pcimio_driver, ni_pcimio_pci_driver);
95f18c0c 1379
3c323c01
IA		 1380MODULE_AUTHOR("Comedi http://www.comedi.org");
1381MODULE_DESCRIPTION("Comedi low-level driver");
1382MODULE_LICENSE("GPL");
Linux 6.x block layer and io_uring tree(s)